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analog-devices.lbr
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<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="7.7.0">
<drawing>
<settings>
<setting alwaysvectorfont="no"/>
<setting verticaltext="up"/>
</settings>
<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
<layers>
<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
<layer number="2" name="Route2" color="1" fill="3" visible="no" active="yes"/>
<layer number="3" name="Route3" color="4" fill="3" visible="no" active="yes"/>
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<library>
<packages>
<package name="SO16W">
<description><b>SMALL OUTLINE INTEGRATED CIRCUIT</b><p>
wide body 7.5 mm/JEDEC MS-013AA</description>
<wire x1="-5.395" y1="5.9" x2="5.395" y2="5.9" width="0.1998" layer="39"/>
<wire x1="5.395" y1="-5.9" x2="-5.395" y2="-5.9" width="0.1998" layer="39"/>
<wire x1="-5.395" y1="-5.9" x2="-5.395" y2="5.9" width="0.1998" layer="39"/>
<wire x1="5.19" y1="-3.7" x2="-5.19" y2="-3.7" width="0.2032" layer="51"/>
<wire x1="-5.19" y1="-3.7" x2="-5.19" y2="-3.2" width="0.2032" layer="51"/>
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<text x="-4.445" y="1.27" size="1.27" layer="25">>NAME</text>
<text x="-4.445" y="-2.54" size="1.27" layer="27">>VALUE</text>
<rectangle x1="-4.6901" y1="-5.32" x2="-4.1999" y2="-3.8001" layer="51"/>
<rectangle x1="-3.4201" y1="-5.32" x2="-2.9299" y2="-3.8001" layer="51"/>
<rectangle x1="-2.1501" y1="-5.32" x2="-1.6599" y2="-3.8001" layer="51"/>
<rectangle x1="-0.8801" y1="-5.32" x2="-0.3899" y2="-3.8001" layer="51"/>
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</package>
<package name="SO8">
<description><b>8-Lead Small Outline IC</b> (SO-8)<p>
Source: http://www.analog.com/UploadedFiles/Data_Sheets/703465986AD8611_2_0.pdf</description>
<wire x1="2.4" y1="1.9" x2="2.4" y2="-1.4" width="0.2032" layer="51"/>
<wire x1="2.4" y1="-1.4" x2="2.4" y2="-1.9" width="0.2032" layer="51"/>
<wire x1="2.4" y1="-1.9" x2="-2.4" y2="-1.9" width="0.2032" layer="51"/>
<wire x1="-2.4" y1="-1.9" x2="-2.4" y2="-1.4" width="0.2032" layer="51"/>
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<text x="-3.175" y="-1.905" size="1.27" layer="25" rot="R90">>NAME</text>
<text x="4.445" y="-1.905" size="1.27" layer="27" rot="R90">>VALUE</text>
<rectangle x1="-2.1501" y1="-3.1001" x2="-1.6599" y2="-2" layer="51"/>
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<rectangle x1="-2.1501" y1="2" x2="-1.6599" y2="3.1001" layer="51"/>
</package>
<package name="DIL08">
<description><b>Dual In Line Package</b></description>
<wire x1="5.08" y1="2.921" x2="-5.08" y2="2.921" width="0.1524" layer="21"/>
<wire x1="-5.08" y1="-2.921" x2="5.08" y2="-2.921" width="0.1524" layer="21"/>
<wire x1="5.08" y1="2.921" x2="5.08" y2="-2.921" width="0.1524" layer="21"/>
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<wire x1="-5.08" y1="-2.921" x2="-5.08" y2="-1.016" width="0.1524" layer="21"/>
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<text x="-5.334" y="-2.921" size="1.27" layer="25" ratio="10" rot="R90">>NAME</text>
<text x="-3.556" y="-0.635" size="1.27" layer="27" ratio="10">>VALUE</text>
</package>
</packages>
<symbols>
<symbol name="AD724">
<pin name="P$1" x="-12.7" y="7.62" visible="pad" length="middle"/>
<pin name="P$2" x="-12.7" y="5.08" visible="pad" length="middle"/>
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<text x="-6.35" y="6.985" size="1.27" layer="97">STND</text>
<text x="-6.35" y="4.445" size="1.27" layer="97">AGND</text>
<text x="-6.35" y="1.905" size="1.27" layer="97">FIN</text>
<text x="-6.35" y="-0.635" size="1.27" layer="97">APOS</text>
<text x="-6.35" y="-3.175" size="1.27" layer="97">ENCD</text>
<text x="-6.35" y="-5.715" size="1.27" layer="97">RIN</text>
<text x="-6.35" y="-8.255" size="1.27" layer="97">GIN</text>
<text x="-6.35" y="-10.795" size="1.27" layer="97">BIN</text>
<text x="6.985" y="8.255" size="1.27" layer="97" rot="R180">HSYNC</text>
<text x="6.985" y="5.715" size="1.27" layer="97" rot="R180">VSYNC</text>
<text x="6.985" y="3.175" size="1.27" layer="97" rot="R180">DPOS</text>
<text x="6.985" y="0.635" size="1.27" layer="97" rot="R180">DGND</text>
<text x="6.985" y="-1.905" size="1.27" layer="97" rot="R180">SELECT</text>
<text x="6.985" y="-4.445" size="1.27" layer="97" rot="R180">LUMA</text>
<text x="6.985" y="-6.985" size="1.27" layer="97" rot="R180">COMP</text>
<text x="6.985" y="-9.525" size="1.27" layer="97" rot="R180">CRMA</text>
<wire x1="-7.62" y1="10.16" x2="-7.62" y2="-12.7" width="0.254" layer="94"/>
<wire x1="-7.62" y1="-12.7" x2="7.62" y2="-12.7" width="0.254" layer="94"/>
<wire x1="7.62" y1="-12.7" x2="7.62" y2="10.16" width="0.254" layer="94"/>
<wire x1="7.62" y1="10.16" x2="-7.62" y2="10.16" width="0.254" layer="94"/>
<text x="-6.35" y="12.065" size="1.27" layer="97" ratio="15">>NAME</text>
<text x="-6.35" y="-15.875" size="1.27" layer="97" ratio="15">>VALUE</text>
</symbol>
<symbol name="OP">
<wire x1="-2.54" y1="5.08" x2="-2.54" y2="-5.08" width="0.254" layer="94"/>
<wire x1="-2.54" y1="-5.08" x2="7.62" y2="0" width="0.254" layer="94"/>
<wire x1="7.62" y1="0" x2="-2.54" y2="5.08" width="0.254" layer="94"/>
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<text x="3.81" y="3.81" size="1.778" layer="95">>NAME</text>
<text x="3.81" y="-5.08" size="1.778" layer="96">>VALUE</text>
<pin name="IN+" x="-5.08" y="2.54" visible="pad" length="short" direction="in"/>
<pin name="IN-" x="-5.08" y="-2.54" visible="pad" length="short" direction="in"/>
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<symbol name="PWR+-">
<text x="1.27" y="3.81" size="1.778" layer="95">>NAME</text>
<text x="1.27" y="-5.08" size="1.778" layer="96">>VALUE</text>
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<pin name="V-" x="0" y="-7.62" visible="pad" length="middle" direction="pwr" rot="R90"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="AD8056" prefix="IC">
<description><b>High-Speed, Low-Power Dual Operational Amplifier</b><p>
Source: http://www.analog.com/static/imported-files/data_sheets/AD826.pdf</description>
<gates>
<gate name="A" symbol="OP" x="-10.16" y="7.62"/>
<gate name="B" symbol="OP" x="-10.16" y="-7.62"/>
<gate name="P" symbol="PWR+-" x="7.62" y="0"/>
</gates>
<devices>
<device name="ARZ" package="SO8">
<connects>
<connect gate="A" pin="IN+" pad="3"/>
<connect gate="A" pin="IN-" pad="2"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="B" pin="IN+" pad="5"/>
<connect gate="B" pin="IN-" pad="6"/>
<connect gate="B" pin="OUT" pad="7"/>
<connect gate="P" pin="V+" pad="8"/>
<connect gate="P" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="AN" package="DIL08">
<connects>
<connect gate="A" pin="IN+" pad="3"/>
<connect gate="A" pin="IN-" pad="2"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="B" pin="IN+" pad="5"/>
<connect gate="B" pin="IN-" pad="6"/>
<connect gate="B" pin="OUT" pad="7"/>
<connect gate="P" pin="V+" pad="8"/>
<connect gate="P" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value="ALTERA CORPORATION" constant="no"/>
<attribute name="MPN" value="AD826ANZ" constant="no"/>
<attribute name="OC_FARNELL" value="1438583" constant="no"/>
<attribute name="OC_NEWARK" value="59K6530" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="AD724" prefix="IC">
<gates>
<gate name="G$1" symbol="AD724" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SO16W">
<connects>
<connect gate="G$1" pin="P$1" pad="1"/>
<connect gate="G$1" pin="P$10" pad="10"/>
<connect gate="G$1" pin="P$11" pad="11"/>
<connect gate="G$1" pin="P$12" pad="12"/>
<connect gate="G$1" pin="P$13" pad="13"/>
<connect gate="G$1" pin="P$14" pad="14"/>
<connect gate="G$1" pin="P$15" pad="15"/>
<connect gate="G$1" pin="P$16" pad="16"/>
<connect gate="G$1" pin="P$2" pad="2"/>
<connect gate="G$1" pin="P$3" pad="3"/>
<connect gate="G$1" pin="P$4" pad="4"/>
<connect gate="G$1" pin="P$5" pad="5"/>
<connect gate="G$1" pin="P$6" pad="6"/>
<connect gate="G$1" pin="P$7" pad="7"/>
<connect gate="G$1" pin="P$8" pad="8"/>
<connect gate="G$1" pin="P$9" pad="9"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>