ceph: update to 15.2.8

AOSC-Dev · Feb 24, 2021 · 295298d · 295298d
1 parent 51ac443
commit 295298d
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Showing 6 changed files with 291 additions and 3 deletions.
diff --git a/extra-admin/ceph/autobuild/patches/0001-src-common-crc32c_intel_fast.patch b/extra-admin/ceph/autobuild/patches/0001-src-common-crc32c_intel_fast.patch
@@ -0,0 +1,228 @@
+--- ceph-15.2.4/src/yasm-wrapper.orig	2020-06-30 11:40:51.000000000 -0400
++++ ceph-15.2.4/src/yasm-wrapper	2020-07-20 12:21:34.574980869 -0400
+@@ -1,10 +1,11 @@
+-#!/bin/sh -e
++#!/bin/sh
+
+ # libtool and yasm do not get along.
+ # filter out any crap that libtool feeds us that yasm does not understand.
+ #echo $0: got $*
+ new=""
+ touch=""
++object=""
+ while [ -n "$*" ]; do
+     case "$1" in
+ 	-f )
+@@ -29,6 +30,12 @@
+ 	    touch="$1"
+ 	    shift
+ 	    ;;
++	-o )
++	    shift
++	    object="$1"
++	    new="$new -o $1"
++	    shift
++	    ;;
+ 	* )
+ 	    new="$new $1"
+ 	    shift
+@@ -36,8 +43,15 @@
+     esac
+ done
+
+-#echo $0: yasm $new
+-yasm $new
++#echo ${0}: yasm ${new}
++yasm ${new}
++
++echo ${new} | grep -- "crc32c_intel_fast*asm\.s"
++if [ $? -ne 0 ]; then
++    touch /tmp/${object}
++    ld -r -z ibt -z shstk -z noexecstack -o ${object}.tmp ${object}
++    mv ${object}.tmp ${object}
++fi
+
+ [ -n "$touch" ] && touch $touch
+
+--- ceph-15.2.2/src/common/crc32c_intel_fast_asm.s.orig	2020-05-26 08:34:32.226201974 -0400
++++ ceph-15.2.2/src/common/crc32c_intel_fast_asm.s	2020-05-26 17:19:20.327201974 -0400
+@@ -1,5 +1,5 @@
+ ;
+-; Copyright 2012-2013 Intel Corporation All Rights Reserved.
++; Copyright 2012-2015 Intel Corporation All Rights Reserved.
+ ; All rights reserved.
+ ;
+ ; http://opensource.org/licenses/BSD-3-Clause
+@@ -59,16 +59,34 @@
+ 	xor     rbx, rbx                ;; rbx = crc1 = 0;
+ 	xor     r10, r10                ;; r10 = crc2 = 0;
+
++	cmp	len, %%bSize*3*2
++	jbe	%%non_prefetch
++
+  %assign i 0
+  %rep %%bSize/8 - 1
+-	crc32   rax, [bufptmp+i + 0*%%bSize]  ;; update crc0
+-	crc32   rbx, [bufptmp+i + 1*%%bSize]  ;; update crc1
+-	crc32   r10, [bufptmp+i + 2*%%bSize]  ;; update crc2
++ %if i < %%bSize*3/4
++	prefetchnta	[bufptmp+ %%bSize*3 + i*4]
++ %endif
++	crc32   rax, qword [bufptmp+i + 0*%%bSize]  ;; update crc0
++	crc32   rbx, qword [bufptmp+i + 1*%%bSize]  ;; update crc1
++	crc32   r10, qword [bufptmp+i + 2*%%bSize]  ;; update crc2
+ 	%assign i (i+8)
+  %endrep
+-	crc32   rax, [bufptmp+i + 0*%%bSize]  ;; update crc0
+-	crc32   rbx, [bufptmp+i + 1*%%bSize]  ;; update crc1
+-; SKIP  ;crc32  r10, [bufptmp+i + 2*%%bSize]  ;; update crc2
++	jmp %%next %+ %1
++
++%%non_prefetch:
++ %assign i 0
++ %rep %%bSize/8 - 1
++	crc32   rax, qword [bufptmp+i + 0*%%bSize]  ;; update crc0
++	crc32   rbx, qword [bufptmp+i + 1*%%bSize]  ;; update crc1
++	crc32  r10, qword [bufptmp+i + 2*%%bSize]  ;; update crc2
++	%assign i (i+8)
++ %endrep
++
++%%next %+ %1:
++	crc32   rax, qword [bufptmp+i + 0*%%bSize]  ;; update crc0
++	crc32   rbx, qword [bufptmp+i + 1*%%bSize]  ;; update crc1
++; SKIP	;crc32  r10, qword [bufptmp+i + 2*%%bSize]  ;; update crc2
+
+ 	; merge in crc0
+ 	movzx   bufp_dw, al
+@@ -180,12 +198,15 @@
+ %define crc_init_dw     r8d 
+ %endif
+
+-
++	endbranch
+ 	push    rdi
+ 	push    rbx
+
+ 	mov     rax, crc_init           ;; rax = crc_init;
+
++	cmp	len, 8
++	jb	less_than_8
++
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+@@ -195,9 +216,6 @@
+ 					;; amount of the address
+ 	je      proc_block              ;; Skip if aligned
+
+-	cmp     len, 8
+-	jb      less_than_8
+-
+ 	;;;; Calculate CRC of unaligned bytes of the buffer (if any) ;;;;
+ 	mov     rbx, [bufptmp]          ;; load a quadword from the buffer
+ 	add     bufptmp, bufp           ;; align buffer pointer for
+@@ -233,7 +251,7 @@
+ 	jnc     bit7                    ;; jump to bit-6 if bit-7 == 0
+  %assign i 0
+  %rep 16
+-	crc32   rax, [bufptmp+i]        ;; compute crc32 of 8-byte data
++	crc32   rax, qword [bufptmp+i]  ;; compute crc32 of 8-byte data
+ 	%assign i (i+8)
+  %endrep
+ 	je      do_return               ;; return if remaining data is zero
+@@ -244,7 +262,7 @@
+ 	jnc     bit6                    ;; jump to bit-6 if bit-7 == 0
+  %assign i 0
+  %rep 8
+-	crc32   rax, [bufptmp+i]        ;; compute crc32 of 8-byte data
++	crc32   rax, qword [bufptmp+i]  ;; compute crc32 of 8-byte data
+ 	%assign i (i+8)
+  %endrep
+ 	je      do_return               ;; return if remaining data is zero
+@@ -254,7 +272,7 @@
+ 	jnc     bit5                    ;; jump to bit-5 if bit-6 == 0
+  %assign i 0
+  %rep 4
+-	crc32   rax, [bufptmp+i]        ;;    compute crc32 of 8-byte data
++	crc32   rax, qword [bufptmp+i]  ;;    compute crc32 of 8-byte data
+ 	%assign i (i+8)
+  %endrep
+ 	je      do_return               ;; return if remaining data is zero
+@@ -264,7 +282,7 @@
+ 	jnc     bit4                    ;; jump to bit-4 if bit-5 == 0
+  %assign i 0
+  %rep 2
+-	crc32   rax, [bufptmp+i]        ;;    compute crc32 of 8-byte data
++	crc32   rax, qword [bufptmp+i]  ;;    compute crc32 of 8-byte data
+ 	%assign i (i+8)
+  %endrep
+ 	je      do_return               ;; return if remaining data is zero
+@@ -272,11 +290,11 @@
+ bit4:
+ 	shl     len_b, 1                ;; shift-out MSB (bit-4)
+ 	jnc     bit3                    ;; jump to bit-3 if bit-4 == 0
+-	crc32   rax, [bufptmp]          ;; compute crc32 of 8-byte data
++	crc32   rax, qword [bufptmp]    ;; compute crc32 of 8-byte data
+ 	je      do_return               ;; return if remaining data is zero
+ 	add     bufptmp, 8              ;; buf +=8; (next 8 bytes)
+ bit3:
+-	mov     rbx, [bufptmp]          ;; load a 8-bytes from the buffer:
++	mov     rbx, qword [bufptmp]    ;; load a 8-bytes from the buffer:
+ 	shl     len_b, 1                ;; shift-out MSB (bit-3)
+ 	jnc     bit2                    ;; jump to bit-2 if bit-3 == 0
+ 	crc32   eax, ebx                ;; compute crc32 of 4-byte data
+--- ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s.orig	2020-05-26 08:34:32.226201974 -0400
++++ ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s	2020-05-26 17:19:32.497201974 -0400
+@@ -1,5 +1,5 @@
+ ;
+-; Copyright 2012-2013 Intel Corporation All Rights Reserved.
++; Copyright 2012-2015 Intel Corporation All Rights Reserved.
+ ; All rights reserved.
+ ;
+ ; http://opensource.org/licenses/BSD-3-Clause
+@@ -59,6 +59,19 @@
+ 	xor     rbx, rbx                ;; rbx = crc1 = 0;
+ 	xor     r10, r10                ;; r10 = crc2 = 0;
+
++	cmp	len, %%bSize*3*2
++	jbe	%%non_prefetch
++
++ %assign i 0
++ %rep %%bSize/8 - 1
++	crc32   rax, bufptmp  ;; update crc0
++	crc32   rbx, bufptmp  ;; update crc1
++	crc32   r10, bufptmp  ;; update crc2
++	%assign i (i+8)
++ %endrep
++	jmp %%next %+ %1
++
++%%non_prefetch:
+  %assign i 0
+  %rep %%bSize/8 - 1
+ 	crc32   rax, bufptmp  ;; update crc0
+@@ -66,6 +79,8 @@
+ 	crc32   r10, bufptmp  ;; update crc2
+ 	%assign i (i+8)
+  %endrep
++
++%%next %+ %1:
+ 	crc32   rax, bufptmp  ;; update crc0
+ 	crc32   rbx, bufptmp  ;; update crc1
+ ; SKIP  ;crc32  r10, bufptmp  ;; update crc2
+@@ -180,12 +195,15 @@
+ %define crc_init_dw     r8d
+ %endif
+
+-
++	endbranch
+ 	push    rdi
+ 	push    rbx
+
+ 	mov     rax, crc_init           ;; rax = crc_init;
+
++	cmp	len, 8
++	jb	less_than_8
++
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
diff --git a/extra-admin/ceph/autobuild/patches/0002-src-common-CMakeLists.txt.patch b/extra-admin/ceph/autobuild/patches/0002-src-common-CMakeLists.txt.patch
@@ -0,0 +1,13 @@
+diff --git a/src/common/CMakeLists.txt b/src/common/CMakeLists.txt
+index 65ba10b0f1..eeedc29c37 100644
+--- a/src/common/CMakeLists.txt
++++ b/src/common/CMakeLists.txt
+@@ -165,7 +165,7 @@ elseif(HAVE_ARMV8_CRC)
+     crc32c_aarch64.c)
+ endif(HAVE_INTEL)
+
+-add_library(crc32 ${crc32_srcs})
++add_library(crc32 STATIC ${crc32_srcs})
+ if(HAVE_ARMV8_CRC)
+   set_target_properties(crc32 PROPERTIES
+     COMPILE_FLAGS "${CMAKE_C_FLAGS} ${ARMV8_CRC_COMPILE_FLAGS}")
diff --git a/extra-admin/ceph/autobuild/patches/0003-src-common-bitstr.h.patch b/extra-admin/ceph/autobuild/patches/0003-src-common-bitstr.h.patch
@@ -0,0 +1,21 @@
+--- ceph-15.1.0/src/common/bit_str.h.orig	2020-02-03 09:47:20.047149798 -0500
++++ ceph-15.1.0/src/common/bit_str.h	2020-02-03 09:47:50.213149798 -0500
+@@ -17,6 +17,7 @@
+ #include <cstdint>
+ #include <iosfwd>
+ #include <functional>
++#include <ostream>
+
+ namespace ceph {
+   class Formatter;
+--- ceph-15.2.4/src/global/signal_handler.h.orig        2020-07-17 12:57:54.763628429 -0400
++++ ceph-15.2.4/src/global/signal_handler.h     2020-07-17 12:58:10.610628429 -0400
+@@ -16,6 +16,8 @@
+ #define CEPH_GLOBAL_SIGNAL_HANDLER_H
+
+ #include <signal.h>
++#include <string>
++
+ #include "acconfig.h"
+
+ typedef void (*signal_handler_t)(int);
diff --git a/extra-admin/ceph/autobuild/patches/0004-ceph-define-use-ts-executor-as-default.patch b/extra-admin/ceph/autobuild/patches/0004-ceph-define-use-ts-executor-as-default.patch
@@ -0,0 +1,14 @@
+diff -Naur ceph-15.2.8/src/test/CMakeLists.txt ceph-15.2.8-new/src/test/CMakeLists.txt
+--- ceph-15.2.8/src/test/CMakeLists.txt        2020-12-16 09:29:50.000000000 -0800
++++ ceph-15.2.8-new/src/test/CMakeLists.txt    2021-02-05 20:00:48.012811334 -0800
+@@ -3,6 +3,10 @@
+ set(UNITTEST_LIBS GMock::Main GMock::GMock GTest::GTest ${CMAKE_THREAD_LIBS_INIT} 
+     ${GSSAPI_LIBRARIES} ${OPENLDAP_LIBRARIES} ${CMAKE_DL_LIBS})
+
++if(Boost_VERSION VERSION_GREATER_EQUAL 1.74)
++  add_definitions(-DBOOST_ASIO_USE_TS_EXECUTOR_AS_DEFAULT)
++endif()
++
+ add_library(unit-main OBJECT unit.cc)
+ target_include_directories(unit-main PRIVATE
+   $<TARGET_PROPERTY:GTest::GTest,INTERFACE_INCLUDE_DIRECTORIES>)
diff --git a/extra-admin/ceph/autobuild/patches/ceph-15.2.5-missing-includes.patch b/extra-admin/ceph/autobuild/patches/ceph-15.2.5-missing-includes.patch
@@ -0,0 +1,12 @@
+diff --git a/src/tools/rbd/action/Bench.cc b/src/tools/rbd/action/Bench.cc
+index aa6edbc18b..90c551c179 100644
+--- a/src/tools/rbd/action/Bench.cc
++++ b/src/tools/rbd/action/Bench.cc
+@@ -9,6 +9,7 @@
+ #include "common/ceph_mutex.h"
+ #include "include/types.h"
+ #include "global/signal_handler.h"
++#include <atomic>
+ #include <iostream>
+ #include <boost/accumulators/accumulators.hpp>
+ #include <boost/accumulators/statistics/stats.hpp>
diff --git a/extra-admin/ceph/spec b/extra-admin/ceph/spec
@@ -1,4 +1,4 @@
-VER=14.2.16
+VER=15.2.8
 SRCS="https://download.ceph.com/tarballs/ceph-$VER.tar.gz"
-CHKSUMS="sha256::f017cca903face8280e1f6757ce349d25e644aa945175312fb0cc31248ccad52"
-REL=1
+CHKSUMS="sha256::64c5eaf8c1e4092e59bc538e9241b6d5cf4ffca92563031abbea8b37b4cab9da"
+