diff --git a/components/storage/blockdevice/COMPONENT_SPIF/mbed_lib.json b/components/storage/blockdevice/COMPONENT_SPIF/mbed_lib.json index 26dc2c62ca9..51b8c7eace2 100644 --- a/components/storage/blockdevice/COMPONENT_SPIF/mbed_lib.json +++ b/components/storage/blockdevice/COMPONENT_SPIF/mbed_lib.json @@ -32,25 +32,25 @@ "SPI_CLK": "PE_12", "SPI_CS": "PE_11" }, - "MTB_ADV_WISE_1530": { + "MTB_ADV_WISE_1530": { "SPI_MOSI": "PC_3", "SPI_MISO": "PC_2", "SPI_CLK": "PB_13", - "SPI_CS": "PC_12" + "SPI_CS": "PC_12" }, - "MTB_MXCHIP_EMW3166": { + "MTB_MXCHIP_EMW3166": { "SPI_MOSI": "PB_15", "SPI_MISO": "PB_14", "SPI_CLK": "PB_13", - "SPI_CS": "PA_10" + "SPI_CS": "PA_10" }, - "MTB_USI_WM_BN_BM_22": { + "MTB_USI_WM_BN_BM_22": { "SPI_MOSI": "PC_3", "SPI_MISO": "PC_2", "SPI_CLK": "PB_13", - "SPI_CS": "PA_6" + "SPI_CS": "PA_6" }, - "MTB_ADV_WISE_1570": { + "MTB_ADV_WISE_1570": { "SPI_MOSI": "PA_7", "SPI_MISO": "PA_6", "SPI_CLK": "PA_5", @@ -62,6 +62,12 @@ "SPI_MISO": "PE_13", "SPI_CLK": "PE_12", "SPI_CS": "PE_11" + }, + "MTS_DRAGONFLY_F411RE": { + "SPI_MOSI": "SPI3_MOSI", + "SPI_MISO": "SPI3_MISO", + "SPI_CLK": "SPI3_SCK", + "SPI_CS": "SPI_CS1" } } } diff --git a/features/lwipstack/mbed_lib.json b/features/lwipstack/mbed_lib.json index 72e5efc0cdd..2114dc83aac 100644 --- a/features/lwipstack/mbed_lib.json +++ b/features/lwipstack/mbed_lib.json @@ -176,6 +176,9 @@ }, "FVP_MPS2_M3": { "mem-size": 36560 + }, + "MTS_DRAGONFLY_F411RE": { + "tcpip-thread-stacksize": 1600 } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct index ac2e36d4e26..597f6fa080a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct @@ -28,29 +28,51 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +#if !defined(MBED_APP_START) + #ifdef DISABLE_POST_BINARY_HOOK + #define MBED_APP_START 0x08000000 + #else + #define MBED_APP_START 0x08010000 + #endif +#endif + +#if !defined(MBED_APP_SIZE) + #ifdef DISABLE_POST_BINARY_HOOK + #define MBED_APP_SIZE 0x80000 + #else + #define MBED_APP_SIZE (0x80000 - 0x10000) + #endif +#endif + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif #define Stack_Size MBED_BOOT_STACK_SIZE -; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) -; FIRST 64 KB FLASH FOR BOOTLOADER -; REST 448 KB FLASH FOR APPLICATION -LR_IROM1 0x08010000 0x70000 { ; load region size_region +#define MBED_RAM_START 0x20000000 +#define MBED_RAM_SIZE 0x20000 +#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) +#define MBED_VECTTABLE_RAM_SIZE 0x198 +#define MBED_RAM0_START (MBED_RAM_START + MBED_VECTTABLE_RAM_SIZE) +#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE) + +; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) if not using MTS bootloader +; If using MTS bootloader, FIRST 64 KB FLASH FOR BOOTLOADER, REST 448 KB FLASH FOR APPLICATION +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 0x08010000 0x70000 { ; load address = execution address + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack + ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld index 2e34f3f3d4b..30801b6a608 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld @@ -1,17 +1,32 @@ /* Linker script for STM32F411 */ +#if !defined(MBED_APP_START) + #ifdef DISABLE_POST_BINARY_HOOK + #define MBED_APP_START 0x08000000 + #else + #define MBED_APP_START 0x08010000 + #endif +#endif + +#if !defined(MBED_APP_SIZE) + #ifdef DISABLE_POST_BINARY_HOOK + #define MBED_APP_SIZE 0x80000 + #else + #define MBED_APP_SIZE (0x80000 - 0x10000) + #endif +#endif + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif STACK_SIZE = MBED_BOOT_STACK_SIZE; + /* Linker script to configure memory regions. */ MEMORY -{ - /* First 64kB of flash reserved for bootloader */ - /* Other 448kB for application */ - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K +{ + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE /* CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K */ RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198 } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/startup_STM32F41x.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/startup_STM32F41x.S index b7f10ce5fc5..48b44713401 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/startup_STM32F41x.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/startup_STM32F41x.S @@ -66,8 +66,8 @@ __HeapLimit: .section .isr_vector .align 2 - .globl __isr_vector -__isr_vector: + .globl g_pfnVectors +g_pfnVectors: .long __StackTop /* Top of Stack */ .long Reset_Handler /* Reset Handler */ .long NMI_Handler /* NMI Handler */ @@ -171,7 +171,7 @@ __isr_vector: .long SPI4_IRQHandler /* SPI4 */ .long SPI5_IRQHandler /* SPI5 */ - .size __isr_vector, . - __isr_vector + .size g_pfnVectors, . - g_pfnVectors .text .thumb diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf index bf12247ac10..f26111bbc66 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -1,7 +1,12 @@ +if ((!isdefinedsymbol(MBED_APP_START)) && isdefinedsymbol(DISABLE_POST_BINARY_HOOK)) { define symbol MBED_APP_START = 0x08000000; } +if ((!isdefinedsymbol(MBED_APP_START)) && !isdefinedsymbol(DISABLE_POST_BINARY_HOOK)) { define symbol MBED_APP_START = 0x08010000; } +if ((!isdefinedsymbol(MBED_APP_SIZE)) && isdefinedsymbol(DISABLE_POST_BINARY_HOOK)) { define symbol MBED_APP_SIZE = 0x80000; } +if ((!isdefinedsymbol(MBED_APP_SIZE)) && !isdefinedsymbol(DISABLE_POST_BINARY_HOOK)) { define symbol MBED_APP_SIZE = 0x70000; } + /* [ROM = 512kb = 0x80000] */ -define symbol __intvec_start__ = 0x08010000; -define symbol __region_ROM_start__ = 0x08010000; -define symbol __region_ROM_end__ = 0x0807FFFF; +define symbol __intvec_start__ = MBED_APP_START; +define symbol __region_ROM_start__ = MBED_APP_START; +define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; /* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */ define symbol __NVIC_start__ = 0x20000000; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/flash_data.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/flash_data.h new file mode 100644 index 00000000000..6324b45d779 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/flash_data.h @@ -0,0 +1,55 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2016, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ +#ifndef MBED_FLASH_DATA_H +#define MBED_FLASH_DATA_H + +#include "device.h" +#include + +#if DEVICE_FLASH + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* FLASH SIZE */ +#define FLASH_SIZE (uint32_t) 0x80000 + +/* Base address of the Flash sectors Bank 1 */ +#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */ +#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */ + +#endif +#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c index 6ae08aac48f..e7cc6eed4e5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c @@ -36,6 +36,7 @@ #include "stm32f4xx.h" #include "mbed_debug.h" +#include "nvic_addr.h" /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ @@ -96,7 +97,7 @@ void SystemInit(void) #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */ #endif } diff --git a/targets/targets.json b/targets/targets.json index df184eb9d3c..d19dcb07e25 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4301,6 +4301,7 @@ "inherits": ["FAMILY_STM32"], "core": "Cortex-M4F", "extra_labels_add": ["STM32F4", "STM32F411RE"], + "components_add": ["FLASHIAP"], "config": { "modem_is_on_board": { "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.", @@ -4314,17 +4315,18 @@ } }, "overrides": { "lse_available": 0 }, - "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"], + "macros_add": ["HSE_VALUE=26000000"], "post_binary_hook": { "function": "MTSCode.combine_bins_mts_dragonfly", "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"] }, - "device_has_add": ["MPU"], + "device_has_add": ["MPU", "FLASH"], "device_has_remove": [ "SERIAL_FC" ], "release_versions": ["2", "5"], - "device_name": "STM32F411RE" + "device_name": "STM32F411RE", + "bootloader_supported": true }, "MTS_DRAGONFLY_L471QG": { "inherits": ["FAMILY_STM32"], diff --git a/tools/targets/__init__.py b/tools/targets/__init__.py index 8df0fd56394..ca07f691272 100644 --- a/tools/targets/__init__.py +++ b/tools/targets/__init__.py @@ -404,6 +404,9 @@ def get_post_build_hook(self, toolchain_labels): hook_data = self.post_binary_hook except AttributeError: return None + # If hook is null, also return + if hook_data is None: + return None # A hook was found. The hook's name is in the format # "classname.functionname" temp = hook_data["function"].split(".") diff --git a/tools/toolchains/mbed_toolchain.py b/tools/toolchains/mbed_toolchain.py index 2100865f76f..91104722672 100755 --- a/tools/toolchains/mbed_toolchain.py +++ b/tools/toolchains/mbed_toolchain.py @@ -255,6 +255,7 @@ def get_symbols(self, for_asm=False): "COMPONENT_" + data + "=1" for data in self.target.components ] + # Add extra symbols passed via 'macros' parameter self.cxx_symbols += self.macros @@ -949,6 +950,13 @@ def add_linker_defines(self): self.ld.append(define_string) self.flags["ld"].append(define_string) + if hasattr(self.target, 'post_binary_hook'): + if self.target.post_binary_hook is None: + define_string = self.make_ld_define( + "DISABLE_POST_BINARY_HOOK", 1) + self.ld.append(define_string) + self.flags["ld"].append(define_string) + # Set the configuration data def set_config_data(self, config_data): self.config_data = config_data