From 1ed4cff81e160d7e3384ad3ba3fc62cc7d3f83c5 Mon Sep 17 00:00:00 2001 From: Charles Date: Thu, 1 Jul 2021 19:34:59 +0200 Subject: [PATCH 01/19] Added LORA-E5 and RAK3172 lorawan modules --- .../TARGET_STM32WL/STM32WL_radio_driver.cpp | 39 ++- .../drivers/lora/TARGET_STM32WL/mbed_lib.json | 8 + .../TARGET_STM32WLE5xC/CMakeLists.txt | 29 +++ .../TARGET_LORA_E5/CMakeLists.txt | 17 ++ .../TARGET_LORA_E5/PeripheralNames.h | 66 ++++++ .../TARGET_LORA_E5/PeripheralPins.c | 222 ++++++++++++++++++ .../TARGET_LORA_E5/PinNames.h | 143 +++++++++++ .../TARGET_LORA_E5/system_clock.c | 69 ++++++ .../TARGET_RAK3172/CMakeLists.txt | 17 ++ .../TARGET_RAK3172/PeripheralNames.h | 66 ++++++ .../TARGET_RAK3172/PeripheralPins.c | 222 ++++++++++++++++++ .../TARGET_RAK3172/PinNames.h | 133 +++++++++++ .../TARGET_RAK3172/system_clock.c | 69 ++++++ targets/targets.json | 27 +++ 14 files changed, 1126 insertions(+), 1 deletion(-) create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/CMakeLists.txt create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/system_clock.c create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h create mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp index 2640b3a95d3..f0192f44e6f 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp +++ b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp @@ -16,8 +16,44 @@ #include "STM32WL_radio_driver.h" #include "drivers/DigitalOut.h" - /* Sets up radio switch position according to the radio mode */ +#if defined (TARGET_LORA_E5) || defined (TARGET_RAK3172) +/* This configuration is for RAK3172 or LoRa-E5 modules */ +/* Theese one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ +/* Added to avoid declarion in sample code for lorawan example with these mmodules +/* But provided as __weak so it has to be overwritten to match each specicific HW board */ +MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) +{ + // Radio specific controls (TX/RX duplexer switch control) + mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); + mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); + + switch (state) { + case RBI_SWITCH_OFF: { + /* Turn off switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RX: { + /*Turns On in Rx Mode the RF Switch */ + _rf_switch_ctrl1 = 1; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RFO_LP: + case RBI_SWITCH_RFO_HP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } + default: + break; + } +} + +#else /* This configuration is for NUCLEO_WL55JC */ /* But provided as __weak so it has to be overwritten to match each specicific HW board */ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) @@ -62,3 +98,4 @@ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) } } +#endif diff --git a/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json b/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json index 4a5ab666fd6..bd693ad2d24 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json +++ b/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json @@ -54,6 +54,14 @@ "rf-switch-ctl1": "PC_4", "rf-switch-ctl2": "PC_5", "rf-switch-ctl3": "PC_3" + }, + "LORA_E5": { + "rf-switch-ctl1": "PA_4", + "rf-switch-ctl2": "PA_5" + }, + "RAK3172": { + "rf-switch-ctl1": "PB_8", + "rf-switch-ctl2": "PC_13" } } } diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/CMakeLists.txt new file mode 100644 index 00000000000..545b9fc562b --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/CMakeLists.txt @@ -0,0 +1,29 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +add_subdirectory(TARGET_LORA_E5 EXCLUDE_FROM_ALL) +add_subdirectory(TARGET_RAK3172 EXCLUDE_FROM_ALL) + +if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") + set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32wle5xx.S) + set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32wle5xc.ld) +elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") + set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32wle5xx.S) + set(LINKER_FILE TOOLCHAIN_ARM/stm32wle5xc.sct) +endif() + +add_library(mbed-stm32wle5xc INTERFACE) + +target_sources(mbed-stm32wle5xc + INTERFACE + ${STARTUP_FILE} +) + +target_include_directories(mbed-stm32wle5xc + INTERFACE + . +) + +mbed_set_linker_script(mbed-stm32wle5xc ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) + +target_link_libraries(mbed-stm32wle5xc INTERFACE mbed-stm32wl) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt new file mode 100644 index 00000000000..efe1f113ecc --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +add_library(mbed-lora-e5 INTERFACE) + +target_sources(mbed-lora-e5 + INTERFACE + PeripheralPins.c + system_clock.c +) + +target_include_directories(mbed-lora-e5 + INTERFACE + . +) + +target_link_libraries(mbed-lora-e5 INTERFACE mbed-stm32wle5xc) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h new file mode 100644 index 00000000000..3a95d6d25d9 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2019 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_PERIPHERALNAMES_H +#define MBED_PERIPHERALNAMES_H + +#include "cmsis.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + DAC_1 = (int)DAC_BASE +} DACName; + + +typedef enum { + ADC_1 = (int)ADC_BASE +} ADCName; + + +typedef enum { + UART_1 = (int)USART1_BASE, + UART_2 = (int)USART2_BASE, + LPUART_1 = (int)LPUART1_BASE +} UARTName; + +#define DEVICE_SPI_COUNT 2 +typedef enum { + SPI_1 = (int)SPI1_BASE, + SPI_2 = (int)SPI2_BASE +} SPIName; + +typedef enum { + I2C_1 = (int)I2C1_BASE, + I2C_2 = (int)I2C2_BASE, + I2C_3 = (int)I2C3_BASE +} I2CName; + +typedef enum { + PWM_1 = (int)TIM1_BASE, + PWM_2 = (int)TIM2_BASE, + PWM_16 = (int)TIM16_BASE, + PWM_17 = (int)TIM17_BASE +} PWMName; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c new file mode 100644 index 00000000000..cc8c6eed4d6 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c @@ -0,0 +1,222 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + * + * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml + */ + +#include "PeripheralPins.h" +#include "mbed_toolchain.h" + +//============================================================================== +// Notes +// +// - The pins mentioned Px_y_ALTz are alternative possibilities which use other +// HW peripheral instances. You can use them the same way as any other "normal" +// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board +// pinout image on mbed.org. +// +// - The pins which are connected to other components present on the board have +// the comment "Connected to xxx". The pin function may not work properly in this +// case. These pins may not be displayed on the board pinout image on mbed.org. +// Please read the board reference manual and schematic for more information. +// +// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented +// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. +// +//============================================================================== + + +//*** ADC *** + +MBED_WEAK const PinMap PinMap_ADC[] = { + {PA_10, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6 + {PA_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7 + {PA_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8 + {PA_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9 // Connected to DEBUG_JTMS-SWDIO + {PA_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC_IN10 // Connected to DEBUG_JTCK-SWCLK + {PA_15, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC_IN11 + {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5 + {PB_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4 + {PB_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2 + {PB_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3 + {PB_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0 + {PB_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1 + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_ADC_Internal[] = { + {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, + {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, + {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, + {NC, NC, 0} +}; + +//*** DAC *** + +MBED_WEAK const PinMap PinMap_DAC[] = { + {PA_10, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {NC, NC, 0} +}; + +//*** I2C *** + +MBED_WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PA_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PA_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LED2 + {PB_11, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to LED3 + {PB_14, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PC_1, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PA_12, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_13, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to LED1 + {PC_0, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NC, 0} +}; + +//*** PWM *** + +// TIM2 cannot be used because already used by the us_ticker +// (update us_ticker_data.h file if another timer is chosen) +MBED_WEAK const PinMap PinMap_PWM[] = { +// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to B1 +// {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to B2 +// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_RX +// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX +// {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 +// {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 +// {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED2 + {PB_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 // Connected to LED2 +// {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 +// {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to LED3 + {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED1 + {NC, NC, 0} +}; + +//*** SERIAL *** + +MBED_WEAK const PinMap PinMap_UART_TX[] = { +// {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX +// {PA_2_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX +// {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to LED3 +// {PC_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX + {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_UART_RX[] = { +// {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX +// {PA_3_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX +// {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, +// {PC_0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX + {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_UART_RTS[] = { +// {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B2 + {PA_1_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to B2 + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_UART_CTS[] = { +// {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B1 + {PA_6, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NC, 0} +}; + +//*** SPI *** + +MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED1 + {PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, + {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to FE_CTRL3 + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_5, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, + {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to B2 + {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_8, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, + {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_2, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED2 + {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h new file mode 100644 index 00000000000..b98b96070b0 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h @@ -0,0 +1,143 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + * + * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml + */ + +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" +#include "PinNamesTypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + ALT0 = 0x100, + ALT1 = 0x200, + ALT2 = 0x300, + ALT3 = 0x400, + ALT4 = 0x500 +} ALTx; + +typedef enum { + + PA_0 = 0x00, + PA_1 = 0x01, + PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW + PA_2 = 0x02, + PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW + PA_3 = 0x03, + PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW + PA_4 = 0x04, + PA_5 = 0x05, + PA_6 = 0x06, + PA_7 = 0x07, + PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW + PA_8 = 0x08, + PA_9 = 0x09, + PA_10 = 0x0A, + PA_11 = 0x0B, + PA_12 = 0x0C, + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, + PB_0 = 0x10, + PB_1 = 0x11, + PB_2 = 0x12, + PB_3 = 0x13, + PB_4 = 0x14, + PB_5 = 0x15, + PB_6 = 0x16, + PB_7 = 0x17, + PB_8 = 0x18, + PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW + PB_9 = 0x19, + PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW + PB_10 = 0x1A, + PB_11 = 0x1B, + PB_12 = 0x1C, + PB_13 = 0x1D, + PB_14 = 0x1E, + PB_15 = 0x1F, + PC_0 = 0x20, + PC_1 = 0x21, + PC_2 = 0x22, + PC_3 = 0x23, + PC_4 = 0x24, + PC_5 = 0x25, + PC_6 = 0x26, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, + PH_3 = 0x73, + + /**** ADC internal channels ****/ + + ADC_TEMP = 0xF0, // Internal pin virtual value + ADC_VREF = 0xF1, // Internal pin virtual value + ADC_VBAT = 0xF2, // Internal pin virtual value + + // STDIO for console print +#ifdef MBED_CONF_TARGET_STDIO_UART_TX + CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX, +#else + CONSOLE_TX = PB_6, +#endif +#ifdef MBED_CONF_TARGET_STDIO_UART_RX + CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX, +#else + CONSOLE_RX = PB_7, +#endif + + // I2C signals aliases + I2C_SDA = PA_15, + I2C_SCL = PB_15, + + // SPI signals aliases + SPI_CS = PB_9, + SPI_MOSI = PA_10, + SPI_MISO = PB_14, + SPI_SCK = PB_13, + + // Standardized LED and button names + LED1 = PB_5, + LED2 = PB_10, + + BUTTON1 = PA_0, + + // Backward legacy names + USER_BUTTON = BUTTON1, + //PWM_OUT = D3, + + /**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + + /**** DEBUG pins ****/ + DEBUG_JTCK_SWCLK = PA_14, + DEBUG_JTDO_SWO = PB_3, + DEBUG_JTMS_SWDIO = PA_13, + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/system_clock.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/system_clock.c new file mode 100644 index 00000000000..ae2309a02a5 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/system_clock.c @@ -0,0 +1,69 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ + +/** + * This file configures the system clock as follows: + *----------------------------------------------------------------------------- + * System clock source | HSE (external 32 MHz clock) + *----------------------------------------------------------------------------- + * SYSCLK(MHz) | 48 + * AHBCLK (MHz) | 48 + * APB1CLK (MHz) | 48 + * APB2CLK (MHz) | 48 + * USB capable | NO + *----------------------------------------------------------------------------- +**/ + +#include "mbed_assert.h" +#include "objects.h" + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ + +MBED_WEAK void SetSysClock(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + MBED_ASSERT(HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK); + /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3|RCC_CLOCKTYPE_HCLK + |RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1 + |RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1; + MBED_ASSERT(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK); + /* Peripheral clock enable */ +} diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt new file mode 100644 index 00000000000..3df9a488f67 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +add_library(mbed-rak3172 INTERFACE) + +target_sources(mbed-rak3172 + INTERFACE + PeripheralPins.c + system_clock.c +) + +target_include_directories(mbed-rak3172 + INTERFACE + . +) + +target_link_libraries(mbed-rak3172 INTERFACE mbed-stm32wle5xc) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h new file mode 100644 index 00000000000..3a95d6d25d9 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2019 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_PERIPHERALNAMES_H +#define MBED_PERIPHERALNAMES_H + +#include "cmsis.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + DAC_1 = (int)DAC_BASE +} DACName; + + +typedef enum { + ADC_1 = (int)ADC_BASE +} ADCName; + + +typedef enum { + UART_1 = (int)USART1_BASE, + UART_2 = (int)USART2_BASE, + LPUART_1 = (int)LPUART1_BASE +} UARTName; + +#define DEVICE_SPI_COUNT 2 +typedef enum { + SPI_1 = (int)SPI1_BASE, + SPI_2 = (int)SPI2_BASE +} SPIName; + +typedef enum { + I2C_1 = (int)I2C1_BASE, + I2C_2 = (int)I2C2_BASE, + I2C_3 = (int)I2C3_BASE +} I2CName; + +typedef enum { + PWM_1 = (int)TIM1_BASE, + PWM_2 = (int)TIM2_BASE, + PWM_16 = (int)TIM16_BASE, + PWM_17 = (int)TIM17_BASE +} PWMName; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c new file mode 100644 index 00000000000..cc8c6eed4d6 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c @@ -0,0 +1,222 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + * + * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml + */ + +#include "PeripheralPins.h" +#include "mbed_toolchain.h" + +//============================================================================== +// Notes +// +// - The pins mentioned Px_y_ALTz are alternative possibilities which use other +// HW peripheral instances. You can use them the same way as any other "normal" +// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board +// pinout image on mbed.org. +// +// - The pins which are connected to other components present on the board have +// the comment "Connected to xxx". The pin function may not work properly in this +// case. These pins may not be displayed on the board pinout image on mbed.org. +// Please read the board reference manual and schematic for more information. +// +// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented +// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. +// +//============================================================================== + + +//*** ADC *** + +MBED_WEAK const PinMap PinMap_ADC[] = { + {PA_10, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6 + {PA_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7 + {PA_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8 + {PA_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9 // Connected to DEBUG_JTMS-SWDIO + {PA_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC_IN10 // Connected to DEBUG_JTCK-SWCLK + {PA_15, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC_IN11 + {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5 + {PB_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4 + {PB_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2 + {PB_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3 + {PB_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0 + {PB_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1 + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_ADC_Internal[] = { + {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, + {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, + {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, + {NC, NC, 0} +}; + +//*** DAC *** + +MBED_WEAK const PinMap PinMap_DAC[] = { + {PA_10, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {NC, NC, 0} +}; + +//*** I2C *** + +MBED_WEAK const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PA_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PA_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LED2 + {PB_11, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to LED3 + {PB_14, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PC_1, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PA_12, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_13, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to LED1 + {PC_0, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NC, 0} +}; + +//*** PWM *** + +// TIM2 cannot be used because already used by the us_ticker +// (update us_ticker_data.h file if another timer is chosen) +MBED_WEAK const PinMap PinMap_PWM[] = { +// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to B1 +// {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to B2 +// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_RX +// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX +// {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 +// {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 +// {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED2 + {PB_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 // Connected to LED2 +// {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 +// {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to LED3 + {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED1 + {NC, NC, 0} +}; + +//*** SERIAL *** + +MBED_WEAK const PinMap PinMap_UART_TX[] = { +// {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX +// {PA_2_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX +// {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to LED3 +// {PC_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX + {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_UART_RX[] = { +// {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX +// {PA_3_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX +// {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, +// {PC_0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX + {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_UART_RTS[] = { +// {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B2 + {PA_1_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to B2 + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_UART_CTS[] = { +// {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B1 + {PA_6, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NC, 0} +}; + +//*** SPI *** + +MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED1 + {PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, + {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to FE_CTRL3 + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_5, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, + {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to B2 + {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_8, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {NC, NC, 0} +}; + +MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, + {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_2, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED2 + {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h new file mode 100644 index 00000000000..e4d0f10d590 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h @@ -0,0 +1,133 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + * + * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml + */ + +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" +#include "PinNamesTypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + ALT0 = 0x100, + ALT1 = 0x200, + ALT2 = 0x300, + ALT3 = 0x400, + ALT4 = 0x500 +} ALTx; + +typedef enum { + + PA_0 = 0x00, + PA_1 = 0x01, + PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW + PA_2 = 0x02, + PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW + PA_3 = 0x03, + PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW + PA_4 = 0x04, + PA_5 = 0x05, + PA_6 = 0x06, + PA_7 = 0x07, + PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW + PA_8 = 0x08, + PA_9 = 0x09, + PA_10 = 0x0A, + PA_11 = 0x0B, + PA_12 = 0x0C, + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, + PB_0 = 0x10, + PB_1 = 0x11, + PB_2 = 0x12, + PB_3 = 0x13, + PB_4 = 0x14, + PB_5 = 0x15, + PB_6 = 0x16, + PB_7 = 0x17, + PB_8 = 0x18, + PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW + PB_9 = 0x19, + PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW + PB_10 = 0x1A, + PB_11 = 0x1B, + PB_12 = 0x1C, + PB_13 = 0x1D, + PB_14 = 0x1E, + PB_15 = 0x1F, + PC_0 = 0x20, + PC_1 = 0x21, + PC_2 = 0x22, + PC_3 = 0x23, + PC_4 = 0x24, + PC_5 = 0x25, + PC_6 = 0x26, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, + PH_3 = 0x73, + + /**** ADC internal channels ****/ + + ADC_TEMP = 0xF0, // Internal pin virtual value + ADC_VREF = 0xF1, // Internal pin virtual value + ADC_VBAT = 0xF2, // Internal pin virtual value + + // STDIO for console print +#ifdef MBED_CONF_TARGET_STDIO_UART_TX + CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX, +#else + CONSOLE_TX = PB_6, +#endif +#ifdef MBED_CONF_TARGET_STDIO_UART_RX + CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX, +#else + CONSOLE_RX = PB_7, +#endif + + // I2C signals aliases + I2C_SDA = PA_11, + I2C_SCL = PA_12, + + // SPI signals aliases + SPI_CS = PA_4, + SPI_SCK = PA_5, + SPI_MISO = PA_6, + SPI_MOSI = PA_7, + + /**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + + /**** DEBUG pins ****/ + DEBUG_JTCK_SWCLK = PA_14, + DEBUG_JTDO_SWO = PB_3, + DEBUG_JTMS_SWDIO = PA_13, + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c new file mode 100644 index 00000000000..ae2309a02a5 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c @@ -0,0 +1,69 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ + +/** + * This file configures the system clock as follows: + *----------------------------------------------------------------------------- + * System clock source | HSE (external 32 MHz clock) + *----------------------------------------------------------------------------- + * SYSCLK(MHz) | 48 + * AHBCLK (MHz) | 48 + * APB1CLK (MHz) | 48 + * APB2CLK (MHz) | 48 + * USB capable | NO + *----------------------------------------------------------------------------- +**/ + +#include "mbed_assert.h" +#include "objects.h" + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ + +MBED_WEAK void SetSysClock(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + MBED_ASSERT(HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK); + /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3|RCC_CLOCKTYPE_HCLK + |RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1 + |RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1; + MBED_ASSERT(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK); + /* Peripheral clock enable */ +} diff --git a/targets/targets.json b/targets/targets.json index 755abe62dc1..13f2b5ff561 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4381,6 +4381,33 @@ ], "device_name": "STM32WL55JCIx" }, + "MCU_STM32WLe5xC": { + "inherits": [ + "MCU_STM32WL" + ], + "public": false, + "macros_add": [ + "STM32WLE5xx" + ], + "extra_labels_add": [ + "STM32WLE5xC" + ], + "device_name": "STM32WLE5JCIx", + "mbed_rom_start": "0x8000000", + "mbed_rom_size": "0x40000", + "mbed_ram_start": "0x20000000", + "mbed_ram_size": "0x10000" + }, + "LORA_E5": { + "inherits": [ + "MCU_STM32WLe5xC" + ] + }, + "RAK3172": { + "inherits": [ + "MCU_STM32WLe5xC" + ] + }, "MIMXRT1050_EVK": { "supported_form_factors": [ "ARDUINO_UNO" From 2a1e1036afda4eb9c820cfce5dc4c6f59717441f Mon Sep 17 00:00:00 2001 From: Charles Date: Thu, 1 Jul 2021 23:15:35 +0200 Subject: [PATCH 02/19] format for travis pass --- .../drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp index f0192f44e6f..1271b3fae64 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp +++ b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp @@ -41,7 +41,12 @@ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) _rf_switch_ctrl2 = 0; break; } - case RBI_SWITCH_RFO_LP: + case RBI_SWITCH_RFO_LP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } case RBI_SWITCH_RFO_HP: { /*Turns On in Tx High Power the RF Switch */ _rf_switch_ctrl1 = 0; From 3e8e0528e19529bcb33bb8ac64bf89b8973cb5e0 Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 00:46:56 +0200 Subject: [PATCH 03/19] cosmetic --- .../drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp index 1271b3fae64..0c3f944b475 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp +++ b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp @@ -20,7 +20,7 @@ #if defined (TARGET_LORA_E5) || defined (TARGET_RAK3172) /* This configuration is for RAK3172 or LoRa-E5 modules */ /* Theese one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ -/* Added to avoid declarion in sample code for lorawan example with these mmodules +/* Added to avoid declarion in sample code for lorawan example with these mmodules */ /* But provided as __weak so it has to be overwritten to match each specicific HW board */ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) { From da1b28a9e16d9b1c9f104b0e3ad1a76fc93916dc Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 00:47:16 +0200 Subject: [PATCH 04/19] device_name in target for travis --- targets/targets.json | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 13f2b5ff561..4915831c574 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4392,7 +4392,6 @@ "extra_labels_add": [ "STM32WLE5xC" ], - "device_name": "STM32WLE5JCIx", "mbed_rom_start": "0x8000000", "mbed_rom_size": "0x40000", "mbed_ram_start": "0x20000000", @@ -4401,12 +4400,14 @@ "LORA_E5": { "inherits": [ "MCU_STM32WLe5xC" - ] + ], + "device_name": "STM32WLE5JCIx" }, "RAK3172": { "inherits": [ "MCU_STM32WLe5xC" - ] + ], + "device_name": "STM32WLE5JCIx" }, "MIMXRT1050_EVK": { "supported_form_factors": [ From ba833f4470b9c1aa7798f072dbd08a508b57236d Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 11:18:39 +0200 Subject: [PATCH 05/19] aligment --- targets/targets.json | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 4915831c574..87c854b9b9d 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4386,12 +4386,12 @@ "MCU_STM32WL" ], "public": false, - "macros_add": [ - "STM32WLE5xx" - ], - "extra_labels_add": [ - "STM32WLE5xC" - ], + "macros_add": [ + "STM32WLE5xx" + ], + "extra_labels_add": [ + "STM32WLE5xC" + ], "mbed_rom_start": "0x8000000", "mbed_rom_size": "0x40000", "mbed_ram_start": "0x20000000", From cabc95b14ea0981982199f60743a658fee612e66 Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:05:54 +0200 Subject: [PATCH 06/19] moved up to to STM32WL folder --- .../TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt | 1 - .../TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt | 1 - .../TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt | 1 - 3 files changed, 3 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt index 9d95409ac1d..d57d92d8871 100644 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt @@ -6,7 +6,6 @@ add_library(mbed-nucleo-wl55jc INTERFACE) target_sources(mbed-nucleo-wl55jc INTERFACE PeripheralPins.c - system_clock.c ) target_include_directories(mbed-nucleo-wl55jc diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt index efe1f113ecc..bd385c76bc8 100644 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt @@ -6,7 +6,6 @@ add_library(mbed-lora-e5 INTERFACE) target_sources(mbed-lora-e5 INTERFACE PeripheralPins.c - system_clock.c ) target_include_directories(mbed-lora-e5 diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt index 3df9a488f67..6bce8241c22 100644 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt @@ -6,7 +6,6 @@ add_library(mbed-rak3172 INTERFACE) target_sources(mbed-rak3172 INTERFACE PeripheralPins.c - system_clock.c ) target_include_directories(mbed-rak3172 From b7aecc715d0a18276f01df66edd96cf04de3986c Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:06:07 +0200 Subject: [PATCH 07/19] moved up to to STM32WL folder --- .../TARGET_STM32WL/PeripheralNames.h | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 targets/TARGET_STM/TARGET_STM32WL/PeripheralNames.h diff --git a/targets/TARGET_STM/TARGET_STM32WL/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WL/PeripheralNames.h new file mode 100644 index 00000000000..3a95d6d25d9 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32WL/PeripheralNames.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2019 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_PERIPHERALNAMES_H +#define MBED_PERIPHERALNAMES_H + +#include "cmsis.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + DAC_1 = (int)DAC_BASE +} DACName; + + +typedef enum { + ADC_1 = (int)ADC_BASE +} ADCName; + + +typedef enum { + UART_1 = (int)USART1_BASE, + UART_2 = (int)USART2_BASE, + LPUART_1 = (int)LPUART1_BASE +} UARTName; + +#define DEVICE_SPI_COUNT 2 +typedef enum { + SPI_1 = (int)SPI1_BASE, + SPI_2 = (int)SPI2_BASE +} SPIName; + +typedef enum { + I2C_1 = (int)I2C1_BASE, + I2C_2 = (int)I2C2_BASE, + I2C_3 = (int)I2C3_BASE +} I2CName; + +typedef enum { + PWM_1 = (int)TIM1_BASE, + PWM_2 = (int)TIM2_BASE, + PWM_16 = (int)TIM16_BASE, + PWM_17 = (int)TIM17_BASE +} PWMName; + + +#ifdef __cplusplus +} +#endif + +#endif From 91e5abeb0fb22b1b9cf9fd5a60c9f838a72b5261 Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:06:32 +0200 Subject: [PATCH 08/19] moved up to to STM32WL folder --- .../TARGET_NUCLEO_WL55JC/system_clock.c | 69 ------------------- .../TARGET_RAK3172/system_clock.c | 69 ------------------- .../TARGET_LORA_E5 => }/system_clock.c | 0 3 files changed, 138 deletions(-) delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/system_clock.c delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c rename targets/TARGET_STM/TARGET_STM32WL/{TARGET_STM32WLE5xC/TARGET_LORA_E5 => }/system_clock.c (100%) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/system_clock.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/system_clock.c deleted file mode 100644 index 70d39202503..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/system_clock.c +++ /dev/null @@ -1,69 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -/** - * This file configures the system clock as follows: - *----------------------------------------------------------------------------- - * System clock source | HSE (external 32 MHz clock) - *----------------------------------------------------------------------------- - * SYSCLK(MHz) | 48 - * AHBCLK (MHz) | 48 - * APB1CLK (MHz) | 48 - * APB2CLK (MHz) | 48 - * USB capable | NO - *----------------------------------------------------------------------------- -**/ - -#include "mbed_assert.h" -#include "objects.h" - -/** - * @brief Configures the System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers - * @note This function should be called only once the RCC clock configuration - * is reset to the default reset state (done in SystemInit() function). - * @param None - * @retval None - */ - -MBED_WEAK void SetSysClock(void) -{ - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - - /** Configure the main internal regulator output voltage - */ - __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.MSIState = RCC_MSI_ON; - RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - MBED_ASSERT(HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK); - /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3 | RCC_CLOCKTYPE_HCLK - | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 - | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1; - MBED_ASSERT(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK); - /* Peripheral clock enable */ -} diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c deleted file mode 100644 index ae2309a02a5..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/system_clock.c +++ /dev/null @@ -1,69 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -/** - * This file configures the system clock as follows: - *----------------------------------------------------------------------------- - * System clock source | HSE (external 32 MHz clock) - *----------------------------------------------------------------------------- - * SYSCLK(MHz) | 48 - * AHBCLK (MHz) | 48 - * APB1CLK (MHz) | 48 - * APB2CLK (MHz) | 48 - * USB capable | NO - *----------------------------------------------------------------------------- -**/ - -#include "mbed_assert.h" -#include "objects.h" - -/** - * @brief Configures the System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers - * @note This function should be called only once the RCC clock configuration - * is reset to the default reset state (done in SystemInit() function). - * @param None - * @retval None - */ - -MBED_WEAK void SetSysClock(void) -{ - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - - /** Configure the main internal regulator output voltage - */ - __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.MSIState = RCC_MSI_ON; - RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - MBED_ASSERT(HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK); - /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3|RCC_CLOCKTYPE_HCLK - |RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1 - |RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1; - MBED_ASSERT(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK); - /* Peripheral clock enable */ -} diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/system_clock.c b/targets/TARGET_STM/TARGET_STM32WL/system_clock.c similarity index 100% rename from targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/system_clock.c rename to targets/TARGET_STM/TARGET_STM32WL/system_clock.c From 48ccc9f1d29fc8ab31846bfb01201be5cdeb5ef4 Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:06:48 +0200 Subject: [PATCH 09/19] moved up to to STM32WL folder --- targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt index 1b8e7848726..dd8a9a975ee 100644 --- a/targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt @@ -16,6 +16,7 @@ target_sources(mbed-stm32wl pwmout_device.c serial_device.c spi_api.c + system_clock.c ) target_include_directories(mbed-stm32wl From 637ffe38a0382557d44565493ae543dd6bf68f8c Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:07:53 +0200 Subject: [PATCH 10/19] specific target subfolder for radio driver --- .../lora/TARGET_STM32WL/CMakeLists.txt | 18 +++--- .../TARGET_LORA_E5/CMakeLists.txt | 12 ++++ .../TARGET_LORA_E5/STM32WL_radio_driver.cpp | 58 +++++++++++++++++++ .../TARGET_NUCLEO_WL55JC/CMakeLists.txt | 12 ++++ .../STM32WL_radio_driver.cpp | 45 -------------- .../TARGET_RAK3172/CMakeLists.txt | 12 ++++ .../TARGET_RAK3172/STM32WL_radio_driver.cpp | 58 +++++++++++++++++++ 7 files changed, 162 insertions(+), 53 deletions(-) create mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt create mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp create mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt rename connectivity/drivers/lora/TARGET_STM32WL/{ => TARGET_NUCLEO_WL55JC}/STM32WL_radio_driver.cpp (57%) create mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt create mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp diff --git a/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt index 35280ef154a..bbaa1b63e76 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt +++ b/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt @@ -1,12 +1,14 @@ # Copyright (c) 2020 ARM Limited. All rights reserved. # SPDX-License-Identifier: Apache-2.0 -target_include_directories(mbed-lorawan - INTERFACE - . -) +if("NUCLEO_WL55JC" IN_LIST MBED_TARGET) + add_subdirectory(TARGET_NUCLEO_WL55JC) +endif() -target_sources(mbed-lorawan - INTERFACE - STM32WL_LoRaRadio.cpp -) +if("LORA_E5" IN_LIST MBED_TARGET) + add_subdirectory(TARGET_LORA_E5) +endif() + +if("RAK3172" IN_LIST MBED_TARGET) + add_subdirectory(TARGET_RAK3172) +endif() diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt new file mode 100644 index 00000000000..fba12f70233 --- /dev/null +++ b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt @@ -0,0 +1,12 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +target_include_directories(mbed-lorawan + INTERFACE + . +) + +target_sources(mbed-lorawan + INTERFACE + STM32WL_radio_driver.cpp +) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp new file mode 100644 index 00000000000..e825249f236 --- /dev/null +++ b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp @@ -0,0 +1,58 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +#include "STM32WL_radio_driver.h" +#include "drivers/DigitalOut.h" + +/* Sets up radio switch position according to the radio mode */ +/* This configuration is for LoRa-E5 module */ +/* This one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ +/* Added to avoid declarion in sample code for lorawan example with this mmodules */ +/* But provided as __weak so it has to be overwritten to match each specicific HW board */ +MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) +{ + // Radio specific controls (TX/RX duplexer switch control) + mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); + mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); + + switch (state) { + case RBI_SWITCH_OFF: { + /* Turn off switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RX: { + /*Turns On in Rx Mode the RF Switch */ + _rf_switch_ctrl1 = 1; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RFO_LP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } + case RBI_SWITCH_RFO_HP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } + default: + break; + } +} diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt new file mode 100644 index 00000000000..fba12f70233 --- /dev/null +++ b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt @@ -0,0 +1,12 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +target_include_directories(mbed-lorawan + INTERFACE + . +) + +target_sources(mbed-lorawan + INTERFACE + STM32WL_radio_driver.cpp +) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp similarity index 57% rename from connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp rename to connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp index 0c3f944b475..a13d867c1ae 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp +++ b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp @@ -16,49 +16,6 @@ #include "STM32WL_radio_driver.h" #include "drivers/DigitalOut.h" -/* Sets up radio switch position according to the radio mode */ -#if defined (TARGET_LORA_E5) || defined (TARGET_RAK3172) -/* This configuration is for RAK3172 or LoRa-E5 modules */ -/* Theese one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ -/* Added to avoid declarion in sample code for lorawan example with these mmodules */ -/* But provided as __weak so it has to be overwritten to match each specicific HW board */ -MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) -{ - // Radio specific controls (TX/RX duplexer switch control) - mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); - mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); - - switch (state) { - case RBI_SWITCH_OFF: { - /* Turn off switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RX: { - /*Turns On in Rx Mode the RF Switch */ - _rf_switch_ctrl1 = 1; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RFO_LP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - case RBI_SWITCH_RFO_HP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - default: - break; - } -} - -#else /* This configuration is for NUCLEO_WL55JC */ /* But provided as __weak so it has to be overwritten to match each specicific HW board */ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) @@ -102,5 +59,3 @@ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) break; } } - -#endif diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt new file mode 100644 index 00000000000..fba12f70233 --- /dev/null +++ b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt @@ -0,0 +1,12 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +target_include_directories(mbed-lorawan + INTERFACE + . +) + +target_sources(mbed-lorawan + INTERFACE + STM32WL_radio_driver.cpp +) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp new file mode 100644 index 00000000000..413b31b2854 --- /dev/null +++ b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp @@ -0,0 +1,58 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +#include "STM32WL_radio_driver.h" +#include "drivers/DigitalOut.h" + +/* Sets up radio switch position according to the radio mode */ +/* This configuration is for RAK3172 module */ +/* This one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ +/* Added to avoid declarion in sample code for lorawan example with this mmodules */ +/* But provided as __weak so it has to be overwritten to match each specicific HW board */ +MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) +{ + // Radio specific controls (TX/RX duplexer switch control) + mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); + mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); + + switch (state) { + case RBI_SWITCH_OFF: { + /* Turn off switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RX: { + /*Turns On in Rx Mode the RF Switch */ + _rf_switch_ctrl1 = 1; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RFO_LP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } + case RBI_SWITCH_RFO_HP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } + default: + break; + } +} From b1de77980a8afa84341ecd1fc3cba920d54c9bb6 Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:08:06 +0200 Subject: [PATCH 11/19] moved up to to STM32WL folder --- .../TARGET_NUCLEO_WL55JC/PeripheralNames.h | 66 ------------------- .../TARGET_LORA_E5/PeripheralNames.h | 66 ------------------- .../TARGET_RAK3172/PeripheralNames.h | 66 ------------------- 3 files changed, 198 deletions(-) delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/PeripheralNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/PeripheralNames.h deleted file mode 100644 index 3971fb445f0..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/PeripheralNames.h +++ /dev/null @@ -1,66 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2019 ARM Limited - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_PERIPHERALNAMES_H -#define MBED_PERIPHERALNAMES_H - -#include "cmsis.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - DAC_1 = (int)DAC_BASE -} DACName; - - -typedef enum { - ADC_1 = (int)ADC_BASE -} ADCName; - - -typedef enum { - UART_1 = (int)USART1_BASE, - UART_2 = (int)USART2_BASE, - LPUART_1 = (int)LPUART1_BASE -} UARTName; - -#define DEVICE_SPI_COUNT 2 -typedef enum { - SPI_1 = (int)SPI1_BASE, - SPI_2 = (int)SPI2_BASE -} SPIName; - -typedef enum { - I2C_1 = (int)I2C1_BASE, - I2C_2 = (int)I2C2_BASE, - I2C_3 = (int)I2C3_BASE -} I2CName; - -typedef enum { - PWM_1 = (int)TIM1_BASE, - PWM_2 = (int)TIM2_BASE, - PWM_16 = (int)TIM16_BASE, - PWM_17 = (int)TIM17_BASE -} PWMName; - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h deleted file mode 100644 index 3a95d6d25d9..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralNames.h +++ /dev/null @@ -1,66 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2019 ARM Limited - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_PERIPHERALNAMES_H -#define MBED_PERIPHERALNAMES_H - -#include "cmsis.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - DAC_1 = (int)DAC_BASE -} DACName; - - -typedef enum { - ADC_1 = (int)ADC_BASE -} ADCName; - - -typedef enum { - UART_1 = (int)USART1_BASE, - UART_2 = (int)USART2_BASE, - LPUART_1 = (int)LPUART1_BASE -} UARTName; - -#define DEVICE_SPI_COUNT 2 -typedef enum { - SPI_1 = (int)SPI1_BASE, - SPI_2 = (int)SPI2_BASE -} SPIName; - -typedef enum { - I2C_1 = (int)I2C1_BASE, - I2C_2 = (int)I2C2_BASE, - I2C_3 = (int)I2C3_BASE -} I2CName; - -typedef enum { - PWM_1 = (int)TIM1_BASE, - PWM_2 = (int)TIM2_BASE, - PWM_16 = (int)TIM16_BASE, - PWM_17 = (int)TIM17_BASE -} PWMName; - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h deleted file mode 100644 index 3a95d6d25d9..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralNames.h +++ /dev/null @@ -1,66 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2019 ARM Limited - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_PERIPHERALNAMES_H -#define MBED_PERIPHERALNAMES_H - -#include "cmsis.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - DAC_1 = (int)DAC_BASE -} DACName; - - -typedef enum { - ADC_1 = (int)ADC_BASE -} ADCName; - - -typedef enum { - UART_1 = (int)USART1_BASE, - UART_2 = (int)USART2_BASE, - LPUART_1 = (int)LPUART1_BASE -} UARTName; - -#define DEVICE_SPI_COUNT 2 -typedef enum { - SPI_1 = (int)SPI1_BASE, - SPI_2 = (int)SPI2_BASE -} SPIName; - -typedef enum { - I2C_1 = (int)I2C1_BASE, - I2C_2 = (int)I2C2_BASE, - I2C_3 = (int)I2C3_BASE -} I2CName; - -typedef enum { - PWM_1 = (int)TIM1_BASE, - PWM_2 = (int)TIM2_BASE, - PWM_16 = (int)TIM16_BASE, - PWM_17 = (int)TIM17_BASE -} PWMName; - - -#ifdef __cplusplus -} -#endif - -#endif From f8b571e735058e979bd5fa63665a6aed41aafdb9 Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 12:16:43 +0200 Subject: [PATCH 12/19] use define --- .../TARGET_LORA_E5/PinNames.h | 38 ++++++++++--------- .../TARGET_RAK3172/PinNames.h | 31 ++++++++++----- 2 files changed, 42 insertions(+), 27 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h index b98b96070b0..c31c1d13f97 100644 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h @@ -103,25 +103,27 @@ typedef enum { CONSOLE_RX = PB_7, #endif - // I2C signals aliases - I2C_SDA = PA_15, - I2C_SCL = PB_15, - - // SPI signals aliases - SPI_CS = PB_9, - SPI_MOSI = PA_10, - SPI_MISO = PB_14, - SPI_SCK = PB_13, - - // Standardized LED and button names - LED1 = PB_5, - LED2 = PB_10, - - BUTTON1 = PA_0, +// Legacy I2C aliases +#ifndef I2C_SDA +#define I2C_SDA PA_15 +#endif +#ifndef I2C_SCL +#define I2C_SCL PB_15 +#endif - // Backward legacy names - USER_BUTTON = BUTTON1, - //PWM_OUT = D3, +// Legacy SPI aliases +#ifndef SPI_CS +#define SPI_CS PB_9 +#endif +#ifndef SPI_MOSI +#define SPI_MOSI PA_10 +#endif +#ifndef SPI_MISO +#define SPI_MISO PB_14 +#endif +#ifndef SPI_SCK +#define SPI_SCK PB_13 +#endif /**** OSCILLATOR pins ****/ RCC_OSC32_IN = PC_14, diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h index e4d0f10d590..4d85316b129 100644 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h @@ -103,15 +103,28 @@ typedef enum { CONSOLE_RX = PB_7, #endif - // I2C signals aliases - I2C_SDA = PA_11, - I2C_SCL = PA_12, - - // SPI signals aliases - SPI_CS = PA_4, - SPI_SCK = PA_5, - SPI_MISO = PA_6, - SPI_MOSI = PA_7, +// Legacy I2C aliases +#ifndef I2C_SDA +#define I2C_SDA PA_11 +#endif +#ifndef I2C_SCL +#define I2C_SCL PA_12 +#endif + +// Legacy SPI aliases +#ifndef SPI_CS +#define SPI_CS PA_4 +#endif +#ifndef SPI_MOSI +#define SPI_MOSI PA_7 +#endif +#ifndef SPI_MISO +#define SPI_MISO PA_6 +#endif +#ifndef SPI_SCK +#define SPI_SCK PA_5 +#endif + /**** OSCILLATOR pins ****/ RCC_OSC32_IN = PC_14, From b227d3a31b170793d65bc1cb998473cd7b16156c Mon Sep 17 00:00:00 2001 From: Charles Date: Fri, 2 Jul 2021 18:00:50 +0200 Subject: [PATCH 13/19] added STM32WLE5JCIx --- tools/arm_pack_manager/index.json | 68 +++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/tools/arm_pack_manager/index.json b/tools/arm_pack_manager/index.json index c0d6f22f9ba..1c6f78d6491 100644 --- a/tools/arm_pack_manager/index.json +++ b/tools/arm_pack_manager/index.json @@ -480223,6 +480223,74 @@ ], "sub_family": "STM32WL55" }, + "STM32WLE5JCIx": { + "name": "STM32WLE5JCIx:CM4", + "memories": { + "IRAM1": { + "access": { + "read": true, + "write": true, + "execute": false, + "peripheral": false, + "secure": false, + "non_secure": false, + "non_secure_callable": false + }, + "start": 536870912, + "size": 65536, + "startup": false, + "default": true + }, + "IROM1": { + "access": { + "read": true, + "write": false, + "execute": true, + "peripheral": false, + "secure": false, + "non_secure": false, + "non_secure_callable": false + }, + "start": 134217728, + "size": 262144, + "startup": true, + "default": true + } + }, + "algorithms": [ + { + "file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM", + "start": 134217728, + "size": 262144, + "default": true, + "ram_start": null, + "ram_size": null + } + ], + "processor": { + "Symmetric": { + "units": 1, + "core": "CortexM4", + "fpu": "None", + "mpu": "Present" + } + }, + "from_pack": { + "vendor": "Keil", + "pack": "STM32WLxx_DFP", + "version": "1.0.0", + "url": "http://www.keil.com/pack" + }, + "vendor": "STMicroelectronics:13", + "family": "STM32WL Series", + "sectors": [ + [ + 134217728, + 2048 + ] + ], + "sub_family": "STM32WLE5" + }, "STM32WB15CCUx": { "name": "STM32WB15CCUx", "memories": { From 0c292a85d80a934889d9a9448435f6a8dd36eea6 Mon Sep 17 00:00:00 2001 From: Charles Date: Mon, 5 Jul 2021 09:56:22 +0200 Subject: [PATCH 14/19] removed board def from driver --- .../lora/TARGET_STM32WL/CMakeLists.txt | 14 ----- .../TARGET_LORA_E5/CMakeLists.txt | 12 ---- .../TARGET_LORA_E5/STM32WL_radio_driver.cpp | 58 ------------------- .../TARGET_RAK3172/CMakeLists.txt | 12 ---- .../TARGET_RAK3172/STM32WL_radio_driver.cpp | 58 ------------------- 5 files changed, 154 deletions(-) delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp diff --git a/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt deleted file mode 100644 index bbaa1b63e76..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/CMakeLists.txt +++ /dev/null @@ -1,14 +0,0 @@ -# Copyright (c) 2020 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -if("NUCLEO_WL55JC" IN_LIST MBED_TARGET) - add_subdirectory(TARGET_NUCLEO_WL55JC) -endif() - -if("LORA_E5" IN_LIST MBED_TARGET) - add_subdirectory(TARGET_LORA_E5) -endif() - -if("RAK3172" IN_LIST MBED_TARGET) - add_subdirectory(TARGET_RAK3172) -endif() diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt deleted file mode 100644 index fba12f70233..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/CMakeLists.txt +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright (c) 2020 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -target_include_directories(mbed-lorawan - INTERFACE - . -) - -target_sources(mbed-lorawan - INTERFACE - STM32WL_radio_driver.cpp -) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp deleted file mode 100644 index e825249f236..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_LORA_E5/STM32WL_radio_driver.cpp +++ /dev/null @@ -1,58 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -#include "STM32WL_radio_driver.h" -#include "drivers/DigitalOut.h" - -/* Sets up radio switch position according to the radio mode */ -/* This configuration is for LoRa-E5 module */ -/* This one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ -/* Added to avoid declarion in sample code for lorawan example with this mmodules */ -/* But provided as __weak so it has to be overwritten to match each specicific HW board */ -MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) -{ - // Radio specific controls (TX/RX duplexer switch control) - mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); - mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); - - switch (state) { - case RBI_SWITCH_OFF: { - /* Turn off switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RX: { - /*Turns On in Rx Mode the RF Switch */ - _rf_switch_ctrl1 = 1; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RFO_LP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - case RBI_SWITCH_RFO_HP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - default: - break; - } -} diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt deleted file mode 100644 index fba12f70233..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/CMakeLists.txt +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright (c) 2020 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -target_include_directories(mbed-lorawan - INTERFACE - . -) - -target_sources(mbed-lorawan - INTERFACE - STM32WL_radio_driver.cpp -) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp deleted file mode 100644 index 413b31b2854..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_RAK3172/STM32WL_radio_driver.cpp +++ /dev/null @@ -1,58 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -#include "STM32WL_radio_driver.h" -#include "drivers/DigitalOut.h" - -/* Sets up radio switch position according to the radio mode */ -/* This configuration is for RAK3172 module */ -/* This one use only HP mode the LP mode is not connected nor RF Switch ctrl3 */ -/* Added to avoid declarion in sample code for lorawan example with this mmodules */ -/* But provided as __weak so it has to be overwritten to match each specicific HW board */ -MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) -{ - // Radio specific controls (TX/RX duplexer switch control) - mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); - mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); - - switch (state) { - case RBI_SWITCH_OFF: { - /* Turn off switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RX: { - /*Turns On in Rx Mode the RF Switch */ - _rf_switch_ctrl1 = 1; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RFO_LP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - case RBI_SWITCH_RFO_HP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - default: - break; - } -} From 80d77d57e91f2f03ef271b290d1ada2567cd9304 Mon Sep 17 00:00:00 2001 From: Charles Date: Mon, 5 Jul 2021 10:12:40 +0200 Subject: [PATCH 15/19] removed custom boards --- .../TARGET_NUCLEO_WL55JC/CMakeLists.txt | 12 - .../STM32WL_radio_driver.cpp | 61 ----- .../TARGET_LORA_E5/CMakeLists.txt | 16 -- .../TARGET_LORA_E5/PeripheralPins.c | 222 ------------------ .../TARGET_LORA_E5/PinNames.h | 145 ------------ .../TARGET_RAK3172/CMakeLists.txt | 16 -- .../TARGET_RAK3172/PeripheralPins.c | 222 ------------------ .../TARGET_RAK3172/PinNames.h | 146 ------------ 8 files changed, 840 deletions(-) delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt delete mode 100644 connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c delete mode 100644 targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt deleted file mode 100644 index fba12f70233..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/CMakeLists.txt +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright (c) 2020 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -target_include_directories(mbed-lorawan - INTERFACE - . -) - -target_sources(mbed-lorawan - INTERFACE - STM32WL_radio_driver.cpp -) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp deleted file mode 100644 index a13d867c1ae..00000000000 --- a/connectivity/drivers/lora/TARGET_STM32WL/TARGET_NUCLEO_WL55JC/STM32WL_radio_driver.cpp +++ /dev/null @@ -1,61 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -#include "STM32WL_radio_driver.h" -#include "drivers/DigitalOut.h" - -/* This configuration is for NUCLEO_WL55JC */ -/* But provided as __weak so it has to be overwritten to match each specicific HW board */ -MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) -{ - - // Radio specific controls (TX/RX duplexer switch control) - mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); - mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); - mbed::DigitalOut _rf_switch_ctrl3(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL3); - - switch (state) { - case RBI_SWITCH_OFF: { - /* Turn off switch */ - _rf_switch_ctrl3 = 0; - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RX: { - /*Turns On in Rx Mode the RF Switch */ - _rf_switch_ctrl3 = 1; - _rf_switch_ctrl1 = 1; - _rf_switch_ctrl2 = 0; - break; - } - case RBI_SWITCH_RFO_LP: { - /*Turns On in Tx Low Power the RF Switch */ - _rf_switch_ctrl3 = 1; - _rf_switch_ctrl1 = 1; - _rf_switch_ctrl2 = 1; - break; - } - case RBI_SWITCH_RFO_HP: { - /*Turns On in Tx High Power the RF Switch */ - _rf_switch_ctrl3 = 1; - _rf_switch_ctrl1 = 0; - _rf_switch_ctrl2 = 1; - break; - } - default: - break; - } -} diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt deleted file mode 100644 index bd385c76bc8..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/CMakeLists.txt +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright (c) 2020 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -add_library(mbed-lora-e5 INTERFACE) - -target_sources(mbed-lora-e5 - INTERFACE - PeripheralPins.c -) - -target_include_directories(mbed-lora-e5 - INTERFACE - . -) - -target_link_libraries(mbed-lora-e5 INTERFACE mbed-stm32wle5xc) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c deleted file mode 100644 index cc8c6eed4d6..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PeripheralPins.c +++ /dev/null @@ -1,222 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - * - * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml - */ - -#include "PeripheralPins.h" -#include "mbed_toolchain.h" - -//============================================================================== -// Notes -// -// - The pins mentioned Px_y_ALTz are alternative possibilities which use other -// HW peripheral instances. You can use them the same way as any other "normal" -// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board -// pinout image on mbed.org. -// -// - The pins which are connected to other components present on the board have -// the comment "Connected to xxx". The pin function may not work properly in this -// case. These pins may not be displayed on the board pinout image on mbed.org. -// Please read the board reference manual and schematic for more information. -// -// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented -// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. -// -//============================================================================== - - -//*** ADC *** - -MBED_WEAK const PinMap PinMap_ADC[] = { - {PA_10, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6 - {PA_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7 - {PA_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8 - {PA_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9 // Connected to DEBUG_JTMS-SWDIO - {PA_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC_IN10 // Connected to DEBUG_JTCK-SWCLK - {PA_15, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC_IN11 - {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5 - {PB_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4 - {PB_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2 - {PB_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3 - {PB_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0 - {PB_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1 - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_ADC_Internal[] = { - {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, - {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, - {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, - {NC, NC, 0} -}; - -//*** DAC *** - -MBED_WEAK const PinMap PinMap_DAC[] = { - {PA_10, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 - {NC, NC, 0} -}; - -//*** I2C *** - -MBED_WEAK const PinMap PinMap_I2C_SDA[] = { - {PA_10, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PA_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PA_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LED2 - {PB_11, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to LED3 - {PB_14, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PC_1, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PA_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PA_12, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_10, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PB_13, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PB_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to LED1 - {PC_0, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {NC, NC, 0} -}; - -//*** PWM *** - -// TIM2 cannot be used because already used by the us_ticker -// (update us_ticker_data.h file if another timer is chosen) -MBED_WEAK const PinMap PinMap_PWM[] = { -// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to B1 -// {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to B2 -// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_RX -// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX -// {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - {PA_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 - {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 - {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 -// {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 -// {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - {PB_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N - {PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N - {PB_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - {PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - {PB_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED2 - {PB_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 // Connected to LED2 -// {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 -// {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to LED3 - {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED1 - {NC, NC, 0} -}; - -//*** SERIAL *** - -MBED_WEAK const PinMap PinMap_UART_TX[] = { -// {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX -// {PA_2_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX -// {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to LED3 -// {PC_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PA_2, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX - {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RX[] = { -// {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX -// {PA_3_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX -// {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, -// {PC_0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PA_3, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX - {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RTS[] = { -// {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B2 - {PA_1_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to B2 - {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_12, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_CTS[] = { -// {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B1 - {PA_6, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_13, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {NC, NC, 0} -}; - -//*** SPI *** - -MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED1 - {PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, - {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to FE_CTRL3 - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_5, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, - {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_1, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to B2 - {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_8, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, - {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_2, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED2 - {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h deleted file mode 100644 index c31c1d13f97..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_LORA_E5/PinNames.h +++ /dev/null @@ -1,145 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - * - * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml - */ - -#ifndef MBED_PINNAMES_H -#define MBED_PINNAMES_H - -#include "cmsis.h" -#include "PinNamesTypes.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ALT0 = 0x100, - ALT1 = 0x200, - ALT2 = 0x300, - ALT3 = 0x400, - ALT4 = 0x500 -} ALTx; - -typedef enum { - - PA_0 = 0x00, - PA_1 = 0x01, - PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW - PA_2 = 0x02, - PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW - PA_3 = 0x03, - PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW - PA_4 = 0x04, - PA_5 = 0x05, - PA_6 = 0x06, - PA_7 = 0x07, - PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW - PA_8 = 0x08, - PA_9 = 0x09, - PA_10 = 0x0A, - PA_11 = 0x0B, - PA_12 = 0x0C, - PA_13 = 0x0D, - PA_14 = 0x0E, - PA_15 = 0x0F, - PB_0 = 0x10, - PB_1 = 0x11, - PB_2 = 0x12, - PB_3 = 0x13, - PB_4 = 0x14, - PB_5 = 0x15, - PB_6 = 0x16, - PB_7 = 0x17, - PB_8 = 0x18, - PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW - PB_9 = 0x19, - PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW - PB_10 = 0x1A, - PB_11 = 0x1B, - PB_12 = 0x1C, - PB_13 = 0x1D, - PB_14 = 0x1E, - PB_15 = 0x1F, - PC_0 = 0x20, - PC_1 = 0x21, - PC_2 = 0x22, - PC_3 = 0x23, - PC_4 = 0x24, - PC_5 = 0x25, - PC_6 = 0x26, - PC_13 = 0x2D, - PC_14 = 0x2E, - PC_15 = 0x2F, - PH_3 = 0x73, - - /**** ADC internal channels ****/ - - ADC_TEMP = 0xF0, // Internal pin virtual value - ADC_VREF = 0xF1, // Internal pin virtual value - ADC_VBAT = 0xF2, // Internal pin virtual value - - // STDIO for console print -#ifdef MBED_CONF_TARGET_STDIO_UART_TX - CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX, -#else - CONSOLE_TX = PB_6, -#endif -#ifdef MBED_CONF_TARGET_STDIO_UART_RX - CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX, -#else - CONSOLE_RX = PB_7, -#endif - -// Legacy I2C aliases -#ifndef I2C_SDA -#define I2C_SDA PA_15 -#endif -#ifndef I2C_SCL -#define I2C_SCL PB_15 -#endif - -// Legacy SPI aliases -#ifndef SPI_CS -#define SPI_CS PB_9 -#endif -#ifndef SPI_MOSI -#define SPI_MOSI PA_10 -#endif -#ifndef SPI_MISO -#define SPI_MISO PB_14 -#endif -#ifndef SPI_SCK -#define SPI_SCK PB_13 -#endif - - /**** OSCILLATOR pins ****/ - RCC_OSC32_IN = PC_14, - RCC_OSC32_OUT = PC_15, - - /**** DEBUG pins ****/ - DEBUG_JTCK_SWCLK = PA_14, - DEBUG_JTDO_SWO = PB_3, - DEBUG_JTMS_SWDIO = PA_13, - - // Not connected - NC = (int)0xFFFFFFFF -} PinName; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt deleted file mode 100644 index 6bce8241c22..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/CMakeLists.txt +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright (c) 2020 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -add_library(mbed-rak3172 INTERFACE) - -target_sources(mbed-rak3172 - INTERFACE - PeripheralPins.c -) - -target_include_directories(mbed-rak3172 - INTERFACE - . -) - -target_link_libraries(mbed-rak3172 INTERFACE mbed-stm32wle5xc) diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c deleted file mode 100644 index cc8c6eed4d6..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PeripheralPins.c +++ /dev/null @@ -1,222 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - * - * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml - */ - -#include "PeripheralPins.h" -#include "mbed_toolchain.h" - -//============================================================================== -// Notes -// -// - The pins mentioned Px_y_ALTz are alternative possibilities which use other -// HW peripheral instances. You can use them the same way as any other "normal" -// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board -// pinout image on mbed.org. -// -// - The pins which are connected to other components present on the board have -// the comment "Connected to xxx". The pin function may not work properly in this -// case. These pins may not be displayed on the board pinout image on mbed.org. -// Please read the board reference manual and schematic for more information. -// -// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented -// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. -// -//============================================================================== - - -//*** ADC *** - -MBED_WEAK const PinMap PinMap_ADC[] = { - {PA_10, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6 - {PA_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7 - {PA_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8 - {PA_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9 // Connected to DEBUG_JTMS-SWDIO - {PA_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC_IN10 // Connected to DEBUG_JTCK-SWCLK - {PA_15, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC_IN11 - {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5 - {PB_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4 - {PB_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2 - {PB_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3 - {PB_13, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0 - {PB_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1 - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_ADC_Internal[] = { - {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, - {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, - {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, - {NC, NC, 0} -}; - -//*** DAC *** - -MBED_WEAK const PinMap PinMap_DAC[] = { - {PA_10, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 - {NC, NC, 0} -}; - -//*** I2C *** - -MBED_WEAK const PinMap PinMap_I2C_SDA[] = { - {PA_10, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PA_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PA_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LED2 - {PB_11, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to LED3 - {PB_14, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PC_1, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PA_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PA_12, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_10, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PB_13, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {PB_15, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to LED1 - {PC_0, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, - {NC, NC, 0} -}; - -//*** PWM *** - -// TIM2 cannot be used because already used by the us_ticker -// (update us_ticker_data.h file if another timer is chosen) -MBED_WEAK const PinMap PinMap_PWM[] = { -// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to B1 -// {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to B2 -// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_RX -// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX -// {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - {PA_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 - {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 - {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 -// {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 -// {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - {PB_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N - {PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N - {PB_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - {PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - {PB_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED2 - {PB_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 // Connected to LED2 -// {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 -// {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to LED3 - {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LED1 - {NC, NC, 0} -}; - -//*** SERIAL *** - -MBED_WEAK const PinMap PinMap_UART_TX[] = { -// {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX -// {PA_2_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX -// {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to LED3 -// {PC_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PA_2, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX - {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RX[] = { -// {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX -// {PA_3_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX -// {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, -// {PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, -// {PC_0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PA_3, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to STDIO_UART_RX - {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RTS[] = { -// {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B2 - {PA_1_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to B2 - {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_12, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_CTS[] = { -// {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to B1 - {PA_6, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_13, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {NC, NC, 0} -}; - -//*** SPI *** - -MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED1 - {PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, - {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to FE_CTRL3 - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_5, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, - {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_1, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to B2 - {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_8, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_SPI2)}, - {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_2, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED2 - {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; diff --git a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h b/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h deleted file mode 100644 index 4d85316b129..00000000000 --- a/targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/TARGET_RAK3172/PinNames.h +++ /dev/null @@ -1,146 +0,0 @@ -/* mbed Microcontroller Library - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - * - * Automatically generated from STM32CubeMX/db/mcu/STM32WL55JCIx.xml - */ - -#ifndef MBED_PINNAMES_H -#define MBED_PINNAMES_H - -#include "cmsis.h" -#include "PinNamesTypes.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ALT0 = 0x100, - ALT1 = 0x200, - ALT2 = 0x300, - ALT3 = 0x400, - ALT4 = 0x500 -} ALTx; - -typedef enum { - - PA_0 = 0x00, - PA_1 = 0x01, - PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW - PA_2 = 0x02, - PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW - PA_3 = 0x03, - PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW - PA_4 = 0x04, - PA_5 = 0x05, - PA_6 = 0x06, - PA_7 = 0x07, - PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW - PA_8 = 0x08, - PA_9 = 0x09, - PA_10 = 0x0A, - PA_11 = 0x0B, - PA_12 = 0x0C, - PA_13 = 0x0D, - PA_14 = 0x0E, - PA_15 = 0x0F, - PB_0 = 0x10, - PB_1 = 0x11, - PB_2 = 0x12, - PB_3 = 0x13, - PB_4 = 0x14, - PB_5 = 0x15, - PB_6 = 0x16, - PB_7 = 0x17, - PB_8 = 0x18, - PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW - PB_9 = 0x19, - PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW - PB_10 = 0x1A, - PB_11 = 0x1B, - PB_12 = 0x1C, - PB_13 = 0x1D, - PB_14 = 0x1E, - PB_15 = 0x1F, - PC_0 = 0x20, - PC_1 = 0x21, - PC_2 = 0x22, - PC_3 = 0x23, - PC_4 = 0x24, - PC_5 = 0x25, - PC_6 = 0x26, - PC_13 = 0x2D, - PC_14 = 0x2E, - PC_15 = 0x2F, - PH_3 = 0x73, - - /**** ADC internal channels ****/ - - ADC_TEMP = 0xF0, // Internal pin virtual value - ADC_VREF = 0xF1, // Internal pin virtual value - ADC_VBAT = 0xF2, // Internal pin virtual value - - // STDIO for console print -#ifdef MBED_CONF_TARGET_STDIO_UART_TX - CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX, -#else - CONSOLE_TX = PB_6, -#endif -#ifdef MBED_CONF_TARGET_STDIO_UART_RX - CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX, -#else - CONSOLE_RX = PB_7, -#endif - -// Legacy I2C aliases -#ifndef I2C_SDA -#define I2C_SDA PA_11 -#endif -#ifndef I2C_SCL -#define I2C_SCL PA_12 -#endif - -// Legacy SPI aliases -#ifndef SPI_CS -#define SPI_CS PA_4 -#endif -#ifndef SPI_MOSI -#define SPI_MOSI PA_7 -#endif -#ifndef SPI_MISO -#define SPI_MISO PA_6 -#endif -#ifndef SPI_SCK -#define SPI_SCK PA_5 -#endif - - - /**** OSCILLATOR pins ****/ - RCC_OSC32_IN = PC_14, - RCC_OSC32_OUT = PC_15, - - /**** DEBUG pins ****/ - DEBUG_JTCK_SWCLK = PA_14, - DEBUG_JTDO_SWO = PB_3, - DEBUG_JTMS_SWDIO = PA_13, - - // Not connected - NC = (int)0xFFFFFFFF -} PinName; - -#ifdef __cplusplus -} -#endif - -#endif From 0a06bc5cc166d47fe3356835d9cc13ad8f8cd362 Mon Sep 17 00:00:00 2001 From: Charles Date: Mon, 5 Jul 2021 10:12:52 +0200 Subject: [PATCH 16/19] Create STM32WL_radio_driver.cpp --- .../TARGET_STM32WL/STM32WL_radio_driver.cpp | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp new file mode 100644 index 00000000000..a13d867c1ae --- /dev/null +++ b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp @@ -0,0 +1,61 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +#include "STM32WL_radio_driver.h" +#include "drivers/DigitalOut.h" + +/* This configuration is for NUCLEO_WL55JC */ +/* But provided as __weak so it has to be overwritten to match each specicific HW board */ +MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) +{ + + // Radio specific controls (TX/RX duplexer switch control) + mbed::DigitalOut _rf_switch_ctrl1(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL1); + mbed::DigitalOut _rf_switch_ctrl2(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL2); + mbed::DigitalOut _rf_switch_ctrl3(MBED_CONF_STM32WL_LORA_DRIVER_RF_SWITCH_CTL3); + + switch (state) { + case RBI_SWITCH_OFF: { + /* Turn off switch */ + _rf_switch_ctrl3 = 0; + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RX: { + /*Turns On in Rx Mode the RF Switch */ + _rf_switch_ctrl3 = 1; + _rf_switch_ctrl1 = 1; + _rf_switch_ctrl2 = 0; + break; + } + case RBI_SWITCH_RFO_LP: { + /*Turns On in Tx Low Power the RF Switch */ + _rf_switch_ctrl3 = 1; + _rf_switch_ctrl1 = 1; + _rf_switch_ctrl2 = 1; + break; + } + case RBI_SWITCH_RFO_HP: { + /*Turns On in Tx High Power the RF Switch */ + _rf_switch_ctrl3 = 1; + _rf_switch_ctrl1 = 0; + _rf_switch_ctrl2 = 1; + break; + } + default: + break; + } +} From 95cd992c11b6df3ff56c2a2b4023bdf0c5c92256 Mon Sep 17 00:00:00 2001 From: Charles Date: Mon, 5 Jul 2021 12:23:42 +0200 Subject: [PATCH 17/19] Update STM32WL_radio_driver.cpp --- .../drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp index a13d867c1ae..76359598c40 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp +++ b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp @@ -16,6 +16,8 @@ #include "STM32WL_radio_driver.h" #include "drivers/DigitalOut.h" + +/* Sets up radio switch position according to the radio mode */ /* This configuration is for NUCLEO_WL55JC */ /* But provided as __weak so it has to be overwritten to match each specicific HW board */ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) From 023b0bc283d200b09b83ad12395b20009fd16723 Mon Sep 17 00:00:00 2001 From: Charles Date: Mon, 5 Jul 2021 12:36:16 +0200 Subject: [PATCH 18/19] removed LoRa-E5 and RAK3172 --- connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json | 8 -------- 1 file changed, 8 deletions(-) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json b/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json index bd693ad2d24..4a5ab666fd6 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json +++ b/connectivity/drivers/lora/TARGET_STM32WL/mbed_lib.json @@ -54,14 +54,6 @@ "rf-switch-ctl1": "PC_4", "rf-switch-ctl2": "PC_5", "rf-switch-ctl3": "PC_3" - }, - "LORA_E5": { - "rf-switch-ctl1": "PA_4", - "rf-switch-ctl2": "PA_5" - }, - "RAK3172": { - "rf-switch-ctl1": "PB_8", - "rf-switch-ctl2": "PC_13" } } } From ce32eb77e9fd31a921e9bdd817f914f15711d96a Mon Sep 17 00:00:00 2001 From: Charles Date: Mon, 5 Jul 2021 12:36:29 +0200 Subject: [PATCH 19/19] Update STM32WL_radio_driver.cpp --- .../drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp index 76359598c40..dbea523fddc 100644 --- a/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp +++ b/connectivity/drivers/lora/TARGET_STM32WL/STM32WL_radio_driver.cpp @@ -60,4 +60,4 @@ MBED_WEAK void set_antenna_switch(RBI_Switch_TypeDef state) default: break; } -} +} \ No newline at end of file