-
Notifications
You must be signed in to change notification settings - Fork 0
/
four_bit_down_tb.vhd
68 lines (49 loc) · 1.34 KB
/
four_bit_down_tb.vhd
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY four_bit_down_tb IS
END four_bit_down_tb;
ARCHITECTURE behavior OF four_bit_down_tb IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT fou_bit_down
PORT(
clk : IN std_logic;
rst : IN std_logic;
count : INOUT std_logic_vector(3 downto 0)
);
END COMPONENT;
--Inputs
signal clk : std_logic := '1';
signal rst : std_logic := '1';
--BiDirs
signal count : std_logic_vector(3 downto 0);
-- Clock period definitions
constant clk_period : time := 100 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: fou_bit_down PORT MAP (
clk => clk,
rst => rst,
count => count
);
-- Clock process definitions
clk_process :process
begin
rst <= '0';
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
wait for 100 ns;
wait for clk_period*10;
-- insert stimulus here
wait;
end process;
END;