diff --git a/src/gpl/test/simple03-rd.ok b/src/gpl/test/simple03-rd.ok index 52013e1459c..e1622db5049 100644 --- a/src/gpl/test/simple03-rd.ok +++ b/src/gpl/test/simple03-rd.ok @@ -72,11 +72,11 @@ [INFO GPL-0040] NumTiles: 196 [INFO GPL-0081] TotalRouteOverflow: 0.0 [INFO GPL-0082] OverflowTileCnt: 0 -[INFO GPL-0083] 0.5%RC: 0.8663694858551025 -[INFO GPL-0084] 1.0%RC: 0.7915560305118561 -[INFO GPL-0085] 2.0%RC: 0.7390100508928299 -[INFO GPL-0086] 5.0%RC: 0.6729927897453308 -[INFO GPL-0087] FinalRC: 0.82896274 +[INFO GPL-0083] 0.5%RC: 0.48812615871429443 +[INFO GPL-0084] 1.0%RC: 0.4571320414543152 +[INFO GPL-0085] 2.0%RC: 0.4332096576690674 +[INFO GPL-0086] 5.0%RC: 0.3979834884405136 +[INFO GPL-0087] FinalRC: 0.4726291 [INFO GPL-0077] FinalRC lower than targetRC(1.25), routability not needed. [NesterovSolve] Iter: 290 overflow: 0.267 HPWL: 4778698 [NesterovSolve] Iter: 300 overflow: 0.233 HPWL: 4810713 diff --git a/src/gpl/test/simple04-rd.defok b/src/gpl/test/simple04-rd.defok index 77d7db0a079..fa8b6123562 100644 --- a/src/gpl/test/simple04-rd.defok +++ b/src/gpl/test/simple04-rd.defok @@ -60,300 +60,300 @@ GCELLGRID Y 58940 DO 2 STEP 2660 ; GCELLGRID Y 140 DO 22 STEP 2800 ; GCELLGRID Y 0 DO 2 STEP 140 ; COMPONENTS 294 ; - - _276_ NOR2_X2 + PLACED ( 36904 45694 ) N ; - - _277_ BUF_X4 + PLACED ( 39830 45731 ) N ; - - _278_ INV_X1 + PLACED ( 6950 34700 ) N ; - - _279_ NOR2_X1 + PLACED ( 9848 35722 ) N ; - - _280_ INV_X1 + PLACED ( 11748 34714 ) N ; - - _281_ INV_X1 + PLACED ( 17840 50747 ) N ; - - _282_ NOR2_X1 + PLACED ( 18584 46379 ) N ; - - _283_ INV_X1 + PLACED ( 24970 45847 ) N ; - - _284_ NOR2_X1 + PLACED ( 23708 45797 ) N ; - - _285_ NOR2_X1 + PLACED ( 18239 44659 ) N ; - - _286_ INV_X1 + PLACED ( 13950 43086 ) N ; - - _287_ NOR2_X1 + PLACED ( 13570 42045 ) N ; - - _288_ INV_X1 + PLACED ( 14519 41512 ) N ; - - _289_ AND2_X1 + PLACED ( 15029 34622 ) N ; - - _290_ INV_X1 + PLACED ( 18916 14682 ) N ; - - _291_ NOR2_X1 + PLACED ( 15166 14615 ) N ; - - _292_ INV_X1 + PLACED ( 15081 12747 ) N ; - - _293_ AOI21_X1 + PLACED ( 14656 14697 ) N ; - - _294_ INV_X1 + PLACED ( 21226 21788 ) N ; - - _295_ NOR2_X1 + PLACED ( 20031 23233 ) N ; - - _296_ INV_X1 + PLACED ( 10121 21060 ) N ; - - _297_ NOR2_X1 + PLACED ( 10825 22617 ) N ; - - _298_ NOR2_X1 + PLACED ( 15588 25368 ) N ; - - _299_ AND2_X1 + PLACED ( 15392 29989 ) N ; - - _300_ INV_X16 + PLACED ( 54607 14764 ) N ; - - _301_ NOR2_X4 + PLACED ( 51305 16375 ) N ; - - _302_ INV_X16 + PLACED ( 46191 21999 ) N ; - - _303_ NOR3_X2 + PLACED ( 49492 18670 ) N ; - - _304_ AOI21_X1 + PLACED ( 48050 17283 ) N ; - - _305_ INV_X1 + PLACED ( 45639 17812 ) N ; - - _306_ INV_X32 + PLACED ( 49400 41845 ) N ; - - _307_ AND2_X4 + PLACED ( 56949 32683 ) N ; - - _308_ INV_X4 + PLACED ( 58253 30326 ) N ; - - _309_ INV_X32 + PLACED ( 49000 55656 ) N ; - - _310_ OAI211_X4 + PLACED ( 54352 41652 ) N ; - - _311_ NAND2_X4 + PLACED ( 56468 28074 ) N ; - - _312_ INV_X16 + PLACED ( 55175 22987 ) N ; - - _313_ NOR2_X1 + PLACED ( 55982 21952 ) N ; - - _314_ NOR3_X4 + PLACED ( 51974 19964 ) N ; - - _315_ NOR2_X2 + PLACED ( 42202 18758 ) N ; - - _316_ INV_X1 + PLACED ( 35787 22737 ) N ; - - _317_ NOR2_X1 + PLACED ( 34054 23484 ) N ; - - _318_ INV_X32 + PLACED ( 28025 6839 ) N ; - - _319_ NOR2_X4 + PLACED ( 32046 18705 ) N ; - - _320_ INV_X4 + PLACED ( 37208 31255 ) N ; - - _321_ NAND2_X1 + PLACED ( 32549 30148 ) N ; - - _322_ INV_X1 + PLACED ( 28386 29996 ) N ; - - _323_ OAI21_X4 + PLACED ( 30278 29866 ) N ; - - _324_ NOR4_X4 + PLACED ( 28326 23534 ) N ; - - _325_ NOR2_X1 + PLACED ( 32684 30265 ) N ; - - _326_ OAI21_X1 + PLACED ( 29356 30058 ) N ; - - _327_ INV_X1 + PLACED ( 28237 35558 ) N ; - - _328_ INV_X32 + PLACED ( 29980 1416 ) N ; - - _329_ NOR3_X2 + PLACED ( 33913 19573 ) N ; - - _330_ AOI21_X4 + PLACED ( 33647 19216 ) N ; - - _331_ OAI221_X4 + PLACED ( 27072 29566 ) N ; - - _332_ OAI211_X1 + PLACED ( 14134 32009 ) N ; - - _333_ AND2_X1 + PLACED ( 8929 35849 ) N ; - - _334_ INV_X1 + PLACED ( 10863 35464 ) N ; - - _335_ NAND2_X1 + PLACED ( 19953 46269 ) N ; - - _336_ NAND2_X1 + PLACED ( 23679 45427 ) N ; - - _337_ NAND2_X1 + PLACED ( 19895 43416 ) N ; - - _338_ INV_X1 + PLACED ( 18739 44752 ) N ; - - _339_ NAND3_X1 + PLACED ( 15465 41868 ) N ; - - _340_ NAND2_X1 + PLACED ( 13642 41940 ) N ; - - _341_ NAND2_X1 + PLACED ( 14403 41217 ) N ; - - _342_ INV_X1 + PLACED ( 16036 14478 ) N ; - - _343_ OAI211_X1 + PLACED ( 14539 15309 ) N ; - - _344_ NAND2_X1 + PLACED ( 14090 16077 ) N ; - - _345_ AOI211_X1 + PLACED ( 15018 23548 ) N ; - - _346_ NAND2_X1 + PLACED ( 20209 23400 ) N ; - - _347_ NAND2_X1 + PLACED ( 10528 22837 ) N ; - - _348_ OAI21_X1 + PLACED ( 17999 24638 ) N ; - - _349_ OR2_X1 + PLACED ( 17830 31165 ) N ; - - _350_ AOI21_X1 + PLACED ( 14664 34674 ) N ; - - _351_ AND4_X1 + PLACED ( 12218 33891 ) N ; - - _352_ AOI22_X1 + PLACED ( 12234 34006 ) N ; - - _353_ OR2_X1 + PLACED ( 13413 32795 ) N ; - - _354_ BUF_X4 + PLACED ( 41373 43706 ) N ; - - _355_ INV_X2 + PLACED ( 37175 45787 ) N ; - - _356_ BUF_X4 + PLACED ( 30205 51643 ) N ; - - _357_ AND3_X1 + PLACED ( 15678 34112 ) N ; - - _358_ OAI211_X4 + PLACED ( 18321 31381 ) N ; - - _359_ OAI21_X1 + PLACED ( 13786 35220 ) N ; - - _360_ OAI21_X1 + PLACED ( 18434 31649 ) N ; - - _361_ NAND3_X4 + PLACED ( 19077 34594 ) N ; - - _362_ NOR2_X1 + PLACED ( 44903 45918 ) N ; - - _363_ INV_X1 + PLACED ( 46518 44675 ) N ; - - _364_ NOR2_X4 + PLACED ( 27102 44508 ) N ; - - _365_ AOI221_X4 + PLACED ( 23024 37780 ) N ; - - _366_ AND2_X4 + PLACED ( 32819 41885 ) N ; - - _367_ BUF_X4 + PLACED ( 42470 45197 ) N ; - - _368_ OAI21_X1 + PLACED ( 12327 34022 ) N ; - - _369_ BUF_X4 + PLACED ( 44615 52192 ) N ; - - _370_ AOI22_X1 + PLACED ( 10826 35610 ) N ; - - _371_ NOR2_X2 + PLACED ( 20987 28023 ) N ; - - _372_ NAND3_X1 + PLACED ( 15318 31041 ) N ; - - _373_ OR2_X1 + PLACED ( 15375 39668 ) N ; - - _374_ AOI22_X1 + PLACED ( 15477 41961 ) N ; - - _375_ NAND2_X1 + PLACED ( 14871 41547 ) N ; - - _376_ XOR2_X1 + PLACED ( 7961 43491 ) N ; - - _377_ XNOR2_X1 + PLACED ( 9007 42957 ) N ; - - _378_ INV_X1 + PLACED ( 31957 52030 ) N ; - - _379_ BUF_X4 + PLACED ( 32169 52368 ) N ; - - _380_ NOR2_X1 + PLACED ( 11658 47914 ) N ; - - _381_ NAND2_X1 + PLACED ( 10921 45425 ) N ; - - _382_ AOI221_X4 + PLACED ( 14818 48044 ) N ; - - _383_ AOI21_X1 + PLACED ( 10977 47917 ) N ; - - _384_ INV_X1 + PLACED ( 19834 40977 ) N ; - - _385_ INV_X1 + PLACED ( 19470 38836 ) N ; - - _386_ OAI211_X1 + PLACED ( 20292 42039 ) N ; - - _387_ INV_X1 + PLACED ( 21621 44798 ) N ; - - _388_ AND4_X1 + PLACED ( 20657 44233 ) N ; - - _389_ AOI22_X1 + PLACED ( 20475 44357 ) N ; - - _390_ NOR2_X1 + PLACED ( 22016 44457 ) N ; - - _391_ NOR2_X1 + PLACED ( 19316 52423 ) N ; - - _392_ NAND2_X1 + PLACED ( 20771 46492 ) N ; - - _393_ AOI221_X4 + PLACED ( 15061 52475 ) N ; - - _394_ AOI21_X1 + PLACED ( 18830 52865 ) N ; - - _395_ OAI21_X1 + PLACED ( 20964 41608 ) N ; - - _396_ XOR2_X1 + PLACED ( 24063 54688 ) N ; - - _397_ XNOR2_X1 + PLACED ( 23912 53541 ) N ; - - _398_ NOR2_X1 + PLACED ( 25965 52233 ) N ; - - _399_ AOI221_X1 + PLACED ( 24440 52651 ) N ; - - _400_ BUF_X4 + PLACED ( 27399 44570 ) N ; - - _401_ OR3_X1 + PLACED ( 24458 46425 ) N ; - - _402_ AOI21_X1 + PLACED ( 25313 52708 ) N ; - - _403_ INV_X1 + PLACED ( 12734 24046 ) N ; - - _404_ OAI211_X1 + PLACED ( 13606 24960 ) N ; - - _405_ AOI21_X1 + PLACED ( 13097 22253 ) N ; - - _406_ AOI21_X1 + PLACED ( 11619 22417 ) N ; - - _407_ AND2_X1 + PLACED ( 14680 22957 ) N ; - - _408_ XNOR2_X1 + PLACED ( 19651 21707 ) N ; - - _409_ XNOR2_X1 + PLACED ( 18922 22429 ) N ; - - _410_ NOR2_X1 + PLACED ( 24719 22533 ) N ; - - _411_ AOI221_X1 + PLACED ( 22503 23623 ) N ; - - _412_ OR3_X1 + PLACED ( 22231 22927 ) N ; - - _413_ AOI21_X1 + PLACED ( 23678 22733 ) N ; - - _414_ OAI21_X1 + PLACED ( 13710 25601 ) N ; - - _415_ AND2_X1 + PLACED ( 13353 22251 ) N ; - - _416_ AND4_X1 + PLACED ( 12067 23761 ) N ; - - _417_ AOI22_X1 + PLACED ( 12037 23875 ) N ; - - _418_ OR2_X1 + PLACED ( 12925 22764 ) N ; - - _419_ NOR2_X1 + PLACED ( 10656 22198 ) N ; - - _420_ AOI221_X4 + PLACED ( 24079 21345 ) N ; - - _421_ OAI21_X1 + PLACED ( 11299 22708 ) N ; - - _422_ AOI21_X1 + PLACED ( 10045 22397 ) N ; - - _423_ AOI21_X1 + PLACED ( 15449 12670 ) N ; - - _424_ NOR2_X1 + PLACED ( 14797 12913 ) N ; - - _425_ NOR2_X1 + PLACED ( 14067 12289 ) N ; - - _426_ XNOR2_X1 + PLACED ( 12027 13799 ) N ; - - _427_ XNOR2_X1 + PLACED ( 14022 14183 ) N ; - - _428_ NOR2_X1 + PLACED ( 25911 14385 ) N ; - - _429_ AOI221_X2 + PLACED ( 26285 15560 ) N ; - - _430_ OR3_X1 + PLACED ( 22338 14861 ) N ; - - _431_ AOI21_X1 + PLACED ( 25057 14289 ) N ; - - _432_ XNOR2_X1 + PLACED ( 15806 8901 ) N ; - - _433_ XNOR2_X1 + PLACED ( 19129 9853 ) N ; - - _434_ AOI221_X2 + PLACED ( 20468 15925 ) N ; - - _435_ OR3_X1 + PLACED ( 20775 15335 ) N ; - - _436_ AOI22_X1 + PLACED ( 18640 15292 ) N ; - - _437_ NAND2_X1 + PLACED ( 37992 17254 ) N ; - - _438_ OAI221_X1 + PLACED ( 38899 18438 ) N ; - - _439_ NAND2_X1 + PLACED ( 38084 28501 ) N ; - - _440_ XOR2_X1 + PLACED ( 42114 30998 ) N ; - - _441_ XNOR2_X1 + PLACED ( 42859 29853 ) N ; - - _442_ AOI221_X2 + PLACED ( 42718 29195 ) N ; - - _443_ NAND2_X1 + PLACED ( 40456 30348 ) N ; - - _444_ AOI22_X1 + PLACED ( 39340 30526 ) N ; - - _445_ OAI21_X1 + PLACED ( 38532 17914 ) N ; - - _446_ NAND2_X1 + PLACED ( 38366 16844 ) N ; - - _447_ XNOR2_X1 + PLACED ( 36661 12948 ) N ; - - _448_ XNOR2_X1 + PLACED ( 36937 13927 ) N ; - - _449_ NOR2_X1 + PLACED ( 33309 14327 ) N ; - - _450_ AOI221_X1 + PLACED ( 28393 16051 ) N ; - - _451_ OR3_X1 + PLACED ( 31708 14718 ) N ; - - _452_ AOI21_X1 + PLACED ( 31787 14271 ) N ; - - _453_ XNOR2_X1 + PLACED ( 42356 22206 ) N ; - - _454_ XNOR2_X1 + PLACED ( 42409 23119 ) N ; - - _455_ AOI221_X2 + PLACED ( 37425 39897 ) N ; - - _456_ OR3_X1 + PLACED ( 36456 24441 ) N ; - - _457_ AOI22_X1 + PLACED ( 37762 24242 ) N ; - - _458_ AOI22_X1 + PLACED ( 56639 27440 ) N ; - - _459_ NOR2_X1 + PLACED ( 57234 20861 ) N ; - - _460_ XOR2_X1 + PLACED ( 56691 17447 ) N ; - - _461_ XNOR2_X1 + PLACED ( 57641 18735 ) N ; - - _462_ NOR2_X1 + PLACED ( 47304 14986 ) N ; - - _463_ AOI221_X1 + PLACED ( 43835 16282 ) N ; - - _464_ OR3_X1 + PLACED ( 47138 15479 ) N ; - - _465_ AOI21_X1 + PLACED ( 47083 15050 ) N ; - - _466_ XNOR2_X1 + PLACED ( 55446 25782 ) N ; - - _467_ XNOR2_X1 + PLACED ( 56103 27702 ) N ; - - _468_ AOI221_X4 + PLACED ( 46627 33275 ) N ; - - _469_ OR3_X1 + PLACED ( 48820 26340 ) N ; - - _470_ AOI22_X1 + PLACED ( 48994 26653 ) N ; - - _471_ XNOR2_X1 + PLACED ( 49014 41154 ) N ; - - _472_ INV_X1 + PLACED ( 52626 43049 ) N ; - - _473_ NOR2_X1 + PLACED ( 52230 43876 ) N ; - - _474_ XNOR2_X1 + PLACED ( 49239 42310 ) N ; - - _475_ AOI221_X4 + PLACED ( 46450 33605 ) N ; - - _476_ NAND3_X1 + PLACED ( 47276 40889 ) N ; - - _477_ AOI22_X1 + PLACED ( 47321 38940 ) N ; - - _478_ XOR2_X1 + PLACED ( 54181 49263 ) N ; - - _479_ AOI221_X4 + PLACED ( 46388 48490 ) N ; - - _480_ NAND3_X1 + PLACED ( 48854 47865 ) N ; - - _481_ AOI22_X1 + PLACED ( 49061 49495 ) N ; - - _482_ NOR2_X1 + PLACED ( 35957 45937 ) N ; - - _483_ NOR2_X1 + PLACED ( 54296 31594 ) N ; - - _484_ AND3_X1 + PLACED ( 52405 32182 ) N ; - - _485_ NAND3_X1 + PLACED ( 33699 33429 ) N ; - - _486_ NOR3_X1 + PLACED ( 19909 17174 ) N ; - - _487_ NAND2_X1 + PLACED ( 20693 17178 ) N ; - - _488_ NOR4_X1 + PLACED ( 22781 37168 ) N ; - - _489_ NAND3_X1 + PLACED ( 21504 39986 ) N ; - - _490_ NOR3_X1 + PLACED ( 32567 38976 ) N ; - - _491_ NAND3_X1 + PLACED ( 32939 45503 ) N ; - - _492_ AOI221_X4 + PLACED ( 33987 50193 ) N ; - - _493_ NAND3_X1 + PLACED ( 31791 52126 ) N ; - - _494_ AOI221_X1 + PLACED ( 31634 45976 ) N ; - - _495_ MUX2_X1 + PLACED ( 9343 57018 ) N ; - - _496_ NOR2_X4 + PLACED ( 41742 46764 ) N ; - - _497_ BUF_X8 + PLACED ( 39990 52417 ) N ; - - _498_ MUX2_X1 + PLACED ( 11337 56191 ) N ; - - _499_ MUX2_X1 + PLACED ( 1421 33969 ) N ; - - _500_ MUX2_X1 + PLACED ( 3792 36575 ) N ; - - _501_ MUX2_X1 + PLACED ( 1839 49415 ) N ; - - _502_ MUX2_X1 + PLACED ( 4147 48697 ) N ; - - _503_ MUX2_X1 + PLACED ( 30267 57478 ) N ; - - _504_ MUX2_X1 + PLACED ( 31997 56870 ) N ; - - _505_ MUX2_X1 + PLACED ( 27151 5349 ) N ; - - _506_ MUX2_X1 + PLACED ( 18800 5775 ) N ; - - _507_ MUX2_X1 + PLACED ( 1407 23148 ) N ; - - _508_ MUX2_X1 + PLACED ( 3303 20488 ) N ; - - _509_ MUX2_X1 + PLACED ( 1407 11505 ) N ; - - _510_ MUX2_X1 + PLACED ( 3386 12556 ) N ; - - _511_ MUX2_X1 + PLACED ( 11421 6316 ) N ; - - _512_ MUX2_X1 + PLACED ( 11567 6719 ) N ; - - _513_ MUX2_X1 + PLACED ( 6380 28476 ) N ; - - _514_ MUX2_X1 + PLACED ( 5676 28860 ) N ; - - _515_ MUX2_X1 + PLACED ( 35997 32922 ) N ; - - _516_ MUX2_X1 + PLACED ( 37183 36653 ) N ; - - _517_ MUX2_X1 + PLACED ( 40006 13533 ) N ; - - _518_ MUX2_X1 + PLACED ( 41296 11464 ) N ; - - _519_ MUX2_X1 + PLACED ( 39905 4424 ) N ; - - _520_ MUX2_X1 + PLACED ( 41048 6035 ) N ; - - _521_ MUX2_X1 + PLACED ( 55613 9880 ) N ; - - _522_ MUX2_X1 + PLACED ( 56033 10099 ) N ; - - _523_ MUX2_X1 + PLACED ( 47945 6646 ) N ; - - _524_ MUX2_X1 + PLACED ( 49776 7310 ) N ; - - _525_ MUX2_X1 + PLACED ( 51421 37328 ) N ; - - _526_ MUX2_X1 + PLACED ( 53993 35729 ) N ; - - _527_ MUX2_X1 + PLACED ( 55378 47438 ) N ; - - _528_ MUX2_X1 + PLACED ( 56126 48807 ) N ; - - _529_ AOI22_X1 + PLACED ( 34794 29470 ) N ; - - _530_ NOR2_X1 + PLACED ( 32004 30031 ) N ; - - _531_ XNOR2_X1 + PLACED ( 25276 30109 ) N ; - - _532_ XNOR2_X1 + PLACED ( 25999 30882 ) N ; - - _533_ AOI221_X2 + PLACED ( 24188 51481 ) N ; - - _534_ OR3_X1 + PLACED ( 28777 36044 ) N ; - - _535_ AOI22_X1 + PLACED ( 27923 37253 ) N ; - - _536_ DFF_X1 + PLACED ( 0 34051 ) N ; - - _537_ DFF_X1 + PLACED ( 8287 48908 ) N ; - - _538_ DFF_X1 + PLACED ( 16211 56516 ) N ; - - _539_ DFF_X1 + PLACED ( 23627 57478 ) N ; - - _540_ DFF_X1 + PLACED ( 22106 6479 ) N ; - - _541_ DFF_X1 + PLACED ( 370 23182 ) N ; - - _542_ DFF_X1 + PLACED ( 22737 11088 ) N ; - - _543_ DFF_X1 + PLACED ( 6160 13783 ) N ; - - _544_ DFF_X1 + PLACED ( 38137 31775 ) N ; - - _545_ DFF_X1 + PLACED ( 30636 11530 ) N ; - - _546_ DFF_X1 + PLACED ( 37935 23603 ) N ; - - _547_ DFF_X1 + PLACED ( 46871 12708 ) N ; - - _548_ DFF_X1 + PLACED ( 48159 26637 ) N ; - - _549_ DFF_X1 + PLACED ( 44563 38997 ) N ; - - _550_ DFF_X1 + PLACED ( 48394 51007 ) N ; - - _551_ DFF_X1 + PLACED ( 36859 52621 ) N ; - - _552_ DFF_X1 + PLACED ( 30683 45663 ) N ; - - _553_ DFF_X1 + PLACED ( 10644 56431 ) N ; - - _554_ DFF_X1 + PLACED ( 3038 38234 ) N ; - - _555_ DFF_X1 + PLACED ( 3891 48617 ) N ; - - _556_ DFF_X1 + PLACED ( 32283 57388 ) N ; - - _557_ DFF_X1 + PLACED ( 16771 5219 ) N ; - - _558_ DFF_X1 + PLACED ( 1707 19364 ) N ; - - _559_ DFF_X1 + PLACED ( 2101 12860 ) N ; - - _560_ DFF_X1 + PLACED ( 8725 6559 ) N ; - - _561_ DFF_X1 + PLACED ( 1553 28800 ) N ; - - _562_ DFF_X1 + PLACED ( 37257 37811 ) N ; - - _563_ DFF_X1 + PLACED ( 41004 10515 ) N ; - - _564_ DFF_X1 + PLACED ( 40749 5873 ) N ; - - _565_ DFF_X1 + PLACED ( 55480 9968 ) N ; - - _566_ DFF_X1 + PLACED ( 50066 7190 ) N ; - - _567_ DFF_X1 + PLACED ( 54860 35156 ) N ; - - _568_ DFF_X1 + PLACED ( 55480 49476 ) N ; - - _569_ DFF_X1 + PLACED ( 27346 37401 ) N ; + - _276_ NOR2_X2 + PLACED ( 36263 45448 ) N ; + - _277_ BUF_X4 + PLACED ( 39337 43912 ) N ; + - _278_ INV_X1 + PLACED ( 6685 35357 ) N ; + - _279_ NOR2_X1 + PLACED ( 9364 36605 ) N ; + - _280_ INV_X1 + PLACED ( 11313 35946 ) N ; + - _281_ INV_X1 + PLACED ( 18260 52434 ) N ; + - _282_ NOR2_X1 + PLACED ( 18941 47107 ) N ; + - _283_ INV_X1 + PLACED ( 25369 46272 ) N ; + - _284_ NOR2_X1 + PLACED ( 24115 46348 ) N ; + - _285_ NOR2_X1 + PLACED ( 18459 45408 ) N ; + - _286_ INV_X1 + PLACED ( 13902 44463 ) N ; + - _287_ NOR2_X1 + PLACED ( 13294 43271 ) N ; + - _288_ INV_X1 + PLACED ( 14175 42721 ) N ; + - _289_ AND2_X1 + PLACED ( 14653 36233 ) N ; + - _290_ INV_X1 + PLACED ( 13437 15257 ) N ; + - _291_ NOR2_X1 + PLACED ( 14042 15278 ) N ; + - _292_ INV_X1 + PLACED ( 14311 12972 ) N ; + - _293_ AOI21_X1 + PLACED ( 14025 15420 ) N ; + - _294_ INV_X1 + PLACED ( 20880 22632 ) N ; + - _295_ NOR2_X1 + PLACED ( 19454 24206 ) N ; + - _296_ INV_X1 + PLACED ( 9638 21188 ) N ; + - _297_ NOR2_X1 + PLACED ( 10315 22574 ) N ; + - _298_ NOR2_X1 + PLACED ( 14599 26554 ) N ; + - _299_ AND2_X1 + PLACED ( 14694 30568 ) N ; + - _300_ INV_X16 + PLACED ( 55203 15180 ) N ; + - _301_ NOR2_X4 + PLACED ( 50797 16595 ) N ; + - _302_ INV_X16 + PLACED ( 45797 22848 ) N ; + - _303_ NOR3_X2 + PLACED ( 49215 18398 ) N ; + - _304_ AOI21_X1 + PLACED ( 47646 17374 ) N ; + - _305_ INV_X1 + PLACED ( 44948 17807 ) N ; + - _306_ INV_X32 + PLACED ( 49400 41294 ) N ; + - _307_ AND2_X4 + PLACED ( 57020 32447 ) N ; + - _308_ INV_X4 + PLACED ( 58253 29963 ) N ; + - _309_ INV_X32 + PLACED ( 49144 54630 ) N ; + - _310_ OAI211_X4 + PLACED ( 54467 40978 ) N ; + - _311_ NAND2_X4 + PLACED ( 56424 27543 ) N ; + - _312_ INV_X16 + PLACED ( 54949 23025 ) N ; + - _313_ NOR2_X1 + PLACED ( 55672 21794 ) N ; + - _314_ NOR3_X4 + PLACED ( 51540 19412 ) N ; + - _315_ NOR2_X2 + PLACED ( 41611 18701 ) N ; + - _316_ INV_X1 + PLACED ( 35019 22946 ) N ; + - _317_ NOR2_X1 + PLACED ( 33472 23767 ) N ; + - _318_ INV_X32 + PLACED ( 28270 8285 ) N ; + - _319_ NOR2_X4 + PLACED ( 31596 17911 ) N ; + - _320_ INV_X4 + PLACED ( 36980 31398 ) N ; + - _321_ NAND2_X1 + PLACED ( 32302 30480 ) N ; + - _322_ INV_X1 + PLACED ( 27764 30343 ) N ; + - _323_ OAI21_X4 + PLACED ( 29873 30294 ) N ; + - _324_ NOR4_X4 + PLACED ( 27866 23951 ) N ; + - _325_ NOR2_X1 + PLACED ( 32439 30573 ) N ; + - _326_ OAI21_X1 + PLACED ( 28806 30411 ) N ; + - _327_ INV_X1 + PLACED ( 27628 35091 ) N ; + - _328_ INV_X32 + PLACED ( 29622 2127 ) N ; + - _329_ NOR3_X2 + PLACED ( 33574 18501 ) N ; + - _330_ AOI21_X4 + PLACED ( 33588 18346 ) N ; + - _331_ OAI221_X4 + PLACED ( 26475 29917 ) N ; + - _332_ OAI211_X1 + PLACED ( 13701 33415 ) N ; + - _333_ AND2_X1 + PLACED ( 8460 36700 ) N ; + - _334_ INV_X1 + PLACED ( 10382 36460 ) N ; + - _335_ NAND2_X1 + PLACED ( 20262 46985 ) N ; + - _336_ NAND2_X1 + PLACED ( 24091 45988 ) N ; + - _337_ NAND2_X1 + PLACED ( 19938 44421 ) N ; + - _338_ INV_X1 + PLACED ( 19045 45594 ) N ; + - _339_ NAND3_X1 + PLACED ( 15142 43011 ) N ; + - _340_ NAND2_X1 + PLACED ( 13287 43148 ) N ; + - _341_ NAND2_X1 + PLACED ( 14206 42399 ) N ; + - _342_ INV_X1 + PLACED ( 15160 15183 ) N ; + - _343_ OAI211_X1 + PLACED ( 13329 15844 ) N ; + - _344_ NAND2_X1 + PLACED ( 12734 16527 ) N ; + - _345_ AOI211_X1 + PLACED ( 13869 24145 ) N ; + - _346_ NAND2_X1 + PLACED ( 19573 24408 ) N ; + - _347_ NAND2_X1 + PLACED ( 10201 22886 ) N ; + - _348_ OAI21_X1 + PLACED ( 16981 25551 ) N ; + - _349_ OR2_X1 + PLACED ( 16765 31909 ) N ; + - _350_ AOI21_X1 + PLACED ( 14272 36116 ) N ; + - _351_ AND4_X1 + PLACED ( 11787 35302 ) N ; + - _352_ AOI22_X1 + PLACED ( 11800 35408 ) N ; + - _353_ OR2_X1 + PLACED ( 13016 34235 ) N ; + - _354_ BUF_X4 + PLACED ( 41717 42534 ) N ; + - _355_ INV_X2 + PLACED ( 36478 45936 ) N ; + - _356_ BUF_X4 + PLACED ( 29565 52200 ) N ; + - _357_ AND3_X1 + PLACED ( 15196 35538 ) N ; + - _358_ OAI211_X4 + PLACED ( 17519 32592 ) N ; + - _359_ OAI21_X1 + PLACED ( 13362 36274 ) N ; + - _360_ OAI21_X1 + PLACED ( 17486 32573 ) N ; + - _361_ NAND3_X4 + PLACED ( 18368 35378 ) N ; + - _362_ NOR2_X1 + PLACED ( 45048 45529 ) N ; + - _363_ INV_X1 + PLACED ( 46496 44879 ) N ; + - _364_ NOR2_X4 + PLACED ( 27256 44357 ) N ; + - _365_ AOI221_X4 + PLACED ( 22940 38572 ) N ; + - _366_ AND2_X4 + PLACED ( 32623 41908 ) N ; + - _367_ BUF_X4 + PLACED ( 42720 51107 ) N ; + - _368_ OAI21_X1 + PLACED ( 11886 35236 ) N ; + - _369_ BUF_X4 + PLACED ( 42915 52757 ) N ; + - _370_ AOI22_X1 + PLACED ( 10304 36367 ) N ; + - _371_ NOR2_X2 + PLACED ( 20469 29126 ) N ; + - _372_ NAND3_X1 + PLACED ( 14676 31468 ) N ; + - _373_ OR2_X1 + PLACED ( 15279 40988 ) N ; + - _374_ AOI22_X1 + PLACED ( 15309 43120 ) N ; + - _375_ NAND2_X1 + PLACED ( 14627 42691 ) N ; + - _376_ XOR2_X1 + PLACED ( 7560 44812 ) N ; + - _377_ XNOR2_X1 + PLACED ( 8660 44015 ) N ; + - _378_ INV_X1 + PLACED ( 32143 52837 ) N ; + - _379_ BUF_X4 + PLACED ( 32431 53196 ) N ; + - _380_ NOR2_X1 + PLACED ( 11620 48630 ) N ; + - _381_ NAND2_X1 + PLACED ( 10823 46675 ) N ; + - _382_ AOI221_X4 + PLACED ( 15047 48646 ) N ; + - _383_ AOI21_X1 + PLACED ( 10823 48683 ) N ; + - _384_ INV_X1 + PLACED ( 19232 42200 ) N ; + - _385_ INV_X1 + PLACED ( 18931 40101 ) N ; + - _386_ OAI211_X1 + PLACED ( 20001 43253 ) N ; + - _387_ INV_X1 + PLACED ( 21684 45575 ) N ; + - _388_ AND4_X1 + PLACED ( 20674 45167 ) N ; + - _389_ AOI22_X1 + PLACED ( 20498 45290 ) N ; + - _390_ NOR2_X1 + PLACED ( 22061 45459 ) N ; + - _391_ NOR2_X1 + PLACED ( 19934 53532 ) N ; + - _392_ NAND2_X1 + PLACED ( 21011 50816 ) N ; + - _393_ AOI221_X4 + PLACED ( 15388 53678 ) N ; + - _394_ AOI21_X1 + PLACED ( 19380 54031 ) N ; + - _395_ OAI21_X1 + PLACED ( 20528 42881 ) N ; + - _396_ XOR2_X1 + PLACED ( 24464 55814 ) N ; + - _397_ XNOR2_X1 + PLACED ( 24398 54687 ) N ; + - _398_ NOR2_X1 + PLACED ( 27062 53022 ) N ; + - _399_ AOI221_X1 + PLACED ( 24989 53335 ) N ; + - _400_ BUF_X4 + PLACED ( 27414 44569 ) N ; + - _401_ OR3_X1 + PLACED ( 25211 46631 ) N ; + - _402_ AOI21_X1 + PLACED ( 26346 53434 ) N ; + - _403_ INV_X1 + PLACED ( 12453 24805 ) N ; + - _404_ OAI211_X1 + PLACED ( 13101 25882 ) N ; + - _405_ AOI21_X1 + PLACED ( 12176 22336 ) N ; + - _406_ AOI21_X1 + PLACED ( 11032 22439 ) N ; + - _407_ AND2_X1 + PLACED ( 13989 23278 ) N ; + - _408_ XNOR2_X1 + PLACED ( 19685 22364 ) N ; + - _409_ XNOR2_X1 + PLACED ( 18892 22986 ) N ; + - _410_ NOR2_X1 + PLACED ( 22105 23562 ) N ; + - _411_ AOI221_X1 + PLACED ( 20863 24609 ) N ; + - _412_ OR3_X1 + PLACED ( 20908 23943 ) N ; + - _413_ AOI21_X1 + PLACED ( 21340 23749 ) N ; + - _414_ OAI21_X1 + PLACED ( 13374 26913 ) N ; + - _415_ AND2_X1 + PLACED ( 12668 22524 ) N ; + - _416_ AND4_X1 + PLACED ( 12183 24193 ) N ; + - _417_ AOI22_X1 + PLACED ( 12130 24308 ) N ; + - _418_ OR2_X1 + PLACED ( 13555 22765 ) N ; + - _419_ NOR2_X1 + PLACED ( 10941 22005 ) N ; + - _420_ AOI221_X4 + PLACED ( 23869 21854 ) N ; + - _421_ OAI21_X1 + PLACED ( 11809 22689 ) N ; + - _422_ AOI21_X1 + PLACED ( 10565 22341 ) N ; + - _423_ AOI21_X1 + PLACED ( 15267 11884 ) N ; + - _424_ NOR2_X1 + PLACED ( 14716 11933 ) N ; + - _425_ NOR2_X1 + PLACED ( 16337 12741 ) N ; + - _426_ XNOR2_X1 + PLACED ( 16348 12309 ) N ; + - _427_ XNOR2_X1 + PLACED ( 16916 12417 ) N ; + - _428_ NOR2_X1 + PLACED ( 25020 15346 ) N ; + - _429_ AOI221_X2 + PLACED ( 25757 16394 ) N ; + - _430_ OR3_X1 + PLACED ( 21626 15809 ) N ; + - _431_ AOI21_X1 + PLACED ( 24188 15194 ) N ; + - _432_ XNOR2_X1 + PLACED ( 15156 8353 ) N ; + - _433_ XNOR2_X1 + PLACED ( 18897 9278 ) N ; + - _434_ AOI221_X2 + PLACED ( 19729 17124 ) N ; + - _435_ OR3_X1 + PLACED ( 19981 16349 ) N ; + - _436_ AOI22_X1 + PLACED ( 17853 16385 ) N ; + - _437_ NAND2_X1 + PLACED ( 37452 17301 ) N ; + - _438_ OAI221_X1 + PLACED ( 38637 18236 ) N ; + - _439_ NAND2_X1 + PLACED ( 37970 28565 ) N ; + - _440_ XOR2_X1 + PLACED ( 41813 30911 ) N ; + - _441_ XNOR2_X1 + PLACED ( 42383 29655 ) N ; + - _442_ AOI221_X2 + PLACED ( 42188 28541 ) N ; + - _443_ NAND2_X1 + PLACED ( 40679 30348 ) N ; + - _444_ AOI22_X1 + PLACED ( 39512 30493 ) N ; + - _445_ OAI21_X1 + PLACED ( 37967 18064 ) N ; + - _446_ NAND2_X1 + PLACED ( 37929 16938 ) N ; + - _447_ XNOR2_X1 + PLACED ( 36401 12762 ) N ; + - _448_ XNOR2_X1 + PLACED ( 36635 13914 ) N ; + - _449_ NOR2_X1 + PLACED ( 32301 15656 ) N ; + - _450_ AOI221_X1 + PLACED ( 27501 17240 ) N ; + - _451_ OR3_X1 + PLACED ( 30622 16024 ) N ; + - _452_ AOI21_X1 + PLACED ( 30608 15614 ) N ; + - _453_ XNOR2_X1 + PLACED ( 41322 22603 ) N ; + - _454_ XNOR2_X1 + PLACED ( 41520 23483 ) N ; + - _455_ AOI221_X2 + PLACED ( 35033 39465 ) N ; + - _456_ OR3_X1 + PLACED ( 35052 24475 ) N ; + - _457_ AOI22_X1 + PLACED ( 36070 24392 ) N ; + - _458_ AOI22_X1 + PLACED ( 56502 26943 ) N ; + - _459_ NOR2_X1 + PLACED ( 56958 20669 ) N ; + - _460_ XOR2_X1 + PLACED ( 56261 17607 ) N ; + - _461_ XNOR2_X1 + PLACED ( 57285 18909 ) N ; + - _462_ NOR2_X1 + PLACED ( 46795 16122 ) N ; + - _463_ AOI221_X1 + PLACED ( 43442 17358 ) N ; + - _464_ OR3_X1 + PLACED ( 46649 16417 ) N ; + - _465_ AOI21_X1 + PLACED ( 46595 16107 ) N ; + - _466_ XNOR2_X1 + PLACED ( 55258 25436 ) N ; + - _467_ XNOR2_X1 + PLACED ( 55964 27238 ) N ; + - _468_ AOI221_X4 + PLACED ( 46456 32965 ) N ; + - _469_ OR3_X1 + PLACED ( 48503 26122 ) N ; + - _470_ AOI22_X1 + PLACED ( 48701 26436 ) N ; + - _471_ XNOR2_X1 + PLACED ( 49331 40641 ) N ; + - _472_ INV_X1 + PLACED ( 52991 42416 ) N ; + - _473_ NOR2_X1 + PLACED ( 52481 43362 ) N ; + - _474_ XNOR2_X1 + PLACED ( 49641 41907 ) N ; + - _475_ AOI221_X4 + PLACED ( 46382 33232 ) N ; + - _476_ NAND3_X1 + PLACED ( 47177 40790 ) N ; + - _477_ AOI22_X1 + PLACED ( 47250 38917 ) N ; + - _478_ XOR2_X1 + PLACED ( 54367 49085 ) N ; + - _479_ AOI221_X4 + PLACED ( 46208 48003 ) N ; + - _480_ NAND3_X1 + PLACED ( 48624 47760 ) N ; + - _481_ AOI22_X1 + PLACED ( 48796 49244 ) N ; + - _482_ NOR2_X1 + PLACED ( 35590 46110 ) N ; + - _483_ NOR2_X1 + PLACED ( 54320 31519 ) N ; + - _484_ AND3_X1 + PLACED ( 52649 32211 ) N ; + - _485_ NAND3_X1 + PLACED ( 33169 33528 ) N ; + - _486_ NOR3_X1 + PLACED ( 19772 17131 ) N ; + - _487_ NAND2_X1 + PLACED ( 20491 17381 ) N ; + - _488_ NOR4_X1 + PLACED ( 22894 37951 ) N ; + - _489_ NAND3_X1 + PLACED ( 21812 40851 ) N ; + - _490_ NOR3_X1 + PLACED ( 32425 39463 ) N ; + - _491_ NAND3_X1 + PLACED ( 32879 45885 ) N ; + - _492_ AOI221_X4 + PLACED ( 34067 50362 ) N ; + - _493_ NAND3_X1 + PLACED ( 31854 52971 ) N ; + - _494_ AOI221_X1 + PLACED ( 31549 47378 ) N ; + - _495_ MUX2_X1 + PLACED ( 9904 57472 ) N ; + - _496_ NOR2_X4 + PLACED ( 41952 45412 ) N ; + - _497_ BUF_X8 + PLACED ( 39501 47157 ) N ; + - _498_ MUX2_X1 + PLACED ( 11946 56450 ) N ; + - _499_ MUX2_X1 + PLACED ( 1407 34519 ) N ; + - _500_ MUX2_X1 + PLACED ( 3597 37431 ) N ; + - _501_ MUX2_X1 + PLACED ( 1555 49496 ) N ; + - _502_ MUX2_X1 + PLACED ( 3599 48540 ) N ; + - _503_ MUX2_X1 + PLACED ( 32211 57478 ) N ; + - _504_ MUX2_X1 + PLACED ( 33994 57052 ) N ; + - _505_ MUX2_X1 + PLACED ( 22577 5121 ) N ; + - _506_ MUX2_X1 + PLACED ( 24123 5799 ) N ; + - _507_ MUX2_X1 + PLACED ( 1407 22439 ) N ; + - _508_ MUX2_X1 + PLACED ( 3133 19793 ) N ; + - _509_ MUX2_X1 + PLACED ( 1407 11474 ) N ; + - _510_ MUX2_X1 + PLACED ( 3679 11953 ) N ; + - _511_ MUX2_X1 + PLACED ( 11498 6152 ) N ; + - _512_ MUX2_X1 + PLACED ( 11735 6576 ) N ; + - _513_ MUX2_X1 + PLACED ( 6447 28842 ) N ; + - _514_ MUX2_X1 + PLACED ( 5936 29206 ) N ; + - _515_ MUX2_X1 + PLACED ( 35636 32922 ) N ; + - _516_ MUX2_X1 + PLACED ( 36961 36698 ) N ; + - _517_ MUX2_X1 + PLACED ( 40013 13878 ) N ; + - _518_ MUX2_X1 + PLACED ( 41271 11727 ) N ; + - _519_ MUX2_X1 + PLACED ( 40146 4762 ) N ; + - _520_ MUX2_X1 + PLACED ( 41459 6093 ) N ; + - _521_ MUX2_X1 + PLACED ( 55129 10019 ) N ; + - _522_ MUX2_X1 + PLACED ( 55736 10264 ) N ; + - _523_ MUX2_X1 + PLACED ( 47737 6929 ) N ; + - _524_ MUX2_X1 + PLACED ( 49661 7661 ) N ; + - _525_ MUX2_X1 + PLACED ( 51156 37171 ) N ; + - _526_ MUX2_X1 + PLACED ( 53766 35210 ) N ; + - _527_ MUX2_X1 + PLACED ( 55082 46726 ) N ; + - _528_ MUX2_X1 + PLACED ( 55892 47667 ) N ; + - _529_ AOI22_X1 + PLACED ( 34649 29775 ) N ; + - _530_ NOR2_X1 + PLACED ( 31725 30420 ) N ; + - _531_ XNOR2_X1 + PLACED ( 24483 30534 ) N ; + - _532_ XNOR2_X1 + PLACED ( 25094 31349 ) N ; + - _533_ AOI221_X2 + PLACED ( 22970 52352 ) N ; + - _534_ OR3_X1 + PLACED ( 28186 36190 ) N ; + - _535_ AOI22_X1 + PLACED ( 27353 37160 ) N ; + - _536_ DFF_X1 + PLACED ( 0 34536 ) N ; + - _537_ DFF_X1 + PLACED ( 7900 49607 ) N ; + - _538_ DFF_X1 + PLACED ( 17199 57478 ) N ; + - _539_ DFF_X1 + PLACED ( 25389 57478 ) N ; + - _540_ DFF_X1 + PLACED ( 17216 5395 ) N ; + - _541_ DFF_X1 + PLACED ( 1027 22863 ) N ; + - _542_ DFF_X1 + PLACED ( 21517 11131 ) N ; + - _543_ DFF_X1 + PLACED ( 6378 14734 ) N ; + - _544_ DFF_X1 + PLACED ( 38290 32152 ) N ; + - _545_ DFF_X1 + PLACED ( 29368 11436 ) N ; + - _546_ DFF_X1 + PLACED ( 36509 23900 ) N ; + - _547_ DFF_X1 + PLACED ( 46473 12753 ) N ; + - _548_ DFF_X1 + PLACED ( 47811 26413 ) N ; + - _549_ DFF_X1 + PLACED ( 44503 38986 ) N ; + - _550_ DFF_X1 + PLACED ( 48059 50754 ) N ; + - _551_ DFF_X1 + PLACED ( 37279 52772 ) N ; + - _552_ DFF_X1 + PLACED ( 30391 46567 ) N ; + - _553_ DFF_X1 + PLACED ( 11282 56615 ) N ; + - _554_ DFF_X1 + PLACED ( 2574 39021 ) N ; + - _555_ DFF_X1 + PLACED ( 2722 48270 ) N ; + - _556_ DFF_X1 + PLACED ( 34248 57478 ) N ; + - _557_ DFF_X1 + PLACED ( 24521 5316 ) N ; + - _558_ DFF_X1 + PLACED ( 1353 18495 ) N ; + - _559_ DFF_X1 + PLACED ( 3309 11869 ) N ; + - _560_ DFF_X1 + PLACED ( 9848 6311 ) N ; + - _561_ DFF_X1 + PLACED ( 2039 29108 ) N ; + - _562_ DFF_X1 + PLACED ( 37157 37987 ) N ; + - _563_ DFF_X1 + PLACED ( 40937 10748 ) N ; + - _564_ DFF_X1 + PLACED ( 41436 5745 ) N ; + - _565_ DFF_X1 + PLACED ( 55433 10138 ) N ; + - _566_ DFF_X1 + PLACED ( 50036 7625 ) N ; + - _567_ DFF_X1 + PLACED ( 54674 34497 ) N ; + - _568_ DFF_X1 + PLACED ( 55480 48923 ) N ; + - _569_ DFF_X1 + PLACED ( 26792 37293 ) N ; END COMPONENTS PINS 54 ; - clk + NET clk + DIRECTION INPUT + USE SIGNAL diff --git a/src/gpl/test/simple04-rd.ok b/src/gpl/test/simple04-rd.ok index 220dc6046e2..14653ed8e53 100644 --- a/src/gpl/test/simple04-rd.ok +++ b/src/gpl/test/simple04-rd.ok @@ -72,167 +72,18 @@ [INFO GPL-0040] NumTiles: 196 [INFO GPL-0081] TotalRouteOverflow: 0.0 [INFO GPL-0082] OverflowTileCnt: 0 -[INFO GPL-0083] 0.5%RC: 0.8663694858551025 -[INFO GPL-0084] 1.0%RC: 0.7915560305118561 -[INFO GPL-0085] 2.0%RC: 0.7390100508928299 -[INFO GPL-0086] 5.0%RC: 0.6729927897453308 -[INFO GPL-0087] FinalRC: 0.82896274 -[INFO GPL-0078] FinalRC lower than minRC (1e+30), min RC updated. -[INFO GPL-0045] InflatedAreaDelta: 0.000 um^2 -[INFO GPL-0046] TargetDensity: 0.700 -[INFO GPL-0049] WhiteSpaceArea: 953.876 um^2 -[INFO GPL-0050] NesterovInstsArea: 569.772 um^2 -[INFO GPL-0051] TotalFillerArea: 97.941 um^2 -[INFO GPL-0052] TotalGCellsArea: 667.713 um^2 -[INFO GPL-0053] ExpectedGCellsArea: 667.713 um^2 -[INFO GPL-0054] NewTargetDensity: 0.700 -[INFO GPL-0055] NewWhiteSpaceArea: 953.876 um^2 -[INFO GPL-0056] MovableArea: 667.713 um^2 -[INFO GPL-0057] NewNesterovInstArea: 569.772 um^2 -[INFO GPL-0058] NewTotalFillerArea: 97.941 um^2 -[INFO GPL-0059] NewTotalGCellsArea: 667.713 um^2 -[NesterovSolve] Revert back to snapshot coordi -[NesterovSolve] Iter: 290 overflow: 0.569 HPWL: 4622568 -[NesterovSolve] Iter: 300 overflow: 0.534 HPWL: 4678132 -[NesterovSolve] Iter: 310 overflow: 0.488 HPWL: 4696790 -[NesterovSolve] Iter: 320 overflow: 0.446 HPWL: 4684731 -[NesterovSolve] Iter: 330 overflow: 0.400 HPWL: 4669364 -[NesterovSolve] Iter: 340 overflow: 0.357 HPWL: 4655730 -[NesterovSolve] Iter: 350 overflow: 0.319 HPWL: 4686260 -[INFO GPL-0075] Routability numCall: 2 inflationIterCnt: 2 bloatIterCnt: 0 -[INFO GPL-0036] TileBBox: ( 0 0 ) ( 4200 4200 ) DBU -[INFO GPL-0038] TileCnt: 14 14 -[INFO GPL-0040] NumTiles: 196 -[INFO GPL-0081] TotalRouteOverflow: 0.0 -[INFO GPL-0082] OverflowTileCnt: 0 -[INFO GPL-0083] 0.5%RC: 0.8215832710266113 -[INFO GPL-0084] 1.0%RC: 0.781876266002655 -[INFO GPL-0085] 2.0%RC: 0.7435924112796783 -[INFO GPL-0086] 5.0%RC: 0.6735508263111114 -[INFO GPL-0087] FinalRC: 0.8017298 -[INFO GPL-0078] FinalRC lower than minRC (0.82896274), min RC updated. -[INFO GPL-0045] InflatedAreaDelta: 0.000 um^2 -[INFO GPL-0046] TargetDensity: 0.700 -[INFO GPL-0049] WhiteSpaceArea: 953.876 um^2 -[INFO GPL-0050] NesterovInstsArea: 569.772 um^2 -[INFO GPL-0051] TotalFillerArea: 97.941 um^2 -[INFO GPL-0052] TotalGCellsArea: 667.713 um^2 -[INFO GPL-0053] ExpectedGCellsArea: 667.713 um^2 -[INFO GPL-0054] NewTargetDensity: 0.700 -[INFO GPL-0055] NewWhiteSpaceArea: 953.876 um^2 -[INFO GPL-0056] MovableArea: 667.713 um^2 -[INFO GPL-0057] NewNesterovInstArea: 569.772 um^2 -[INFO GPL-0058] NewTotalFillerArea: 97.941 um^2 -[INFO GPL-0059] NewTotalGCellsArea: 667.713 um^2 -[NesterovSolve] Revert back to snapshot coordi -[NesterovSolve] Iter: 360 overflow: 0.587 HPWL: 4587768 -[NesterovSolve] Iter: 370 overflow: 0.556 HPWL: 4648997 -[NesterovSolve] Iter: 380 overflow: 0.518 HPWL: 4695007 -[NesterovSolve] Iter: 390 overflow: 0.475 HPWL: 4690204 -[NesterovSolve] Iter: 400 overflow: 0.434 HPWL: 4683351 -[NesterovSolve] Iter: 410 overflow: 0.377 HPWL: 4645116 -[NesterovSolve] Iter: 420 overflow: 0.344 HPWL: 4663512 -[NesterovSolve] Iter: 430 overflow: 0.307 HPWL: 4699230 -[INFO GPL-0075] Routability numCall: 3 inflationIterCnt: 3 bloatIterCnt: 0 -[INFO GPL-0036] TileBBox: ( 0 0 ) ( 4200 4200 ) DBU -[INFO GPL-0038] TileCnt: 14 14 -[INFO GPL-0040] NumTiles: 196 -[INFO GPL-0081] TotalRouteOverflow: 0.0 -[INFO GPL-0082] OverflowTileCnt: 0 -[INFO GPL-0083] 0.5%RC: 0.8215832710266113 -[INFO GPL-0084] 1.0%RC: 0.781876266002655 -[INFO GPL-0085] 2.0%RC: 0.7435924112796783 -[INFO GPL-0086] 5.0%RC: 0.6735508263111114 -[INFO GPL-0087] FinalRC: 0.8017298 -[INFO GPL-0079] MinRC (0.8017298) violation occurred, total count: 1. -[INFO GPL-0045] InflatedAreaDelta: 0.000 um^2 -[INFO GPL-0046] TargetDensity: 0.700 -[INFO GPL-0049] WhiteSpaceArea: 953.876 um^2 -[INFO GPL-0050] NesterovInstsArea: 569.772 um^2 -[INFO GPL-0051] TotalFillerArea: 97.941 um^2 -[INFO GPL-0052] TotalGCellsArea: 667.713 um^2 -[INFO GPL-0053] ExpectedGCellsArea: 667.713 um^2 -[INFO GPL-0054] NewTargetDensity: 0.700 -[INFO GPL-0055] NewWhiteSpaceArea: 953.876 um^2 -[INFO GPL-0056] MovableArea: 667.713 um^2 -[INFO GPL-0057] NewNesterovInstArea: 569.772 um^2 -[INFO GPL-0058] NewTotalFillerArea: 97.941 um^2 -[INFO GPL-0059] NewTotalGCellsArea: 667.713 um^2 -[NesterovSolve] Revert back to snapshot coordi -[NesterovSolve] Iter: 440 overflow: 0.575 HPWL: 4610091 -[NesterovSolve] Iter: 450 overflow: 0.541 HPWL: 4672342 -[NesterovSolve] Iter: 460 overflow: 0.499 HPWL: 4694087 -[NesterovSolve] Iter: 470 overflow: 0.455 HPWL: 4691130 -[NesterovSolve] Iter: 480 overflow: 0.411 HPWL: 4681679 -[NesterovSolve] Iter: 490 overflow: 0.364 HPWL: 4647002 -[NesterovSolve] Iter: 500 overflow: 0.327 HPWL: 4684079 -[INFO GPL-0075] Routability numCall: 4 inflationIterCnt: 4 bloatIterCnt: 0 -[INFO GPL-0036] TileBBox: ( 0 0 ) ( 4200 4200 ) DBU -[INFO GPL-0038] TileCnt: 14 14 -[INFO GPL-0040] NumTiles: 196 -[INFO GPL-0081] TotalRouteOverflow: 0.0 -[INFO GPL-0082] OverflowTileCnt: 0 -[INFO GPL-0083] 0.5%RC: 0.8215832710266113 -[INFO GPL-0084] 1.0%RC: 0.781876266002655 -[INFO GPL-0085] 2.0%RC: 0.7435924112796783 -[INFO GPL-0086] 5.0%RC: 0.6735508263111114 -[INFO GPL-0087] FinalRC: 0.8017298 -[INFO GPL-0079] MinRC (0.8017298) violation occurred, total count: 2. -[INFO GPL-0045] InflatedAreaDelta: 0.000 um^2 -[INFO GPL-0046] TargetDensity: 0.700 -[INFO GPL-0049] WhiteSpaceArea: 953.876 um^2 -[INFO GPL-0050] NesterovInstsArea: 569.772 um^2 -[INFO GPL-0051] TotalFillerArea: 97.941 um^2 -[INFO GPL-0052] TotalGCellsArea: 667.713 um^2 -[INFO GPL-0053] ExpectedGCellsArea: 667.713 um^2 -[INFO GPL-0054] NewTargetDensity: 0.700 -[INFO GPL-0055] NewWhiteSpaceArea: 953.876 um^2 -[INFO GPL-0056] MovableArea: 667.713 um^2 -[INFO GPL-0057] NewNesterovInstArea: 569.772 um^2 -[INFO GPL-0058] NewTotalFillerArea: 97.941 um^2 -[INFO GPL-0059] NewTotalGCellsArea: 667.713 um^2 -[NesterovSolve] Revert back to snapshot coordi -[NesterovSolve] Iter: 510 overflow: 0.594 HPWL: 4571046 -[NesterovSolve] Iter: 520 overflow: 0.563 HPWL: 4637180 -[NesterovSolve] Iter: 530 overflow: 0.526 HPWL: 4686839 -[NesterovSolve] Iter: 540 overflow: 0.482 HPWL: 4691202 -[NesterovSolve] Iter: 550 overflow: 0.439 HPWL: 4682012 -[NesterovSolve] Iter: 560 overflow: 0.387 HPWL: 4658075 -[NesterovSolve] Iter: 570 overflow: 0.348 HPWL: 4662159 -[NesterovSolve] Iter: 580 overflow: 0.313 HPWL: 4691486 -[INFO GPL-0075] Routability numCall: 5 inflationIterCnt: 0 bloatIterCnt: 1 -[INFO GPL-0036] TileBBox: ( 0 0 ) ( 4200 4200 ) DBU -[INFO GPL-0038] TileCnt: 14 14 -[INFO GPL-0040] NumTiles: 196 -[INFO GPL-0081] TotalRouteOverflow: 0.0 -[INFO GPL-0082] OverflowTileCnt: 0 -[INFO GPL-0083] 0.5%RC: 0.8215832710266113 -[INFO GPL-0084] 1.0%RC: 0.781876266002655 -[INFO GPL-0085] 2.0%RC: 0.7435924112796783 -[INFO GPL-0086] 5.0%RC: 0.6735508263111114 -[INFO GPL-0087] FinalRC: 0.8017298 -[INFO GPL-0079] MinRC (0.8017298) violation occurred, total count: 3. -[INFO GPL-0045] InflatedAreaDelta: 0.000 um^2 -[INFO GPL-0046] TargetDensity: 0.700 -Revert Routability Procedure. Target density higher than max, or minRC max violations. -[INFO GPL-0080] minRcViolatedCnt: 3 -[INFO GPL-0047] SavedMinRC: 0.8017 -[INFO GPL-0048] SavedTargetDensity: 0.7000 -[NesterovSolve] Revert back to snapshot coordi -[NesterovSolve] Iter: 590 overflow: 0.581 HPWL: 4598491 -[NesterovSolve] Iter: 600 overflow: 0.549 HPWL: 4661193 -[NesterovSolve] Iter: 610 overflow: 0.508 HPWL: 4695290 -[NesterovSolve] Iter: 620 overflow: 0.462 HPWL: 4702654 -[NesterovSolve] Iter: 630 overflow: 0.422 HPWL: 4689847 -[NesterovSolve] Iter: 640 overflow: 0.370 HPWL: 4639836 -[NesterovSolve] Iter: 650 overflow: 0.336 HPWL: 4674234 -[NesterovSolve] Iter: 660 overflow: 0.303 HPWL: 4711304 -[NesterovSolve] Iter: 670 overflow: 0.273 HPWL: 4774258 -[NesterovSolve] Iter: 680 overflow: 0.236 HPWL: 4804987 -[NesterovSolve] Iter: 690 overflow: 0.204 HPWL: 4845754 -[NesterovSolve] Iter: 700 overflow: 0.174 HPWL: 4878074 -[NesterovSolve] Iter: 710 overflow: 0.146 HPWL: 4911284 -[NesterovSolve] Iter: 720 overflow: 0.122 HPWL: 4938747 -[NesterovSolve] Iter: 730 overflow: 0.103 HPWL: 4964040 -[NesterovSolve] Finished with Overflow: 0.099315 +[INFO GPL-0083] 0.5%RC: 0.48812615871429443 +[INFO GPL-0084] 1.0%RC: 0.4571320414543152 +[INFO GPL-0085] 2.0%RC: 0.4332096576690674 +[INFO GPL-0086] 5.0%RC: 0.3979834884405136 +[INFO GPL-0087] FinalRC: 0.4726291 +[INFO GPL-0077] FinalRC lower than targetRC(0.67), routability not needed. +[NesterovSolve] Iter: 290 overflow: 0.267 HPWL: 4778698 +[NesterovSolve] Iter: 300 overflow: 0.233 HPWL: 4810713 +[NesterovSolve] Iter: 310 overflow: 0.202 HPWL: 4848299 +[NesterovSolve] Iter: 320 overflow: 0.171 HPWL: 4881515 +[NesterovSolve] Iter: 330 overflow: 0.143 HPWL: 4916941 +[NesterovSolve] Iter: 340 overflow: 0.123 HPWL: 4942028 +[NesterovSolve] Iter: 350 overflow: 0.101 HPWL: 4964095 +[NesterovSolve] Finished with Overflow: 0.099533 No differences found. diff --git a/src/grt/include/grt/GlobalRouter.h b/src/grt/include/grt/GlobalRouter.h index 22809f60967..6025c5aae93 100644 --- a/src/grt/include/grt/GlobalRouter.h +++ b/src/grt/include/grt/GlobalRouter.h @@ -161,6 +161,7 @@ class GlobalRouter : public ant::GlobalRouteSource void setAdjustment(const float adjustment); void setMinRoutingLayer(const int min_layer); void setMaxRoutingLayer(const int max_layer); + int getMinRoutingLayer() const { return min_routing_layer_; } int getMaxRoutingLayer() const { return max_routing_layer_; } void setMinLayerForClock(const int min_layer); void setMaxLayerForClock(const int max_layer); @@ -180,7 +181,6 @@ class GlobalRouter : public ant::GlobalRouteSource void setAllowCongestion(bool allow_congestion); void setMacroExtension(int macro_extension); void setPinOffset(int pin_offset); - int getMinRoutingLayer() const { return min_routing_layer_; } // flow functions void readGuides(const char* file_name); diff --git a/src/grt/src/Rudy.cpp b/src/grt/src/Rudy.cpp index bd1909e770b..19d33777c18 100644 --- a/src/grt/src/Rudy.cpp +++ b/src/grt/src/Rudy.cpp @@ -46,8 +46,6 @@ Rudy::Rudy(odb::dbBlock* block, grt::GlobalRouter* grouter) if (grid_block_.area() == 0) { return; } - // TODO: Match the wire width with the paper definition - wire_width_ = block_->getTech()->findRoutingLayer(1)->getWidth(); if (!grouter_->isInitialized()) { int min_layer, max_layer; @@ -56,6 +54,23 @@ Rudy::Rudy(odb::dbBlock* block, grt::GlobalRouter* grouter) grouter_->initFastRoute(min_layer, max_layer); } + // The wire width is the harmonic average pitch divided by the number of + // routing layers. + double pitch_terms = 0; + const int min_routing_layer = grouter->getMinRoutingLayer(); + const int max_routing_layer = grouter->getMaxRoutingLayer(); + const auto tech = block_->getTech(); + for (int layer_idx = min_routing_layer; layer_idx <= max_routing_layer; + ++layer_idx) { + const auto layer = tech->findRoutingLayer(layer_idx); + int pitch = layer->getPitch(); + if (pitch == 0) { + pitch = layer->getWidth() + layer->getSpacing(); + } + pitch_terms += 1.0 / pitch; + } + wire_width_ = 1 / pitch_terms; // = harm. mean / num_routing_layers + int x_grids, y_grids; grouter_->getGridSize(x_grids, y_grids); tile_size_ = grouter_->getGridTileSize(); @@ -131,36 +146,6 @@ void Rudy::calculateRudy() processIntersectionSignalNet(net_rect); } } - - double min_rudy = std::numeric_limits::max(); - double max_observed_rudy = std::numeric_limits::lowest(); - - for (int x = 0; x < grid_.size(); x++) { - for (int y = 0; y < grid_[x].size(); y++) { - const Tile& tile = getEditableTile(x, y); - const double rudy_value = tile.getRudy(); - min_rudy = std::min(min_rudy, rudy_value); - max_observed_rudy = std::max(max_observed_rudy, rudy_value); - } - } - - for (int x = 0; x < grid_.size(); x++) { - for (int y = 0; y < grid_[x].size(); y++) { - Tile& tile = getEditableTile(x, y); - const float rudy_value = tile.getRudy(); - float normalized_rudy = min_rudy; - if (rudy_value > min_rudy) { - normalized_rudy = min_rudy - + (rudy_value - min_rudy) - / (max_observed_rudy - min_rudy) - * (140 - min_rudy); - } - if (normalized_rudy < rudy_value) { - tile.clearRudy(); - tile.addRudy(normalized_rudy); - } - } - } } void Rudy::processIntersectionSignalNet(const odb::Rect net_rect) diff --git a/test/ibex_sky130hd.metrics b/test/ibex_sky130hd.metrics index 8778d2d0d0e..b4be888fb41 100644 --- a/test/ibex_sky130hd.metrics +++ b/test/ibex_sky130hd.metrics @@ -2,76 +2,80 @@ "IFP::ord_version": "", "IFP::instance_count": "15696", "floorplan__design__io": 264, - "design__io__hpwl": 69625224, - "design__instance__displacement__total": 38384.7, - "design__instance__displacement__mean": 1.68, - "design__instance__displacement__max": 13.669, - "route__wirelength__estimated": 732808, - "RSZ::repair_design_buffer_count": "370", - "RSZ::max_slew_slack": "28.71694763501485", + "design__io__hpwl": 70142104, + "design__instance__displacement__total": 35861.1, + "design__instance__displacement__mean": 1.572, + "design__instance__displacement__max": 15.528, + "route__wirelength__estimated": 677795, + "RSZ::repair_design_buffer_count": "341", + "RSZ::max_slew_slack": "25.111780563990276", "RSZ::max_fanout_slack": "100.0", - "RSZ::max_capacitance_slack": "84.16332604201848", - "design__instance__displacement__total": 525.068, - "design__instance__displacement__mean": 0.022, - "design__instance__displacement__max": 8.28, - "route__wirelength__estimated": 753122, - "design__instance__count__setup_buffer": 214, - "design__instance__count__hold_buffer": 352, - "RSZ::worst_slack_min": "0.0008053558048401062", - "RSZ::worst_slack_max": "-2.1414532975234586", - "RSZ::tns_max": "-27.712476653396912", - "RSZ::hold_buffer_count": "352", - "design__instance__displacement__total": 3085.79, - "design__instance__displacement__mean": 0.131, - "design__instance__displacement__max": 15.6, - "route__wirelength__estimated": 795654, - "DPL::utilization": "28.0", - "DPL::design_area": "169568", - "route__net": 15638, + "RSZ::max_capacitance_slack": "84.7382111463397", + "design__instance__displacement__total": 1190.28, + "design__instance__displacement__mean": 0.051, + "design__instance__displacement__max": 12.589, + "route__wirelength__estimated": 697803, + "design__instance__count__setup_buffer": 187, + "design__instance__count__hold_buffer": 336, + "RSZ::worst_slack_min": "0.001111777368302843", + "RSZ::worst_slack_max": "-2.015317747503969", + "RSZ::tns_max": "-37.219792745780346", + "RSZ::hold_buffer_count": "336", + "design__instance__displacement__total": 3138.18, + "design__instance__displacement__mean": 0.133, + "design__instance__displacement__max": 16.99, + "route__wirelength__estimated": 738059, + "DPL::utilization": "28.1", + "DPL::design_area": "170436", + "route__net": 15553, "route__net__special": 2, - "antenna__violating__nets": 1, - "antenna__violating__pins": 1, - "GRT::ANT::errors": "1", + "antenna__violating__nets": 0, + "antenna__violating__pins": 0, + "GRT::ANT::errors": "0", "design__violations": 0, - "route__net": 15638, + "route__net": 15553, "route__net__special": 2, - "route__drc_errors__iter:1": 11068, - "route__wirelength__iter:1": 1013567, - "route__drc_errors__iter:2": 2043, - "route__wirelength__iter:2": 1008150, - "route__drc_errors__iter:3": 1643, - "route__wirelength__iter:3": 1006381, - "route__drc_errors__iter:4": 190, - "route__wirelength__iter:4": 1006355, - "route__drc_errors__iter:5": 36, - "route__wirelength__iter:5": 1006353, - "route__drc_errors__iter:6": 13, - "route__wirelength__iter:6": 1006353, - "route__drc_errors__iter:7": 6, - "route__wirelength__iter:7": 1006350, - "route__drc_errors__iter:8": 6, - "route__wirelength__iter:8": 1006354, - "route__drc_errors__iter:9": 0, - "route__wirelength__iter:9": 1006355, + "route__drc_errors__iter:1": 10777, + "route__wirelength__iter:1": 957606, + "route__drc_errors__iter:2": 1920, + "route__wirelength__iter:2": 952498, + "route__drc_errors__iter:3": 1504, + "route__wirelength__iter:3": 950239, + "route__drc_errors__iter:4": 206, + "route__wirelength__iter:4": 950296, + "route__drc_errors__iter:5": 46, + "route__wirelength__iter:5": 950247, + "route__drc_errors__iter:6": 28, + "route__wirelength__iter:6": 950270, + "route__drc_errors__iter:7": 16, + "route__wirelength__iter:7": 950275, + "route__drc_errors__iter:8": 3, + "route__wirelength__iter:8": 950267, + "route__drc_errors__iter:9": 1, + "route__wirelength__iter:9": 950255, + "route__drc_errors__iter:10": 1, + "route__wirelength__iter:10": 950255, + "route__drc_errors__iter:11": 0, + "route__wirelength__iter:11": 950248, "route__drc_errors": 0, - "route__wirelength": 1006355, - "route__vias": 130585, - "route__vias__singlecut": 130585, + "route__wirelength": 950248, + "route__vias": 131101, + "route__vias__singlecut": 131101, "route__vias__multicut": 0, "DRT::drv": "0", - "antenna__violating__nets": 33, - "antenna__violating__pins": 38, - "DRT::ANT::errors": "33", + "antenna__violating__nets": 28, + "antenna__violating__pins": 28, + "DRT::ANT::errors": "28", "timing__drv__floating__nets": 0, "timing__drv__floating__pins": 0, - "DRT::worst_slack_min": "-0.49346994554022844", - "DRT::worst_slack_max": "-3.1482248810090683", - "DRT::tns_max": "-78.20909297107791", - "DRT::clock_skew": "2.941323046154526", - "DRT::max_slew_slack": "-7.890626873020845", + "DRT::worst_slack_min": "-0.37510262624374124", + "DRT::worst_slack_max": "-2.9523566649299076", + "DRT::tns_max": "-216.2382831777115", + "DRT::clock_skew": "2.641370752439243", + "DRT::max_slew_slack": "-30.215638875961304", "DRT::max_fanout_slack": "100.0", - "DRT::max_capacitance_slack": "-9.469575047764916", + "DRT::max_capacitance_slack": "-5.308334507007274", "DRT::clock_period": "15.155000", - "flow__warnings__count": 13, + "flow__warnings__count": 32, "flow__errors__count": 0 } \ No newline at end of file diff --git a/test/ibex_sky130hd.metrics_limits b/test/ibex_sky130hd.metrics_limits index 941ed7c931d..a424869a173 100644 --- a/test/ibex_sky130hd.metrics_limits +++ b/test/ibex_sky130hd.metrics_limits @@ -1,23 +1,23 @@ { "IFP::instance_count" : "18835.2" - ,"DPL::design_area" : "203481.6" - ,"DPL::utilization" : "33.6" - ,"RSZ::repair_design_buffer_count" : "444" + ,"DPL::design_area" : "204523.19999999998" + ,"DPL::utilization" : "33.72" + ,"RSZ::repair_design_buffer_count" : "409" ,"RSZ::max_slew_slack" : "0" ,"RSZ::max_capacitance_slack" : "0" ,"RSZ::max_fanout_slack" : "0" - ,"RSZ::worst_slack_min" : "-1.5146946441951599" - ,"RSZ::worst_slack_max" : "-3.656953297523459" - ,"RSZ::tns_max" : "-2406.4412766533974" - ,"RSZ::hold_buffer_count" : "422" - ,"GRT::ANT::errors" : "1" + ,"RSZ::worst_slack_min" : "-1.5143882226316971" + ,"RSZ::worst_slack_max" : "-3.530817747503969" + ,"RSZ::tns_max" : "-2415.948592745781" + ,"RSZ::hold_buffer_count" : "403" + ,"GRT::ANT::errors" : "0" ,"DRT::drv" : "0" - ,"DRT::worst_slack_min" : "-2.0089699455402283" - ,"DRT::worst_slack_max" : "-4.663724881009069" - ,"DRT::tns_max" : "-2456.9378929710783" - ,"DRT::clock_skew" : "3.529587655385431" - ,"DRT::max_slew_slack" : "-9.468752247625014" - ,"DRT::max_capacitance_slack" : "-11.363490057317899" + ,"DRT::worst_slack_min" : "-1.8906026262437412" + ,"DRT::worst_slack_max" : "-4.467856664929908" + ,"DRT::tns_max" : "-2594.9670831777116" + ,"DRT::clock_skew" : "3.1696449029270917" + ,"DRT::max_slew_slack" : "-36.258766651153564" + ,"DRT::max_capacitance_slack" : "-6.370001408408728" ,"DRT::max_fanout_slack" : "0" ,"DRT::clock_period" : "15.155" } diff --git a/test/jpeg_sky130hd.metrics b/test/jpeg_sky130hd.metrics index 766912232d7..e605d9bf200 100644 --- a/test/jpeg_sky130hd.metrics +++ b/test/jpeg_sky130hd.metrics @@ -2,68 +2,68 @@ "IFP::ord_version": "", "IFP::instance_count": "45634", "floorplan__design__io": 47, - "design__io__hpwl": 12816946, - "design__instance__displacement__total": 125471, - "design__instance__displacement__mean": 1.707, - "design__instance__displacement__max": 14.666, - "route__wirelength__estimated": 1.47049e+06, - "RSZ::repair_design_buffer_count": "237", - "RSZ::max_slew_slack": "20.557878379013523", + "design__io__hpwl": 12947255, + "design__instance__displacement__total": 126711, + "design__instance__displacement__mean": 1.724, + "design__instance__displacement__max": 14.617, + "route__wirelength__estimated": 1.46087e+06, + "RSZ::repair_design_buffer_count": "231", + "RSZ::max_slew_slack": "20.377322038014732", "RSZ::max_fanout_slack": "100.0", - "RSZ::max_capacitance_slack": "20.74195395869473", - "design__instance__displacement__total": 4104.56, - "design__instance__displacement__mean": 0.055, - "design__instance__displacement__max": 13.202, - "route__wirelength__estimated": 1.52925e+06, + "RSZ::max_capacitance_slack": "22.00913149268759", + "design__instance__displacement__total": 3954.82, + "design__instance__displacement__mean": 0.053, + "design__instance__displacement__max": 13.995, + "route__wirelength__estimated": 1.51895e+06, "design__instance__count__setup_buffer": 84, - "design__instance__count__hold_buffer": 30, - "RSZ::worst_slack_min": "0.032112757806283615", - "RSZ::worst_slack_max": "-0.20448088245857562", - "RSZ::tns_max": "-4.441835469606034", - "RSZ::hold_buffer_count": "30", - "design__instance__displacement__total": 812.39, - "design__instance__displacement__mean": 0.01, - "design__instance__displacement__max": 10.54, - "route__wirelength__estimated": 1.56203e+06, + "design__instance__count__hold_buffer": 42, + "RSZ::worst_slack_min": "0.005047518101909372", + "RSZ::worst_slack_max": "-0.19927260405815392", + "RSZ::tns_max": "-3.7344262073037355", + "RSZ::hold_buffer_count": "42", + "design__instance__displacement__total": 985.381, + "design__instance__displacement__mean": 0.013, + "design__instance__displacement__max": 13.821, + "route__wirelength__estimated": 1.54666e+06, "DPL::utilization": "23.5", - "DPL::design_area": "514493", - "route__net": 57208, + "DPL::design_area": "513885", + "route__net": 57200, "route__net__special": 2, "antenna__violating__nets": 2, "antenna__violating__pins": 2, "GRT::ANT::errors": "2", "design__violations": 0, - "route__net": 57208, + "route__net": 57200, "route__net__special": 2, - "route__drc_errors__iter:1": 13727, - "route__wirelength__iter:1": 1753995, - "route__drc_errors__iter:2": 1267, - "route__wirelength__iter:2": 1743901, - "route__drc_errors__iter:3": 630, - "route__wirelength__iter:3": 1742057, - "route__drc_errors__iter:4": 20, - "route__wirelength__iter:4": 1741978, + "route__drc_errors__iter:1": 13694, + "route__wirelength__iter:1": 1733406, + "route__drc_errors__iter:2": 1090, + "route__wirelength__iter:2": 1723699, + "route__drc_errors__iter:3": 633, + "route__wirelength__iter:3": 1722360, + "route__drc_errors__iter:4": 6, + "route__wirelength__iter:4": 1722333, "route__drc_errors__iter:5": 0, - "route__wirelength__iter:5": 1741975, + "route__wirelength__iter:5": 1722331, "route__drc_errors": 0, - "route__wirelength": 1741975, - "route__vias": 308401, - "route__vias__singlecut": 308401, + "route__wirelength": 1722331, + "route__vias": 307658, + "route__vias__singlecut": 307658, "route__vias__multicut": 0, "DRT::drv": "0", - "antenna__violating__nets": 49, - "antenna__violating__pins": 53, - "DRT::ANT::errors": "49", + "antenna__violating__nets": 29, + "antenna__violating__pins": 31, + "DRT::ANT::errors": "29", "timing__drv__floating__nets": 0, "timing__drv__floating__pins": 0, - "DRT::worst_slack_min": "0.13484058695716616", - "DRT::worst_slack_max": "-0.4729132774794917", - "DRT::tns_max": "-20.293090449095217", - "DRT::clock_skew": "0.6545288940546334", - "DRT::max_slew_slack": "-1.8146003286043804", + "DRT::worst_slack_min": "-0.07024514502233158", + "DRT::worst_slack_max": "-0.47635496895316737", + "DRT::tns_max": "-17.134408155076844", + "DRT::clock_skew": "0.658732420589353", + "DRT::max_slew_slack": "-11.359508062910358", "DRT::max_fanout_slack": "100.0", - "DRT::max_capacitance_slack": "-1.618243338317857", + "DRT::max_capacitance_slack": "-13.694435690457302", "DRT::clock_period": "8.000000", - "flow__warnings__count": 42, + "flow__warnings__count": 39, "flow__errors__count": 0 } \ No newline at end of file diff --git a/test/jpeg_sky130hd.metrics_limits b/test/jpeg_sky130hd.metrics_limits index 074523ab6be..644a0938e19 100644 --- a/test/jpeg_sky130hd.metrics_limits +++ b/test/jpeg_sky130hd.metrics_limits @@ -1,23 +1,23 @@ { "IFP::instance_count" : "54760.799999999996" - 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