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Design.area
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****************************************
Report : area
Design : M216A_TopModule
Version: M-2016.12-SP2
Date : Thu Dec 1 18:39:06 2022
****************************************
Library(s) Used:
saed32rvt_ff1p16vn40c (File: /w/apps2/public.2/tech/synopsys/32-28nm/SAED32_EDK/lib/stdcell_rvt/db_nldm/saed32rvt_ff1p16vn40c.db)
Number of ports: 196
Number of nets: 856
Number of cells: 585
Number of combinational cells: 514
Number of sequential cells: 69
Number of macros/black boxes: 0
Number of buf/inv: 42
Number of references: 32
Combinational area: 1488.521417
Buf/Inv area: 68.110593
Noncombinational area: 443.227150
Macro/Black Box area: 0.000000
Net Interconnect area: 332.091161
Total cell area: 1931.748567
Total area: 2263.839728
Hierarchical area distribution
------------------------------
Global cell area Local cell area
------------------ ----------------------------
Hierarchical cell Absolute Percent Combi- Noncombi- Black-
Total Total national national boxes Design
-------------------------------- --------- ------- --------- --------- ------ -----------------------------
M216A_TopModule 1931.7486 100.0 471.4371 443.2272 0.0000 M216A_TopModule
P1_ADD_0/add_11 102.1659 5.3 102.1659 0.0000 0.0000 M216A_TopModule_DW01_add_0
P1_MULT_0/mult_22 914.9184 47.4 914.9184 0.0000 0.0000 M216A_TopModule_DW_mult_uns_0
-------------------------------- --------- ------- --------- --------- ------ -----------------------------
Total 1488.5214 443.2272 0.0000
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