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Design.power
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Loading db file '/w/apps2/public.2/tech/synopsys/32-28nm/SAED32_EDK/lib/stdcell_rvt/db_nldm/saed32rvt_ff1p16vn40c.db'
Information: Propagating switching activity (low effort zero delay simulation). (PWR-6)
Warning: Design has unannotated primary inputs. (PWR-414)
Warning: Design has unannotated sequential cell outputs. (PWR-415)
****************************************
Report : power
-hier
-analysis_effort low
Design : M216A_TopModule
Version: M-2016.12-SP2
Date : Thu Dec 1 18:39:07 2022
****************************************
Library(s) Used:
saed32rvt_ff1p16vn40c (File: /w/apps2/public.2/tech/synopsys/32-28nm/SAED32_EDK/lib/stdcell_rvt/db_nldm/saed32rvt_ff1p16vn40c.db)
Operating Conditions: ss0p95v125c Library: saed32rvt_ss0p95v125c
Wire Load Model Mode: enclosed
Design Wire Load Model Library
------------------------------------------------
M216A_TopModule 8000 saed32rvt_ff1p16vn40c
M216A_TopModule_DW01_add_0
ForQA saed32rvt_ff1p16vn40c
M216A_TopModule_DW_mult_uns_0
8000 saed32rvt_ff1p16vn40c
Global Operating Voltage = 0.95
Power-specific unit information :
Voltage Units = 1V
Capacitance Units = 1.000000ff
Time Units = 1ns
Dynamic Power Units = 1uW (derived from V,C,T units)
Leakage Power Units = 1pW
--------------------------------------------------------------------------------
Switch Int Leak Total
Hierarchy Power Power Power Power %
--------------------------------------------------------------------------------
M216A_TopModule 3.771 331.857 3.04e+09 3.37e+03 100.0
P1_MULT_0/mult_22 (M216A_TopModule_DW_mult_uns_0)
1.82e-02 9.04e-02 9.54e+08 954.435 28.3
P1_ADD_0/add_11 (M216A_TopModule_DW01_add_0)
9.80e-04 6.85e-03 1.15e+08 115.192 3.4
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