This repository has been archived by the owner on Jun 13, 2018. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy pathlib_asm.asm
241 lines (200 loc) · 3.54 KB
/
lib_asm.asm
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
; get_eip: returns the value of EIP, from more-or-less where the function was called
[GLOBAL get_eip]
get_eip:
pop eax
push eax
ret
; halt: halt the CPU
[GLOBAL halt]
halt:
cli
hlt
jmp halt
; inb: Read byte from input port
[GLOBAL inb]
inb:
push edx
mov edx, eax
in al, dx
pop edx
ret
; inw: Read word from input port
[GLOBAL inw]
inw:
push edx
mov edx, eax
in ax, dx
pop edx
ret
; ind: Read double-word from input port
[GLOBAL ind]
ind:
push edx
mov edx, eax
in eax, dx
pop edx
ret
; irq_disable: mask interrupts
[GLOBAL irq_disable]
irq_disable:
cli
ret
; irq_enable: unmask interrupts
[GLOBAL irq_enable]
irq_enable:
sti
ret
; lgdt: Load GDTR
[GLOBAL lgdt]
lgdt:
push ebp
mov ebp, esp
lgdt [eax]
mov word ax, [ebp+8]
mov word [lgdt_reload_segment_regs-2], ax
jmp dword 0x0000:lgdt_reload_segment_regs
lgdt_reload_segment_regs:
mov eax, [ebp+12]
mov ds, ax
mov es, ax
mov ss, ax
mov fs, ax
mov gs, ax
pop ebp
ret
; lidt: Load IDTR
[GLOBAL lidt]
lidt:
lidt [eax]
ret
; outb: Write byte to output port
[GLOBAL outb]
outb:
push ebp
mov ebp, esp
push edx
mov edx, eax
mov al, [ebp+8]
out dx, al
pop edx
pop ebp
ret
; outw: Write word to output port
[GLOBAL outw]
outw:
push ebp
mov ebp, esp
push edx
mov edx, eax
mov ax, [ebp+8]
out dx, ax
pop edx
pop ebp
ret
; outd: Write double-word to output port
[GLOBAL outd]
outd:
push ebp
mov ebp, esp
push edx
mov edx, eax
mov eax, [ebp+8]
out dx, eax
pop edx
pop ebp
ret
; reset: triple-fault and therefore reset CPU
[GLOBAL reset]
reset:
; prevent CPU from servicing any exceptions
mov eax, reset_init_idt
call lidt
; attempt to use descriptor 0, which will cause a fault
jmp dword 0x0000:0x00000000
hlt
jmp reset
reset_init_idt:
dw 0x0000
dd 0x00000000
; sgdt: Save GDTR
[GLOBAL sgdt]
sgdt:
sgdt [eax]
ret
; sidt: Save IDTR
[GLOBAL sidt]
sidt:
sidt [eax]
ret
[GLOBAL software_interrupt]
software_interrupt:
mov [software_interrupt+6], al
db 0xCD, 0x00
ret
[GLOBAL ISR_Template_Start]
ISR_Template_Start:
; Push an "error code" in order to maintain consistent stack frame; only
; some exceptions push an extra error code:
;
; 8 - double fault
; 10 - bad TSS
; 11 - segment not present
; 12 - stack fault
; 13 - general protection fault
; 14 - page fault
;
; Modify code (replace with 9090... no-op) for these exceptions, as they
; push the error code on their own.
[GLOBAL ISR_Template_Error_Start]
ISR_Template_Error_Start:
push byte 0x00
[GLOBAL ISR_Template_Error_End]
ISR_Template_Error_End:
; Save registers
pushad
push ds
push es
push fs
push gs
; Initialize kernel data segments
mov ax, 0x0010
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
; Set interrupt number
;
; Modify code (replace with interrupt number) for all exceptions.
; Used to increment interrupt count AND passed to C function handler.
[GLOBAL ISR_Template_Num]
ISR_Template_Num equ $+1
mov eax, 0x00000000
; Increment interrupt count
shl eax, 2
[EXTERN irq_count]
inc dword [eax+irq_count]
shr eax, 2
; Call C function handler
;
; Modify code (replace with 9090... no-op) if function pointer is NULL.
[GLOBAL ISR_Template_CFunc_Start]
ISR_Template_CFunc_Start:
;[EXTERN irq_cfunc]
;mov ebx, [eax+irq_cfunc]
[GLOBAL ISR_Template_CFunc_Addr]
ISR_Template_CFunc_Addr equ $+1
mov ebx, 0x12345678
call ebx
[GLOBAL ISR_Template_CFunc_End]
ISR_Template_CFunc_End:
; Restore registers
pop gs
pop fs
pop es
pop ds
popad
add esp, 4 ; clear-up error code
; End of ISR
iretd
[GLOBAL ISR_Template_End]
ISR_Template_End: