From 2e15c444fb5e09e26728ec343fd0b022e0dd52c5 Mon Sep 17 00:00:00 2001 From: Andrew Elder Date: Mon, 5 Jun 2017 18:05:09 -0400 Subject: [PATCH 1/2] gPTP: Windows: MSVC compile fixes --- daemons/gptp/windows/daemon_cl/daemon_cl.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/daemons/gptp/windows/daemon_cl/daemon_cl.cpp b/daemons/gptp/windows/daemon_cl/daemon_cl.cpp index 56aebe9b96..1fd460cf3b 100644 --- a/daemons/gptp/windows/daemon_cl/daemon_cl.cpp +++ b/daemons/gptp/windows/daemon_cl/daemon_cl.cpp @@ -44,10 +44,10 @@ POSSIBILITY OF SUCH DAMAGE. #include #include -#define PHY_DELAY_GB_TX 7750 //1G delay -#define PHY_DELAY_GB_RX 7750 //1G delay -#define PHY_DELAY_MB_TX 27500 //100M delay -#define PHY_DELAY_MB_RX 27500 //100M delay +#define PHY_DELAY_GB_TX_I20 184 //1G delay +#define PHY_DELAY_GB_RX_I20 382 //1G delay +#define PHY_DELAY_MB_TX_I20 1044//100M delay +#define PHY_DELAY_MB_RX_I20 2133//100M delay #define MACSTR_LENGTH 17 @@ -93,10 +93,10 @@ int _tmain(int argc, _TCHAR* argv[]) PortInit_t portInit; phy_delay_map_t ether_phy_delay; - ether_phy_delay[LINKSPEED_1G].set - (PHY_DELAY_GB_TX, PHY_DELAY_GB_RX); - ether_phy_delay[LINKSPEED_100MB].set - (PHY_DELAY_MB_TX, PHY_DELAY_MB_RX); + ether_phy_delay[LINKSPEED_1G].set_delay + (PHY_DELAY_GB_TX_I20, PHY_DELAY_GB_RX_I20); + ether_phy_delay[LINKSPEED_100MB].set_delay + (PHY_DELAY_MB_TX_I20, PHY_DELAY_MB_RX_I20); portInit.clock = NULL; From 8b80446010ad1f9ca5a3804ed3f10188261f6632 Mon Sep 17 00:00:00 2001 From: andrew-elder Date: Tue, 6 Jun 2017 09:35:11 -0400 Subject: [PATCH 2/2] gPTP: correct Windows PHY delay constants --- daemons/gptp/windows/daemon_cl/daemon_cl.cpp | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/daemons/gptp/windows/daemon_cl/daemon_cl.cpp b/daemons/gptp/windows/daemon_cl/daemon_cl.cpp index 1fd460cf3b..5bb2f3c5ee 100644 --- a/daemons/gptp/windows/daemon_cl/daemon_cl.cpp +++ b/daemons/gptp/windows/daemon_cl/daemon_cl.cpp @@ -44,10 +44,17 @@ POSSIBILITY OF SUCH DAMAGE. #include #include -#define PHY_DELAY_GB_TX_I20 184 //1G delay -#define PHY_DELAY_GB_RX_I20 382 //1G delay -#define PHY_DELAY_MB_TX_I20 1044//100M delay -#define PHY_DELAY_MB_RX_I20 2133//100M delay +/* Generic PCH delays */ +#define PHY_DELAY_GB_TX_PCH 7750 //1G delay +#define PHY_DELAY_GB_RX_PCH 7750 //1G delay +#define PHY_DELAY_MB_TX_PCH 27500 //100M delay +#define PHY_DELAY_MB_RX_PCH 27500 //100M delay + +/* I210 delays */ +#define PHY_DELAY_GB_TX_I210 184 //1G delay +#define PHY_DELAY_GB_RX_I210 382 //1G delay +#define PHY_DELAY_MB_TX_I210 1044 //100M delay +#define PHY_DELAY_MB_RX_I210 2133 //100M delay #define MACSTR_LENGTH 17 @@ -94,9 +101,9 @@ int _tmain(int argc, _TCHAR* argv[]) phy_delay_map_t ether_phy_delay; ether_phy_delay[LINKSPEED_1G].set_delay - (PHY_DELAY_GB_TX_I20, PHY_DELAY_GB_RX_I20); + (PHY_DELAY_GB_TX_PCH, PHY_DELAY_GB_RX_PCH); ether_phy_delay[LINKSPEED_100MB].set_delay - (PHY_DELAY_MB_TX_I20, PHY_DELAY_MB_RX_I20); + (PHY_DELAY_MB_TX_PCH, PHY_DELAY_MB_RX_PCH); portInit.clock = NULL;