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# Notes
This isn't really meant to be consumed by some random person.
## Bits
https://tinyurl.com/459s3puw
- Possible Wifi module
MPM-15-5
Possible Powersupply to come down from mains
## Key Dimensions and Things
- PCB must be 1.6mm
- Slot in enclosure is 1.8mm, giving 0.2mm of clearance
## Ram Length matching
- [ ], 0.2mm: CK, !CK
- [x], 3mm: adr, !WE, !CS, !RST, BA, ODT, !CKE, CAS, RAS
- [x] adr[0]
- [x] adr[1]
- [x] adr[2]
- [x] adr[3]
- [x] adr[4]
- [x] adr[5]
- [x] adr[6]
- [x] adr[7]
- [x] adr[8]
- [x] adr[9]
- [x] adr[10]
- [x] adr[11]
- [x] adr[12]
- [x] adr[13]
- [x] adr[14]
- [x] adr[15]
- [x] !WE
- [x] !CS
- [x] !RST
- [x] DBA0
- [x] DBA1
- [x] DBA2
- [x] ODT
- [x] !CKE
- [x] CAS
- [x] RAS
- [ ], 1.27mm: Lower data Byte
- [x] DQ0
- [x] DQ1
- [x] DQ2
- [x] DQ3
- [x] DQ4
- [x] DQ5
- [x] DQ6
- [x] DQ7
- [x] LDQ
- [x] !LDQ
- [x] LDM
- [ ], 1.27mm: Lower data Byte
- [x] DQ8
- [x] DQ9
- [x] DQ10
- [x] DQ11
- [x] DQ12
- [x] DQ13
- [x] DQ14
- [x] DQ15
- [x] UDQ
- [x] !UDQ
- [x] UDM
21:44:14 machinehum | So from what I've read on length matching ddr3: clocks should be 10mils, address should be 125mils, DQ/DSQ/DM (Same
| byte group) should be 50 mils. However I'm unsure about !CAS/!RAS/!CKE/!CS/!WE/!RST/ODT. Does anyone have a doc for
| the rest of these suckers?
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
22:01:17 azonenberg | machinehum: CAS/RAS/CS/WE are part of the address group and synchronous to the main clock
22:01:25 azonenberg | they run at x1 rate so same constraints as the address bus
22:01:47 azonenberg | CKE, RST, ODT are as well, although depending on how the board is laid out some of those signals may be tied to
| constant values and thus not have any constraints
22:02:01 azonenberg | if they're driven by the fpga side treat them as address lines for layout
22:02:40 azonenberg | What FPGA are you using? there's normally fairly decent layout guidelines from the vendors
22:02:52 azonenberg | that said, ddr is ddr no matter what fpga is driving it so the same guidelines apply anywhere
22:03:01 azonenberg | other than specifics about which pins on the fpga are used for what purpose
22:04:25 azonenberg | In the case of Xilinx 7 series, UG586 is the document to read. The DDR3 design guidelines section starts at page
| 181 in my document version but it's an old rev so the page numbering may have changed a little bit
22:04:28 azonenberg | it's in that range though
22:05:15 azonenberg | Any details about which pins are used FPGA side is xilinx specific but general stuff about layout, power,
| termination, and length matching is generic
22:05:48 azonenberg | also if you havent done this already, grab the package files for your FPGA of choice. there should be a data file
| that lists in-package delays from the I/O pad drivers on the silicon to the BGA ball
22:06:06 azonenberg | You need to take those delays into account when matching
22:06:18 azonenberg | Also keep in mind internal and external trace propagation velocity is not the same
22:06:27 azonenberg | You aren't actually matching *length*, you're matching *delay*
22:06:32 azonenberg | length is a proxy for delay
22:06:51 azonenberg | I prefer to work in time domain units for all of the calculations then convert the allowed delays back to length
| units for layout purposes
22:08:01 azonenberg | On page 187 of UG586 (doc rev 2.0, again page numbering may be different in later revs) there's a "trace lengths"
| section that lists allowable skew in picoseconds
0:01:59 azonenberg | machinehum: well in that case look at controller docs for that. But still try to get package skew values if
| possible, especially on larger BGAs they can be significant
0:02:26 azonenberg | and like i said do your matching in the time domain, and only convert to spatial units at the very end once you
| know what the target delay for your trace is and what layer it's going to be on
0:02:32 azonenberg | if you jump between layers it gets even more fun
0:03:49 azonenberg | machinehum: https://www.antikernel.net/temp/maxwell-ram-matching.png
0:04:06 azonenberg | this is a big spreadsheet i built for one of my projects to lay out a 64-bit ddr3 sodimm
0:04:26 azonenberg | This is handled by the tooling in some cases i think, if you have high dollar tool suites from cadence or maybe
| altium
0:04:35 azonenberg | for the rest of us, excel is your friend
- [x] Check 24Mhz crystal pinout
- [x] Does 24Mhz crystal need resistor in parallel?
- [x] Check U2A
- [x] All pins
- [x] DVREF stuff
- [x] All ram connections
- [x] Check U2B
- [x] HPVCC
- [x] All power rails
- [x] Ensure adequate decoupling
- [x] Check U2C
- [x] All pins
- [x] SD pins
- [x] UART pins
- [x] Check U2D
- [x] USB
- [x] Crystals
- [x] VR* stuff
- [x] Resets
- [x] NMI
- [x] Check J1
- [x] All pins
- [x] Check U3, U4, U5, U6
- [x] All pins
- [x] Read description
- [x] Ensure numbers are correct
- [x] Check U7
- [x] All pins
- [x] Read description
- [x] Ensure numbers are correct
- [x] U1
- [x] All pins
- [x] Read description
- [x] Ensure numbers are correct
# TODO
- [ ] Bringup of NFF Compute R0.1
- Bits that need to come together:
- [x] LCSC Order
- [x] Coilcraft Samples
- [x] Mouser Order
- [x] crystals
- [x] Solder Paste
- [x] Current sense resistors
- [x] RAM / A33 (cardboard Box)
- [x] Stencil
- [x] The boards
- [x] Some headers for power
- [x] Standoffs
- [x] Dupont wires
- [x]Count inventory
- [x]Mouser Order
- Didn't order enough 1k 0402
- Didn't order an 450pF
- Increase solder mask in between pins of TI supplies
- 2.5V LDO was incorrect.
- [ ] Design of the FF power board
- [x] Determind Power requirements
- 5W
- Safety Capacitor
- A capacitor going from live of neutral to a non-grounded output of a
non-grounded exposed mteal should be Y1 - The safest class.
- C3 should be a safety class Y1.
- [ ] Design of the FF Compute
- [ ] Design of the Mech
- Questions for Derky
- [ ] Expand board slot by?
- [ ] Ask derky about USB hole
- [ ] Overmoulding the plugs
- [ ] Fixing the lid to the case
- [ ] Draw the antennas
- [ ] Certification ?
- Decent looking AC/DC Converters.
https://www.mouser.ca/datasheet/2/670/pbo_15c-1917874.pdf
- NTC
https://www.digikey.ca/en/products/detail/epcos-tdk-electronics/B57234S0100M051/3720768
- TVS for input
https://www.digikey.ca/en/products/detail/epcos-tdk-electronics/B72214P2351K101/4931638
Buildroot - Making Embedded Linux easy - http://buildroot.org - Documentation at http://buildroot.org/downloads/manu>>
12:35:22 --> | machinehum (~machinehu@2604:3d08:937d:9300::2db4) has joined #buildroot
12:35:22 -- | Topic for #buildroot is "Buildroot - Making Embedded Linux easy - http://buildroot.org -
| Documentation at http://buildroot.org/downloads/manual/manual.html"
12:35:22 -- | Topic set by ChanServ (services@services.oftc.net) on Tue, 22 Jun 2021 05:29:29
12:35:22 -- | Channel #buildroot: 63 nicks (1 op, 0 voices, 62 normals)
12:35:24 -- | Channel created on Wed, 19 May 2021 06:51:01
12:35:57 machinehum | How would I begin to debug something like this? https://pastebin.com/raw/Jipkxa9t I'm using some
| custom hardware that I designed around the A33-OLinuXino
12:37:00 machinehum | I've also noticed I can't find initcall.c anywhere is the repository after building, I wanted to
| set the #define DEBUG in it
13:13:15 kos_tom | machinehum: readelf/objdump to find which function is at 4a002459
13:16:11 --> | vincent- (~vincent-@cpc87559-seve28-2-0-cust94.13-3.cable.virginm.net) has joined #buildroot
13:18:33 vincent- | The other day I watched a video about "what is new in Buildroot". Parallel build, package stats,
| CVEs, ... I was really glad to see how much Buildroot has been improved since my old days as a
| contributor. Congratulations to everyone! :-)
13:28:16 Lightsword | did https://patchwork.ozlabs.org/project/buildroot/patch/20210616201711.1131369-1-james.hilliard
| 1@gmail.com/ need anything else?
13:28:50 @y_morin | vincent-: Then come back, we have so many big things still to do! ;-)
13:28:55 @y_morin | Lightsword: Time?
13:29:12 @y_morin | Lightsword: I meant, more hours in a day...
13:31:28 Lightsword | y_morin, ok, wasn't sure
13:42:58 vincent- | y_morin, hehe, well, I did a very small contribution in form of a co-authored patch recently.
| Does that count? :-P
13:43:38 @y_morin | Definitely! :-)
13:43:52 vincent- | https://patchwork.ozlabs.org/project/buildroot/patch/20210615140302.2485993-1-hubert.lacote@gmai
| l.com/
13:46:06 @y_morin | Yeah, I'll try a few low-hanging fruit tonight before heading to bed...
14:24:57 @y_morin | Lightsword: Applied! ;-)
14:25:04 machinehum | kos_tom: Thanks
## Building the OS
- Kernel defconfig location
./arch/arm/configs/sunxi_defconfig
### SD Card issues
[ 1.020669] Waiting for root device /dev/mmcblk0p1...
[ 1.028817] sunxi-mmc 1c0f000.mmc: no support for card's volts
[ 1.034645] mmc0: error -22 whilst initialising SD card
./sd.c:1259: host->ocr_avail = host->ocr_avail_sd;
Host side driver
-> drivers/mmc/host/sunxi-mmc.c