diff --git a/.github/workflows/build_and_test.yml b/.github/workflows/build_and_test.yml index eb4c832d..aa9f745c 100644 --- a/.github/workflows/build_and_test.yml +++ b/.github/workflows/build_and_test.yml @@ -26,7 +26,7 @@ jobs: os: ['ubuntu-22.04', 'macos-12', 'windows-2022'] runs-on: ${{ matrix.os }} steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 with: fetch-depth: '0' - run: git fetch --depth=1 origin +refs/tags/*:refs/tags/* +refs/heads/*:refs/remotes/origin/* @@ -111,7 +111,7 @@ jobs: needs: publish_to_pypi runs-on: ubuntu-22.04 steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 with: fetch-depth: '0' - name: Set up Python 3.10 diff --git a/.github/workflows/docs.yml b/.github/workflows/docs.yml index c9b600b3..fed39504 100644 --- a/.github/workflows/docs.yml +++ b/.github/workflows/docs.yml @@ -12,7 +12,7 @@ jobs: name: build docs runs-on: ubuntu-22.04 steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - name: Set up Python 3.10 uses: actions/setup-python@v4 with: diff --git a/.github/workflows/lint.yml b/.github/workflows/lint.yml index bbee4ded..6859ec33 100644 --- a/.github/workflows/lint.yml +++ b/.github/workflows/lint.yml @@ -18,7 +18,7 @@ jobs: runs-on: ubuntu-22.04 steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - name: Set up Python 3.x uses: actions/setup-python@v4 with: diff --git a/_metadata.py b/_metadata.py index 701695a4..5444bf15 100644 --- a/_metadata.py +++ b/_metadata.py @@ -1,2 +1,2 @@ -__extension_version__ = "0.2.0" +__extension_version__ = "0.3.0" __extension_name__ = "pytket-qir" diff --git a/docs/changelog.rst b/docs/changelog.rst index 4bb3f722..34d88948 100644 --- a/docs/changelog.rst +++ b/docs/changelog.rst @@ -1,6 +1,10 @@ Changelog ~~~~~~~~~ +0.3.0 (September 2023) +---------------------- +* update pytket version to 1.20 + 0.2.0 (August 2023) ------------------- * fix issue with integer in regular expression diff --git a/mypy.ini b/mypy.ini index 1dfad53a..ad4e6a06 100644 --- a/mypy.ini +++ b/mypy.ini @@ -14,7 +14,7 @@ namespace_packages = True check_untyped_defs = True warn_redundant_casts = True -warn_unused_ignores = False +warn_unused_ignores = True warn_no_return = False warn_return_any = True warn_unreachable = True diff --git a/pytket/qir/__init__.py b/pytket/qir/__init__.py index 5b9eb82c..b4cf8a70 100644 --- a/pytket/qir/__init__.py +++ b/pytket/qir/__init__.py @@ -16,5 +16,5 @@ """ # _metadata.py is copied to the folder after installation. -from ._metadata import __extension_name__, __extension_version__ # type: ignore +from ._metadata import __extension_name__, __extension_version__ from .conversion import QIRFormat, pytket_to_qir diff --git a/pytket/qir/conversion/api.py b/pytket/qir/conversion/api.py index 40b82bde..fc0940f2 100644 --- a/pytket/qir/conversion/api.py +++ b/pytket/qir/conversion/api.py @@ -22,9 +22,9 @@ import pyqir from pytket import wasm -from pytket._tket.circuit import _TEMP_BIT_NAME # type: ignore -from pytket.circuit import Bit, Circuit # type: ignore -from pytket.passes import CustomPass # type: ignore +from pytket.circuit import Bit, Circuit, UnitID +from pytket.passes import CustomPass +from pytket.unit_id import _TEMP_BIT_NAME from .conversion import QirGenerator from .module import tketqirModule @@ -73,7 +73,7 @@ def pytket_to_qir( if cut_pytket_register: cpass = _scratch_reg_resize_pass(int_type) - cpass.apply(circ) + cpass.apply(circ) # type: ignore for creg in circ.c_registers: if creg.size > 64: @@ -96,19 +96,19 @@ def pytket_to_qir( if wfh is not None: wasm_sar_dict: dict[str, str] = qir_generator.get_wasm_sar() - initial_result = str(populated_module.module.ir()) # type: ignore + initial_result = str(populated_module.module.ir()) for wf in wasm_sar_dict: initial_result = initial_result.replace(wf, wasm_sar_dict[wf]) result = initial_result - bitcode = pyqir.Module.from_ir(pyqir.Context(), result).bitcode # type: ignore + bitcode = pyqir.Module.from_ir(pyqir.Context(), result).bitcode if qir_format == QIRFormat.BINARY: - return bitcode # type: ignore + return bitcode elif qir_format == QIRFormat.STRING: - return result # type: ignore + return result else: assert not "unsupported return type" # type: ignore @@ -121,7 +121,7 @@ def pytket_to_qir( assert not "unsupported return type" # type: ignore -def _scratch_reg_resize_pass(max_size: int) -> CustomPass: +def _scratch_reg_resize_pass(max_size: int) -> CustomPass: # type: ignore """Given a max scratch register width, return a compiler pass that breaks up the internal scratch bit registers into smaller registers """ @@ -138,7 +138,7 @@ def trans(circ: Circuit, max_size: int = max_size) -> Circuit: ] # If the total number of scratch bits exceeds the max width, rename them if len(scratch_bits) > max_size: - bits_map = {} + bits_map: dict[UnitID, UnitID] = {} for i, bit in enumerate(scratch_bits): bits_map[bit] = Bit(f"{_TEMP_BIT_NAME}_{i//max_size}", i % max_size) circ.rename_units(bits_map) diff --git a/pytket/qir/conversion/conversion.py b/pytket/qir/conversion/conversion.py index becee926..34a9c536 100644 --- a/pytket/qir/conversion/conversion.py +++ b/pytket/qir/conversion/conversion.py @@ -26,20 +26,20 @@ from pyqir import IntPredicate, Value from pytket import Bit, Circuit, Qubit, predicates, wasm # type: ignore -from pytket.circuit import ( # type: ignore +from pytket.circuit import ( + BarrierOp, BitRegister, ClassicalExpBox, Command, Conditional, CopyBitsOp, - MetaOp, Op, OpType, RangePredicateOp, SetBitsOp, WASMOp, ) -from pytket.circuit.logic_exp import ( # type: ignore +from pytket.circuit.logic_exp import ( BitAnd, BitEq, BitNeq, @@ -61,8 +61,8 @@ RegSub, RegXor, ) -from pytket.qasm.qasm import _retrieve_registers # type: ignore -from pytket.transform import Transform # type: ignore +from pytket.qasm.qasm import _retrieve_registers +from pytket.transform import Transform from .gatesets import ( FuncSpec, @@ -132,7 +132,9 @@ def __init__( self.target_gateset.add(OpType.ZZMax) self.target_gateset.add(OpType.TK2) - self.getset_predicate = predicates.GateSetPredicate(set(self.target_gateset)) # type: ignore # noqa: E501 + self.getset_predicate = predicates.GateSetPredicate( + set(self.target_gateset) + ) # noqa: E501 self.set_cregs: dict[str, list] = {} # Keep track of set registers. self.ssa_vars: dict[str, Value] = {} # Keep track of set ssa variables. @@ -388,7 +390,7 @@ def _rebase_command_to_gateset(self, command: Command) -> Optional[Circuit]: return circuit return None - def _rebase_op_to_gateset(self, op: OpType, args: list) -> Optional[Circuit]: + def _rebase_op_to_gateset(self, op: Op, args: list) -> Optional[Circuit]: """Rebase an op to the target gateset if needed.""" optype = op.type if ( @@ -420,16 +422,9 @@ def _rebase_op_to_gateset(self, op: OpType, args: list) -> Optional[Circuit]: return circuit def _get_optype_and_params(self, op: Op) -> tuple[OpType, Sequence[float]]: - optype = op.type + optype: OpType = op.type params: list = [] - if optype == OpType.ExplicitPredicate: - if op.get_name() == "AND": - optype = BitWiseOp.AND - elif op.get_name() == "OR": - optype = BitWiseOp.OR - elif op.get_name() == "XOR": - optype = BitWiseOp.XOR - elif optype in [OpType.Barrier, OpType.CopyBits]: + if optype in [OpType.ExplicitPredicate, OpType.Barrier, OpType.CopyBits]: pass else: params = op.params @@ -465,7 +460,7 @@ def _reg2ssa_var(self, bit_reg: BitRegister, int_size: int) -> Value: raise ValueError( f"Classical register should only have the size of {int_size}" ) - ssa_var = self.module.builder.call( # type: ignore + ssa_var = self.module.builder.call( self.create_creg, [pyqir.const(self.qir_int_type, len(bit_reg))] ) self.ssa_vars[reg_name] = ssa_var @@ -490,7 +485,7 @@ def _get_c_regs_from_com(self, command: Command) -> tuple[list[str], list[str]]: com_bits = args[:in_width] args = args[in_width:] regname = com_bits[0].reg_name - if com_bits != list(self.cregs[regname]): + if com_bits != list(self.cregs[regname]): # type: ignore raise ValueError("WASM ops must act on entire registers.") reglist.append(regname) return inputs, outputs @@ -499,10 +494,12 @@ def _get_ssa_from_cl_reg_op( self, reg: Union[BitRegister, RegAnd, RegOr, RegXor], module: tketqirModule ) -> Value: if type(reg) in _TK_CLOPS_TO_PYQIR_REG: - assert len(reg.args) == 2 + assert len(reg.args) == 2 # type: ignore - ssa_left = self._get_ssa_from_cl_reg_op(reg.args[0], module) - ssa_right = self._get_ssa_from_cl_reg_op(reg.args[1], module) + ssa_left = self._get_ssa_from_cl_reg_op(reg.args[0], module) # type: ignore + ssa_right = self._get_ssa_from_cl_reg_op( + reg.args[1], module # type: ignore + ) # add function to module output_instruction = _TK_CLOPS_TO_PYQIR_REG[type(reg)](module.builder)( @@ -648,8 +645,8 @@ def condition_block_false() -> None: module.module.builder.if_( ssabool, - true=lambda: condition_block_true(), # type: ignore - false=lambda: condition_block_false(), # type: ignore + true=lambda: condition_block_true(), + false=lambda: condition_block_false(), ) else: @@ -685,7 +682,7 @@ def condition_block() -> None: module.module.builder.if_( ssabool, - true=lambda: condition_block(), # type: ignore + true=lambda: condition_block(), ) elif isinstance(op, WASMOp): @@ -693,7 +690,7 @@ def condition_block() -> None: paramssa = [self._get_i64_ssa_reg(p) for p in paramreg] - result = self.module.builder.call( # type: ignore + result = self.module.builder.call( self.wasm[command.op.func_name], [*paramssa], ) @@ -724,7 +721,7 @@ def condition_block() -> None: ), ) - self.module.builder.call( # type: ignore + self.module.builder.call( self.additional_quantum_gates[OpType.ZZPhase], [ pyqir.const( @@ -756,7 +753,7 @@ def condition_block() -> None: ), ) - self.module.builder.call( # type: ignore + self.module.builder.call( self.additional_quantum_gates[OpType.PhasedX], [ pyqir.const( @@ -793,7 +790,7 @@ def condition_block() -> None: ), ) - self.module.builder.call( # type: ignore + self.module.builder.call( self.additional_quantum_gates[OpType.TK2], [ pyqir.const( @@ -832,7 +829,7 @@ def condition_block() -> None: ), ) - self.module.builder.call( # type: ignore + self.module.builder.call( self.additional_quantum_gates[OpType.ZZMax], [ module.module.qubits[command.qubits[0].index[0]], @@ -883,11 +880,15 @@ def condition_block() -> None: # classical ops acting on registers returning register ssa_left = cast( # type: ignore Value, - self._get_ssa_from_cl_reg_op(op.get_exp().args[0], module), + self._get_ssa_from_cl_reg_op( + op.get_exp().args[0], module # type: ignore + ), ) ssa_right = cast( # type: ignore Value, - self._get_ssa_from_cl_reg_op(op.get_exp().args[1], module), + self._get_ssa_from_cl_reg_op( + op.get_exp().args[1], module # type: ignore + ), ) # add function to module @@ -899,11 +900,15 @@ def condition_block() -> None: # classical ops acting on bits returning bit ssa_left = cast( # type: ignore Value, - self._get_ssa_from_cl_bit_op(op.get_exp().args[0], module), + self._get_ssa_from_cl_bit_op( + op.get_exp().args[0], module # type: ignore + ), ) ssa_right = cast( # type: ignore Value, - self._get_ssa_from_cl_bit_op(op.get_exp().args[1], module), + self._get_ssa_from_cl_bit_op( + op.get_exp().args[1], module # type: ignore + ), ) # add function to module @@ -917,11 +922,15 @@ def condition_block() -> None: # classical ops acting on registers returning bit ssa_left = cast( # type: ignore Value, - self._get_ssa_from_cl_reg_op(op.get_exp().args[0], module), + self._get_ssa_from_cl_reg_op( + op.get_exp().args[0], module # type: ignore + ), ) ssa_right = cast( # type: ignore Value, - self._get_ssa_from_cl_reg_op(op.get_exp().args[1], module), + self._get_ssa_from_cl_reg_op( + op.get_exp().args[1], module # type: ignore + ), ) # add function to module @@ -993,7 +1002,7 @@ def condition_block() -> None: ], ) - elif isinstance(op, MetaOp): + elif isinstance(op, BarrierOp): assert command.qubits[0].reg_name == "q" qir_qubits = self._to_qis_qubits(command.qubits) @@ -1012,7 +1021,7 @@ def condition_block() -> None: float(command.op.data[6:-1]), ) else: - raise ValueError("Meta op is not supported yet") + raise ValueError("op is not supported yet") else: rebased_circ = self._rebase_command_to_gateset( diff --git a/pytket/qir/conversion/module.py b/pytket/qir/conversion/module.py index d3378be3..987deba0 100644 --- a/pytket/qir/conversion/module.py +++ b/pytket/qir/conversion/module.py @@ -19,7 +19,7 @@ from typing import Optional -from pyqir import BasicQisBuilder, SimpleModule # type: ignore +from pyqir import BasicQisBuilder, SimpleModule from pytket.wasm import WasmFileHandler diff --git a/setup.py b/setup.py index c2d034b4..09d99746 100644 --- a/setup.py +++ b/setup.py @@ -45,7 +45,7 @@ packages=find_namespace_packages(include=["pytket.*"]), include_package_data=True, install_requires=[ - "pytket == 1.19.0rc0", + "pytket ~= 1.20", "pyqir == 0.8.2", "pyqir-generator == 0.7.0", "pyqir-evaluator == 0.7.0", diff --git a/tests/api_test.py b/tests/api_test.py index bcf03f79..de22b5fa 100644 --- a/tests/api_test.py +++ b/tests/api_test.py @@ -17,7 +17,7 @@ import pytest from utilities import check_qir_result # type: ignore -from pytket.circuit import Circuit # type: ignore +from pytket.circuit import Circuit from pytket.qir.conversion.api import ( QIRFormat, pytket_to_qir, diff --git a/tests/conditional_test.py b/tests/conditional_test.py index 4ae1c98e..74263123 100644 --- a/tests/conditional_test.py +++ b/tests/conditional_test.py @@ -15,7 +15,7 @@ import pytest from utilities import check_qir_result # type: ignore -from pytket.circuit import ( # type: ignore[attr-defined] +from pytket.circuit import ( Bit, CircBox, Circuit, @@ -36,9 +36,9 @@ def test_pytket_qir_conditional() -> None: c = circ.add_c_register("c", 5) d = circ.add_c_register("d", 5) circ.H(0) - circ.add_classicalexpbox_register(a | b, c) - circ.add_classicalexpbox_register(c | b, d) - circ.add_classicalexpbox_register(c | b, d, condition=a[4]) + circ.add_classicalexpbox_register(a | b, c) # type: ignore + circ.add_classicalexpbox_register(c | b, d) # type: ignore + circ.add_classicalexpbox_register(c | b, d, condition=a[4]) # type: ignore circ.H(0) circ.Measure(Qubit(0), d[4]) circ.H(1) @@ -62,9 +62,11 @@ def test_pytket_qir_conditional_ii() -> None: c = circ.add_c_register("c", 5) d = circ.add_c_register("d", 5) circ.H(0) - circ.add_classicalexpbox_register(a | b, c) - circ.add_classicalexpbox_register(c | b, d) - circ.add_classicalexpbox_register(c | b, d, condition=if_not_bit(a[4])) + circ.add_classicalexpbox_register(a | b, c) # type: ignore + circ.add_classicalexpbox_register(c | b, d) # type: ignore + circ.add_classicalexpbox_register( + c | b, d, condition=if_not_bit(a[4]) # type: ignore + ) circ.H(0) circ.Measure(Qubit(0), d[4]) circ.H(1) @@ -95,8 +97,8 @@ def test_pytket_qir_conditional_iii() -> None: big_exp = bits[4] | bits[5] ^ bits[6] | bits[7] & bits[8] circ.H(0, condition=big_exp) - circ.add_classicalexpbox_register(a + b - d, c) - circ.add_classicalexpbox_register(a * b * d * c, e) + circ.add_classicalexpbox_register(a + b - d, c) # type: ignore + circ.add_classicalexpbox_register(a * b * d * c, e) # type: ignore result = pytket_to_qir( circ, name="test_pytket_qir_conditional_iii", qir_format=QIRFormat.STRING @@ -213,7 +215,7 @@ def test_pytket_qir_conditional_10() -> None: box_c = box_circ.add_c_register("c", 5) box_circ.H(0) - box_circ.add_classicalexpbox_register(box_c | box_c, box_c) + box_circ.add_classicalexpbox_register(box_c | box_c, box_c) # type: ignore cbox = CircBox(box_circ) d = Circuit(4, 5) diff --git a/tests/conversion_test.py b/tests/conversion_test.py index d7732b28..9794d2a3 100644 --- a/tests/conversion_test.py +++ b/tests/conversion_test.py @@ -15,8 +15,8 @@ import pytest from utilities import check_qir_result # type: ignore -from pytket.circuit import Bit, BitRegister, Circuit, Qubit, if_not_bit # type: ignore -from pytket.circuit.logic_exp import ( # type: ignore +from pytket.circuit import Bit, BitRegister, Circuit, Qubit, if_not_bit +from pytket.circuit.logic_exp import ( reg_eq, reg_geq, reg_gt, @@ -24,7 +24,7 @@ reg_lt, reg_neq, ) -from pytket.passes import FlattenRelabelRegistersPass # type: ignore +from pytket.passes import FlattenRelabelRegistersPass from pytket.qir.conversion.api import QIRFormat, pytket_to_qir @@ -64,7 +64,7 @@ def test_pytket_qir_4() -> None: a = circ.add_c_register("a", 5) b = circ.add_c_register("b", 5) c = circ.add_c_register("c", 5) - circ.add_classicalexpbox_register(a | b, c) + circ.add_classicalexpbox_register(a | b, c) # type: ignore circ.H(0) circ.H(0, condition=b[4]) circ.H(0) @@ -82,7 +82,7 @@ def test_pytket_qir_5() -> None: b = circ.add_c_register("b", 5) c = circ.add_c_register("c", 5) circ.add_c_register("d", 5) - circ.add_classicalexpbox_register(a | b, c) + circ.add_classicalexpbox_register(a | b, c) # type: ignore circ.H(0) circ.H(0, condition=Bit(3)) circ.H(0) @@ -107,7 +107,7 @@ def test_pytket_qir_6() -> None: b = circ.add_c_register("b", 5) c = circ.add_c_register("c", 5) circ.add_c_register("d", 5) - circ.add_classicalexpbox_register(a | b, c) + circ.add_classicalexpbox_register(a | b, c) # type: ignore circ.H(2) circ.H(1) circ.X(0) @@ -127,21 +127,21 @@ def test_pytket_qir_7() -> None: b = circ.add_c_register("b", 3) c = circ.add_c_register("c", 3) d = circ.add_c_register("d", 3) - circ.add_classicalexpbox_register(a & d, c) - circ.add_classicalexpbox_register(a | b, c) - circ.add_classicalexpbox_register(a ^ b, c) - circ.add_classicalexpbox_register(a + b, c) - circ.add_classicalexpbox_register(a - b, c) - circ.add_classicalexpbox_register(a * b, c) + circ.add_classicalexpbox_register(a & d, c) # type: ignore + circ.add_classicalexpbox_register(a | b, c) # type: ignore + circ.add_classicalexpbox_register(a ^ b, c) # type: ignore + circ.add_classicalexpbox_register(a + b, c) # type: ignore + circ.add_classicalexpbox_register(a - b, c) # type: ignore + circ.add_classicalexpbox_register(a * b, c) # type: ignore # circ.add_classicalexpbox_register(a // b, c) No division yet. - circ.add_classicalexpbox_register(a << b, c) - circ.add_classicalexpbox_register(a >> b, c) - circ.add_classicalexpbox_register(reg_eq(a, b), c) - circ.add_classicalexpbox_register(reg_neq(a, b), c) - circ.add_classicalexpbox_register(reg_gt(a, b), c) - circ.add_classicalexpbox_register(reg_geq(a, b), c) - circ.add_classicalexpbox_register(reg_lt(a, b), c) - circ.add_classicalexpbox_register(reg_leq(a, b), c) + circ.add_classicalexpbox_register(a << b, c) # type: ignore + circ.add_classicalexpbox_register(a >> b, c) # type: ignore + circ.add_classicalexpbox_register(reg_eq(a, b), c) # type: ignore + circ.add_classicalexpbox_register(reg_neq(a, b), c) # type: ignore + circ.add_classicalexpbox_register(reg_gt(a, b), c) # type: ignore + circ.add_classicalexpbox_register(reg_geq(a, b), c) # type: ignore + circ.add_classicalexpbox_register(reg_lt(a, b), c) # type: ignore + circ.add_classicalexpbox_register(reg_leq(a, b), c) # type: ignore result = pytket_to_qir(circ, name="test_pytket_qir_7", qir_format=QIRFormat.STRING) @@ -157,7 +157,7 @@ def test_pytket_qir_8() -> None: c.add_c_setbits([True], [a[2]]) c.add_c_setbits([True], [a[1]]) c.add_c_setbits([True], [a[7]]) - c.add_c_setbits([False, True] + [False] * 6, list(a)) + c.add_c_setbits([False, True] + [False] * 6, list(a)) # type: ignore result = pytket_to_qir(c, name="test_pytket_qir_8", qir_format=QIRFormat.STRING) @@ -208,7 +208,7 @@ def test_pytket_qir_12() -> None: c = Circuit(1, name="test_classical") a = c.add_c_register("a", 8) - c.add_classicalexpbox_register(a << 1, a) + c.add_classicalexpbox_register(a << 1, a) # type: ignore result = pytket_to_qir(c, name="test_pytket_qir_12", qir_format=QIRFormat.STRING) @@ -221,8 +221,8 @@ def test_pytket_qir_13() -> None: a = c.add_c_register("a", 8) b = c.add_c_register("b", 8) - c.add_classicalexpbox_register(a << 1, a) - c.add_classicalexpbox_register(a >> 3, b) + c.add_classicalexpbox_register(a << 1, a) # type: ignore + c.add_classicalexpbox_register(a >> 3, b) # type: ignore result = pytket_to_qir(c, name="test_pytket_qir_13", qir_format=QIRFormat.STRING) @@ -237,17 +237,17 @@ def test_pytket_qir_14() -> None: d = c.add_c_register("d", 10) c.add_c_setbits([True], [a[0]]) - c.add_c_setbits([False, True] + [False] * 6, list(a)) - c.add_c_setbits([True, True] + [False] * 8, list(b)) + c.add_c_setbits([False, True] + [False] * 6, list(a)) # type: ignore + c.add_c_setbits([True, True] + [False] * 8, list(b)) # type: ignore c.add_c_setreg(23, a) c.add_c_copyreg(a, b) - c.add_classicalexpbox_register(a + b, d) - c.add_classicalexpbox_register(a - b, d) + c.add_classicalexpbox_register(a + b, d) # type: ignore + c.add_classicalexpbox_register(a - b, d) # type: ignore # c.add_classicalexpbox_register(a * b // d, d) - c.add_classicalexpbox_register(a << 1, a) - c.add_classicalexpbox_register(a >> 1, b) + c.add_classicalexpbox_register(a << 1, a) # type: ignore + c.add_classicalexpbox_register(a >> 1, b) # type: ignore c.X(0, condition=reg_eq(a ^ b, 1)) c.X(0, condition=(a[0] ^ b[0])) @@ -268,6 +268,45 @@ def test_pytket_qir_14() -> None: check_qir_result(result, "test_pytket_qir_14") +def test_pytket_qir_14_b() -> None: + # test setbits op + c = Circuit(1, name="test_classical") + a = c.add_c_register("a", 32) + b = c.add_c_register("b", 32) + d = c.add_c_register("d", 32) + + c.add_c_setbits([True], [a[0]]) + c.add_c_setbits([False, True] + [False] * 30, list(a)) # type: ignore + c.add_c_setbits([True, True] + [False] * 30, list(b)) # type: ignore + + c.add_c_setreg(23, a) + c.add_c_copyreg(a, b) + + c.add_classicalexpbox_register(a + b, d) # type: ignore + c.add_classicalexpbox_register(a - b, d) # type: ignore + # c.add_classicalexpbox_register(a * b // d, d) + c.add_classicalexpbox_register(a << 1, a) # type: ignore + c.add_classicalexpbox_register(a >> 1, b) # type: ignore + + c.X(0, condition=reg_eq(a ^ b, 1)) + c.X(0, condition=(a[0] ^ b[0])) + c.X(0, condition=reg_eq(a & b, 1)) + c.X(0, condition=reg_eq(a | b, 1)) + + c.X(0, condition=a[0]) + c.X(0, condition=reg_neq(a, 1)) + c.X(0, condition=if_not_bit(a[0])) + c.X(0, condition=reg_gt(a, 1)) + c.X(0, condition=reg_lt(a, 1)) + c.X(0, condition=reg_geq(a, 1)) + c.X(0, condition=reg_leq(a, 1)) + c.Phase(0, condition=a[0]) + + result = pytket_to_qir(c, name="test_pytket_qir_14_b", qir_format=QIRFormat.STRING) + + check_qir_result(result, "test_pytket_qir_14_b") + + def test_pytket_qir_15() -> None: # test calssical exp box handling # circuit to cover capabilities covered in example notebook diff --git a/tests/gateset_test.py b/tests/gateset_test.py index 33748bef..24d21aff 100644 --- a/tests/gateset_test.py +++ b/tests/gateset_test.py @@ -12,7 +12,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -from pytket.circuit import OpType # type: ignore +from pytket.circuit import OpType from pytket.qir.conversion.gatesets import _TK_TO_PYQIR diff --git a/tests/qir/test_pytket_qir_14_b.ll b/tests/qir/test_pytket_qir_14_b.ll new file mode 100644 index 00000000..30e5cd5d --- /dev/null +++ b/tests/qir/test_pytket_qir_14_b.ll @@ -0,0 +1,441 @@ +; ModuleID = 'test_pytket_qir_14_b' +source_filename = "test_pytket_qir_14_b" + +%Qubit = type opaque +%Result = type opaque + +@0 = internal constant [2 x i8] c"a\00" +@1 = internal constant [2 x i8] c"b\00" +@2 = internal constant [2 x i8] c"d\00" +@3 = internal constant [15 x i8] c"tk_SCRATCH_BIT\00" +@4 = internal constant [20 x i8] c"tk_SCRATCH_BITREG_0\00" +@5 = internal constant [20 x i8] c"tk_SCRATCH_BITREG_1\00" +@6 = internal constant [20 x i8] c"tk_SCRATCH_BITREG_2\00" + +define void @main() #0 { +entry: + %0 = call i1* @create_creg(i64 32) + %1 = call i1* @create_creg(i64 32) + %2 = call i1* @create_creg(i64 32) + %3 = call i1* @create_creg(i64 9) + %4 = call i1* @create_creg(i64 32) + %5 = call i1* @create_creg(i64 32) + %6 = call i1* @create_creg(i64 32) + call void @set_creg_bit(i1* %0, i64 0, i1 true) + call void @set_creg_bit(i1* %1, i64 0, i1 true) + call void @set_creg_bit(i1* %1, i64 1, i1 true) + call void @set_creg_bit(i1* %1, i64 2, i1 false) + call void @set_creg_bit(i1* %1, i64 3, i1 false) + call void @set_creg_bit(i1* %1, i64 4, i1 false) + call void @set_creg_bit(i1* %1, i64 5, i1 false) + call void @set_creg_bit(i1* %1, i64 6, i1 false) + call void @set_creg_bit(i1* %1, i64 7, i1 false) + call void @set_creg_bit(i1* %1, i64 8, i1 false) + call void @set_creg_bit(i1* %1, i64 9, i1 false) + call void @set_creg_bit(i1* %1, i64 10, i1 false) + call void @set_creg_bit(i1* %1, i64 11, i1 false) + call void @set_creg_bit(i1* %1, i64 12, i1 false) + call void @set_creg_bit(i1* %1, i64 13, i1 false) + call void @set_creg_bit(i1* %1, i64 14, i1 false) + call void @set_creg_bit(i1* %1, i64 15, i1 false) + call void @set_creg_bit(i1* %1, i64 16, i1 false) + call void @set_creg_bit(i1* %1, i64 17, i1 false) + call void @set_creg_bit(i1* %1, i64 18, i1 false) + call void @set_creg_bit(i1* %1, i64 19, i1 false) + call void @set_creg_bit(i1* %1, i64 20, i1 false) + call void @set_creg_bit(i1* %1, i64 21, i1 false) + call void @set_creg_bit(i1* %1, i64 22, i1 false) + call void @set_creg_bit(i1* %1, i64 23, i1 false) + call void @set_creg_bit(i1* %1, i64 24, i1 false) + call void @set_creg_bit(i1* %1, i64 25, i1 false) + call void @set_creg_bit(i1* %1, i64 26, i1 false) + call void @set_creg_bit(i1* %1, i64 27, i1 false) + call void @set_creg_bit(i1* %1, i64 28, i1 false) + call void @set_creg_bit(i1* %1, i64 29, i1 false) + call void @set_creg_bit(i1* %1, i64 30, i1 false) + call void @set_creg_bit(i1* %1, i64 31, i1 false) + call void @set_creg_bit(i1* %0, i64 0, i1 false) + call void @set_creg_bit(i1* %0, i64 1, i1 true) + call void @set_creg_bit(i1* %0, i64 2, i1 false) + call void @set_creg_bit(i1* %0, i64 3, i1 false) + call void @set_creg_bit(i1* %0, i64 4, i1 false) + call void @set_creg_bit(i1* %0, i64 5, i1 false) + call void @set_creg_bit(i1* %0, i64 6, i1 false) + call void @set_creg_bit(i1* %0, i64 7, i1 false) + call void @set_creg_bit(i1* %0, i64 8, i1 false) + call void @set_creg_bit(i1* %0, i64 9, i1 false) + call void @set_creg_bit(i1* %0, i64 10, i1 false) + call void @set_creg_bit(i1* %0, i64 11, i1 false) + call void @set_creg_bit(i1* %0, i64 12, i1 false) + call void @set_creg_bit(i1* %0, i64 13, i1 false) + call void @set_creg_bit(i1* %0, i64 14, i1 false) + call void @set_creg_bit(i1* %0, i64 15, i1 false) + call void @set_creg_bit(i1* %0, i64 16, i1 false) + call void @set_creg_bit(i1* %0, i64 17, i1 false) + call void @set_creg_bit(i1* %0, i64 18, i1 false) + call void @set_creg_bit(i1* %0, i64 19, i1 false) + call void @set_creg_bit(i1* %0, i64 20, i1 false) + call void @set_creg_bit(i1* %0, i64 21, i1 false) + call void @set_creg_bit(i1* %0, i64 22, i1 false) + call void @set_creg_bit(i1* %0, i64 23, i1 false) + call void @set_creg_bit(i1* %0, i64 24, i1 false) + call void @set_creg_bit(i1* %0, i64 25, i1 false) + call void @set_creg_bit(i1* %0, i64 26, i1 false) + call void @set_creg_bit(i1* %0, i64 27, i1 false) + call void @set_creg_bit(i1* %0, i64 28, i1 false) + call void @set_creg_bit(i1* %0, i64 29, i1 false) + call void @set_creg_bit(i1* %0, i64 30, i1 false) + call void @set_creg_bit(i1* %0, i64 31, i1 false) + call void @set_creg_bit(i1* %0, i64 0, i1 true) + call void @set_creg_bit(i1* %0, i64 1, i1 true) + call void @set_creg_bit(i1* %0, i64 2, i1 true) + call void @set_creg_bit(i1* %0, i64 3, i1 false) + call void @set_creg_bit(i1* %0, i64 4, i1 true) + call void @set_creg_bit(i1* %0, i64 5, i1 false) + call void @set_creg_bit(i1* %0, i64 6, i1 false) + call void @set_creg_bit(i1* %0, i64 7, i1 false) + call void @set_creg_bit(i1* %0, i64 8, i1 false) + call void @set_creg_bit(i1* %0, i64 9, i1 false) + call void @set_creg_bit(i1* %0, i64 10, i1 false) + call void @set_creg_bit(i1* %0, i64 11, i1 false) + call void @set_creg_bit(i1* %0, i64 12, i1 false) + call void @set_creg_bit(i1* %0, i64 13, i1 false) + call void @set_creg_bit(i1* %0, i64 14, i1 false) + call void @set_creg_bit(i1* %0, i64 15, i1 false) + call void @set_creg_bit(i1* %0, i64 16, i1 false) + call void @set_creg_bit(i1* %0, i64 17, i1 false) + call void @set_creg_bit(i1* %0, i64 18, i1 false) + call void @set_creg_bit(i1* %0, i64 19, i1 false) + call void @set_creg_bit(i1* %0, i64 20, i1 false) + call void @set_creg_bit(i1* %0, i64 21, i1 false) + call void @set_creg_bit(i1* %0, i64 22, i1 false) + call void @set_creg_bit(i1* %0, i64 23, i1 false) + call void @set_creg_bit(i1* %0, i64 24, i1 false) + call void @set_creg_bit(i1* %0, i64 25, i1 false) + call void @set_creg_bit(i1* %0, i64 26, i1 false) + call void @set_creg_bit(i1* %0, i64 27, i1 false) + call void @set_creg_bit(i1* %0, i64 28, i1 false) + call void @set_creg_bit(i1* %0, i64 29, i1 false) + call void @set_creg_bit(i1* %0, i64 30, i1 false) + call void @set_creg_bit(i1* %0, i64 31, i1 false) + %7 = call i1 @get_creg_bit(i1* %0, i64 0) + call void @set_creg_bit(i1* %1, i64 0, i1 %7) + %8 = call i1 @get_creg_bit(i1* %0, i64 1) + call void @set_creg_bit(i1* %1, i64 1, i1 %8) + %9 = call i1 @get_creg_bit(i1* %0, i64 2) + call void @set_creg_bit(i1* %1, i64 2, i1 %9) + %10 = call i1 @get_creg_bit(i1* %0, i64 3) + call void @set_creg_bit(i1* %1, i64 3, i1 %10) + %11 = call i1 @get_creg_bit(i1* %0, i64 4) + call void @set_creg_bit(i1* %1, i64 4, i1 %11) + %12 = call i1 @get_creg_bit(i1* %0, i64 5) + call void @set_creg_bit(i1* %1, i64 5, i1 %12) + %13 = call i1 @get_creg_bit(i1* %0, i64 6) + call void @set_creg_bit(i1* %1, i64 6, i1 %13) + %14 = call i1 @get_creg_bit(i1* %0, i64 7) + call void @set_creg_bit(i1* %1, i64 7, i1 %14) + %15 = call i1 @get_creg_bit(i1* %0, i64 8) + call void @set_creg_bit(i1* %1, i64 8, i1 %15) + %16 = call i1 @get_creg_bit(i1* %0, i64 9) + call void @set_creg_bit(i1* %1, i64 9, i1 %16) + %17 = call i1 @get_creg_bit(i1* %0, i64 10) + call void @set_creg_bit(i1* %1, i64 10, i1 %17) + %18 = call i1 @get_creg_bit(i1* %0, i64 11) + call void @set_creg_bit(i1* %1, i64 11, i1 %18) + %19 = call i1 @get_creg_bit(i1* %0, i64 12) + call void @set_creg_bit(i1* %1, i64 12, i1 %19) + %20 = call i1 @get_creg_bit(i1* %0, i64 13) + call void @set_creg_bit(i1* %1, i64 13, i1 %20) + %21 = call i1 @get_creg_bit(i1* %0, i64 14) + call void @set_creg_bit(i1* %1, i64 14, i1 %21) + %22 = call i1 @get_creg_bit(i1* %0, i64 15) + call void @set_creg_bit(i1* %1, i64 15, i1 %22) + %23 = call i1 @get_creg_bit(i1* %0, i64 16) + call void @set_creg_bit(i1* %1, i64 16, i1 %23) + %24 = call i1 @get_creg_bit(i1* %0, i64 17) + call void @set_creg_bit(i1* %1, i64 17, i1 %24) + %25 = call i1 @get_creg_bit(i1* %0, i64 18) + call void @set_creg_bit(i1* %1, i64 18, i1 %25) + %26 = call i1 @get_creg_bit(i1* %0, i64 19) + call void @set_creg_bit(i1* %1, i64 19, i1 %26) + %27 = call i1 @get_creg_bit(i1* %0, i64 20) + call void @set_creg_bit(i1* %1, i64 20, i1 %27) + %28 = call i1 @get_creg_bit(i1* %0, i64 21) + call void @set_creg_bit(i1* %1, i64 21, i1 %28) + %29 = call i1 @get_creg_bit(i1* %0, i64 22) + call void @set_creg_bit(i1* %1, i64 22, i1 %29) + %30 = call i1 @get_creg_bit(i1* %0, i64 23) + call void @set_creg_bit(i1* %1, i64 23, i1 %30) + %31 = call i1 @get_creg_bit(i1* %0, i64 24) + call void @set_creg_bit(i1* %1, i64 24, i1 %31) + %32 = call i1 @get_creg_bit(i1* %0, i64 25) + call void @set_creg_bit(i1* %1, i64 25, i1 %32) + %33 = call i1 @get_creg_bit(i1* %0, i64 26) + call void @set_creg_bit(i1* %1, i64 26, i1 %33) + %34 = call i1 @get_creg_bit(i1* %0, i64 27) + call void @set_creg_bit(i1* %1, i64 27, i1 %34) + %35 = call i1 @get_creg_bit(i1* %0, i64 28) + call void @set_creg_bit(i1* %1, i64 28, i1 %35) + %36 = call i1 @get_creg_bit(i1* %0, i64 29) + call void @set_creg_bit(i1* %1, i64 29, i1 %36) + %37 = call i1 @get_creg_bit(i1* %0, i64 30) + call void @set_creg_bit(i1* %1, i64 30, i1 %37) + %38 = call i1 @get_creg_bit(i1* %0, i64 31) + call void @set_creg_bit(i1* %1, i64 31, i1 %38) + %39 = call i64 @get_int_from_creg(i1* %0) + %40 = call i64 @get_int_from_creg(i1* %0) + %41 = call i64 @get_int_from_creg(i1* %0) + %42 = call i64 @get_int_from_creg(i1* %1) + %43 = add i64 %41, %42 + call void @set_creg_to_int(i1* %2, i64 %43) + %44 = call i64 @get_int_from_creg(i1* %0) + %45 = call i64 @get_int_from_creg(i1* %0) + %46 = call i64 @get_int_from_creg(i1* %0) + %47 = call i64 @get_int_from_creg(i1* %1) + %48 = sub i64 %46, %47 + call void @set_creg_to_int(i1* %2, i64 %48) + %49 = call i64 @get_int_from_creg(i1* %0) + %50 = call i64 @get_int_from_creg(i1* %0) + %51 = call i64 @get_int_from_creg(i1* %0) + %52 = shl i64 %51, 1 + call void @set_creg_to_int(i1* %0, i64 %52) + %53 = call i64 @get_int_from_creg(i1* %0) + %54 = call i64 @get_int_from_creg(i1* %0) + %55 = call i64 @get_int_from_creg(i1* %0) + %56 = lshr i64 %55, 1 + call void @set_creg_to_int(i1* %1, i64 %56) + %57 = call i64 @get_int_from_creg(i1* %0) + %58 = icmp eq i64 1, %57 + call void @set_creg_bit(i1* %3, i64 4, i1 %58) + %59 = call i64 @get_int_from_creg(i1* %0) + %60 = icmp sgt i64 2, %59 + %61 = call i64 @get_int_from_creg(i1* %0) + %62 = icmp sgt i64 %61, 4294967295 + %63 = and i1 %60, %62 + call void @set_creg_bit(i1* %3, i64 5, i1 %63) + %64 = call i64 @get_int_from_creg(i1* %0) + %65 = icmp eq i64 0, %64 + call void @set_creg_bit(i1* %3, i64 6, i1 %65) + %66 = call i64 @get_int_from_creg(i1* %0) + %67 = icmp sgt i64 1, %66 + %68 = call i64 @get_int_from_creg(i1* %0) + %69 = icmp sgt i64 %68, 4294967295 + %70 = and i1 %67, %69 + call void @set_creg_bit(i1* %3, i64 7, i1 %70) + %71 = call i64 @get_int_from_creg(i1* %0) + %72 = icmp sgt i64 0, %71 + %73 = call i64 @get_int_from_creg(i1* %0) + %74 = icmp sgt i64 %73, 1 + %75 = and i1 %72, %74 + call void @set_creg_bit(i1* %3, i64 8, i1 %75) + %76 = call i1 @get_creg_bit(i1* %0, i64 0) + br i1 %76, label %then, label %else + +then: ; preds = %entry + br label %continue + +else: ; preds = %entry + br label %continue + +continue: ; preds = %else, %then + %77 = call i64 @get_int_from_creg(i1* %0) + %78 = call i64 @get_int_from_creg(i1* %0) + %79 = call i1 @get_creg_bit(i1* %0, i64 0) + %80 = call i1 @get_creg_bit(i1* %1, i64 0) + %81 = xor i1 %79, %80 + call void @set_creg_bit(i1* %3, i64 1, i1 %81) + %82 = call i64 @get_int_from_creg(i1* %0) + %83 = call i64 @get_int_from_creg(i1* %0) + %84 = call i64 @get_int_from_creg(i1* %0) + %85 = call i64 @get_int_from_creg(i1* %1) + %86 = xor i64 %84, %85 + call void @set_creg_to_int(i1* %4, i64 %86) + %87 = call i64 @get_int_from_creg(i1* %0) + %88 = call i64 @get_int_from_creg(i1* %0) + %89 = call i64 @get_int_from_creg(i1* %0) + %90 = call i64 @get_int_from_creg(i1* %1) + %91 = and i64 %89, %90 + call void @set_creg_to_int(i1* %5, i64 %91) + %92 = call i64 @get_int_from_creg(i1* %0) + %93 = call i64 @get_int_from_creg(i1* %0) + %94 = call i64 @get_int_from_creg(i1* %0) + %95 = call i64 @get_int_from_creg(i1* %1) + %96 = or i64 %94, %95 + call void @set_creg_to_int(i1* %6, i64 %96) + %97 = call i64 @get_int_from_creg(i1* %4) + %98 = icmp eq i64 1, %97 + call void @set_creg_bit(i1* %3, i64 0, i1 %98) + %99 = call i64 @get_int_from_creg(i1* %5) + %100 = icmp eq i64 1, %99 + call void @set_creg_bit(i1* %3, i64 2, i1 %100) + %101 = call i64 @get_int_from_creg(i1* %6) + %102 = icmp eq i64 1, %101 + call void @set_creg_bit(i1* %3, i64 3, i1 %102) + %103 = call i1 @get_creg_bit(i1* %3, i64 0) + br i1 %103, label %then1, label %else2 + +then1: ; preds = %continue + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue3 + +else2: ; preds = %continue + br label %continue3 + +continue3: ; preds = %else2, %then1 + %104 = call i1 @get_creg_bit(i1* %3, i64 1) + br i1 %104, label %then4, label %else5 + +then4: ; preds = %continue3 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue6 + +else5: ; preds = %continue3 + br label %continue6 + +continue6: ; preds = %else5, %then4 + %105 = call i1 @get_creg_bit(i1* %3, i64 2) + br i1 %105, label %then7, label %else8 + +then7: ; preds = %continue6 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue9 + +else8: ; preds = %continue6 + br label %continue9 + +continue9: ; preds = %else8, %then7 + %106 = call i1 @get_creg_bit(i1* %3, i64 3) + br i1 %106, label %then10, label %else11 + +then10: ; preds = %continue9 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue12 + +else11: ; preds = %continue9 + br label %continue12 + +continue12: ; preds = %else11, %then10 + %107 = call i1 @get_creg_bit(i1* %0, i64 0) + br i1 %107, label %then13, label %else14 + +then13: ; preds = %continue12 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue15 + +else14: ; preds = %continue12 + br label %continue15 + +continue15: ; preds = %else14, %then13 + %108 = call i1 @get_creg_bit(i1* %3, i64 4) + br i1 %108, label %then16, label %else17 + +then16: ; preds = %continue15 + br label %continue18 + +else17: ; preds = %continue15 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue18 + +continue18: ; preds = %else17, %then16 + %109 = call i1 @get_creg_bit(i1* %0, i64 0) + br i1 %109, label %then19, label %else20 + +then19: ; preds = %continue18 + br label %continue21 + +else20: ; preds = %continue18 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue21 + +continue21: ; preds = %else20, %then19 + %110 = call i1 @get_creg_bit(i1* %3, i64 5) + br i1 %110, label %then22, label %else23 + +then22: ; preds = %continue21 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue24 + +else23: ; preds = %continue21 + br label %continue24 + +continue24: ; preds = %else23, %then22 + %111 = call i1 @get_creg_bit(i1* %3, i64 6) + br i1 %111, label %then25, label %else26 + +then25: ; preds = %continue24 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue27 + +else26: ; preds = %continue24 + br label %continue27 + +continue27: ; preds = %else26, %then25 + %112 = call i1 @get_creg_bit(i1* %3, i64 7) + br i1 %112, label %then28, label %else29 + +then28: ; preds = %continue27 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue30 + +else29: ; preds = %continue27 + br label %continue30 + +continue30: ; preds = %else29, %then28 + %113 = call i1 @get_creg_bit(i1* %3, i64 8) + br i1 %113, label %then31, label %else32 + +then31: ; preds = %continue30 + call void @__quantum__qis__x__body(%Qubit* null) + br label %continue33 + +else32: ; preds = %continue30 + br label %continue33 + +continue33: ; preds = %else32, %then31 + call void @__quantum__rt__tuple_start_record_output() + %114 = call i64 @get_int_from_creg(i1* %0) + call void @__quantum__rt__int_record_output(i64 %114, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @0, i32 0, i32 0)) + %115 = call i64 @get_int_from_creg(i1* %1) + call void @__quantum__rt__int_record_output(i64 %115, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @1, i32 0, i32 0)) + %116 = call i64 @get_int_from_creg(i1* %2) + call void @__quantum__rt__int_record_output(i64 %116, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @2, i32 0, i32 0)) + %117 = call i64 @get_int_from_creg(i1* %3) + call void @__quantum__rt__int_record_output(i64 %117, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @3, i32 0, i32 0)) + %118 = call i64 @get_int_from_creg(i1* %4) + call void @__quantum__rt__int_record_output(i64 %118, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @4, i32 0, i32 0)) + %119 = call i64 @get_int_from_creg(i1* %5) + call void @__quantum__rt__int_record_output(i64 %119, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @5, i32 0, i32 0)) + %120 = call i64 @get_int_from_creg(i1* %6) + call void @__quantum__rt__int_record_output(i64 %120, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @6, i32 0, i32 0)) + call void @__quantum__rt__tuple_end_record_output() + ret void +} + +declare i1 @get_creg_bit(i1*, i64) + +declare void @set_creg_bit(i1*, i64, i1) + +declare void @set_creg_to_int(i1*, i64) + +declare i1 @__quantum__qis__read_result__body(%Result*) + +declare i1* @create_creg(i64) + +declare i64 @get_int_from_creg(i1*) + +declare void @__quantum__rt__int_record_output(i64, i8*) + +declare void @__quantum__rt__tuple_start_record_output() + +declare void @__quantum__rt__tuple_end_record_output() + +declare void @__quantum__qis__x__body(%Qubit*) + +attributes #0 = { "entry_point" "num_required_qubits"="1" "num_required_results"="1" "output_labeling_schema" "qir_profiles"="custom" } + +!llvm.module.flags = !{!0, !1, !2, !3} + +!0 = !{i32 1, !"qir_major_version", i32 1} +!1 = !{i32 7, !"qir_minor_version", i32 0} +!2 = !{i32 1, !"dynamic_qubit_management", i1 false} +!3 = !{i32 1, !"dynamic_result_management", i1 false} diff --git a/tests/quantumgates_test.py b/tests/quantumgates_test.py index 21b8a536..602d501d 100644 --- a/tests/quantumgates_test.py +++ b/tests/quantumgates_test.py @@ -14,7 +14,7 @@ from utilities import check_qir_result # type: ignore -from pytket.circuit import Circuit # type: ignore +from pytket.circuit import Circuit from pytket.qir.conversion.api import QIRFormat, pytket_to_qir diff --git a/tests/wasm_test.py b/tests/wasm_test.py index c051fea0..3c14f3e9 100644 --- a/tests/wasm_test.py +++ b/tests/wasm_test.py @@ -15,7 +15,7 @@ from utilities import check_qir_result # type: ignore from pytket import wasm -from pytket.circuit import Circuit # type: ignore +from pytket.circuit import Circuit from pytket.qir.conversion.api import QIRFormat, pytket_to_qir