diff --git a/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h b/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h
index 3fd3c65f9e..d1e9351994 100644
--- a/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h
+++ b/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h
@@ -63,7 +63,7 @@
  * @note    Allowed values are 16, 32 or 64 bits.
  */
 #if !defined(CH_CFG_ST_RESOLUTION)
-#define CH_CFG_ST_RESOLUTION                32
+#define CH_CFG_ST_RESOLUTION                16
 #endif
 
 /**
@@ -100,7 +100,7 @@
  *          this value.
  */
 #if !defined(CH_CFG_ST_TIMEDELTA)
-#define CH_CFG_ST_TIMEDELTA                 0
+#define CH_CFG_ST_TIMEDELTA                 2
 #endif
 
 /** @} */
diff --git a/demos/WB32/RT-WB32F3G71-RTC/main.c b/demos/WB32/RT-WB32F3G71-RTC/main.c
index 534b0f94c2..44d63e6c2b 100644
--- a/demos/WB32/RT-WB32F3G71-RTC/main.c
+++ b/demos/WB32/RT-WB32F3G71-RTC/main.c
@@ -121,7 +121,7 @@ int main(void) {
   while (true){
     chThdSleepSeconds(2);
     rtcGetTime(&RTCD1, &timespec);
-    chprintf((BaseSequentialStream *)&SERIAL_DEBUG_DRIVER, 
+    chprintf((sequential_stream_i *)&SERIAL_DEBUG_DRIVER, 
              "lsi sleep %ds year = %d  month = %d  dstflag=%d  dayofweek = %d  day = %d  millisecond = %d\r\n",
              RTC_ALARMPERIOD, timespec.year, timespec.month, timespec.dstflag, timespec.dayofweek, timespec.day, timespec.millisecond);
     chThdSleepSeconds(3);
diff --git a/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h b/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h
index 3fd3c65f9e..d1e9351994 100644
--- a/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h
+++ b/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h
@@ -63,7 +63,7 @@
  * @note    Allowed values are 16, 32 or 64 bits.
  */
 #if !defined(CH_CFG_ST_RESOLUTION)
-#define CH_CFG_ST_RESOLUTION                32
+#define CH_CFG_ST_RESOLUTION                16
 #endif
 
 /**
@@ -100,7 +100,7 @@
  *          this value.
  */
 #if !defined(CH_CFG_ST_TIMEDELTA)
-#define CH_CFG_ST_TIMEDELTA                 0
+#define CH_CFG_ST_TIMEDELTA                 2
 #endif
 
 /** @} */
diff --git a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c
index 80ecc755b9..88aedefd81 100644
--- a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c
+++ b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c
@@ -243,22 +243,22 @@ void st_lld_serve_interrupt(void) {
 #if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
 #if ST_LLD_NUM_ALARMS > 1
   if ((sr & TIM_SR_CC2IF) != 0U) {
-    if (st_callbacks[2] != NULL) {
-      st_callbacks[0](1U);
+    if (st_callbacks[1] != NULL) {
+      st_callbacks[1](1U);
     }
   }
 #endif
 #if ST_LLD_NUM_ALARMS > 2
   if ((sr & TIM_SR_CC3IF) != 0U) {
     if (st_callbacks[2] != NULL) {
-      st_callbacks[1](2U);
+      st_callbacks[2](2U);
     }
   }
 #endif
 #if ST_LLD_NUM_ALARMS > 3
   if ((sr & TIM_SR_CC4IF) != 0U) {
-    if (st_callbacks[2] != NULL) {
-      st_callbacks[2](3U);
+    if (st_callbacks[3] != NULL) {
+      st_callbacks[3](3U);
     }
   }
 #endif
diff --git a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h
index 4ef27ace13..d148f55a61 100644
--- a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h
+++ b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h
@@ -154,7 +154,7 @@
 #define ST_LLD_NUM_ALARMS                      WB32_ST_ENFORCE_ALARMS
 #endif
 
-#elif OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
+#elif OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
 
 #define WB32_ST_USE_SYSTICK                    TRUE
 #define WB32_ST_USE_TIM2                       FALSE
@@ -225,8 +225,10 @@ static inline void st_lld_start_alarm(systime_t abstime) {
   WB32_ST_TIM->SR     = 0;
 #if ST_LLD_NUM_ALARMS == 1
   WB32_ST_TIM->DIER   = WB32_TIM_DIER_CC1IE;
+  WB32_ST_TIM->CCER   = WB32_TIM_CCER_CC1E;
 #else
   WB32_ST_TIM->DIER  |= WB32_TIM_DIER_CC1IE;
+  WB32_ST_TIM->CCER  |= WB32_TIM_CCER_CC1E;
 #endif
 }
 
@@ -239,8 +241,10 @@ static inline void st_lld_stop_alarm(void) {
 
 #if ST_LLD_NUM_ALARMS == 1
   WB32_ST_TIM->DIER = 0U;
+  WB32_ST_TIM->CCER = 0U;
 #else
   WB32_ST_TIM->DIER &= ~WB32_TIM_DIER_CC1IE;
+  WB32_ST_TIM->CCER &= ~WB32_TIM_CCER_CC1E;
 #endif
 }
 
@@ -300,6 +304,7 @@ static inline void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) {
   WB32_ST_TIM->CCR[alarm] = (uint32_t)abstime;
   WB32_ST_TIM->SR         = 0;
   WB32_ST_TIM->DIER      |= (WB32_TIM_DIER_CC1IE << alarm);
+  WB32_ST_TIM->CCER      |= (WB32_TIM_CCER_CC1E << (alarm * 4));
 }
 
 /**
@@ -314,6 +319,7 @@ static inline void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) {
 static inline void st_lld_stop_alarm_n(unsigned alarm) {
 
   WB32_ST_TIM->DIER &= ~(WB32_TIM_DIER_CC1IE << alarm);
+  WB32_ST_TIM->CCER &= ~(WB32_TIM_CCER_CC1E << (alarm * 4));
 }
 
 /**
diff --git a/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h b/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h
index e18ab027e4..a5ee268c49 100644
--- a/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h
+++ b/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h
@@ -99,13 +99,13 @@
 #define WB32_HAS_TIM3                          TRUE
 #define WB32_HAS_TIM4                          TRUE
 
-#define WB32_TIM1_IS_32BITS                    TRUE
+#define WB32_TIM1_IS_32BITS                    FALSE
 #define WB32_TIM1_CHANNELS                     4
-#define WB32_TIM2_IS_32BITS                    TRUE
+#define WB32_TIM2_IS_32BITS                    FALSE
 #define WB32_TIM2_CHANNELS                     4
-#define WB32_TIM3_IS_32BITS                    TRUE
+#define WB32_TIM3_IS_32BITS                    FALSE
 #define WB32_TIM3_CHANNELS                     4
-#define WB32_TIM4_IS_32BITS                    TRUE
+#define WB32_TIM4_IS_32BITS                    FALSE
 #define WB32_TIM4_CHANNELS                     4
 
 /* I2C attributes */
diff --git a/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h b/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h
index ab8d897657..519fe2d01b 100644
--- a/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h
+++ b/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h
@@ -99,13 +99,13 @@
 #define WB32_HAS_TIM3                          TRUE
 #define WB32_HAS_TIM4                          TRUE
 
-#define WB32_TIM1_IS_32BITS                    TRUE
+#define WB32_TIM1_IS_32BITS                    FALSE
 #define WB32_TIM1_CHANNELS                     4
-#define WB32_TIM2_IS_32BITS                    TRUE
+#define WB32_TIM2_IS_32BITS                    FALSE
 #define WB32_TIM2_CHANNELS                     4
-#define WB32_TIM3_IS_32BITS                    TRUE
+#define WB32_TIM3_IS_32BITS                    FALSE
 #define WB32_TIM3_CHANNELS                     4
-#define WB32_TIM4_IS_32BITS                    TRUE
+#define WB32_TIM4_IS_32BITS                    FALSE
 #define WB32_TIM4_CHANNELS                     4
 
 /* I2C attributes */