From 374133dfca2e757659b3927dc5b4bf44eb367378 Mon Sep 17 00:00:00 2001 From: liuhy Date: Tue, 7 May 2024 19:07:26 +0800 Subject: [PATCH 1/4] update library. --- os/common/ext/CMSIS/ES32/FS026/md/md_adc.c | 3 +- os/common/ext/CMSIS/ES32/FS026/md/md_i2c.c | 2 - os/common/ext/CMSIS/ES32/FS026/md/md_rcu.c | 89 +++++++++++++++---- .../ARMCMx/compilers/GCC/mk/startup_FS026.mk | 5 ++ 4 files changed, 79 insertions(+), 20 deletions(-) diff --git a/os/common/ext/CMSIS/ES32/FS026/md/md_adc.c b/os/common/ext/CMSIS/ES32/FS026/md/md_adc.c index 62b5d702fc..51a7233275 100644 --- a/os/common/ext/CMSIS/ES32/FS026/md/md_adc.c +++ b/os/common/ext/CMSIS/ES32/FS026/md/md_adc.c @@ -161,7 +161,7 @@ void md_adc_sequence_conversion(ADC_TypeDef *ADCx, md_adc_initial *ADC_InitStruc ErrorStatus md_adc_software_calibration(ADC_TypeDef *ADCx, md_adc_initial *ADC_InitStruct) { //ADC input APB clock 12MHz - uint8_t clkdiv; + uint8_t clkdiv = 1; uint16_t adc_data_1 = 0; uint16_t adc_data_15 = 0; @@ -277,6 +277,7 @@ ErrorStatus md_adc_optionbyte_calibration(ADC_TypeDef *ADCx, md_adc_initial *ADC md_adc_enable_adcpower(ADCx); md_adc_set_gain_factor(ADCx, adc_gain); md_adc_set_offset_factor(ADCx, adc_offset); + (void)ADC_InitStruct; return SUCCESS; } diff --git a/os/common/ext/CMSIS/ES32/FS026/md/md_i2c.c b/os/common/ext/CMSIS/ES32/FS026/md/md_i2c.c index 1250d912af..406fec98af 100644 --- a/os/common/ext/CMSIS/ES32/FS026/md/md_i2c.c +++ b/os/common/ext/CMSIS/ES32/FS026/md/md_i2c.c @@ -337,8 +337,6 @@ void md_i2c_slave_receive(I2C_TypeDef *I2Cx, uint32_t Num, uint8_t *rxbuf) while (!(md_i2c_is_active_flag_busy(I2Cx))); - printf("I2C1->STAT:%x\r\n", I2C1->STAT); - while (Num > 0) { while (!(md_i2c_is_active_flag_rxne(I2Cx))); diff --git a/os/common/ext/CMSIS/ES32/FS026/md/md_rcu.c b/os/common/ext/CMSIS/ES32/FS026/md/md_rcu.c index 3ec9800814..a058f372f8 100644 --- a/os/common/ext/CMSIS/ES32/FS026/md/md_rcu.c +++ b/os/common/ext/CMSIS/ES32/FS026/md/md_rcu.c @@ -151,39 +151,28 @@ void md_rcu_sys_init(RCU_TypeDef *rcu, md_rcu_init_typedef *RCU_InitStruct) { uint32_t PLL0_Frequency; uint32_t PLL0_Ref_Frequency; + uint32_t Current_Frequency; double fration; md_fc_set_read_latency(FC, MD_FC_WAIT_MORE_THAN_72Mhz); if (RCU_InitStruct->HS_Clock & RCU_CON_PLL0ON) md_rcu_enable_pll0(rcu); - else - md_rcu_disable_pll0(rcu); if (RCU_InitStruct->HS_Clock & RCU_CON_HRC48ON) md_rcu_enable_hrc48(rcu); - else - md_rcu_disable_hrc48(rcu); if (RCU_InitStruct->HS_Clock & RCU_CON_HOSCON) md_rcu_enable_hosc(rcu); - else - md_rcu_disable_hosc(rcu); if (RCU_InitStruct->HS_Clock & RCU_CON_HRCON) md_rcu_enable_hrc(rcu); - else - md_rcu_disable_hrc(rcu); if (RCU_InitStruct->LS_Clock & RCU_LCON_LOSCON) md_rcu_enable_losc(rcu); - else - md_rcu_disable_losc(rcu); if (RCU_InitStruct->LS_Clock & RCU_LCON_LRCON) md_rcu_enable_lrc(rcu); - else - md_rcu_disable_lrc(rcu); //make sure HOSC CLK Ready if ((RCU_InitStruct->HS_Clock & RCU_CON_HOSCON)) @@ -200,10 +189,7 @@ void md_rcu_sys_init(RCU_TypeDef *rcu, md_rcu_init_typedef *RCU_InitStruct) md_rcu_set_mco_div(rcu, RCU_InitStruct->Mpre); md_rcu_set_mco_source(rcu, RCU_InitStruct->Msw); - md_rcu_set_pclk_div(rcu, RCU_InitStruct->Ppre); - md_rcu_set_hclk_div(rcu, RCU_InitStruct->Hpre); - md_rcu_set_system_clock_source(rcu, RCU_InitStruct->Sw); - + switch ((RCU_InitStruct->PllSrc)) { case MD_RCU_PLLSRC_HRC : @@ -227,9 +213,58 @@ void md_rcu_sys_init(RCU_TypeDef *rcu, md_rcu_init_typedef *RCU_InitStruct) fration = (double)md_rcu_get_pll0_fn(rcu) + ((double)md_rcu_get_pll0_fk(rcu) / (1 << 19)); PLL0_Frequency = (uint32_t)(PLL0_Ref_Frequency * fration / (1 << (md_rcu_get_pll0_fm(rcu) + 3))); - /* System Frequency */ + /* + Determine whether it is a PLL that needs to be switched. + If it is a PLL, it is a frequency increase buffering process. + Otherwise, if it is not a PLL, it is a frequency decrease buffering process. + */ + if(RCU_InitStruct->Sw==MD_RCU_SW_SYSCLK_PLL0) + { + /* + PLL frequency rise buffer processing, the trigger environment is when it is necessary to + switch to the PLL frequency greater than or equal to 48M, if the current or set HCLK prescaler is 1, + the HCLK prescaler will be set to 2 first and then the system frequency will be switched. + After the switch is completed Will wait for 10us before resetting the HCLK prescaler. + */ + if((PLL0_Frequency>=48000000) && + ((md_rcu_get_hclk_div(RCU)==MD_RCU_HPRE_SYSCLK_DIV_1)|| + (RCU_InitStruct->Hpre==MD_RCU_HPRE_SYSCLK_DIV_1))) + { + SystemFrequency_AHBClk = PLL0_Frequency>>1; + md_tick_init(MD_SYSTICK_CLKSRC_HCLK); + md_rcu_set_hclk_div(rcu,MD_RCU_HPRE_SYSCLK_DIV_2); + md_rcu_set_system_clock_source(rcu, RCU_InitStruct->Sw); + md_tick_wait10us(1,1); + } + } + else + { + /* + PLL frequency reduction buffer processing, the triggering environment is when it is not + necessary to switch the PLL frequency and the current system frequency is higher than 48M, + the HCLK prescaler will first be set to 2 to reduce the HCLK speed, and then the system frequency + will be switched to a low frequency after the reduction is completed. Finally reset the + HCLK prescaler. + */ + Current_Frequency = md_rcu_get_current_system_frequency(RCU)*1000000; + if(Current_Frequency>=48000000) + { + SystemFrequency_AHBClk = Current_Frequency>>1; + md_tick_init(MD_SYSTICK_CLKSRC_HCLK); + md_rcu_set_hclk_div(rcu,MD_RCU_HPRE_SYSCLK_DIV_2); + md_tick_wait10us(1,1); + } + } + + md_rcu_set_system_clock_source(rcu, RCU_InitStruct->Sw); + + md_rcu_set_hclk_div(rcu, RCU_InitStruct->Hpre); + + md_rcu_set_pclk_div(rcu, RCU_InitStruct->Ppre); + switch (md_rcu_get_current_system_clock(rcu)) /* System clock switch(SYSCLK) */ { + case MD_RCU_SWS_SYSCLK_HRC: /*================= HRC selected as system clock*/ SystemCoreClock = (uint32_t)(__HRC); break; @@ -283,6 +318,26 @@ void md_rcu_sys_init(RCU_TypeDef *rcu, md_rcu_init_typedef *RCU_InitStruct) md_fc_set_read_latency(FC, MD_FC_WAIT_BETWEEN_24MHz_AND_48Mhz); else md_fc_set_read_latency(FC, MD_FC_WAIT_LESS_THAN_24MHz); + + if (!(RCU_InitStruct->HS_Clock & RCU_CON_PLL0ON)) + md_rcu_disable_pll0(rcu); + + if (!(RCU_InitStruct->HS_Clock & RCU_CON_HRC48ON)) + md_rcu_disable_hrc48(rcu); + + if (!(RCU_InitStruct->HS_Clock & RCU_CON_HOSCON)) + md_rcu_disable_hosc(rcu); + + if (!(RCU_InitStruct->HS_Clock & RCU_CON_HRCON)) + md_rcu_disable_hrc(rcu); + + if (!(RCU_InitStruct->LS_Clock & RCU_LCON_LOSCON)) + md_rcu_disable_losc(rcu); + + if (!(RCU_InitStruct->LS_Clock & RCU_LCON_LRCON)) + md_rcu_disable_lrc(rcu); + + md_tick_init(MD_SYSTICK_CLKSRC_HCLK); } /** diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_FS026.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_FS026.mk index 00335d09a4..045883cc7a 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_FS026.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_FS026.mk @@ -6,6 +6,11 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_rcu.c \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_gpio.c \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_uart.c \ + $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_spi.c \ + $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_adc.c \ + $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_i2c.c \ + $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_wwdt.c \ + $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/md/md_dma.c \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/ES32/FS026/ald/ald_usb.c STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \ From 9a62c298d11de85ba6bb709c1196aa3efd558972 Mon Sep 17 00:00:00 2001 From: liuhy Date: Tue, 7 May 2024 19:13:19 +0800 Subject: [PATCH 2/4] update hal. --- os/hal/ports/ES32/FS026/hal_lld.c | 100 ++++------- os/hal/ports/ES32/FS026/hal_lld.h | 49 +++++- os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.c | 54 +++--- os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.h | 25 ++- os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.c | 161 +++++++++++++++++- os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.h | 24 ++- os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.c | 132 +++++++++++--- os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.h | 10 +- 8 files changed, 411 insertions(+), 144 deletions(-) diff --git a/os/hal/ports/ES32/FS026/hal_lld.c b/os/hal/ports/ES32/FS026/hal_lld.c index a0cea4cc50..ca62a745b7 100644 --- a/os/hal/ports/ES32/FS026/hal_lld.c +++ b/os/hal/ports/ES32/FS026/hal_lld.c @@ -59,64 +59,39 @@ unsigned int PLL0Frequency; /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ - -void HardFault_Handler(void) +#if ES32_NO_INIT +__attribute__((weak)) void hal_lld_init(void) { - while(1); + } - -uint32_t g_es_systick_time = 0U; - -int es_test_printf(char *pBuffer, int size) +#else +void HardFault_Handler(void) { - for (int i = 0; i < size; i++) - { - while (!((UART1->STAT) & (UART_STAT_TFEMPTY))); // Tx FIFO empty - UART1->TXDATA = pBuffer[i]; // Sent byte - } - - return size; -} - -void gpio_config(void){ - md_gpio_inittypedef gpiox; - /* config gpiob pin6 (Tx) */ - gpiox.Pin = MD_GPIO_PIN_6; - gpiox.Mode = MD_GPIO_MODE_FUNCTION; - gpiox.OutputType = MD_GPIO_OUTPUT_PUSHPULL; - gpiox.Pull = MD_GPIO_PULL_FLOATING; - gpiox.OutDrive = MD_GPIO_DRIVING_8MA; - gpiox.Function = MD_GPIO_AF2; - md_gpio_init(GPIOB, &gpiox); - /* config gpiob pin7 (Rx) */ - gpiox.Pin = MD_GPIO_PIN_7; - gpiox.Mode = MD_GPIO_MODE_FUNCTION; - gpiox.OutputType = MD_GPIO_OUTPUT_PUSHPULL; - gpiox.Pull = MD_GPIO_PULL_UP; - gpiox.OutDrive = MD_GPIO_DRIVING_8MA; - gpiox.Function = MD_GPIO_AF2; - md_gpio_init(GPIOB, &gpiox); + while(1); } -md_rcu_init_typedef rcu_initStruct = /**< RCU init structure */ +const md_rcu_init_typedef rcu_initStruct = /**< RCU init structure */ { MD_RCU_MPRE_MCO_DIV1, MD_RCU_MSW_MCO_DISABLE, - MD_RCU_PLLSRC_HRC48, - MD_RCU_PLLCLK_72M, - MD_RCU_PPRE_HCLK_DIV_1, - MD_RCU_HPRE_SYSCLK_DIV_1, - MD_RCU_SW_SYSCLK_PLL0, - (RCU_CON_HRCON | RCU_CON_PLL0ON | RCU_CON_HRC48ON_MSK), -}; - -md_uart_init_typedef uart_initStruct = /**< UART init structure */ -{ - (921600U), - MD_UART_LCON_LSB_FIRST, - MD_UART_LCON_PS_NONE, - MD_UART_LCON_STOP_1, - MD_UART_LCON_DLS_8, + ES32_PLL_SOURSE_SELECT, + ES32_PLL_CLK_FREQ, + ES32_BUS_DIV_PPRE, + ES32_BUS_DIV_HPRE, + ES32_SYSCLK_SOURSE_SELECT, +#if ES32_PLL_CLK_EN +#if ES32_HOSC_CLK_EN + (RCU_CON_HRCON | RCU_CON_HRC48ON_MSK | RCU_CON_PLL0ON | RCU_CON_HOSCON), +#else + (RCU_CON_HRCON | RCU_CON_HRC48ON_MSK | RCU_CON_PLL0ON), +#endif +#else +#if ES32_HOSC_CLK_EN + (RCU_CON_HRCON | RCU_CON_HRC48ON_MSK | RCU_CON_HOSCON), +#else + (RCU_CON_HRCON | RCU_CON_HRC48ON_MSK), +#endif +#endif }; /** @@ -127,26 +102,23 @@ md_uart_init_typedef uart_initStruct = /**< UART init structure */ void hal_lld_init(void) { __disable_irq(); - md_rcu_pll0_init(RCU, &rcu_initStruct); - md_rcu_sys_init(RCU, &rcu_initStruct); +#if ES32_PLL_CLK_EN + md_rcu_pll0_init(RCU, (md_rcu_init_typedef*)(&rcu_initStruct)); +#endif + md_rcu_sys_init(RCU, (md_rcu_init_typedef*)(&rcu_initStruct)); md_rcu_enable_gpioa(RCU); md_rcu_enable_gpiob(RCU); md_rcu_enable_gpioc(RCU); md_rcu_enable_gpiod(RCU); - md_rcu_enable_uart1(RCU); md_rcu_enable_usb(RCU); - gpio_config(); - -// NVIC->ICER[0] = 0xFFFFFFFFUL; -// md_tick_init(MD_SYSTICK_CLKSRC_HCLK); -// md_mcu_irq_config(UART1_IRQn, 2, ENABLE); - md_uart_init(UART1, &uart_initStruct); -// md_uart_enable_it_rfnempty(UART1); - +#if ES32_USE_USB_SOF_TRIM_HRC48 + /*Using USB_SOF to calibrate the internal clock*/ + md_rcu_enable_csu(RCU); + CSU->CON |= CSU_CON_AUTOEN_MSK; + CSU->CON |= CSU_CON_CNTEN_MSK; +#endif __enable_irq(); - - es_test_printf("hal_lld_init ok\r\n",sizeof("hal_lld_init ok\r\n")); - } +#endif /** @} */ diff --git a/os/hal/ports/ES32/FS026/hal_lld.h b/os/hal/ports/ES32/FS026/hal_lld.h index dc4fa2a6cd..ed25e7b2e8 100644 --- a/os/hal/ports/ES32/FS026/hal_lld.h +++ b/os/hal/ports/ES32/FS026/hal_lld.h @@ -48,6 +48,53 @@ * @name PLATFORM configuration options * @{ */ +/** + * @brief Disables the PWR/RCC initialization in the HAL. + */ +#if !defined(ES32_NO_INIT) || defined(__DOXYGEN__) +#define ES32_NO_INIT FALSE +#endif + +/** + * @brief system_clk select. + */ +#if !defined(ES32_SYSCLK_SOURSE_SELECT) || defined(__DOXYGEN__) +#define ES32_SYSCLK_SOURSE_SELECT MD_RCU_SW_SYSCLK_HRC48 +#endif + +/** + * @brief external clk config. + */ +#if !defined(ES32_HOSC_CLK_EN) || defined(__DOXYGEN__) +#define ES32_HOSC_CLK_EN FALSE +#endif + +/** + * @brief pll clk config. + */ +#if !defined(ES32_PLL_CLK_EN) || defined(__DOXYGEN__) +#define ES32_PLL_CLK_EN FALSE +#endif + +#if !defined(ES32_PLL_SOURSE_SELECT) || defined(__DOXYGEN__) +#define ES32_PLL_SOURSE_SELECT MD_RCU_PLLSRC_HRC48 +#endif + +#if !defined(ES32_PLL_CLK_FREQ) || defined(__DOXYGEN__) +#define ES32_PLL_CLK_FREQ MD_RCU_PLLCLK_72M +#endif + +/** + * @brief bus clk config. + */ +#if !defined(ES32_BUS_DIV_HPRE) || defined(__DOXYGEN__) +#define ES32_BUS_DIV_HPRE MD_RCU_HPRE_SYSCLK_DIV_1 +#endif + +#if !defined(ES32_BUS_DIV_PPRE) || defined(__DOXYGEN__) +#define ES32_BUS_DIV_PPRE MD_RCU_PPRE_HCLK_DIV_1 +#endif + /** @} */ /*===========================================================================*/ @@ -70,7 +117,7 @@ extern "C" { #endif void hal_lld_init(void); -void ht32_clock_init(void); +void es32_clock_init(void); #ifdef __cplusplus } #endif diff --git a/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.c index c3db92cac7..408e6b7f53 100644 --- a/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.c +++ b/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.c @@ -35,16 +35,18 @@ /* Driver exported variables. */ /*===========================================================================*/ -/** - * @brief SPI0 driver identifier. - */ -#if (ES32_SPI_USE_SPI0 == TRUE) || defined(__DOXYGEN__) - SPIDriver SPID0; + +/** @brief SPI1 driver identifier.*/ +#if STM32_SPI_USE_SPI1 || defined(__DOXYGEN__) +SPIDriver SPID1; #endif -#if (ES32_SPI_USE_SPI1 == TRUE) || defined(__DOXYGEN__) - SPIDriver SPID1; + +/** @brief SPI2 driver identifier.*/ +#if STM32_SPI_USE_SPI2 || defined(__DOXYGEN__) +SPIDriver SPID2; #endif + /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ @@ -53,7 +55,7 @@ /* Driver local functions. */ /*===========================================================================*/ -#if (ES32_SPI_USE_SPI0 == TRUE) || (ES32_SPI_USE_SPI1 == TRUE) || defined(__DOXYGEN__) +#if (ES32_SPI_USE_SPI1 == TRUE) || (ES32_SPI_USE_SPI2 == TRUE) || defined(__DOXYGEN__) static void spi_lld_rx(SPIDriver *const spip) { uint32_t fd; @@ -184,20 +186,20 @@ void spi_lld_start(SPIDriver *spip) if (spip->state == SPI_STOP) { /* Enables the peripheral.*/ -#if ES32_SPI_USE_SPI0 == TRUE - if (&SPID0 == spip) +#if ES32_SPI_USE_SPI1 == TRUE + if (&SPID1 == spip) { - CKCU->APBCCR0 |= CKCU_APBCCR0_SPI0EN; - nvicEnableVector(SPI0_IRQn, ES32_SPI0_IRQ_PRIORITY); + md_rcu_enable_spi1(RCU); + nvicEnableVector(SPI1_IRQn, ES32_SPI1_IRQ_PRIORITY); } #endif -#if ES32_SPI_USE_SPI1 == TRUE +#if ES32_SPI_USE_SPI2 == TRUE - if (&SPID1 == spip) + if (&SPID2 == spip) { - CKCU->APBCCR0 |= CKCU_APBCCR0_SPI1EN; - nvicEnableVector(SPI1_IRQn, ES32_SPI1_IRQ_PRIORITY); + md_rcu_enable_spi2(RCU); + nvicEnableVector(SPI2_IRQn, ES32_SPI2_IRQ_PRIORITY); } #endif @@ -224,22 +226,18 @@ void spi_lld_stop(SPIDriver *spip) if (spip->state == SPI_READY) { /* Disables the peripheral.*/ -#if ES32_SPI_USE_SPI0 == TRUE - if (&SPID0 == spip) +#if ES32_SPI_USE_SPI1 == TRUE + if (&SPID1 == spip) { - RSTCU->APBPRSTR0 = RSTCU_APBPRSTR0_SPI0RST; - CKCU->APBCCR0 &= ~CKCU_APBCCR0_SPI0EN; - nvicDisableVector(SPI0_IRQn); + nvicDisableVector(SPI1_IRQn); } #endif -#if ES32_SPI_USE_SPI1 == TRUE +#if ES32_SPI_USE_SPI2 == TRUE - if (&SPID1 == spip) + if (&SPID2 == spip) { - RSTCU->APBPRSTR0 = RSTCU_APBPRSTR0_SPI1RST; - CKCU->APBCCR0 &= ~CKCU_APBCCR0_SPI1EN; - nvicDisableVector(SPI1_IRQn); + nvicDisableVector(SPI2_IRQn); } #endif @@ -255,7 +253,7 @@ void spi_lld_stop(SPIDriver *spip) */ void spi_lld_select(SPIDriver *spip) { - spip->SPI->CR0 |= SPI_CR0_SSELC; + /*hard control*/ } /** @@ -268,7 +266,7 @@ void spi_lld_select(SPIDriver *spip) */ void spi_lld_unselect(SPIDriver *spip) { - spip->SPI->CR0 &= ~SPI_CR0_SSELC; + /*hard control*/ } /** diff --git a/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.h index 2dcab582ca..44e7bca4be 100644 --- a/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.h +++ b/os/hal/ports/ES32/LLD/SPIv1/hal_spi_lld.h @@ -40,15 +40,21 @@ * @{ */ /** - * @brief SPI0 driver enable switch. + * @brief SPI1 driver enable switch. * @details If set to @p TRUE the support for SPI0 is included. * @note The default is @p FALSE. */ -#if !defined(ES32_SPI_USE_SPI0) || defined(__DOXYGEN__) - #define ES32_SPI_USE_SPI0 FALSE +#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__) +#define STM32_SPI_USE_SPI1 FALSE #endif -#if !defined(ES32_SPI_USE_SPI1) || defined(__DOXYGEN__) - #define ES32_SPI_USE_SPI1 FALSE + +/** + * @brief SPI2 driver enable switch. + * @details If set to @p TRUE the support for SPI2 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__) +#define STM32_SPI_USE_SPI2 FALSE #endif /** @} */ @@ -88,11 +94,12 @@ /* External declarations. */ /*===========================================================================*/ -#if (ES32_SPI_USE_SPI0 == TRUE) && !defined(__DOXYGEN__) - extern SPIDriver SPID0; +#if STM32_SPI_USE_SPI1 && !defined(__DOXYGEN__) +extern SPIDriver SPID1; #endif -#if (ES32_SPI_USE_SPI1 == TRUE) && !defined(__DOXYGEN__) - extern SPIDriver SPID1; + +#if STM32_SPI_USE_SPI2 && !defined(__DOXYGEN__) +extern SPIDriver SPID2; #endif #ifdef __cplusplus diff --git a/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.c b/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.c index 1a22d76c1e..77586b6c4a 100644 --- a/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.c +++ b/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.c @@ -34,6 +34,20 @@ /* Driver exported variables. */ /*===========================================================================*/ +/** @brief UART serial driver identifier.*/ +#if ES32_SERIAL_USE_UART1 || defined(__DOXYGEN__) +SerialDriver SD1; +#endif +#if ES32_SERIAL_USE_UART2 || defined(__DOXYGEN__) +SerialDriver SD2; +#endif +#if ES32_SERIAL_USE_UART3 || defined(__DOXYGEN__) +SerialDriver SD3; +#endif +#if ES32_SERIAL_USE_UART4 || defined(__DOXYGEN__) +SerialDriver SD4; +#endif + /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ @@ -47,26 +61,129 @@ static const SerialConfig default_config = {SERIAL_DEFAULT_BITRATE}; /* Driver local functions. */ /*===========================================================================*/ -static void load(SerialDriver *sdp) +static void serialInterrupt(SerialDriver *pSd) { - (void)sdp; + uint32_t isr_ifm = (pSd->usart)->IFM; + + (pSd->usart)->ICR = isr_ifm; + + while(((pSd->usart)->STAT) & (UART_STAT_RFNEMPTY_MSK)) + { + sdIncomingDataI(sdp, (pSd->usart)->RXDATA); + } + + if(isr_ifm & UART_IFM_TXE_MSK) + { + msg_t b; + osalSysLockFromISR(); + b = oqGetI(&sdp->oqueue); + if (b < MSG_OK) { + chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); + (pSd->usart)->IDR &= ~(UART_IER_TXE); + } + else + (pSd->usart)->IXDATA = b; + osalSysUnlockFromISR(); + } } -static void serialInterrupt(SerialDriver *pSd) +md_uart_init_typedef uart_initStruct = /**< UART init structure */ { - (void)pSd; -} + MD_UART_BAUDRATE_115200, + MD_UART_LCON_LSB_FIRST, + MD_UART_LCON_PS_NONE, + MD_UART_LCON_STOP_1, + MD_UART_LCON_DLS_8, +}; static void usartInit(SerialDriver *sdp, const SerialConfig *config) { - (void)sdp; - (void)config; + uart_initStruct.BaudRate = config->speed; + md_uart_init(sdp->usart, &uart_initStruct); + (sdp->usart)->IER = UART_IER_RFNEMPTY; +} + + +#if ES32_SERIAL_USE_UART1 || defined(__DOXYGEN__) +static void notify1(io_queue_t *qp) { + + (void)qp; + UART1->IER = UART_IER_TXE; +} +#endif + +#if ES32_SERIAL_USE_UART2 || defined(__DOXYGEN__) +static void notify2(io_queue_t *qp) { + + (void)qp; + UART2->IER = UART_IER_TXE; +} +#endif + +#if ES32_SERIAL_USE_UART3 || defined(__DOXYGEN__) +static void notify3(io_queue_t *qp) { + + (void)qp; + UART3->IER = UART_IER_TXE; +} +#endif + +#if ES32_SERIAL_USE_UART4 || defined(__DOXYGEN__) +static void notify4(io_queue_t *qp) { + + (void)qp; + UART4->IER = UART_IER_TXE; } +#endif + /*===========================================================================*/ /* Driver interrupt handlers. */ /*===========================================================================*/ +#if ES32_SERIAL_USE_UART1 || defined(__DOXYGEN__) +//UART1_HANDLER +OSAL_IRQ_HANDLER(VectorAC) { + + OSAL_IRQ_PROLOGUE(); + + serialInterrupt(&SD1); + + OSAL_IRQ_EPILOGUE(); +} +#endif +#if ES32_SERIAL_USE_UART2 || defined(__DOXYGEN__) +//UART2_HANDLER +OSAL_IRQ_HANDLER(VectorB0) { + + OSAL_IRQ_PROLOGUE(); + + serialInterrupt(&SD2); + + OSAL_IRQ_EPILOGUE(); +} +#endif +#if ES32_SERIAL_USE_UART3 || defined(__DOXYGEN__) +//UART3_HANDLER +OSAL_IRQ_HANDLER(VectorB4) { + + OSAL_IRQ_PROLOGUE(); + serialInterrupt(&SD3); + + OSAL_IRQ_EPILOGUE(); +} +#endif +#if ES32_SERIAL_USE_UART4 || defined(__DOXYGEN__) +//UART4_HANDLER +OSAL_IRQ_HANDLER(VectorB8) { + + OSAL_IRQ_PROLOGUE(); + + serialInterrupt(&SD4); + + OSAL_IRQ_EPILOGUE(); +} +#endif /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ @@ -78,6 +195,34 @@ static void usartInit(SerialDriver *sdp, const SerialConfig *config) */ void sd_lld_init(void) { +#if ES32_SERIAL_USE_UART1 + md_rcu_enable_uart1(RCU); + sdObjectInit(&SD1, NULL, notify1); + SD1.usart = UART1; + nvicEnableVector(UART1_IRQn, ES32_SERIAL_UART1_PRIORITY); +#endif + +#if ES32_SERIAL_USE_UART2 + md_rcu_enable_uart2(RCU); + sdObjectInit(&SD2, NULL, notify2); + SD2.usart = UART2; + nvicEnableVector(UART2_IRQn, ES32_SERIAL_UART2_PRIORITY); +#endif + +#if ES32_SERIAL_USE_UART3 + md_rcu_enable_uart3(RCU); + sdObjectInit(&SD3, NULL, notify3); + SD3.usart = UART3; + nvicEnableVector(UART3_IRQn, ES32_SERIAL_UART3_PRIORITY); +#endif + +#if ES32_SERIAL_USE_UART4 + md_rcu_enable_uart4(RCU); + sdObjectInit(&SD4, NULL, notify4); + SD4.usart = UART4; + nvicEnableVector(UART4_IRQn, ES32_SERIAL_UART4_PRIORITY); +#endif + } @@ -99,7 +244,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) /** * @brief Low level serial driver stop. - * @details De-initializes the USART, stops the associated clock, resets the + * @details De-initializes the UART, stops the associated clock, resets the * interrupt vector. * * @param[in] sdp pointer to a @p SerialDriver object diff --git a/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.h b/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.h index 6ff1a2525f..85dc917d74 100644 --- a/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.h +++ b/os/hal/ports/ES32/LLD/UARTv1/hal_serial_lld.h @@ -40,16 +40,16 @@ * @{ */ /** - * @brief USART0 driver enable switch. - * @details If set to @p TRUE the support for USART0 is included. + * @brief UART0 driver enable switch. + * @details If set to @p TRUE the support for UART0 is included. * @note The default is @p FALSE. */ -#if !defined(PLATFORM_SERIAL_USE_USART0) || defined(__DOXYGEN__) - #define PLATFORM_SERIAL_USE_USART0 FALSE +#if !defined(ES32_SERIAL_USE_UART1) || defined(__DOXYGEN__) + #define ES32_SERIAL_USE_UART1 FALSE #endif -#if !defined(PLATFORM_SERIAL_USE_USART1) || defined(__DOXYGEN__) - #define PLATFORM_SERIAL_USE_USART1 FALSE +#if !defined(ES32_SERIAL_USE_UART1) || defined(__DOXYGEN__) + #define ES32_SERIAL_USE_UART2 FALSE #endif /** @} */ @@ -104,12 +104,18 @@ typedef struct /* External declarations. */ /*===========================================================================*/ -#if (ES32_SERIAL_USE_USART0 == TRUE) && !defined(__DOXYGEN__) - extern SerialDriver SD0; -#endif #if (ES32_SERIAL_USE_USART1 == TRUE) && !defined(__DOXYGEN__) extern SerialDriver SD1; #endif +#if (ES32_SERIAL_USE_USART2 == TRUE) && !defined(__DOXYGEN__) + extern SerialDriver SD2; +#endif +#if (ES32_SERIAL_USE_USART3 == TRUE) && !defined(__DOXYGEN__) + extern SerialDriver SD3; +#endif +#if (ES32_SERIAL_USE_USART4 == TRUE) && !defined(__DOXYGEN__) + extern SerialDriver SD4; +#endif #ifdef __cplusplus extern "C" { diff --git a/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.c b/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.c index 20e24bea30..50369d76e7 100644 --- a/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.c +++ b/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.c @@ -52,11 +52,6 @@ /** True if the endpoint is an OUT endpoint */ #define USB_EP_DIR_IS_OUT(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_OUT) - -extern char g_num_to_char_tx_buf[32]; -extern const char g_num_to_char_table[16]; -extern void ffffff(uint32_t data); - /** * @brief EP0 state. * @note It is an union because IN and OUT endpoints are never used at the @@ -154,6 +149,16 @@ struct musb_udc { struct musb_udc g_musb_udc; static volatile uint8_t usb_ep0_state = USB_EP0_STATE_SETUP; volatile bool zlp_flag = 0; +#if !defined(ES_NO_USB_SUSPEND) +volatile uint16_t g_es_frame_id_last = 0U; +volatile uint16_t g_es_frame_id_need_chang_times = 20U; +uint8_t g_es_usb_state = 0U; + +#if !defined(ES_NO_USB_SUSPEND_CB) +__attribute__((weak)) void es_usb_suspend_wakeup_init_user(void) {} +__attribute__((weak)) void es_usb_suspend_power_down_user(void) {} +#endif +#endif /*===========================================================================*/ /* Driver local definitions. */ @@ -430,12 +435,6 @@ int usbd_ep_start_write(const uint8_t ep, const uint8_t *data, uint32_t data_len { uint8_t ep_idx = USB_EP_GET_IDX(ep); uint8_t old_ep_idx; -// uint32_t wait_cnt; - -// if(ep_idx == 1) -// { -// ep_idx = 1; -// } if (!g_musb_udc.in_ep[ep_idx].ep_enable) return -2; @@ -650,7 +649,9 @@ OSAL_IRQ_HANDLER(VectorBC) uint8_t ep_idx; uint16_t write_count, read_count; uint8_t status; - +#if !defined(ES_NO_USB_SUSPEND) + uint16_t frame_id = ((USB->FRAME2) << 8) | (USB->FRAME1); +#endif USBDriver *usbp = &USBD1; OSAL_IRQ_PROLOGUE(); @@ -658,6 +659,10 @@ OSAL_IRQ_HANDLER(VectorBC) status = USB->IFM & 0x7F; USB->ICR = status; +#if !defined(ES_NO_USB_SUSPEND) + if(((USB->POWER)&ALD_USB_POWER_SUSPENDEN) == 0) + USB->POWER |= ALD_USB_POWER_SUSPENDEN; +#endif old_ep_idx = musb_get_active_ep(); /* Receive a reset signal from the USB bus */ @@ -683,6 +688,37 @@ OSAL_IRQ_HANDLER(VectorBC) if (status & (USB_IFM_SOFIFM_MSK)) { +#if !defined(ES_NO_USB_SUSPEND) + if(g_es_frame_id_need_chang_times) + { + if(frame_id != g_es_frame_id_last) + { + g_es_frame_id_last = frame_id; + g_es_frame_id_need_chang_times--; + } + else + { + g_es_frame_id_need_chang_times = 10; + } + } + else + { + if(((USB->POWER)&0x3) == 0x1) //suspend_en = 1,suspend_flag = 0 + { + USB->IDR = ALD_USB_INTCTRL_SOF; + + if(g_es_usb_state == 0) + { + g_es_usb_state = 1; + _usb_wakeup(usbp); + + #if !defined(ES_NO_USB_SUSPEND_CB) + es_usb_suspend_wakeup_init_user(); + #endif + } + } + } +#endif // _usb_isr_invoke_sof_cb(usbp); } @@ -700,7 +736,21 @@ OSAL_IRQ_HANDLER(VectorBC) if (status & USB_IFM_SUSPDIFM_MSK) { -// _usb_suspend(usbp); +#if !defined(ES_NO_USB_SUSPEND) + g_es_frame_id_need_chang_times = 10; + USB->IER = ALD_USB_INTCTRL_SOF; + + if(g_es_usb_state) + { + g_es_usb_state = 0; + + #if !defined(ES_NO_USB_SUSPEND_CB) + es_usb_suspend_power_down_user(); + #endif + + _usb_suspend(usbp); + } +#endif } while (USB->TXIFM) @@ -736,9 +786,9 @@ OSAL_IRQ_HANDLER(VectorBC) { USB->TXIDR = 1U << ep_idx; - /* Transfer completed, invokes the callback.*/ - usbp->epc[ep_idx]->in_state->txcnt = g_musb_udc.in_ep[ep_idx].actual_xfer_len; - _usb_isr_invoke_in_cb(usbp, ep_idx); + /* Transfer completed, invokes the callback.*/ + usbp->epc[ep_idx]->in_state->txcnt = g_musb_udc.in_ep[ep_idx].actual_xfer_len; + _usb_isr_invoke_in_cb(usbp, ep_idx); } else { @@ -833,10 +883,13 @@ void usb_lld_start(USBDriver *usbp) /* Enable software connect */ for(i = 0;i < 9999;i++){} - - - /* Enable USB interrupts */ - ald_usb_int_enable(ALD_USB_INTCTRL_RESET | ALD_USB_INTCTRL_DISCONNECT | ALD_USB_INTCTRL_RESUME |ALD_USB_INTCTRL_SUSPEND);/*未开启SOF中断*/ + + /* Enable USB interrupts */ +#if !defined(ES_NO_USB_SUSPEND) + ald_usb_int_enable(ALD_USB_INTCTRL_RESET | ALD_USB_INTCTRL_DISCONNECT | ALD_USB_INTCTRL_RESUME |ALD_USB_INTCTRL_SUSPEND | ALD_USB_INTCTRL_SOF); +#else + ald_usb_int_enable(ALD_USB_INTCTRL_RESET | ALD_USB_INTCTRL_DISCONNECT | ALD_USB_INTCTRL_RESUME |ALD_USB_INTCTRL_SUSPEND);/*δSOFж*/ +#endif ald_usb_int_enable_ep(ALD_USB_INTEP_ALL); ald_usb_int_register(); } @@ -920,7 +973,7 @@ void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) } if (ep_idx > (ES_USB_PERH_EP_MAX_INDEX)) { - es_test_printf("Ep addr overflow\r\n",sizeof("Ep addr overflow\r\n")); + /*Ep addr overflow*/ return; } @@ -992,7 +1045,7 @@ void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) */ void usb_lld_disable_endpoints(USBDriver *usbp) { - es_test_printf("usb_lld_disable_endpoints\r\n",sizeof("usb_lld_disable_endpoints\r\n")); + } /** @@ -1009,8 +1062,21 @@ void usb_lld_disable_endpoints(USBDriver *usbp) */ usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep) { + if (!g_musb_udc.out_ep[ep].ep_enable) + return EP_STATUS_DISABLED; - es_test_printf("usb_lld_get_status_out\r\n",sizeof("usb_lld_get_status_out\r\n")); + USB->INDEX = ep; + + if(ep == 0) + { + if((USB->CSR0L_TXCSRL) & (USB_CSR0L_STALL_MSK)) + return EP_STATUS_STALLED; + } + else + { + if((USB->RXCSRL) & (USB_RXCSRL_STALL_MSK)) + return EP_STATUS_STALLED; + } return EP_STATUS_ACTIVE; } @@ -1029,7 +1095,21 @@ usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep) */ usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep) { - es_test_printf("usb_lld_get_status_in\r\n",sizeof("usb_lld_get_status_in\r\n")); + if (!g_musb_udc.in_ep[ep].ep_enable) + return EP_STATUS_DISABLED; + + USB->INDEX = ep; + + if(ep == 0) + { + if((USB->CSR0L_TXCSRL) & (USB_CSR0L_STALL_MSK)) + return EP_STATUS_STALLED; + } + else + { + if((USB->CSR0L_TXCSRL) & (USB_TXCSRL_STALL_MSK)) + return EP_STATUS_STALLED; + } return EP_STATUS_ACTIVE; } @@ -1072,6 +1152,9 @@ void usb_lld_start_out(USBDriver *usbp, usbep_t ep) usbd_ep_start_read(ep,osp->rxbuf,osp->rxsize); } +/*user_callback*/ +__attribute__((weak)) void es_usb_lld_start_in_user_callback(uint8_t ep,uint8_t * buf , uint32_t len) {} + /** * @brief Starts a transmit operation on an IN endpoint. * @@ -1084,6 +1167,7 @@ void usb_lld_start_in(USBDriver *usbp, usbep_t ep) { USBInEndpointState *isp = usbp->epc[ep]->in_state; usbd_ep_start_write(ep,isp->txbuf,isp->txsize); + es_usb_lld_start_in_user_callback(ep,(uint8_t*)(isp->txbuf),isp->txsize); } /** diff --git a/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.h b/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.h index 6bc3988e0e..b4a25aff8f 100644 --- a/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.h +++ b/os/hal/ports/ES32/LLD/USBv1/hal_usb_lld.h @@ -356,7 +356,15 @@ struct USBDriver */ #define usb_lld_wakeup_host(usbp) \ do { \ - \ + if(((USB->POWER)&ALD_USB_POWER_SUSPENDEN) == 0) \ + USB->POWER |= ALD_USB_POWER_SUSPENDEN; \ + \ + if(((USB->POWER)&ALD_USB_POWER_SUSPEND)) \ + { \ + USB->POWER |= 0x4;/*md_usb_enable_resume(USB);*/ \ + chThdSleepMilliseconds(11);/*wait_ms(11);*/ \ + USB->POWER &= 0xFB;/*md_usb_disable_resume(USB);*/ \ + } \ } while (FALSE) From 31071d11a54cdd7696eb96bf016b351966fe9d7c Mon Sep 17 00:00:00 2001 From: liuhy Date: Tue, 7 May 2024 19:14:17 +0800 Subject: [PATCH 3/4] update demo. --- demos/ES32/FS026/cfg/mcuconf.h | 128 +++++++++++++++++++++++---------- 1 file changed, 89 insertions(+), 39 deletions(-) diff --git a/demos/ES32/FS026/cfg/mcuconf.h b/demos/ES32/FS026/cfg/mcuconf.h index a6c050d0b5..a22445513a 100644 --- a/demos/ES32/FS026/cfg/mcuconf.h +++ b/demos/ES32/FS026/cfg/mcuconf.h @@ -17,6 +17,8 @@ #ifndef MCUCONF_H #define MCUCONF_H +#define ES32_FS026_MCUCONF + /** * @name Internal clock sources * @{ @@ -28,22 +30,64 @@ /* * HAL driver system settings. */ -#define ES32_NO_INIT FALSE -#define ES32_MHSI_ENABLED TRUE -#define ES32_FHSI_ENABLED FALSE -#define ES32_LSI_ENABLED FALSE -#define ES32_HSE_ENABLED TRUE -#define ES32_LSE_ENABLED FALSE -#define ES32_PLL_ENABLED TRUE -#define ES32_MAINCLKSRC ES32_MAINCLKSRC_PLL -#define ES32_HSE_STATE ANCTL_HSECR0_HSEON -#define ES32_PLLSRC ES32_PLLSRC_HSE -#define ES32_PLLDIV_VALUE 2 -#define ES32_PLLMUL_VALUE 12 // The allowed range is 12,16,20,24. -#define ES32_HPRE 1 -#define ES32_PPRE1 1 -#define ES32_PPRE2 1 -#define ES32_USBPRE ES32_USBPRE_DIV1P5 +#define ES32_NO_INIT FALSE + +/*system_clk select + +MD_RCU_SW_SYSCLK_HRC = HRC selected as system clock +MD_RCU_SW_SYSCLK_HOSC = HOSC selected as system clock +MD_RCU_SW_SYSCLK_PLL0 = PLL0 selected as system clock +MD_RCU_SW_SYSCLK_HRC48 = HRC48 selected as system clock +*/ +#define ES32_SYSCLK_SOURSE_SELECT MD_RCU_SW_SYSCLK_PLL0 + +/*external clk config*/ +#define ES32_HOSC_CLK_EN FALSE +#define ES32_HOSC_CLK_FREQ 8 + +/*pll clk config + +MD_RCU_PLLSRC_HRC = HRC selected as PLL reference clock +MD_RCU_PLLSRC_HOSC = HOSC selected as PLL reference clock +MD_RCU_PLLSRC_HRC48 = HRC48 selected as PLL reference clock + +MD_RCU_PLLCLK_PASS = 0 +MD_RCU_PLLCLK_4M = 4000000 +MD_RCU_PLLCLK_8M = 8000000 +MD_RCU_PLLCLK_12M = 12000000 +MD_RCU_PLLCLK_16M = 16000000 +MD_RCU_PLLCLK_24M = 24000000 +MD_RCU_PLLCLK_32M = 32000000 +MD_RCU_PLLCLK_36M = 36000000 +MD_RCU_PLLCLK_40M = 40000000 +MD_RCU_PLLCLK_48M = 48000000 +MD_RCU_PLLCLK_64M = 64000000 +MD_RCU_PLLCLK_72M = 72000000 +*/ +#define ES32_PLL_CLK_EN TRUE +#define ES32_PLL_SOURSE_SELECT MD_RCU_PLLSRC_HRC48 +#define ES32_PLL_CLK_FREQ MD_RCU_PLLCLK_72M + +/*bus clk config + +MD_RCU_HPRE_SYSCLK_DIV_1 = SYSCLK not divided +MD_RCU_HPRE_SYSCLK_DIV_2 = SYSCLK divided by 2 +MD_RCU_HPRE_SYSCLK_DIV_4 = SYSCLK divided by 4 +MD_RCU_HPRE_SYSCLK_DIV_8 = SYSCLK divided by 8 +MD_RCU_HPRE_SYSCLK_DIV_16 = SYSCLK divided by 16 +MD_RCU_HPRE_SYSCLK_DIV_64 = SYSCLK divided by 64 +MD_RCU_HPRE_SYSCLK_DIV_128 = SYSCLK divided by 128 +MD_RCU_HPRE_SYSCLK_DIV_256 = SYSCLK divided by 256 +MD_RCU_HPRE_SYSCLK_DIV_512 = @brief SYSCLK divided by 512 + +MD_RCU_PPRE_HCLK_DIV_1 = HCLK not divided +MD_RCU_PPRE_HCLK_DIV_2 = HCLK divided by 2 +MD_RCU_PPRE_HCLK_DIV_4 = HCLK divided by 4 +MD_RCU_PPRE_HCLK_DIV_8 = HCLK divided by 8 +MD_RCU_PPRE_HCLK_DIV_16 = HCLK divided by 16 +*/ +#define ES32_BUS_DIV_HPRE MD_RCU_HPRE_SYSCLK_DIV_1 +#define ES32_BUS_DIV_PPRE MD_RCU_PPRE_HCLK_DIV_1 /* * EXTI driver system settings. @@ -88,15 +132,24 @@ /* * PWM driver system settings. */ -#define ES32_PWM_USE_ADVANCED FALSE -#define ES32_PWM_USE_TIM1 FALSE -#define ES32_PWM_USE_TIM2 FALSE -#define ES32_PWM_USE_TIM3 FALSE -#define ES32_PWM_USE_TIM4 FALSE -#define ES32_PWM_TIM1_IRQ_PRIORITY 7 -#define ES32_PWM_TIM2_IRQ_PRIORITY 7 -#define ES32_PWM_TIM3_IRQ_PRIORITY 7 -#define ES32_PWM_TIM4_IRQ_PRIORITY 7 +#define ES32_PWM_USE_AD16C4T1 TRUE +#define ES32_PWM_USE_GP32C4T1 TRUE +#define ES32_PWM_USE_GP16C4T1 TRUE +#define ES32_PWM_USE_GP16C4T2 TRUE +#define ES32_PWM_USE_GP16C4T3 TRUE +#define ES32_PWM_USE_GP16C2T1 TRUE +#define ES32_PWM_USE_GP16C2T2 TRUE +#define ES32_PWM_USE_GP16C2T3 TRUE +#define ES32_PWM_USE_GP16C2T4 TRUE +#define ES32_PWM_AD16C4T1_IRQ_PRIORITY 7 +#define ES32_PWM_GP32C4T1_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C4T1_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C4T2_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C4T3_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C2T1_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C2T2_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C2T3_IRQ_PRIORITY 7 +#define ES32_PWM_GP16C2T4_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -110,24 +163,20 @@ /* * SERIAL driver system settings. */ -#define ES32_SERIAL_USE_UART1 FALSE -#define ES32_SERIAL_USE_UART2 FALSE -#define ES32_SERIAL_USE_UART3 FALSE -#define ES32_SERIAL_USART1_PRIORITY 12 -#define ES32_SERIAL_USART2_PRIORITY 12 -#define ES32_SERIAL_USART3_PRIORITY 12 +#define ES32_SERIAL_USE_UART1 TRUE +#define ES32_SERIAL_USE_UART2 TRUE +#define ES32_SERIAL_USE_UART3 TRUE +#define ES32_SERIAL_USE_UART4 TRUE +#define ES32_SERIAL_USART1_PRIORITY 7 +#define ES32_SERIAL_USART1_PRIORITY 7 +#define ES32_SERIAL_USART1_PRIORITY 7 +#define ES32_SERIAL_USART1_PRIORITY 7 /* * SPI driver system settings. */ -#define ES32_SPI_USE_QSPI FALSE -#define ES32_SPI_USE_SPIM2 FALSE -#define ES32_SPI_USE_SPIS1 FALSE -#define ES32_SPI_USE_SPIS2 FALSE -#define ES32_SPI_QSPI_IRQ_PRIORITY 10 -#define ES32_SPI_SPIM2_IRQ_PRIORITY 10 -#define ES32_SPI_SPIS1_IRQ_PRIORITY 10 -#define ES32_SPI_SPIS2_IRQ_PRIORITY 10 +#define ES32_SPI_USE_SPI1 TRUE +#define ES32_SPI_USE_SPI2 TRUE /* * ST driver system settings. @@ -151,6 +200,7 @@ #define ES32_USB_USE_USB1 TRUE #define ES32_USB_USB1_IRQ_PRIORITY 13 #define ES32_USB_HOST_WAKEUP_DURATION 10 +#define ES32_USE_USB_SOF_TRIM_HRC48 TRUE /* * ADC driver system settings. From 24203f90fd4f5e4c7903530ddbd47f237056a142 Mon Sep 17 00:00:00 2001 From: liuhy Date: Wed, 8 May 2024 19:30:29 +0800 Subject: [PATCH 4/4] fix hal bug. --- os/hal/ports/ES32/LLD/GPIOv1/hal_pal_lld.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/os/hal/ports/ES32/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/ES32/LLD/GPIOv1/hal_pal_lld.h index ffe0107f5b..ec5e55ebb9 100644 --- a/os/hal/ports/ES32/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/ES32/LLD/GPIOv1/hal_pal_lld.h @@ -108,7 +108,7 @@ * @brief Input pad with weak pull down resistor. */ #define PAL_MODE_INPUT_PULLDOWN (PAL_ES32_MODE_INPUT | \ - PAL_ES32_PUPDR_PULLDOWN) + PAL_ES32_PUD_PULLDOWN) /** * @brief Analog input mode.