diff --git a/.gitignore b/.gitignore
index 46053e926d200a..4f6f8212e9dd54 100644
--- a/.gitignore
+++ b/.gitignore
@@ -44,3 +44,6 @@ openpilot
notebooks
xx
+.coverage*
+htmlcov
+
diff --git a/Pipfile b/Pipfile
index 4519727b9ae18a..888275b2d18ca9 100644
--- a/Pipfile
+++ b/Pipfile
@@ -7,6 +7,7 @@ verify_ssl = true
opencv-python= "==3.4.2.17"
PyQt5 = "*"
ipython = "*"
+networkx = "*"
azure-common = "*"
azure-nspkg = "*"
azure-storage-blob = "*"
@@ -99,6 +100,7 @@ gast = "==0.2.2"
matplotlib = "*"
dictdiffer = "*"
aenum = "*"
+coverage = "*"
[packages]
overpy = {git = "https://github.com/commaai/python-overpy.git",ref = "f86529af402d4642e1faeb146671c40284007323"}
@@ -135,7 +137,7 @@ Flask = "*"
PyJWT = "*"
"Jinja2" = "*"
nose = "*"
-pyflakes = "*"
+flake8 = "*"
pylint = "*"
pycryptodome = "*"
pillow = "*"
diff --git a/Pipfile.lock b/Pipfile.lock
index 0d410dcaea9a6b..c99cbdfa5b71ef 100644
--- a/Pipfile.lock
+++ b/Pipfile.lock
@@ -1,7 +1,7 @@
{
"_meta": {
"hash": {
- "sha256": "b684c418bc2eb803f0d3e173e0c9b2776eedd27c51d80b6fe58cf7588f35563d"
+ "sha256": "5bcd9143fb723dcf4cbecdc3fa38c325e706d67073dab42fb3d966619ee591df"
},
"pipfile-spec": 6,
"requires": {
@@ -16,20 +16,13 @@
]
},
"default": {
- "asn1crypto": {
- "hashes": [
- "sha256:d02bf8ea1b964a5ff04ac7891fe3a39150045d1e5e4fe99273ba677d11b92a04",
- "sha256:f822954b90c4c44f002e2cd46d636ab630f1fe4df22c816a82b66505c404eb2a"
- ],
- "version": "==1.0.0"
- },
"astroid": {
"hashes": [
- "sha256:98c665ad84d10b18318c5ab7c3d203fe11714cbad2a4aef4f44651f415392754",
- "sha256:b7546ffdedbf7abcfbff93cd1de9e9980b1ef744852689decc5aeada324238c6"
+ "sha256:09a3fba616519311f1af8a461f804b68f0370e100c9264a035aa7846d7852e33",
+ "sha256:5a79c9b4bd6c4be777424593f957c996e20beb5f74e0bc332f47713c6f675efe"
],
"markers": "python_version >= '3.5'",
- "version": "==2.3.1"
+ "version": "==2.3.2"
},
"atomicwrites": {
"hashes": [
@@ -48,37 +41,39 @@
},
"cffi": {
"hashes": [
- "sha256:041c81822e9f84b1d9c401182e174996f0bae9991f33725d059b771744290774",
- "sha256:046ef9a22f5d3eed06334d01b1e836977eeef500d9b78e9ef693f9380ad0b83d",
- "sha256:066bc4c7895c91812eff46f4b1c285220947d4aa46fa0a2651ff85f2afae9c90",
- "sha256:066c7ff148ae33040c01058662d6752fd73fbc8e64787229ea8498c7d7f4041b",
- "sha256:2444d0c61f03dcd26dbf7600cf64354376ee579acad77aef459e34efcb438c63",
- "sha256:300832850b8f7967e278870c5d51e3819b9aad8f0a2c8dbe39ab11f119237f45",
- "sha256:34c77afe85b6b9e967bd8154e3855e847b70ca42043db6ad17f26899a3df1b25",
- "sha256:46de5fa00f7ac09f020729148ff632819649b3e05a007d286242c4882f7b1dc3",
- "sha256:4aa8ee7ba27c472d429b980c51e714a24f47ca296d53f4d7868075b175866f4b",
- "sha256:4d0004eb4351e35ed950c14c11e734182591465a33e960a4ab5e8d4f04d72647",
- "sha256:4e3d3f31a1e202b0f5a35ba3bc4eb41e2fc2b11c1eff38b362de710bcffb5016",
- "sha256:50bec6d35e6b1aaeb17f7c4e2b9374ebf95a8975d57863546fa83e8d31bdb8c4",
- "sha256:55cad9a6df1e2a1d62063f79d0881a414a906a6962bc160ac968cc03ed3efcfb",
- "sha256:5662ad4e4e84f1eaa8efce5da695c5d2e229c563f9d5ce5b0113f71321bcf753",
- "sha256:59b4dc008f98fc6ee2bb4fd7fc786a8d70000d058c2bbe2698275bc53a8d3fa7",
- "sha256:73e1ffefe05e4ccd7bcea61af76f36077b914f92b76f95ccf00b0c1b9186f3f9",
- "sha256:a1f0fd46eba2d71ce1589f7e50a9e2ffaeb739fb2c11e8192aa2b45d5f6cc41f",
- "sha256:a2e85dc204556657661051ff4bab75a84e968669765c8a2cd425918699c3d0e8",
- "sha256:a5457d47dfff24882a21492e5815f891c0ca35fefae8aa742c6c263dac16ef1f",
- "sha256:a8dccd61d52a8dae4a825cdbb7735da530179fea472903eb871a5513b5abbfdc",
- "sha256:ae61af521ed676cf16ae94f30fe202781a38d7178b6b4ab622e4eec8cefaff42",
- "sha256:b012a5edb48288f77a63dba0840c92d0504aa215612da4541b7b42d849bc83a3",
- "sha256:d2c5cfa536227f57f97c92ac30c8109688ace8fa4ac086d19d0af47d134e2909",
- "sha256:d42b5796e20aacc9d15e66befb7a345454eef794fdb0737d1af593447c6c8f45",
- "sha256:dee54f5d30d775f525894d67b1495625dd9322945e7fee00731952e0368ff42d",
- "sha256:e070535507bd6aa07124258171be2ee8dfc19119c28ca94c9dfb7efd23564512",
- "sha256:e1ff2748c84d97b065cc95429814cdba39bcbd77c9c85c89344b317dc0d9cbff",
- "sha256:ed851c75d1e0e043cbf5ca9a8e1b13c4c90f3fbd863dacb01c0808e2b5204201"
- ],
- "index": "pypi",
- "version": "==1.12.3"
+ "sha256:00d890313797d9fe4420506613384b43099ad7d2b905c0752dbcc3a6f14d80fa",
+ "sha256:0cf9e550ac6c5e57b713437e2f4ac2d7fd0cd10336525a27224f5fc1ec2ee59a",
+ "sha256:0ea23c9c0cdd6778146a50d867d6405693ac3b80a68829966c98dd5e1bbae400",
+ "sha256:193697c2918ecdb3865acf6557cddf5076bb39f1f654975e087b67efdff83365",
+ "sha256:1ae14b542bf3b35e5229439c35653d2ef7d8316c1fffb980f9b7647e544baa98",
+ "sha256:1e389e069450609c6ffa37f21f40cce36f9be7643bbe5051ab1de99d5a779526",
+ "sha256:263242b6ace7f9cd4ea401428d2d45066b49a700852334fd55311bde36dcda14",
+ "sha256:33142ae9807665fa6511cfa9857132b2c3ee6ddffb012b3f0933fc11e1e830d5",
+ "sha256:364f8404034ae1b232335d8c7f7b57deac566f148f7222cef78cf8ae28ef764e",
+ "sha256:47368f69fe6529f8f49a5d146ddee713fc9057e31d61e8b6dc86a6a5e38cecc1",
+ "sha256:4895640844f17bec32943995dc8c96989226974dfeb9dd121cc45d36e0d0c434",
+ "sha256:558b3afef987cf4b17abd849e7bedf64ee12b28175d564d05b628a0f9355599b",
+ "sha256:5ba86e1d80d458b338bda676fd9f9d68cb4e7a03819632969cf6d46b01a26730",
+ "sha256:63424daa6955e6b4c70dc2755897f5be1d719eabe71b2625948b222775ed5c43",
+ "sha256:6381a7d8b1ebd0bc27c3bc85bc1bfadbb6e6f756b4d4db0aa1425c3719ba26b4",
+ "sha256:6381ab708158c4e1639da1f2a7679a9bbe3e5a776fc6d1fd808076f0e3145331",
+ "sha256:6fd58366747debfa5e6163ada468a90788411f10c92597d3b0a912d07e580c36",
+ "sha256:728ec653964655d65408949b07f9b2219df78badd601d6c49e28d604efe40599",
+ "sha256:7cfcfda59ef1f95b9f729c56fe8a4041899f96b72685d36ef16a3440a0f85da8",
+ "sha256:819f8d5197c2684524637f940445c06e003c4a541f9983fd30d6deaa2a5487d8",
+ "sha256:825ecffd9574557590e3225560a8a9d751f6ffe4a49e3c40918c9969b93395fa",
+ "sha256:9009e917d8f5ef780c2626e29b6bc126f4cb2a4d43ca67aa2b40f2a5d6385e78",
+ "sha256:9c77564a51d4d914ed5af096cd9843d90c45b784b511723bd46a8a9d09cf16fc",
+ "sha256:a19089fa74ed19c4fe96502a291cfdb89223a9705b1d73b3005df4256976142e",
+ "sha256:a40ed527bffa2b7ebe07acc5a3f782da072e262ca994b4f2085100b5a444bbb2",
+ "sha256:bb75ba21d5716abc41af16eac1145ab2e471deedde1f22c6f99bd9f995504df0",
+ "sha256:e22a00c0c81ffcecaf07c2bfb3672fa372c50e2bd1024ffee0da191c1b27fc71",
+ "sha256:e55b5a746fb77f10c83e8af081979351722f6ea48facea79d470b3731c7b2891",
+ "sha256:ec2fa3ee81707a5232bf2dfbd6623fdb278e070d596effc7e2d788f2ada71a05",
+ "sha256:fd82eb4694be712fcae03c717ca2e0fc720657ac226b80bbb597e971fc6928c2"
+ ],
+ "index": "pypi",
+ "version": "==1.13.1"
},
"chardet": {
"hashes": [
@@ -108,25 +103,30 @@
},
"cryptography": {
"hashes": [
- "sha256:24b61e5fcb506424d3ec4e18bca995833839bf13c59fc43e530e488f28d46b8c",
- "sha256:25dd1581a183e9e7a806fe0543f485103232f940fcfc301db65e630512cce643",
- "sha256:3452bba7c21c69f2df772762be0066c7ed5dc65df494a1d53a58b683a83e1216",
- "sha256:41a0be220dd1ed9e998f5891948306eb8c812b512dc398e5a01846d855050799",
- "sha256:5751d8a11b956fbfa314f6553d186b94aa70fdb03d8a4d4f1c82dcacf0cbe28a",
- "sha256:5f61c7d749048fa6e3322258b4263463bfccefecb0dd731b6561cb617a1d9bb9",
- "sha256:72e24c521fa2106f19623a3851e9f89ddfdeb9ac63871c7643790f872a305dfc",
- "sha256:7b97ae6ef5cba2e3bb14256625423413d5ce8d1abb91d4f29b6d1a081da765f8",
- "sha256:961e886d8a3590fd2c723cf07be14e2a91cf53c25f02435c04d39e90780e3b53",
- "sha256:96d8473848e984184b6728e2c9d391482008646276c3ff084a1bd89e15ff53a1",
- "sha256:ae536da50c7ad1e002c3eee101871d93abdc90d9c5f651818450a0d3af718609",
- "sha256:b0db0cecf396033abb4a93c95d1602f268b3a68bb0a9cc06a7cff587bb9a7292",
- "sha256:cfee9164954c186b191b91d4193989ca994703b2fff406f71cf454a2d3c7327e",
- "sha256:e6347742ac8f35ded4a46ff835c60e68c22a536a8ae5c4422966d06946b6d4c6",
- "sha256:f27d93f0139a3c056172ebb5d4f9056e770fdf0206c2f422ff2ebbad142e09ed",
- "sha256:f57b76e46a58b63d1c6375017f4564a28f19a5ca912691fd2e4261b3414b618d"
- ],
- "index": "pypi",
- "version": "==2.7"
+ "sha256:02079a6addc7b5140ba0825f542c0869ff4df9a69c360e339ecead5baefa843c",
+ "sha256:1df22371fbf2004c6f64e927668734070a8953362cd8370ddd336774d6743595",
+ "sha256:369d2346db5934345787451504853ad9d342d7f721ae82d098083e1f49a582ad",
+ "sha256:3cda1f0ed8747339bbdf71b9f38ca74c7b592f24f65cdb3ab3765e4b02871651",
+ "sha256:44ff04138935882fef7c686878e1c8fd80a723161ad6a98da31e14b7553170c2",
+ "sha256:4b1030728872c59687badcca1e225a9103440e467c17d6d1730ab3d2d64bfeff",
+ "sha256:58363dbd966afb4f89b3b11dfb8ff200058fbc3b947507675c19ceb46104b48d",
+ "sha256:6ec280fb24d27e3d97aa731e16207d58bd8ae94ef6eab97249a2afe4ba643d42",
+ "sha256:7270a6c29199adc1297776937a05b59720e8a782531f1f122f2eb8467f9aab4d",
+ "sha256:73fd30c57fa2d0a1d7a49c561c40c2f79c7d6c374cc7750e9ac7c99176f6428e",
+ "sha256:7f09806ed4fbea8f51585231ba742b58cbcfbfe823ea197d8c89a5e433c7e912",
+ "sha256:90df0cc93e1f8d2fba8365fb59a858f51a11a394d64dbf3ef844f783844cc793",
+ "sha256:971221ed40f058f5662a604bd1ae6e4521d84e6cad0b7b170564cc34169c8f13",
+ "sha256:a518c153a2b5ed6b8cc03f7ae79d5ffad7315ad4569b2d5333a13c38d64bd8d7",
+ "sha256:b0de590a8b0979649ebeef8bb9f54394d3a41f66c5584fff4220901739b6b2f0",
+ "sha256:b43f53f29816ba1db8525f006fa6f49292e9b029554b3eb56a189a70f2a40879",
+ "sha256:d31402aad60ed889c7e57934a03477b572a03af7794fa8fb1780f21ea8f6551f",
+ "sha256:de96157ec73458a7f14e3d26f17f8128c959084931e8997b9e655a39c8fde9f9",
+ "sha256:df6b4dca2e11865e6cfbfb708e800efb18370f5a46fd601d3755bc7f85b3a8a2",
+ "sha256:ecadccc7ba52193963c0475ac9f6fa28ac01e01349a2ca48509667ef41ffd2cf",
+ "sha256:fb81c17e0ebe3358486cd8cc3ad78adbae58af12fc2bf2bc0bb84e8090fa5ce8"
+ ],
+ "index": "pypi",
+ "version": "==2.8"
},
"cython": {
"hashes": [
@@ -162,6 +162,22 @@
"index": "pypi",
"version": "==0.29.13"
},
+ "entrypoints": {
+ "hashes": [
+ "sha256:589f874b313739ad35be6e0cd7efde2a4e9b6fea91edcc34e58ecbb8dbe56d19",
+ "sha256:c70dd71abe5a8c85e55e12c19bd91ccfeec11a6e99044204511f9ed547d48451"
+ ],
+ "markers": "python_version >= '2.7'",
+ "version": "==0.3"
+ },
+ "flake8": {
+ "hashes": [
+ "sha256:19241c1cbc971b9962473e4438a2ca19749a7dd002dd1a946eaba171b4114548",
+ "sha256:8e9dfa3cecb2400b3738a42c54c3043e821682b9c840b0448c0503f781130696"
+ ],
+ "index": "pypi",
+ "version": "==3.7.8"
+ },
"flask": {
"hashes": [
"sha256:13f9f196f330c7c2c5d7a5cf91af894110ca0215ac051b5844701f2bfd934d52",
@@ -211,11 +227,11 @@
},
"jinja2": {
"hashes": [
- "sha256:065c4f02ebe7f7cf559e49ee5a95fb800a9e4528727aec6f24402a5374c65013",
- "sha256:14dd6caf1527abb21f08f86c784eac40853ba93edb79552aa1e4b8aef1b61c7b"
+ "sha256:74320bb91f31270f9551d46522e33af46a80c3d619f4a4bf42b3164d30b5911f",
+ "sha256:9fe95f19286cfefaa917656583d020be14e7859c6b0252588391e47db34527de"
],
"index": "pypi",
- "version": "==2.10.1"
+ "version": "==2.10.3"
},
"json-rpc": {
"hashes": [
@@ -319,25 +335,30 @@
},
"numpy": {
"hashes": [
- "sha256:05dbfe72684cc14b92568de1bc1f41e5f62b00f714afc9adee42f6311738091f",
- "sha256:0d82cb7271a577529d07bbb05cb58675f2deb09772175fab96dc8de025d8ac05",
- "sha256:10132aa1fef99adc85a905d82e8497a580f83739837d7cbd234649f2e9b9dc58",
- "sha256:12322df2e21f033a60c80319c25011194cd2a21294cc66fee0908aeae2c27832",
- "sha256:16f19b3aa775dddc9814e02a46b8e6ae6a54ed8cf143962b4e53f0471dbd7b16",
- "sha256:3d0b0989dd2d066db006158de7220802899a1e5c8cf622abe2d0bd158fd01c2c",
- "sha256:438a3f0e7b681642898fd7993d38e2bf140a2d1eafaf3e89bb626db7f50db355",
- "sha256:5fd214f482ab53f2cea57414c5fb3e58895b17df6e6f5bca5be6a0bb6aea23bb",
- "sha256:73615d3edc84dd7c4aeb212fa3748fb83217e00d201875a47327f55363cef2df",
- "sha256:7bd355ad7496f4ce1d235e9814ec81ee3d28308d591c067ce92e49f745ba2c2f",
- "sha256:7d077f2976b8f3de08a0dcf5d72083f4af5411e8fddacd662aae27baa2601196",
- "sha256:a4092682778dc48093e8bda8d26ee8360153e2047826f95a3f5eae09f0ae3abf",
- "sha256:b458de8624c9f6034af492372eb2fee41a8e605f03f4732f43fc099e227858b2",
- "sha256:e70fc8ff03a961f13363c2c95ef8285e0cf6a720f8271836f852cc0fa64e97c8",
- "sha256:ee8e9d7cad5fe6dde50ede0d2e978d81eafeaa6233fb0b8719f60214cf226578",
- "sha256:f4a4f6aba148858a5a5d546a99280f71f5ee6ec8182a7d195af1a914195b21a2"
- ],
- "index": "pypi",
- "version": "==1.17.2"
+ "sha256:0b0dd8f47fb177d00fa6ef2d58783c4f41ad3126b139c91dd2f7c4b3fdf5e9a5",
+ "sha256:25ffe71f96878e1da7e014467e19e7db90ae7d4e12affbc73101bcf61785214e",
+ "sha256:26efd7f7d755e6ca966a5c0ac5a930a87dbbaab1c51716ac26a38f42ecc9bc4b",
+ "sha256:28b1180c758abf34a5c3fea76fcee66a87def1656724c42bb14a6f9717a5bdf7",
+ "sha256:2e418f0a59473dac424f888dd57e85f77502a593b207809211c76e5396ae4f5c",
+ "sha256:30c84e3a62cfcb9e3066f25226e131451312a044f1fe2040e69ce792cb7de418",
+ "sha256:4650d94bb9c947151737ee022b934b7d9a845a7c76e476f3e460f09a0c8c6f39",
+ "sha256:4dd830a11e8724c9c9379feed1d1be43113f8bcce55f47ea7186d3946769ce26",
+ "sha256:4f2a2b279efde194877aff1f76cf61c68e840db242a5c7169f1ff0fd59a2b1e2",
+ "sha256:62d22566b3e3428dfc9ec972014c38ed9a4db4f8969c78f5414012ccd80a149e",
+ "sha256:669795516d62f38845c7033679c648903200980d68935baaa17ac5c7ae03ae0c",
+ "sha256:75fcd60d682db3e1f8fbe2b8b0c6761937ad56d01c1dc73edf4ef2748d5b6bc4",
+ "sha256:9395b0a41e8b7e9a284e3be7060db9d14ad80273841c952c83a5afc241d2bd98",
+ "sha256:9e37c35fc4e9410093b04a77d11a34c64bf658565e30df7cbe882056088a91c1",
+ "sha256:a0678793096205a4d784bd99f32803ba8100f639cf3b932dc63b21621390ea7e",
+ "sha256:b46554ad4dafb2927f88de5a1d207398c5385edbb5c84d30b3ef187c4a3894d8",
+ "sha256:c867eeccd934920a800f65c6068acdd6b87e80d45cd8c8beefff783b23cdc462",
+ "sha256:dd0667f5be56fb1b570154c2c0516a528e02d50da121bbbb2cbb0b6f87f59bc2",
+ "sha256:de2b1c20494bdf47f0160bd88ed05f5e48ae5dc336b8de7cfade71abcc95c0b9",
+ "sha256:f1df7b2b7740dd777571c732f98adb5aad5450aee32772f1b39249c8a50386f6",
+ "sha256:ffca69e29079f7880c5392bf675eb8b4146479d976ae1924d01cd92b04cccbcc"
+ ],
+ "index": "pypi",
+ "version": "==1.17.3"
},
"overpy": {
"git": "https://github.com/commaai/python-overpy.git",
@@ -346,39 +367,44 @@
},
"pillow": {
"hashes": [
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- "sha256:5bbba34f97a26a93f5e8dec469ca4ddd712451418add43da946dbaed7f7a98d2",
- "sha256:65a28969a025a0eb4594637b6103201dc4ed2a9508bdab56ac33e43e3081c404",
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- "sha256:8a9becd5cbd5062f973bcd2e7bc79483af310222de112b6541f8af1f93a3cc42",
- "sha256:972a7aaeb7c4a2795b52eef52ee991ef040b31009f36deca6207a986607b55f3",
- "sha256:97b119c436bfa96a92ac2ca525f7025836d4d4e64b1c9f9eff8dbaf3ff1d86f3",
- "sha256:9ba37698e242223f8053cc158f130aee046a96feacbeab65893dbe94f5530118",
- "sha256:b1b0e1f626a0f079c0d3696db70132fb1f29aa87c66aecb6501a9b8be64ce9f7",
- "sha256:c14c1224fd1a5be2733530d648a316974dbbb3c946913562c6005a76f21ca042",
- "sha256:c79a8546c48ae6465189e54e3245a97ddf21161e33ff7eaa42787353417bb2b6",
- "sha256:ceb76935ac4ebdf6d7bc845482a4450b284c6ccfb281e34da51d510658ab34d8",
- "sha256:e22bffaad04b4d16e1c091baed7f2733fc1ebb91e0c602abf1b6834d17158b1f",
- "sha256:ec883b8e44d877bda6f94a36313a1c6063f8b1997aa091628ae2f34c7f97c8d5",
- "sha256:f1baa54d50ec031d1a9beb89974108f8f2c0706f49798f4777df879df0e1adb6",
- "sha256:f53a5385932cda1e2c862d89460992911a89768c65d176ff8c50cddca4d29bed"
- ],
- "index": "pypi",
- "version": "==6.2.0"
+ "sha256:047d9473cf68af50ac85f8ee5d5f21a60f849bc17d348da7fc85711287a75031",
+ "sha256:0f66dc6c8a3cc319561a633b6aa82c44107f12594643efa37210d8c924fc1c71",
+ "sha256:12c9169c4e8fe0a7329e8658c7e488001f6b4c8e88740e76292c2b857af2e94c",
+ "sha256:248cffc168896982f125f5c13e9317c059f74fffdb4152893339f3be62a01340",
+ "sha256:27faf0552bf8c260a5cee21a76e031acaea68babb64daf7e8f2e2540745082aa",
+ "sha256:285edafad9bc60d96978ed24d77cdc0b91dace88e5da8c548ba5937c425bca8b",
+ "sha256:384b12c9aa8ef95558abdcb50aada56d74bc7cc131dd62d28c2d0e4d3aadd573",
+ "sha256:38950b3a707f6cef09cd3cbb142474357ad1a985ceb44d921bdf7b4647b3e13e",
+ "sha256:4aad1b88933fd6dc2846552b89ad0c74ddbba2f0884e2c162aa368374bf5abab",
+ "sha256:4ac6148008c169603070c092e81f88738f1a0c511e07bd2bb0f9ef542d375da9",
+ "sha256:4deb1d2a45861ae6f0b12ea0a786a03d19d29edcc7e05775b85ec2877cb54c5e",
+ "sha256:59aa2c124df72cc75ed72c8d6005c442d4685691a30c55321e00ed915ad1a291",
+ "sha256:5a47d2123a9ec86660fe0e8d0ebf0aa6bc6a17edc63f338b73ea20ba11713f12",
+ "sha256:5cc901c2ab9409b4b7ac7b5bcc3e86ac14548627062463da0af3b6b7c555a871",
+ "sha256:6c1db03e8dff7b9f955a0fb9907eb9ca5da75b5ce056c0c93d33100a35050281",
+ "sha256:7ce80c0a65a6ea90ef9c1f63c8593fcd2929448613fc8da0adf3e6bfad669d08",
+ "sha256:809c19241c14433c5d6135e1b6c72da4e3b56d5c865ad5736ab99af8896b8f41",
+ "sha256:83792cb4e0b5af480588601467c0764242b9a483caea71ef12d22a0d0d6bdce2",
+ "sha256:846fa202bd7ee0f6215c897a1d33238ef071b50766339186687bd9b7a6d26ac5",
+ "sha256:9f5529fc02009f96ba95bea48870173426879dc19eec49ca8e08cd63ecd82ddb",
+ "sha256:a423c2ea001c6265ed28700df056f75e26215fd28c001e93ef4380b0f05f9547",
+ "sha256:ac4428094b42907aba5879c7c000d01c8278d451a3b7cccd2103e21f6397ea75",
+ "sha256:b1ae48d87f10d1384e5beecd169c77502fcc04a2c00a4c02b85f0a94b419e5f9",
+ "sha256:bf4e972a88f8841d8fdc6db1a75e0f8d763e66e3754b03006cbc3854d89f1cb1",
+ "sha256:c6414f6aad598364aaf81068cabb077894eb88fed99c6a65e6e8217bab62ae7a",
+ "sha256:c710fcb7ee32f67baf25aa9ffede4795fd5d93b163ce95fdc724383e38c9df96",
+ "sha256:c7be4b8a09852291c3c48d3c25d1b876d2494a0a674980089ac9d5e0d78bd132",
+ "sha256:c9e5ffb910b14f090ac9c38599063e354887a5f6d7e6d26795e916b4514f2c1a",
+ "sha256:e0697b826da6c2472bb6488db4c0a7fa8af0d52fa08833ceb3681358914b14e5",
+ "sha256:e9a3edd5f714229d41057d56ac0f39ad9bdba6767e8c888c951869f0bdd129b0"
+ ],
+ "index": "pypi",
+ "version": "==6.2.1"
},
"psutil": {
"hashes": [
"sha256:028a1ec3c6197eadd11e7b46e8cc2f0720dc18ac6d7aabdb8e8c0d6c9704f000",
+ "sha256:12542c3642909f4cd1928a2fba59e16fa27e47cbeea60928ebb62a8cbd1ce123",
"sha256:503e4b20fa9d3342bcf58191bbc20a4a5ef79ca7df8972e6197cc14c5513e73d",
"sha256:863a85c1c0a5103a12c05a35e59d336e1d665747e531256e061213e2e90f63f3",
"sha256:954f782608bfef9ae9f78e660e065bd8ffcfaea780f9f2c8a133bb7cb9e826d7",
@@ -398,6 +424,14 @@
"index": "pypi",
"version": "==0.6.4"
},
+ "pycodestyle": {
+ "hashes": [
+ "sha256:95a2219d12372f05704562a14ec30bc76b05a5b297b21a5dfe3f6fac3491ae56",
+ "sha256:e40a936c9a450ad81df37f549d676d127b1b66000a6c500caa2b085bc0ca976c"
+ ],
+ "markers": "python_version >= '2.7' and python_version not in '3.0, 3.1, 3.2, 3.3'",
+ "version": "==2.5.0"
+ },
"pycparser": {
"hashes": [
"sha256:a988718abfad80b6b157acce7bf130a30876d27603738ac39f140993246b25b3"
@@ -443,7 +477,7 @@
"sha256:17dbeb2e3f4d772725c777fabc446d5634d1038f234e77343108ce445ea69ce0",
"sha256:d976835886f8c5b31d47970ed689944a0262b5f3afa00a5a7b4dc81e5449f8a2"
],
- "index": "pypi",
+ "markers": "python_version >= '2.7' and python_version not in '3.0, 3.1, 3.2, 3.3'",
"version": "==2.1.1"
},
"pyjwt": {
@@ -456,11 +490,11 @@
},
"pylint": {
"hashes": [
- "sha256:7edbae11476c2182708063ac387a8f97c760d9cfe36a5ede0ca996f90cf346c8",
- "sha256:844ce067788028c1a35086a5c66bc5e599ddd851841c41d6ee1623b36774d9f2"
+ "sha256:7b76045426c650d2b0f02fc47c14d7934d17898779da95288a74c2a7ec440702",
+ "sha256:856476331f3e26598017290fd65bebe81c960e806776f324093a46b76fb2d1c0"
],
"index": "pypi",
- "version": "==2.4.2"
+ "version": "==2.4.3"
},
"pyserial": {
"hashes": [
@@ -585,20 +619,25 @@
},
"typed-ast": {
"hashes": [
+ "sha256:1170afa46a3799e18b4c977777ce137bb53c7485379d9706af8a59f2ea1aa161",
"sha256:18511a0b3e7922276346bcb47e2ef9f38fb90fd31cb9223eed42c85d1312344e",
"sha256:262c247a82d005e43b5b7f69aff746370538e176131c32dda9cb0f324d27141e",
"sha256:2b907eb046d049bcd9892e3076c7a6456c93a25bebfe554e931620c90e6a25b0",
"sha256:354c16e5babd09f5cb0ee000d54cfa38401d8b8891eefa878ac772f827181a3c",
+ "sha256:48e5b1e71f25cfdef98b013263a88d7145879fbb2d5185f2a0c79fa7ebbeae47",
"sha256:4e0b70c6fc4d010f8107726af5fd37921b666f5b31d9331f0bd24ad9a088e631",
"sha256:630968c5cdee51a11c05a30453f8cd65e0cc1d2ad0d9192819df9978984529f4",
"sha256:66480f95b8167c9c5c5c87f32cf437d585937970f3fc24386f313a4c97b44e34",
"sha256:71211d26ffd12d63a83e079ff258ac9d56a1376a25bc80b1cdcdf601b855b90b",
+ "sha256:7954560051331d003b4e2b3eb822d9dd2e376fa4f6d98fee32f452f52dd6ebb2",
+ "sha256:838997f4310012cf2e1ad3803bce2f3402e9ffb71ded61b5ee22617b3a7f6b6e",
"sha256:95bd11af7eafc16e829af2d3df510cecfd4387f6453355188342c3e79a2ec87a",
"sha256:bc6c7d3fa1325a0c6613512a093bc2a2a15aeec350451cbdf9e1d4bffe3e3233",
"sha256:cc34a6f5b426748a507dd5d1de4c1978f2eb5626d51326e43280941206c209e1",
"sha256:d755f03c1e4a51e9b24d899561fec4ccaf51f210d52abdf8c07ee2849b212a36",
"sha256:d7c45933b1bdfaf9f36c579671fec15d25b06c8398f113dab64c18ed1adda01d",
"sha256:d896919306dd0aa22d0132f62a1b78d11aaf4c9fc5b3410d3c666b818191630a",
+ "sha256:fdc1c9bbf79510b76408840e009ed65958feba92a88833cdceecff93ae8fff66",
"sha256:ffde2fbfad571af120fcbfbbc61c72469e72f550d676c3342492a9dfdefb8f12"
],
"markers": "python_version < '3.8' and implementation_name == 'cpython'",
@@ -645,9 +684,9 @@
"develop": {
"absl-py": {
"hashes": [
- "sha256:0ce45920056fbbb66f52fcee7408ba6311da19f55589b2b3aab9f8af92a0e1f2"
+ "sha256:d9129186431e150d7fe455f1cb1ecbb92bb5dba9da9bc3ef7b012d98c4db2526"
],
- "version": "==0.8.0"
+ "version": "==0.8.1"
},
"aenum": {
"hashes": [
@@ -666,13 +705,6 @@
"markers": "python_version >= '2.7' and python_version not in '3.0, 3.1, 3.2, 3.3'",
"version": "==2.5.1"
},
- "asn1crypto": {
- "hashes": [
- "sha256:d02bf8ea1b964a5ff04ac7891fe3a39150045d1e5e4fe99273ba677d11b92a04",
- "sha256:f822954b90c4c44f002e2cd46d636ab630f1fe4df22c816a82b66505c404eb2a"
- ],
- "version": "==1.0.0"
- },
"astor": {
"hashes": [
"sha256:0e41295809baf43ae8303350e031aff81ae52189b6f881f36d623fa8b2f1960e",
@@ -683,19 +715,19 @@
},
"astroid": {
"hashes": [
- "sha256:98c665ad84d10b18318c5ab7c3d203fe11714cbad2a4aef4f44651f415392754",
- "sha256:b7546ffdedbf7abcfbff93cd1de9e9980b1ef744852689decc5aeada324238c6"
+ "sha256:09a3fba616519311f1af8a461f804b68f0370e100c9264a035aa7846d7852e33",
+ "sha256:5a79c9b4bd6c4be777424593f957c996e20beb5f74e0bc332f47713c6f675efe"
],
"markers": "python_version >= '3.5'",
- "version": "==2.3.1"
+ "version": "==2.3.2"
},
"attrs": {
"hashes": [
- "sha256:ec20e7a4825331c1b5ebf261d111e16fa9612c1f7a5e1f884f12bd53a664dfd2",
- "sha256:f913492e1663d3c36f502e5e9ba6cd13cf19d7fab50aa13239e420fef95e1396"
+ "sha256:08a96c641c3a74e44eb59afb61a24f2cb9f4d7188748e76ba4bb5edfa3cb7d1c",
+ "sha256:f7b7ce16570fe9965acd6d30101a28f62fb4a7f9e926b3bbc9b61f8b04247e72"
],
"markers": "python_version >= '2.7' and python_version not in '3.0, 3.1, 3.2, 3.3'",
- "version": "==19.2.0"
+ "version": "==19.3.0"
},
"azure-common": {
"hashes": [
@@ -800,18 +832,18 @@
},
"boto3": {
"hashes": [
- "sha256:4189e1ffed768bd0efd754a0abedebce19495ba2aa6b2f5e20f29ba80f81f9cb",
- "sha256:fa4e28166922feeb9b7b56134c1acc817a1bca36284a0035bc08a3dab1853a9f"
+ "sha256:7fc97cb2c9cdff905e950750c8e8b23b872a84696158a28852355dc4b712ba3a",
+ "sha256:818c56a317c176142dbf1dca3f5b4366c80460c6cc3c4efe22f0bde736571283"
],
"index": "pypi",
- "version": "==1.9.242"
+ "version": "==1.10.2"
},
"botocore": {
"hashes": [
- "sha256:7af52e0aabaf4ba045e1a5832308e70e1ea4b499b71624857f09aed2ba5e667c",
- "sha256:dd62d63bcd3176c92775c52d3e879288f89bf0ac0039df14ea31f25d693acd6d"
+ "sha256:8223485841ef4731a5d4943a733295ba69d0005c4ae64c468308cc07f6960d39",
+ "sha256:f8e12dc6e536ea512f0ad25b74e7eecdf5d9e09ae92b5de236b535bee7804d5b"
],
- "version": "==1.12.242"
+ "version": "==1.13.2"
},
"celery": {
"hashes": [
@@ -830,37 +862,39 @@
},
"cffi": {
"hashes": [
- "sha256:041c81822e9f84b1d9c401182e174996f0bae9991f33725d059b771744290774",
- "sha256:046ef9a22f5d3eed06334d01b1e836977eeef500d9b78e9ef693f9380ad0b83d",
- "sha256:066bc4c7895c91812eff46f4b1c285220947d4aa46fa0a2651ff85f2afae9c90",
- "sha256:066c7ff148ae33040c01058662d6752fd73fbc8e64787229ea8498c7d7f4041b",
- "sha256:2444d0c61f03dcd26dbf7600cf64354376ee579acad77aef459e34efcb438c63",
- "sha256:300832850b8f7967e278870c5d51e3819b9aad8f0a2c8dbe39ab11f119237f45",
- "sha256:34c77afe85b6b9e967bd8154e3855e847b70ca42043db6ad17f26899a3df1b25",
- "sha256:46de5fa00f7ac09f020729148ff632819649b3e05a007d286242c4882f7b1dc3",
- "sha256:4aa8ee7ba27c472d429b980c51e714a24f47ca296d53f4d7868075b175866f4b",
- "sha256:4d0004eb4351e35ed950c14c11e734182591465a33e960a4ab5e8d4f04d72647",
- "sha256:4e3d3f31a1e202b0f5a35ba3bc4eb41e2fc2b11c1eff38b362de710bcffb5016",
- "sha256:50bec6d35e6b1aaeb17f7c4e2b9374ebf95a8975d57863546fa83e8d31bdb8c4",
- "sha256:55cad9a6df1e2a1d62063f79d0881a414a906a6962bc160ac968cc03ed3efcfb",
- "sha256:5662ad4e4e84f1eaa8efce5da695c5d2e229c563f9d5ce5b0113f71321bcf753",
- "sha256:59b4dc008f98fc6ee2bb4fd7fc786a8d70000d058c2bbe2698275bc53a8d3fa7",
- "sha256:73e1ffefe05e4ccd7bcea61af76f36077b914f92b76f95ccf00b0c1b9186f3f9",
- "sha256:a1f0fd46eba2d71ce1589f7e50a9e2ffaeb739fb2c11e8192aa2b45d5f6cc41f",
- "sha256:a2e85dc204556657661051ff4bab75a84e968669765c8a2cd425918699c3d0e8",
- "sha256:a5457d47dfff24882a21492e5815f891c0ca35fefae8aa742c6c263dac16ef1f",
- "sha256:a8dccd61d52a8dae4a825cdbb7735da530179fea472903eb871a5513b5abbfdc",
- "sha256:ae61af521ed676cf16ae94f30fe202781a38d7178b6b4ab622e4eec8cefaff42",
- "sha256:b012a5edb48288f77a63dba0840c92d0504aa215612da4541b7b42d849bc83a3",
- "sha256:d2c5cfa536227f57f97c92ac30c8109688ace8fa4ac086d19d0af47d134e2909",
- "sha256:d42b5796e20aacc9d15e66befb7a345454eef794fdb0737d1af593447c6c8f45",
- "sha256:dee54f5d30d775f525894d67b1495625dd9322945e7fee00731952e0368ff42d",
- "sha256:e070535507bd6aa07124258171be2ee8dfc19119c28ca94c9dfb7efd23564512",
- "sha256:e1ff2748c84d97b065cc95429814cdba39bcbd77c9c85c89344b317dc0d9cbff",
- "sha256:ed851c75d1e0e043cbf5ca9a8e1b13c4c90f3fbd863dacb01c0808e2b5204201"
- ],
- "index": "pypi",
- "version": "==1.12.3"
+ "sha256:00d890313797d9fe4420506613384b43099ad7d2b905c0752dbcc3a6f14d80fa",
+ "sha256:0cf9e550ac6c5e57b713437e2f4ac2d7fd0cd10336525a27224f5fc1ec2ee59a",
+ "sha256:0ea23c9c0cdd6778146a50d867d6405693ac3b80a68829966c98dd5e1bbae400",
+ "sha256:193697c2918ecdb3865acf6557cddf5076bb39f1f654975e087b67efdff83365",
+ "sha256:1ae14b542bf3b35e5229439c35653d2ef7d8316c1fffb980f9b7647e544baa98",
+ "sha256:1e389e069450609c6ffa37f21f40cce36f9be7643bbe5051ab1de99d5a779526",
+ "sha256:263242b6ace7f9cd4ea401428d2d45066b49a700852334fd55311bde36dcda14",
+ "sha256:33142ae9807665fa6511cfa9857132b2c3ee6ddffb012b3f0933fc11e1e830d5",
+ "sha256:364f8404034ae1b232335d8c7f7b57deac566f148f7222cef78cf8ae28ef764e",
+ "sha256:47368f69fe6529f8f49a5d146ddee713fc9057e31d61e8b6dc86a6a5e38cecc1",
+ "sha256:4895640844f17bec32943995dc8c96989226974dfeb9dd121cc45d36e0d0c434",
+ "sha256:558b3afef987cf4b17abd849e7bedf64ee12b28175d564d05b628a0f9355599b",
+ "sha256:5ba86e1d80d458b338bda676fd9f9d68cb4e7a03819632969cf6d46b01a26730",
+ "sha256:63424daa6955e6b4c70dc2755897f5be1d719eabe71b2625948b222775ed5c43",
+ "sha256:6381a7d8b1ebd0bc27c3bc85bc1bfadbb6e6f756b4d4db0aa1425c3719ba26b4",
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+ "sha256:fd82eb4694be712fcae03c717ca2e0fc720657ac226b80bbb597e971fc6928c2"
+ ],
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+ "version": "==1.13.1"
},
"chardet": {
"hashes": [
@@ -885,27 +919,70 @@
"index": "pypi",
"version": "==0.8.2"
},
+ "coverage": {
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+ "version": "==4.5.4"
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- ],
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+ "sha256:02079a6addc7b5140ba0825f542c0869ff4df9a69c360e339ecead5baefa843c",
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+ "version": "==2.8"
},
"cycler": {
"hashes": [
@@ -1050,10 +1127,10 @@
},
"future": {
"hashes": [
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+ "sha256:858e38522e8fd0d3ce8f0c1feaf0603358e366d5403209674c7b617fa0c24093"
],
"index": "pypi",
- "version": "==0.17.1"
+ "version": "==0.18.1"
},
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@@ -1150,40 +1227,56 @@
},
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+ "sha256:f4cd049cb94d9f517b1cab5668a3b345968beba093bc79a637e671000b3540ec"
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},
"gunicorn": {
"hashes": [
@@ -1258,11 +1351,11 @@
},
"imageio": {
"hashes": [
- "sha256:1a2bbbb7cd38161340fa3b14d806dfbf914abf3ee6fd4592af2afb87d049f209",
- "sha256:42e65aadfc3d57a1043615c92bdf6319b67589e49a0aae2b985b82144aceacad"
+ "sha256:c9763e5c187ecf74091c845626b0bdcc6130a20a0de7a86ae0108e2b5335ed3f",
+ "sha256:f44eb231b9df485874f2ffd22dfd0c3c711e7de076516b9374edea5c65bc67ae"
],
"index": "pypi",
- "version": "==2.5.0"
+ "version": "==2.6.1"
},
"importlib-metadata": {
"hashes": [
@@ -1281,11 +1374,11 @@
},
"ipykernel": {
"hashes": [
- "sha256:167c3ef08450f5e060b76c749905acb0e0fbef9365899377a4a1eae728864383",
- "sha256:b503913e0b4cce7ed2de965457dfb2edd633e8234161a60e23f2fe2161345d12"
+ "sha256:1a7def9c986f1ee018c1138d16951932d4c9d4da01dad45f9d34e9899565a22f",
+ "sha256:b368ad13edb71fa2db367a01e755a925d7f75ed5e09fbd3f06c85e7a8ef108a8"
],
"index": "pypi",
- "version": "==5.1.2"
+ "version": "==5.1.3"
},
"ipython": {
"hashes": [
@@ -1335,11 +1428,11 @@
},
"jinja2": {
"hashes": [
- "sha256:065c4f02ebe7f7cf559e49ee5a95fb800a9e4528727aec6f24402a5374c65013",
- "sha256:14dd6caf1527abb21f08f86c784eac40853ba93edb79552aa1e4b8aef1b61c7b"
+ "sha256:74320bb91f31270f9551d46522e33af46a80c3d619f4a4bf42b3164d30b5911f",
+ "sha256:9fe95f19286cfefaa917656583d020be14e7859c6b0252588391e47db34527de"
],
"index": "pypi",
- "version": "==2.10.1"
+ "version": "==2.10.3"
},
"jmespath": {
"hashes": [
@@ -1365,10 +1458,10 @@
},
"jsonschema": {
"hashes": [
- "sha256:5f9c0a719ca2ce14c5de2fd350a64fd2d13e8539db29836a86adc990bb1a068f",
- "sha256:8d4a2b7b6c2237e0199c8ea1a6d3e05bf118e289ae2b9d7ba444182a2959560d"
+ "sha256:2fa0684276b6333ff3c0b1b27081f4b2305f0a36cf702a23db50edb141893c3f",
+ "sha256:94c0a13b4a0616458b42529091624e66700a17f847453e52279e35509a5b7631"
],
- "version": "==3.0.2"
+ "version": "==3.1.1"
},
"jupyter": {
"hashes": [
@@ -1381,11 +1474,11 @@
},
"jupyter-client": {
"hashes": [
- "sha256:6a6d415c62179728f6d9295b37356d8f6833e9e01c2b6e1901dc555571f57b21",
- "sha256:f406f214f9daa92be110d5b83d62f3451ffc73d3522db7350f0554683533ab18"
+ "sha256:60e6faec1031d63df57f1cc671ed673dced0ed420f4377ea33db37b1c188b910",
+ "sha256:d0c077c9aaa4432ad485e7733e4d91e48f87b4f4bab7d283d42bb24cbbba0a0f"
],
"markers": "python_version >= '2.7' and python_version not in '3.0, 3.1, 3.2, 3.3'",
- "version": "==5.3.3"
+ "version": "==5.3.4"
},
"jupyter-console": {
"hashes": [
@@ -1397,11 +1490,11 @@
},
"jupyter-core": {
"hashes": [
- "sha256:2c6e7c1e9f2ac45b5c2ceea5730bc9008d92fe59d0725eac57b04c0edfba24f7",
- "sha256:f4fa22d6cf25f34807c995f22d2923693575c70f02557bcbfbe59bd5ec8d8b84"
+ "sha256:464769f7387d7a62a2403d067f1ddc616655b7f77f5d810c0dd62cb54bfd0fb9",
+ "sha256:a183e0ec2e8f6adddf62b0a3fc6a2237e3e0056d381e536d3e7c7ecc3067e244"
],
"markers": "python_version >= '2.7' and python_version not in '3.0, 3.1, 3.2, 3.3'",
- "version": "==4.5.0"
+ "version": "==4.6.1"
},
"keras-applications": {
"hashes": [
@@ -1596,13 +1689,6 @@
],
"version": "==0.6.1"
},
- "meld3": {
- "hashes": [
- "sha256:1efda676264490db2e30bfb81b27a918cc6d9c2de6d609491aa43410b9537eb9",
- "sha256:a78cdcb6c0342b7ac82d900b584bd918ef72f86b60cdbf04754f840c070eb20c"
- ],
- "version": "==2.0.0"
- },
"mistune": {
"hashes": [
"sha256:59a3429db53c50b5c6bcc8a07f8848cb00d7dc8bdb431a4ab41920d201d4756e",
@@ -1672,10 +1758,11 @@
},
"networkx": {
"hashes": [
- "sha256:8311ddef63cf5c5c5e7c1d0212dd141d9a1fe3f474915281b73597ed5f1d4e3d"
+ "sha256:cdfbf698749a5014bf2ed9db4a07a5295df1d3a53bf80bf3cbd61edf9df05fa1",
+ "sha256:f8f4ff0b6f96e4f9b16af6b84622597b5334bf9cae8cf9b2e42e7985d5c95c64"
],
- "markers": "python_version >= '3.5'",
- "version": "==2.3"
+ "index": "pypi",
+ "version": "==2.4"
},
"nose": {
"hashes": [
@@ -1704,25 +1791,30 @@
},
"numpy": {
"hashes": [
- "sha256:05dbfe72684cc14b92568de1bc1f41e5f62b00f714afc9adee42f6311738091f",
- "sha256:0d82cb7271a577529d07bbb05cb58675f2deb09772175fab96dc8de025d8ac05",
- "sha256:10132aa1fef99adc85a905d82e8497a580f83739837d7cbd234649f2e9b9dc58",
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- "sha256:16f19b3aa775dddc9814e02a46b8e6ae6a54ed8cf143962b4e53f0471dbd7b16",
- "sha256:3d0b0989dd2d066db006158de7220802899a1e5c8cf622abe2d0bd158fd01c2c",
- "sha256:438a3f0e7b681642898fd7993d38e2bf140a2d1eafaf3e89bb626db7f50db355",
- "sha256:5fd214f482ab53f2cea57414c5fb3e58895b17df6e6f5bca5be6a0bb6aea23bb",
- "sha256:73615d3edc84dd7c4aeb212fa3748fb83217e00d201875a47327f55363cef2df",
- "sha256:7bd355ad7496f4ce1d235e9814ec81ee3d28308d591c067ce92e49f745ba2c2f",
- "sha256:7d077f2976b8f3de08a0dcf5d72083f4af5411e8fddacd662aae27baa2601196",
- "sha256:a4092682778dc48093e8bda8d26ee8360153e2047826f95a3f5eae09f0ae3abf",
- "sha256:b458de8624c9f6034af492372eb2fee41a8e605f03f4732f43fc099e227858b2",
- "sha256:e70fc8ff03a961f13363c2c95ef8285e0cf6a720f8271836f852cc0fa64e97c8",
- "sha256:ee8e9d7cad5fe6dde50ede0d2e978d81eafeaa6233fb0b8719f60214cf226578",
- "sha256:f4a4f6aba148858a5a5d546a99280f71f5ee6ec8182a7d195af1a914195b21a2"
- ],
- "index": "pypi",
- "version": "==1.17.2"
+ "sha256:0b0dd8f47fb177d00fa6ef2d58783c4f41ad3126b139c91dd2f7c4b3fdf5e9a5",
+ "sha256:25ffe71f96878e1da7e014467e19e7db90ae7d4e12affbc73101bcf61785214e",
+ "sha256:26efd7f7d755e6ca966a5c0ac5a930a87dbbaab1c51716ac26a38f42ecc9bc4b",
+ "sha256:28b1180c758abf34a5c3fea76fcee66a87def1656724c42bb14a6f9717a5bdf7",
+ "sha256:2e418f0a59473dac424f888dd57e85f77502a593b207809211c76e5396ae4f5c",
+ "sha256:30c84e3a62cfcb9e3066f25226e131451312a044f1fe2040e69ce792cb7de418",
+ "sha256:4650d94bb9c947151737ee022b934b7d9a845a7c76e476f3e460f09a0c8c6f39",
+ "sha256:4dd830a11e8724c9c9379feed1d1be43113f8bcce55f47ea7186d3946769ce26",
+ "sha256:4f2a2b279efde194877aff1f76cf61c68e840db242a5c7169f1ff0fd59a2b1e2",
+ "sha256:62d22566b3e3428dfc9ec972014c38ed9a4db4f8969c78f5414012ccd80a149e",
+ "sha256:669795516d62f38845c7033679c648903200980d68935baaa17ac5c7ae03ae0c",
+ "sha256:75fcd60d682db3e1f8fbe2b8b0c6761937ad56d01c1dc73edf4ef2748d5b6bc4",
+ "sha256:9395b0a41e8b7e9a284e3be7060db9d14ad80273841c952c83a5afc241d2bd98",
+ "sha256:9e37c35fc4e9410093b04a77d11a34c64bf658565e30df7cbe882056088a91c1",
+ "sha256:a0678793096205a4d784bd99f32803ba8100f639cf3b932dc63b21621390ea7e",
+ "sha256:b46554ad4dafb2927f88de5a1d207398c5385edbb5c84d30b3ef187c4a3894d8",
+ "sha256:c867eeccd934920a800f65c6068acdd6b87e80d45cd8c8beefff783b23cdc462",
+ "sha256:dd0667f5be56fb1b570154c2c0516a528e02d50da121bbbb2cbb0b6f87f59bc2",
+ "sha256:de2b1c20494bdf47f0160bd88ed05f5e48ae5dc336b8de7cfade71abcc95c0b9",
+ "sha256:f1df7b2b7740dd777571c732f98adb5aad5450aee32772f1b39249c8a50386f6",
+ "sha256:ffca69e29079f7880c5392bf675eb8b4146479d976ae1924d01cd92b04cccbcc"
+ ],
+ "index": "pypi",
+ "version": "==1.17.3"
},
"opencv-python": {
"hashes": [
@@ -1794,24 +1886,28 @@
},
"pandas": {
"hashes": [
- "sha256:18d91a9199d1dfaa01ad645f7540370ba630bdcef09daaf9edf45b4b1bca0232",
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- "sha256:f1b21bc5cf3dbea53d33615d1ead892dfdae9d7052fa8898083bec88be20dcd2"
+ "sha256:0f484f43658a72e7d586a74978259657839b5bd31b903e963bb1b1491ab51775",
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+ "sha256:cbe4985f5c82a173f8cff6b7fe92d551addf99fb4ea9ff4eb4b1fe606bb098ec",
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],
"markers": "python_version >= '3.5.3'",
- "version": "==0.25.1"
+ "version": "==0.25.2"
},
"pandocfilters": {
"hashes": [
@@ -1858,35 +1954,39 @@
},
"pillow": {
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+ "sha256:c6414f6aad598364aaf81068cabb077894eb88fed99c6a65e6e8217bab62ae7a",
+ "sha256:c710fcb7ee32f67baf25aa9ffede4795fd5d93b163ce95fdc724383e38c9df96",
+ "sha256:c7be4b8a09852291c3c48d3c25d1b876d2494a0a674980089ac9d5e0d78bd132",
+ "sha256:c9e5ffb910b14f090ac9c38599063e354887a5f6d7e6d26795e916b4514f2c1a",
+ "sha256:e0697b826da6c2472bb6488db4c0a7fa8af0d52fa08833ceb3681358914b14e5",
+ "sha256:e9a3edd5f714229d41057d56ac0f39ad9bdba6767e8c888c951869f0bdd129b0"
+ ],
+ "index": "pypi",
+ "version": "==6.2.1"
},
"pprofile": {
"hashes": [
@@ -1934,6 +2034,7 @@
"psutil": {
"hashes": [
"sha256:028a1ec3c6197eadd11e7b46e8cc2f0720dc18ac6d7aabdb8e8c0d6c9704f000",
+ "sha256:12542c3642909f4cd1928a2fba59e16fa27e47cbeea60928ebb62a8cbd1ce123",
"sha256:503e4b20fa9d3342bcf58191bbc20a4a5ef79ca7df8972e6197cc14c5513e73d",
"sha256:863a85c1c0a5103a12c05a35e59d336e1d665747e531256e061213e2e90f63f3",
"sha256:954f782608bfef9ae9f78e660e065bd8ffcfaea780f9f2c8a133bb7cb9e826d7",
@@ -2021,11 +2122,11 @@
},
"pylint": {
"hashes": [
- "sha256:7edbae11476c2182708063ac387a8f97c760d9cfe36a5ede0ca996f90cf346c8",
- "sha256:844ce067788028c1a35086a5c66bc5e599ddd851841c41d6ee1623b36774d9f2"
+ "sha256:7b76045426c650d2b0f02fc47c14d7934d17898779da95288a74c2a7ec440702",
+ "sha256:856476331f3e26598017290fd65bebe81c960e806776f324093a46b76fb2d1c0"
],
"index": "pypi",
- "version": "==2.4.2"
+ "version": "==2.4.3"
},
"pylogbeat": {
"hashes": [
@@ -2090,6 +2191,7 @@
"sha256:30f36a9c70450c7878053fa1344aca0145fd47d845270b43a7ee9192a051bf39",
"sha256:37aa336a317209f1bb099ad177fef0da45be36a2aa664507c5d72015f956c310",
"sha256:4943decfc5b905748f0756fdd99d4f9498d7064815c4cf3643820c9028b711d1",
+ "sha256:53126cd91356342dcae7e209f840212a58dcf1177ad52c1d938d428eebc9fee5",
"sha256:57ef38a65056e7800859e5ba9e6091053cd06e1038983016effaffe0efcd594a",
"sha256:5bd61e9b44c543016ce1f6aef48606280e45f892a928ca7068fba30021e9b786",
"sha256:6482d3017a0c0327a49dddc8bd1074cc730d45db2ccb09c3bac1f8f32d1eb61b",
@@ -2098,6 +2200,7 @@
"sha256:a39f54ccbcd2757d1d63b0ec00a00980c0b382c62865b61a505163943624ab20",
"sha256:aabb0c5232910a20eec8563503c153a8e78bbf5459490c49ab31f6adf3f3a415",
"sha256:bd4ecb473a96ad0f90c20acba4f0bf0df91a4e03a1f4dd6a4bdc9ca75aa3a715",
+ "sha256:bf459128feb543cfca16a95f8da31e2e65e4c5257d2f3dfa8c0c1031139c9c92",
"sha256:e2da3c13307eac601f3de04887624939aca8ee3c9488a0bb0eca4fb9401fc6b1",
"sha256:f67814c38162f4deb31f68d590771a29d5ae3b1bd64b75cf232308e5c74777e0"
],
@@ -2169,24 +2272,26 @@
},
"pyqt5-sip": {
"hashes": [
- "sha256:304acf771b6033cb4bafc415939d227c91265d30664ed643b298d7e95f509f81",
- "sha256:39d2677f4de46ed4d7aa3b612f31c74c881975efe51c6a23fbb1d9382e4cc850",
- "sha256:54b99a3057e8f01b90d49cca9ca566b1ea23d8920038760f44e75b90c62b9d5f",
- "sha256:59f5332f86f3ccd3ac94674fe91eae6e8aca26da7c6588917cabd0fe22af106d",
- "sha256:72be07a21b0f379987c4ec59bc86834a9719a2f9cfb49606a4d4e34dae9aa549",
- "sha256:7b3b8c015e545fa30e42205fc1115b7c6afcb6acec790ce3f330a06323730523",
- "sha256:7fbb6389c20aff4c3257e89bb1787effffcaf05c32d937c00094ae45846bffd5",
- "sha256:828d9911acc483672a2bae1cc1bf79f591eb3338faad1f2c798aa2f45459a318",
- "sha256:a9460dac973deccc6ff2d90f18fd105cbaada147f84e5917ed79374dcb237758",
- "sha256:aade50f9a1b9d20f6aabe88e8999b10db57218f5c31950160f3f7957dd64e07c",
- "sha256:ac9e5b282d1f0771a8310ed974afe1961ec31e9ae787d052c0e504ea46ae323a",
- "sha256:ba41bd21b89c6713f7077b5f7d4a1c452989190aad5704e215560a266a1ecbab",
- "sha256:c309dbbd6c155e961bfd6893496afa5cd184cce6f7dffd87ea68ee048b6f97e1",
- "sha256:cfc21b1f80d4655ffa776c505a2576b4d148bbc52bb3e33fedbf6cfbdbc09d1b",
- "sha256:d7b26e0b6d81bf14c1239e6a891ac1303a7e882512d990ec330369c7269226d7",
- "sha256:f8b7a3e05235ce58a38bf317f71a5cb4ab45d3b34dc57421dd8cea48e0e4023e"
- ],
- "version": "==4.19.19"
+ "sha256:02d94786bada670ab17a2b62ce95b3cf8e3b40c99d36007593a6334d551840bb",
+ "sha256:06bc66b50556fb949f14875a4c224423dbf03f972497ccb883fb19b7b7c3b346",
+ "sha256:091fbbe10a7aebadc0e8897a9449cda08d3c3f663460d812eca3001ca1ed3526",
+ "sha256:0a067ade558befe4d46335b13d8b602b5044363bfd601419b556d4ec659bca18",
+ "sha256:1910c1cb5a388d4e59ebb2895d7015f360f3f6eeb1700e7e33e866c53137eb9e",
+ "sha256:1c7ad791ec86247f35243bbbdd29cd59989afbe0ab678e0a41211f4407f21dd8",
+ "sha256:3c330ff1f70b3eaa6f63dce9274df996dffea82ad9726aa8e3d6cbe38e986b2f",
+ "sha256:482a910fa73ee0e36c258d7646ef38f8061774bbc1765a7da68c65056b573341",
+ "sha256:7695dfafb4f5549ce1290ae643d6508dfc2646a9003c989218be3ce42a1aa422",
+ "sha256:8274ed50f4ffbe91d0f4cc5454394631edfecd75dc327aa01be8bc5818a57e88",
+ "sha256:9047d887d97663790d811ac4e0d2e895f1bf2ecac4041691487de40c30239480",
+ "sha256:9f6ab1417ecfa6c1ce6ce941e0cebc03e3ec9cd9925058043229a5f003ae5e40",
+ "sha256:b43ba2f18999d41c3df72f590348152e14cd4f6dcea2058c734d688dfb1ec61f",
+ "sha256:c3ab9ea1bc3f4ce8c57ebc66fb25cd044ef92ed1ca2afa3729854ecc59658905",
+ "sha256:da69ba17f6ece9a85617743cb19de689f2d63025bf8001e2facee2ec9bcff18f",
+ "sha256:ef3c7a0bf78674b0dda86ff5809d8495019903a096c128e1f160984b37848f73",
+ "sha256:fabff832046643cdb93920ddaa8f77344df90768930fbe6bb33d211c4dcd0b5e"
+ ],
+ "markers": "python_version >= '3.5'",
+ "version": "==12.7.0"
},
"pyrsistent": {
"hashes": [
@@ -2218,10 +2323,10 @@
},
"python-engineio": {
"hashes": [
- "sha256:2a4c874aea686e79f8ea9efc30748110df581df6d577d18bb5eaa1a8f2199d12",
- "sha256:eae09ef72bbb13e66ad0bbe2fbb87271e0ba5e2ec8c6693c6be1e14239564e32"
+ "sha256:4a13fb87c819b855c55a731fdf82559adb8311c04cfdfebd6b9ecd1c2afbb575",
+ "sha256:9c9a6035b4b5e5a225f426f846afa14cf627f7571d1ae02167cb703fefd134b7"
],
- "version": "==3.9.3"
+ "version": "==3.10.0"
},
"python-logstash": {
"hashes": [
@@ -2247,10 +2352,10 @@
},
"pytz": {
"hashes": [
- "sha256:26c0b32e437e54a18161324a2fca3c4b9846b74a8dccddd843113109e1116b32",
- "sha256:c894d57500a4cd2d5c71114aaab77dbab5eabd9022308ce5ac9bb93a60a6f0c7"
+ "sha256:1c557d7d0e871de1f5ccd5833f60fb2550652da6be2693c1e02300743d21500d",
+ "sha256:b02c06db6cf09c12dd25137e563b31700d3b80fcc4ad23abb7a315f2789819be"
],
- "version": "==2019.2"
+ "version": "==2019.3"
},
"pyvcd": {
"hashes": [
@@ -2262,34 +2367,30 @@
},
"pywavelets": {
"hashes": [
- "sha256:18b193b67937e805a8e79c036bd2aa4ea3a357737256efeefdabd19c95083c3b",
- "sha256:1d7ba03baa81938b17d4819db36f018e680d929af329062af4d4b6d6236d02ba",
- "sha256:21f39d86cc35e003576fc1400b15534e2999570418fcdb17ea62d1ff8773b076",
- "sha256:250412f482d5cb358b7ec323b2a783d91e5cfc337fdf8fde3c59bf2c35d6366f",
- "sha256:25c0c592bf43eaffb4d3c6b6444b14c7407db750b6f2d344d809d4af934319d9",
- "sha256:2f2cdd96e4882b0c18e75cc90c4710de429ac226ce53b58a90c7420e3e307631",
- "sha256:3abed8dcd3e94ead72ee8010b494df5a9bdbdd5e39129d52fbf8066efa323a51",
- "sha256:3e99ab8feeb47755738fb8deb8154c9604c4a7996b1b7db6b090475105ca7c92",
- "sha256:64926c4c78dd690ec0d61be20f7c27cfbde6de9fa66ab8205eb079d9db6927fc",
- "sha256:687ec8877c10e3a03595ad167d1ea2662bc1ab13ef43d63a6e207a53b2ee4c26",
- "sha256:6af0077c7a4c9935aa64301f6942468b494656b8812e801d4a635cf42088f96c",
- "sha256:7215856a5d2e1a2dccca1f71d912ee6a7387086f3b3adcb55d7c41314c6abb0c",
- "sha256:9e47b241533add77961093b1e40cfff031597d429e91ad7c675838be0f7cc0df",
- "sha256:9e782f49dca57bc0fd2a40c0917949d77be2ecc999ccd44fff57fb10aa214135",
- "sha256:a12c7a6258c0015d2c75d88b87393ee015494551f049009e8b63eafed2d78efc",
- "sha256:a5027d47484498e70391b311a2688c4f74294de629b982ed17be57be4c77ade7",
- "sha256:ab02363467ee3cb222c5b425bc53453270ddae72bce313e72fd14616692d725a",
- "sha256:adc79308c65a2007bdbd5846fda70088e7ead0ef0a5a6f44d08829e9478a907f",
- "sha256:afaaee392450785a346d9e5e5f6e5307b13958d8b0633818632cb38972a7752a",
- "sha256:b26b836c7f71df7b2779e62d1338367cfe37b98324e9b0d54b428ac030e3d1f0",
- "sha256:b9adbc27d70a2626c235a18b41315de2832c384651d03383db7a58c2a2bccc6f",
- "sha256:bd6e62efb7839fd6bf894b7b9aec6d58be0c44a38ea0c9f3c5bea834d84d05eb",
- "sha256:de083a3a71576a9c3d8ba73b6f0425e4690d6ac6e480562f30bec5cb20667324",
- "sha256:e89551257233a3da717a9e6e2e303243df75faffe0b6781d21c15eb9d682ec6d",
- "sha256:eafb7d609c41a04028144f4b6697792f448554960ef353244aaf0a5883263543",
- "sha256:fb3ee9f65d25ee5c89104e533d5f341c253cdb9543ef6fcd6dfa599b12e84f1c"
- ],
- "version": "==1.0.3"
+ "sha256:076ca8907001fdfe4205484f719d12b4a0262dfe6652fa1cfc3c5c362d14dc84",
+ "sha256:18a51b3f9416a2ae6e9a35c4af32cf520dd7895f2b69714f4aa2f4342fca47f9",
+ "sha256:1a64b40f6acb4ffbaccce0545d7fc641744f95351f62e4c6aaa40549326008c9",
+ "sha256:35959c041ec014648575085a97b498eafbbaa824f86f6e4a59bfdef8a3fe6308",
+ "sha256:55e39ec848ceec13c9fa1598253ae9dd5c31d09dfd48059462860d2b908fb224",
+ "sha256:6162dc0ae04669ea04b4b51420777b9ea2d30b0a9d02901b2a3b4d61d159c2e9",
+ "sha256:68b5c33741d26c827074b3d8f0251de1c3019bb9567b8d303eb093c822ce28f1",
+ "sha256:720dbcdd3d91c6dfead79c80bf8b00a1d8aa4e5d551dc528c6d5151e4efc3403",
+ "sha256:7947e51ca05489b85928af52a34fe67022ab5b81d4ae32a4109a99e883a0635e",
+ "sha256:79f5b54f9dc353e5ee47f0c3f02bebd2c899d49780633aa771fed43fa20b3149",
+ "sha256:80b924edbc012ded8aa8b91cb2fd6207fb1a9a3a377beb4049b8a07445cec6f0",
+ "sha256:889d4c5c5205a9c90118c1980df526857929841df33e4cd1ff1eff77c6817a65",
+ "sha256:935ff247b8b78bdf77647fee962b1cc208c51a7b229db30b9ba5f6da3e675178",
+ "sha256:98b2669c5af842a70cfab33a7043fcb5e7535a690a00cd251b44c9be0be418e5",
+ "sha256:9e2528823ccf5a0a1d23262dfefe5034dce89cd84e4e124dc553dfcdf63ebb92",
+ "sha256:bc5e87b72371da87c9bebc68e54882aada9c3114e640de180f62d5da95749cd3",
+ "sha256:be105382961745f88d8196bba5a69ee2c4455d87ad2a2e5d1eed6bd7fda4d3fd",
+ "sha256:c06d2e340c7bf8b9ec71da2284beab8519a3908eab031f4ea126e8ccfc3fd567",
+ "sha256:cfe79844526dd92e3ecc9490b5031fca5f8ab607e1e858feba232b1b788ff0ea",
+ "sha256:d510aef84d9852653d079c84f2f81a82d5d09815e625f35c95714e7364570ad4",
+ "sha256:e02a0558e0c2ac8b8bbe6a6ac18c136767ec56b96a321e0dfde2173adfa5a504"
+ ],
+ "markers": "python_version >= '3.5'",
+ "version": "==1.1.1"
},
"pyzmq": {
"hashes": [
@@ -2331,11 +2432,11 @@
},
"redis": {
"hashes": [
- "sha256:98a22fb750c9b9bb46e75e945dc3f61d0ab30d06117cbb21ff9cd1d315fedd3b",
- "sha256:c504251769031b0dd7dd5cf786050a6050197c6de0d37778c80c08cb04ae8275"
+ "sha256:3613daad9ce5951e426f460deddd5caf469e08a3af633e9578fc77d362becf62",
+ "sha256:8d0fc278d3f5e1249967cba2eb4a5632d19e45ce5c09442b8422d15ee2c22cc2"
],
"index": "pypi",
- "version": "==3.3.8"
+ "version": "==3.3.11"
},
"redlock": {
"hashes": [
@@ -2377,25 +2478,20 @@
},
"scikit-image": {
"hashes": [
- "sha256:0fb4f61ba28e7034dc490b7fd37a35428493cc1180205991aea41ab78c1a3b2a",
- "sha256:117244d206f014fcdc7fd3b03dc25ffd3c32be49c5103b916dadcf3c268ce629",
- "sha256:2dee5c19893bbfebeb30c2edd47e3092d84fe671e1278c8e1b8ab0b541b88590",
- "sha256:2edf2189a89d68e7909bfe939f6f9978d4807c4c2c6464b9d23944171272efe5",
- "sha256:56f8ec5106c1b6037f25395eb6a2c29cbbb1baa9d8cedb48a6488a697f9e0c02",
- "sha256:5c24501fbe0000bf215418ced56fc718ae5bbd004df7dc460fd3fb095385dec5",
- "sha256:6665b00b649237171eb0c34ec7d2c5ee96f51cc826edf1b70654fc05fddec7a8",
- "sha256:676838be922fdc7c65a1bfa71409b382874d60e2a7a0c968fe832f63b485842d",
- "sha256:6b8697a52e1e3c2663f74a0a972cc601d2ceb5b3299cc9be3c3b6ac41d76d238",
- "sha256:91208ff13381ccbacce8a38a771e9d9d8982dce146581bcf6656aa8fd05d06ea",
- "sha256:a8fb7dc56b14656768fdf21d4325bf82f543fad51dc83c24aa6a27456a946a2d",
- "sha256:bea86976ab9b7bebca43721b3ff8fd74a002e1fd95e7600987cd42664fde8a39",
- "sha256:ce9354571e1323ed98251723a7e5ffb3526ddd3b533a27aaca4ebd13ed479c56",
- "sha256:df111e654b47e5ea456c50553debe4c5ddd97258894c7ad3b7f2f9f10798e053",
- "sha256:ed6d2dbb54a68b200df8783fcb17c406ece20420c8c86508ab0f5966e8631da5",
- "sha256:f0491621a6b1d2828d47acaf41d3167a647eaae44ef8fcf83b72eb3e1cc7ac51"
- ],
- "index": "pypi",
- "version": "==0.15.0"
+ "sha256:063d1c20fcd53762f82ee58c29783ae4e8f6fbed445b41b704fa33b6f355729d",
+ "sha256:0808ab5f8218d91a1c008036993636535a37efd67a52ab0f2e6e3f4b7e75aeda",
+ "sha256:2a54bea469eb1b611bee1ce36e60710f5f94f29205bc5bd67a51793909b1e62b",
+ "sha256:2aa962aa82d815606d7dad7f045f5d7ca55c65b4320d47e15a98fc92612c2d6c",
+ "sha256:2d346d49b6852cffb47cbde995e2696d5b07f688d8c057a0a4548abf3a98f920",
+ "sha256:3ad2efa792ab8de5fcefe6f4f5bc1ab64c411cdb5c829ce1526ab3a5a7729627",
+ "sha256:3af3d781ce085573ced37b2b5b9abfd32ce3d4723bd17f37e829025d189b0421",
+ "sha256:6786b127f33470fd843e644435522fbf43bce05c9f5527946c390ccb9e1cac27",
+ "sha256:8b2b768b02c6b7476f2e16ddd91f827d3817aef73f82cf28bff7a8dcdfd8c55c",
+ "sha256:dd7fbd32da74d4e9967dc15845f731f16e7966cee61f5dc0e12e2abb1305068c",
+ "sha256:e774377876cb258e8f4d63f7809863f961c98aa02263b3ff54a39483bc6f7d26"
+ ],
+ "index": "pypi",
+ "version": "==0.16.2"
},
"scipy": {
"hashes": [
@@ -2496,10 +2592,10 @@
},
"sqlalchemy": {
"hashes": [
- "sha256:2f8ff566a4d3a92246d367f2e9cd6ed3edeef670dcd6dda6dfdc9efed88bcd80"
+ "sha256:0f0768b5db594517e1f5e1572c73d14cf295140756431270d89496dc13d5e46c"
],
"index": "pypi",
- "version": "==1.3.8"
+ "version": "==1.3.10"
},
"subprocess32": {
"hashes": [
@@ -2511,11 +2607,11 @@
},
"supervisor": {
"hashes": [
- "sha256:43e87c7b572a94acdb586aaebb06844dae1aa02856b984c5a738032abd753fb7",
- "sha256:9644990d21a1ba03b1a7ac5e9a0c0c62e12822e258f9e98f4a0b128461b3f10a"
+ "sha256:2dc86fe0476e945e61483d614ceb2cf4f93b95282eb243bdf792621994360383",
+ "sha256:a76b2f77a560f2dc411c0254a4eb15f555e99faac48621b0f1fc9ab013944f47"
],
"index": "pypi",
- "version": "==4.0.4"
+ "version": "==4.1.0"
},
"tenacity": {
"hashes": [
@@ -2535,10 +2631,10 @@
},
"tensorflow-estimator": {
"hashes": [
- "sha256:54fdfe8712d54627579bc6d524ced43bbd57042cb2ce411bdf2ae46b29a772da"
+ "sha256:aa8deab25d09a9730dfbae8ec58f4eb00ec2a90b5ca3dcbd8fa0717103d3bbb3"
],
"index": "pypi",
- "version": "==2.0.0"
+ "version": "==2.0.1"
},
"tensorflow-gpu": {
"hashes": [
@@ -2603,20 +2699,25 @@
},
"typed-ast": {
"hashes": [
+ "sha256:1170afa46a3799e18b4c977777ce137bb53c7485379d9706af8a59f2ea1aa161",
"sha256:18511a0b3e7922276346bcb47e2ef9f38fb90fd31cb9223eed42c85d1312344e",
"sha256:262c247a82d005e43b5b7f69aff746370538e176131c32dda9cb0f324d27141e",
"sha256:2b907eb046d049bcd9892e3076c7a6456c93a25bebfe554e931620c90e6a25b0",
"sha256:354c16e5babd09f5cb0ee000d54cfa38401d8b8891eefa878ac772f827181a3c",
+ "sha256:48e5b1e71f25cfdef98b013263a88d7145879fbb2d5185f2a0c79fa7ebbeae47",
"sha256:4e0b70c6fc4d010f8107726af5fd37921b666f5b31d9331f0bd24ad9a088e631",
"sha256:630968c5cdee51a11c05a30453f8cd65e0cc1d2ad0d9192819df9978984529f4",
"sha256:66480f95b8167c9c5c5c87f32cf437d585937970f3fc24386f313a4c97b44e34",
"sha256:71211d26ffd12d63a83e079ff258ac9d56a1376a25bc80b1cdcdf601b855b90b",
+ "sha256:7954560051331d003b4e2b3eb822d9dd2e376fa4f6d98fee32f452f52dd6ebb2",
+ "sha256:838997f4310012cf2e1ad3803bce2f3402e9ffb71ded61b5ee22617b3a7f6b6e",
"sha256:95bd11af7eafc16e829af2d3df510cecfd4387f6453355188342c3e79a2ec87a",
"sha256:bc6c7d3fa1325a0c6613512a093bc2a2a15aeec350451cbdf9e1d4bffe3e3233",
"sha256:cc34a6f5b426748a507dd5d1de4c1978f2eb5626d51326e43280941206c209e1",
"sha256:d755f03c1e4a51e9b24d899561fec4ccaf51f210d52abdf8c07ee2849b212a36",
"sha256:d7c45933b1bdfaf9f36c579671fec15d25b06c8398f113dab64c18ed1adda01d",
"sha256:d896919306dd0aa22d0132f62a1b78d11aaf4c9fc5b3410d3c666b818191630a",
+ "sha256:fdc1c9bbf79510b76408840e009ed65958feba92a88833cdceecff93ae8fff66",
"sha256:ffde2fbfad571af120fcbfbbc61c72469e72f550d676c3342492a9dfdefb8f12"
],
"markers": "python_version < '3.8' and implementation_name == 'cpython'",
diff --git a/README.md b/README.md
index 29987ff117781f..564287562b4bfa 100644
--- a/README.md
+++ b/README.md
@@ -3,7 +3,7 @@
Welcome to openpilot
======
-[openpilot](http://github.com/commaai/openpilot) is an open source driver assistance system. Currently, it performs the functions of Adaptive Cruise Control (ACC) and Lane Keeping Assist System (LKAS) for selected Honda, Toyota, Acura, Lexus, Chevrolet, Hyundai, Kia. It's about on par with Tesla Autopilot and GM Super Cruise, and better than [all other manufacturers](http://www.thedrive.com/tech/5707/the-war-for-autonomous-driving-part-iii-us-vs-germany-vs-japan).
+[openpilot](http://github.com/commaai/openpilot) is an open source driver assistance system. Currently, it performs the functions of Adaptive Cruise Control (ACC) and Automated Lane Centering (ALC) for selected Honda, Toyota, Acura, Lexus, Chevrolet, Hyundai, Kia, Subaru, Volkswagen. It's about on par with Tesla Autopilot and GM Super Cruise, and better than [all other manufacturers](http://www.thedrive.com/tech/5707/the-war-for-autonomous-driving-part-iii-us-vs-germany-vs-japan).
The openpilot codebase has been written to be concise and to enable rapid prototyping. We look forward to your contributions - improving real vehicle automation has never been easier.
@@ -29,116 +29,116 @@ Community
openpilot is developed by [comma.ai](https://comma.ai/) and users like you.
-We have a [Twitter you should follow](https://twitter.com/comma_ai).
-
-Also, we have a several thousand people community on [Discord](https://discord.comma.ai).
+[Follow us on Twitter](https://twitter.com/comma_ai) and [join our Discord](https://discord.comma.ai).
-  |
-  |
-  |
-  |
+  |
+  |
+  |
+  |
-  |
-  |
-  |
-  |
+  |
+  |
+  |
+  |
Hardware
------
-At the moment openpilot supports the [EON Dashcam DevKit](https://comma.ai/shop/products/eon-dashcam-devkit). A [panda](https://shop.comma.ai/products/panda-obd-ii-dongle) and a [giraffe](https://comma.ai/shop/products/giraffe/) are recommended tools to interface the EON with the car. We'd like to support other platforms as well.
+At the moment openpilot supports the [EON DevKit](https://comma.ai/shop/products/eon-dashcam-devkit). A [car harness](https://comma.ai/shop/products/car-harness) is recommended to connect the EON to the car. We'd like to support other platforms as well.
Install openpilot on a neo device by entering ``https://openpilot.comma.ai`` during NEOS setup.
Supported Cars
------
-| Make | Model (US Market Reference)| Supported Package | Lateral | Longitudinal | No Accel Below | No Steer Below | Giraffe |
-| ---------------------| ---------------------------| ---------------------| --------| ---------------| -----------------| ---------------|-------------------|
-| Acura | ILX 2016-18 | AcuraWatch Plus | Yes | Yes | 25mph1| 25mph | Nidec |
-| Acura | RDX 2016-18 | AcuraWatch Plus | Yes | Yes | 25mph1| 12mph | Nidec |
-| Buick3 | Regal 2018 | Adaptive Cruise | Yes | Yes | 0mph | 7mph | Custom7|
-| Chevrolet3| Malibu 2017 | Adaptive Cruise | Yes | Yes | 0mph | 7mph | Custom7|
-| Chevrolet3| Volt 2017-18 | Adaptive Cruise | Yes | Yes | 0mph | 7mph | Custom7|
-| Cadillac3 | ATS 2018 | Adaptive Cruise | Yes | Yes | 0mph | 7mph | Custom7|
-| Chrysler | Pacifica 2017-18 | Adaptive Cruise | Yes | Stock | 0mph | 9mph | FCA |
-| Chrysler | Pacifica Hybrid 2017-18 | Adaptive Cruise | Yes | Stock | 0mph | 9mph | FCA |
-| Chrysler | Pacifica Hybrid 2019 | Adaptive Cruise | Yes | Stock | 0mph | 39mph | FCA |
-| GMC3 | Acadia Denali 2018 | Adaptive Cruise | Yes | Yes | 0mph | 7mph | Custom7|
-| Holden3 | Astra 2017 | Adaptive Cruise | Yes | Yes | 0mph | 7mph | Custom7|
-| Honda | Accord 2018-19 | All | Yes | Stock | 0mph | 3mph | Bosch |
-| Honda | Accord Hybrid 2018-19 | All | Yes | Stock | 0mph | 3mph | Bosch |
-| Honda | Civic Sedan/Coupe 2016-18 | Honda Sensing | Yes | Yes | 0mph | 12mph | Nidec |
-| Honda | Civic Sedan/Coupe 2019 | Honda Sensing | Yes | Stock | 0mph | 2mph | Bosch |
-| Honda | Civic Hatchback 2017-19 | Honda Sensing | Yes | Stock | 0mph | 12mph | Bosch |
-| Honda | CR-V 2015-16 | Touring | Yes | Yes | 25mph1| 12mph | Nidec |
-| Honda | CR-V 2017-19 | Honda Sensing | Yes | Stock | 0mph | 12mph | Bosch |
-| Honda | CR-V Hybrid 2017-2019 | Honda Sensing | Yes | Stock | 0mph | 12mph | Bosch |
-| Honda | Fit 2018-19 | Honda Sensing | Yes | Yes | 25mph1| 12mph | Inverted Nidec |
-| Honda | Odyssey 2018-19 | Honda Sensing | Yes | Yes | 25mph1| 0mph | Inverted Nidec |
-| Honda | Passport 2019 | All | Yes | Yes | 25mph1| 12mph | Inverted Nidec |
-| Honda | Pilot 2016-18 | Honda Sensing | Yes | Yes | 25mph1| 12mph | Nidec |
-| Honda | Pilot 2019 | All | Yes | Yes | 25mph1| 12mph | Inverted Nidec |
-| Honda | Ridgeline 2017-19 | Honda Sensing | Yes | Yes | 25mph1| 12mph | Nidec |
-| Hyundai | Santa Fe 2019 | All | Yes | Stock | 0mph | 0mph | Custom6|
-| Hyundai | Elantra 2017-19 | SCC + LKAS | Yes | Stock | 19mph | 34mph | Custom6|
-| Hyundai | Genesis 2018 | All | Yes | Stock | 19mph | 34mph | Custom6|
-| Jeep | Grand Cherokee 2016-18 | Adaptive Cruise | Yes | Stock | 0mph | 9mph | FCA |
-| Jeep | Grand Cherokee 2019 | Adaptive Cruise | Yes | Stock | 0mph | 39mph | FCA |
-| Kia | Optima 2019 | SCC + LKAS | Yes | Stock | 0mph | 0mph | Custom6|
-| Kia | Sorento 2018 | All | Yes | Stock | 0mph | 0mph | Custom6|
-| Kia | Stinger 2018 | SCC + LKAS | Yes | Stock | 0mph | 0mph | Custom6|
-| Lexus | CT Hybrid 2017-18 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Lexus | ES Hybrid 2019 | All | Yes | Yes | 0mph | 0mph | Toyota |
-| Lexus | RX Hybrid 2016-19 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Lexus | IS 2017-2019 | All | Yes | Stock | 22mph | 0mph | Toyota |
-| Lexus | IS Hybrid 2017 | All | Yes | Stock | 0mph | 0mph | Toyota |
-| Subaru | Crosstrek 2018 | EyeSight | Yes | Stock | 0mph | 0mph | Custom4|
-| Subaru | Impreza 2019 | EyeSight | Yes | Stock | 0mph | 0mph | Custom4|
-| Toyota | Avalon 2016 | TSS-P | Yes | Yes2| 20mph1| 0mph | Toyota |
-| Toyota | Avalon 2017-18 | All | Yes | Yes2| 20mph1| 0mph | Toyota |
-| Toyota | Camry 2018-19 | All | Yes | Stock | 0mph5 | 0mph | Toyota |
-| Toyota | Camry Hybrid 2018-19 | All | Yes | Stock | 0mph5 | 0mph | Toyota |
-| Toyota | C-HR 2017-19 | All | Yes | Stock | 0mph | 0mph | Toyota |
-| Toyota | C-HR Hybrid 2017-19 | All | Yes | Stock | 0mph | 0mph | Toyota |
-| Toyota | Corolla 2017-19 | All | Yes | Yes2| 20mph1| 0mph | Toyota |
-| Toyota | Corolla 2020 | All | Yes | Yes | 0mph | 0mph | Toyota |
-| Toyota | Corolla Hatchback 2019 | All | Yes | Yes | 0mph | 0mph | Toyota |
-| Toyota | Highlander 2017-19 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Highlander Hybrid 2017-19 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Prius 2016 | TSS-P | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Prius 2017-19 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Prius Prime 2017-20 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Rav4 2016 | TSS-P | Yes | Yes2| 20mph1| 0mph | Toyota |
-| Toyota | Rav4 2017-18 | All | Yes | Yes2| 20mph1| 0mph | Toyota |
-| Toyota | Rav4 2019 | All | Yes | Yes | 0mph | 0mph | Toyota |
-| Toyota | Rav4 Hybrid 2016 | TSS-P | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Rav4 Hybrid 2017-18 | All | Yes | Yes2| 0mph | 0mph | Toyota |
-| Toyota | Rav4 Hybrid 2019 | All | Yes | Yes | 0mph | 0mph | Toyota |
-| Toyota | Sienna 2018 | All | Yes | Yes2| 0mph | 0mph | Toyota |
+| Make | Model (US Market Reference) | Supported Package | Lateral | Longitudinal | No Accel Below | No Steer Below |
+| ----------------------| -----------------------------------| ---------------------| --------| ---------------| -----------------| ---------------|
+| Acura | ILX 2016-18 | AcuraWatch Plus | Yes | Yes | 25mph1| 25mph |
+| Acura | RDX 2016-18 | AcuraWatch Plus | Yes | Yes | 25mph1| 12mph |
+| Buick3 | Regal 20186 | Adaptive Cruise | Yes | Yes | 0mph | 7mph |
+| Chevrolet3 | Malibu 20176 | Adaptive Cruise | Yes | Yes | 0mph | 7mph |
+| Chevrolet3 | Volt 2017-186 | Adaptive Cruise | Yes | Yes | 0mph | 7mph |
+| Cadillac3 | ATS 2018 | Adaptive Cruise | Yes | Yes | 0mph | 7mph |
+| Chrysler | Pacifica 2017-187 | Adaptive Cruise | Yes | Stock | 0mph | 9mph |
+| Chrysler | Pacifica Hybrid 2017-187| Adaptive Cruise | Yes | Stock | 0mph | 9mph |
+| Chrysler | Pacifica Hybrid 20197 | Adaptive Cruise | Yes | Stock | 0mph | 39mph |
+| GMC3 | Acadia Denali 20186 | Adaptive Cruise | Yes | Yes | 0mph | 7mph |
+| Holden3 | Astra 20176 | Adaptive Cruise | Yes | Yes | 0mph | 7mph |
+| Honda | Accord 2018-19 | All | Yes | Stock | 0mph | 3mph |
+| Honda | Accord Hybrid 2018-19 | All | Yes | Stock | 0mph | 3mph |
+| Honda | Civic Sedan/Coupe 2016-18 | Honda Sensing | Yes | Yes | 0mph | 12mph |
+| Honda | Civic Sedan/Coupe 2019 | Honda Sensing | Yes | Stock | 0mph | 2mph |
+| Honda | Civic Hatchback 2017-19 | Honda Sensing | Yes | Stock | 0mph | 12mph |
+| Honda | CR-V 2015-16 | Touring | Yes | Yes | 25mph1| 12mph |
+| Honda | CR-V 2017-19 | Honda Sensing | Yes | Stock | 0mph | 12mph |
+| Honda | CR-V Hybrid 2017-2019 | Honda Sensing | Yes | Stock | 0mph | 12mph |
+| Honda | Fit 2018-19 | Honda Sensing | Yes | Yes | 25mph1| 12mph |
+| Honda | Odyssey 2018-19 | Honda Sensing | Yes | Yes | 25mph1| 0mph |
+| Honda | Passport 2019 | All | Yes | Yes | 25mph1| 12mph |
+| Honda | Pilot 2016-18 | Honda Sensing | Yes | Yes | 25mph1| 12mph |
+| Honda | Pilot 2019 | All | Yes | Yes | 25mph1| 12mph |
+| Honda | Ridgeline 2017-19 | Honda Sensing | Yes | Yes | 25mph1| 12mph |
+| Hyundai | Santa Fe 20195 | All | Yes | Stock | 0mph | 0mph |
+| Hyundai | Elantra 2017-195 | SCC + LKAS | Yes | Stock | 19mph | 34mph |
+| Hyundai | Genesis 20185 | All | Yes | Stock | 19mph | 34mph |
+| Jeep | Grand Cherokee 2016-187 | Adaptive Cruise | Yes | Stock | 0mph | 9mph |
+| Jeep | Grand Cherokee 20197 | Adaptive Cruise | Yes | Stock | 0mph | 39mph |
+| Kia | Optima 20195 | SCC + LKAS | Yes | Stock | 0mph | 0mph |
+| Kia | Sorento 20185 | All | Yes | Stock | 0mph | 0mph |
+| Kia | Stinger 20185 | SCC + LKAS | Yes | Stock | 0mph | 0mph |
+| Lexus | CT Hybrid 2017-18 | All | Yes | Yes2| 0mph | 0mph |
+| Lexus | ES Hybrid 2019 | All | Yes | Yes | 0mph | 0mph |
+| Lexus | RX Hybrid 2016-19 | All | Yes | Yes2| 0mph | 0mph |
+| Lexus | IS 2017-2019 | All | Yes | Stock | 22mph | 0mph |
+| Lexus | IS Hybrid 2017 | All | Yes | Stock | 0mph | 0mph |
+| Subaru | Crosstrek 2018-19 | EyeSight | Yes | Stock | 0mph | 0mph |
+| Subaru | Impreza 2019-20 | EyeSight | Yes | Stock | 0mph | 0mph |
+| Toyota | Avalon 2016 | TSS-P | Yes | Yes2| 20mph1| 0mph |
+| Toyota | Avalon 2017-18 | All | Yes | Yes2| 20mph1| 0mph |
+| Toyota | Camry 2018-19 | All | Yes | Stock | 0mph4 | 0mph |
+| Toyota | Camry Hybrid 2018-19 | All | Yes | Stock | 0mph4 | 0mph |
+| Toyota | C-HR 2017-19 | All | Yes | Stock | 0mph | 0mph |
+| Toyota | C-HR Hybrid 2017-19 | All | Yes | Stock | 0mph | 0mph |
+| Toyota | Corolla 2017-19 | All | Yes | Yes2| 20mph1| 0mph |
+| Toyota | Corolla 2020 | All | Yes | Yes | 0mph | 0mph |
+| Toyota | Corolla Hatchback 2019 | All | Yes | Yes | 0mph | 0mph |
+| Toyota | Corolla Hybrid 2020 | All | Yes | Yes | 0mph | 0mph |
+| Toyota | Highlander 2017-19 | All | Yes | Yes2| 0mph | 0mph |
+| Toyota | Highlander Hybrid 2017-19 | All | Yes | Yes2| 0mph | 0mph |
+| Toyota | Prius 2016 | TSS-P | Yes | Yes2| 0mph | 0mph |
+| Toyota | Prius 2017-19 | All | Yes | Yes2| 0mph | 0mph |
+| Toyota | Prius Prime 2017-20 | All | Yes | Yes2| 0mph | 0mph |
+| Toyota | Rav4 2016 | TSS-P | Yes | Yes2| 20mph1| 0mph |
+| Toyota | Rav4 2017-18 | All | Yes | Yes2| 20mph1| 0mph |
+| Toyota | Rav4 2019 | All | Yes | Yes | 0mph | 0mph |
+| Toyota | Rav4 Hybrid 2016 | TSS-P | Yes | Yes2| 0mph | 0mph |
+| Toyota | Rav4 Hybrid 2017-18 | All | Yes | Yes2| 0mph | 0mph |
+| Toyota | Sienna 2018 | All | Yes | Yes2| 0mph | 0mph |
+| Volkswagen8| Golf 2016-19 | Driver Assistance | Yes | Stock | 0mph | 0mph |
1[Comma Pedal](https://community.comma.ai/wiki/index.php/Comma_Pedal) is used to provide stop-and-go capability to some of the openpilot-supported cars that don't currently support stop-and-go. Here is how to [build a Comma Pedal](https://medium.com/@jfrux/comma-pedal-building-with-macrofab-6328bea791e8). ***NOTE: The Comma Pedal is not officially supported by [comma.ai](https://comma.ai).***
2When disconnecting the Driver Support Unit (DSU), otherwise longitudinal control is stock ACC. For DSU locations, see [Toyota Wiki page](https://community.comma.ai/wiki/index.php/Toyota). ***NOTE: disconnecting the DSU disables Automatic Emergency Braking (AEB).***
3[GM installation guide](https://zoneos.com/volt/). ***NOTE: disconnecting the ASCM disables Automatic Emergency Braking (AEB).***
-4Subaru Giraffe is DIY.
-528mph for Camry 4CYL L, 4CYL LE and 4CYL SE which don't have Full-Speed Range Dynamic Radar Cruise Control.
-6Open sourced [Hyundai Giraffe](https://github.com/commaai/neo/tree/master/giraffe/hyundai) is designed for the 2019 Sante Fe; pinout may differ for other Hyundais.
-7Community built Giraffe, find more information [here](https://zoneos.com/shop/).
+428mph for Camry 4CYL L, 4CYL LE and 4CYL SE which don't have Full-Speed Range Dynamic Radar Cruise Control.
+5Requires a [panda](https://comma.ai/shop/products/panda-obd-ii-dongle) and open sourced [Hyundai Giraffe](https://github.com/commaai/neo/tree/master/giraffe/hyundai), designed for the 2019 Sante Fe; pinout may differ for other Hyundais.
+6Requires a [panda](https://comma.ai/shop/products/panda-obd-ii-dongle) and community built giraffe, find more information [here](https://zoneos.com/shop/).
+7Requires a [panda](https://comma.ai/shop/products/panda-obd-ii-dongle) and FCA [giraffe](https://comma.ai/shop/products/giraffe)
+8Requires a [custom connector](https://community.comma.ai/wiki/index.php/Volkswagen#Integration_at_J533_Gateway) for the [car harness](https://comma.ai/shop/products/car-harness)
Community Maintained Cars
------
-| Make | Model | Supported Package | Lateral | Longitudinal | No Accel Below | No Steer Below | Giraffe |
-| ---------------------| -------------------------| ---------------------| --------| ---------------| -----------------| ---------------|-------------------|
-| Tesla | Model S 2012-13 | All | Yes | Not yet | Not applicable | 0mph | Custom8|
+| Make | Model (US Market Reference) | Supported Package | Lateral | Longitudinal | No Accel Below | No Steer Below |
+| ---------------------| -----------------------------------| ---------------------| --------| ---------------| -----------------| ---------------|
+| Tesla | Model S 2012-139 | All | Yes | NA | NA | 0mph |
[[Tesla Model S Pull Request]](https://github.com/commaai/openpilot/pull/246)
-8Community built Giraffe, find more information here [Community Tesla Giraffe](https://github.com/jeankalud/neo/tree/tesla_giraffe/giraffe/tesla)
+9Requires a [panda](https://comma.ai/shop/products/panda-obd-ii-dongle) and community built giraffe, find more information [here](https://github.com/jeankalud/neo/tree/tesla_giraffe/giraffe/tesla).
Community Maintained Cars are not confirmed by comma.ai to meet our [safety model](https://github.com/commaai/openpilot/blob/devel/SAFETY.md). Be extra cautious using them.
@@ -149,6 +149,7 @@ In Progress Cars
- All Kia, Genesis with SCC and LKAS.
- All Chrysler, Jeep, Fiat with Adaptive Cruise Control and LaneSense.
- All Subaru with EyeSight.
+- All Volkswagen, Audi, Škoda and SEAT with Adaptive Cruise Control.
How can I add support for my car?
------
@@ -203,7 +204,7 @@ It logs the road facing camera, CAN, GPS, IMU, magnetometer, thermal sensors, cr
The user facing camera is only logged if you explicitly opt-in in settings.
It does not log the microphone.
-By using it, you agree to [our privacy policy](https://community.comma.ai/privacy.html). You understand that use of this software or its related services will generate certain types of user data, which may be logged and stored at the sole discretion of comma.ai. By accepting this agreement, you grant an irrevocable, perpetual, worldwide right to comma.ai for the use of this data.
+By using it, you agree to [our privacy policy](https://my.comma.ai/privacy). You understand that use of this software or its related services will generate certain types of user data, which may be logged and stored at the sole discretion of comma.ai. By accepting this agreement, you grant an irrevocable, perpetual, worldwide right to comma.ai for the use of this data.
Testing on PC
------
diff --git a/RELEASES.md b/RELEASES.md
index 1cabbf1200bd15..839f41d7379e8a 100644
--- a/RELEASES.md
+++ b/RELEASES.md
@@ -1,13 +1,26 @@
+Version 0.6.6 (2019-11-05)
+========================
+ * Volkswagen support thanks to jyoung8607!
+ * Toyota Corolla Hybrid with TSS 2.0 support thanks to u8511049!
+ * Lexus ES with TSS 2.0 support thanks to energee!
+ * Fix GM ignition detection and lock safety mode not required anymore
+ * Log panda firmware and dongle ID thanks to martinl!
+ * New driving model: improve path prediction and lead detection
+ * New driver monitoring model, 4x smaller and running on DSP
+ * Display an alert and don't start openpilot if panda has wrong firmware
+ * Fix bug preventing EON from terminating processes after a drive
+ * Remove support for Toyota giraffe without the 120Ohm resistor
+
Version 0.6.5.1 (2019-10-17)
========================
* Enable auto updater, every 30 minutes with auto reboot, can be disabled in multiple ways of needed
* FAST Braking due to acceleration in corners based on steering angle now and later predicted from model
-
+
Version 0.6.5 (2019-10-07)
========================
* NEOS update: upgrade to Python3 and new installer!
* comma Harness support!
- * New driving model: lateral control has lower reliance on lanelines
+ * New driving model: improve path prediction
* New driver monitoring model: more accurate face and eye detection
* Redesign offroad screen to display updates and alerts
* Increase maximum allowed acceleration
@@ -67,7 +80,7 @@ Version 0.6 (2019-07-01)
* Panda safety code is MISRA compliant and ships with a signed version on release2
* New NEOS is 500MB smaller and has a reproducible usr/pipenv
* Lexus ES Hybrid support thanks to wocsor!
- * Improve tuning for supported Toyota with TSS2
+ * Improve tuning for supported Toyota with TSS 2.0
* Various other stability improvements
Version 0.5.13 (2019-05-31)
diff --git a/SAFETY.md b/SAFETY.md
index 3cda811e0cd9f9..f3089c497b22ab 100644
--- a/SAFETY.md
+++ b/SAFETY.md
@@ -1,8 +1,8 @@
openpilot Safety
======
-openpilot is an Adaptive Cruise Control (ACC) and Lane Keeping Assist (LKA) system.
-Like other ACC and LKA systems, openpilot requires the driver to be alert and to
+openpilot is an Adaptive Cruise Control (ACC) and Automated Lane Centering (ALC) system.
+Like other ACC and ALC systems, openpilot requires the driver to be alert and to
pay attention at all times. We repeat, **driver alertness is necessary, but not
sufficient, for openpilot to be used safely**.
@@ -93,7 +93,7 @@ GM/Chevrolet
commands outside these limits. A steering torque rate limit is enforced by the panda firmware and by
openpilot, so that the commanded steering torque must rise from 0 to max value no faster than
0.75s. Commanded steering torque is gradually limited by the panda firmware and by openpilot if the driver's
- torque exceeds 12 units in the opposite dicrection to ensure limited applied torque against the
+ torque exceeds 12 units in the opposite direction to ensure limited applied torque against the
driver's will.
- Brake pedal and gas pedal potentiometer signals are contained in the 0xF1 and 0x1A1 CAN messages,
@@ -116,7 +116,7 @@ Hyundai/Kia (Lateral only)
commands outside the values of -409 and 409. A steering torque rate limit is enforced by the panda firmware and by
openpilot, so that the commanded steering torque must rise from 0 to max value no faster than
0.85s. Commanded steering torque is gradually limited by the panda firmware and by openpilot if the driver's
- torque exceeds 50 units in the opposite dicrection to ensure limited applied torque against the
+ torque exceeds 50 units in the opposite direction to ensure limited applied torque against the
driver's will.
Chrysler/Jeep/Fiat (Lateral only)
@@ -144,8 +144,31 @@ Subaru (Lateral only)
commands outside the values of -2047 and 2047. A steering torque rate limit is enforced by the panda firmware and by
openpilot, so that the commanded steering torque must rise from 0 to max value no faster than
0.41s. Commanded steering torque is gradually limited by the panda firmware and by openpilot if the driver's
- torque exceeds 60 units in the opposite dicrection to ensure limited applied torque against the
+ torque exceeds 60 units in the opposite direction to ensure limited applied torque against the
driver's will.
+Volkswagen, Audi, SEAT, Škoda (Lateral only)
+------
+
+ - While the system is engaged, steer commands are subject to the same limits used by the stock system, and
+ additional limits required to meet Comma safety standards.
+
+ - Steering torque is controlled through the CAN message 0x126, also known as HCA_01 for Heading Control Assist.
+ It's limited by openpilot and Panda to a value between -250 and 250, representing 2.5 Nm of torque applied
+ at the steering rack. The vehicle EPS unit will fault for values outside -300 and 300.
+
+ - The vehicle EPS unit will tolerate any rate of increase or decrease, but may limit the effective rate of
+ change to 5.0 Nm/s. In accordance with the Comma AI safety model requirements, a rate limit is enforced by
+ the Panda firmware and by openpilot, so that the commanded steering torque cannot rise from 0 to maximum
+ faster than 1.25s. Commanded steering torque is gradually limited by the Panda firmware and by openpilot
+ if the driver's torque exceeds 0.8 Nm in the opposite direction to ensure limited applied torque against
+ the driver's will.
+
+ - Brake and gas pedal pressed signals are contained in the ESP_05 0x106 and Motor_20 0x121 CAN messages,
+ respectively. A rising edge of either signals triggers a disengagement and is enforced by openpilot.
+ The cancellation due to the rising edge of the gas pressed signal is also enforced by the Panda firmware.
+ Additionally, the cruise control system disengages on the rising edge of the brake pedal pressed signal,
+ and it's enforced by both openpilot and the Panda firmware.
+
**Extra note**: comma.ai strongly discourages the use of openpilot forks with safety code either missing or
not fully meeting the above requirements.
diff --git a/apk/ai.comma.plus.offroad.apk b/apk/ai.comma.plus.offroad.apk
index 224f4b066af432..d8c84cc6bd2d25 100644
Binary files a/apk/ai.comma.plus.offroad.apk and b/apk/ai.comma.plus.offroad.apk differ
diff --git a/cereal/log.capnp b/cereal/log.capnp
index 30e346668d0ac8..0fd5155bf691bc 100644
--- a/cereal/log.capnp
+++ b/cereal/log.capnp
@@ -297,7 +297,7 @@ struct HealthData {
# from can health
voltage @0 :UInt32;
current @1 :UInt32;
- started @2 :Bool;
+ ignitionLine @2 :Bool;
controlsAllowed @3 :Bool;
gasInterceptorDetected @4 :Bool;
startedSignalDetectedDeprecated @5 :Bool;
@@ -308,6 +308,8 @@ struct HealthData {
hwType @10 :HwType;
fanSpeedRpm @11 :UInt16;
usbPowerMode @12 :UsbPowerMode;
+ ignitionCan @13 :Bool;
+ safetyModel @14 :Car.CarParams.SafetyModel;
enum HwType {
unknown @0;
@@ -1723,6 +1725,7 @@ struct DriverMonitoring {
rightEyeProb @7 :Float32;
leftBlinkProb @8 :Float32;
rightBlinkProb @9 :Float32;
+ irPwr @10 :Float32;
}
struct Boot {
diff --git a/check_code_quality.sh b/check_code_quality.sh
index 854d757a847254..aed17230eb243d 100644
--- a/check_code_quality.sh
+++ b/check_code_quality.sh
@@ -1,6 +1,7 @@
#!/bin/bash
-pyflakes $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda")
+# Only pyflakes checks (--select=F)
+flake8 --select=F $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda")
RESULT=$?
if [ $RESULT -eq 0 ]; then
pylint $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda")
diff --git a/common/kalman/simple_kalman.py b/common/kalman/simple_kalman.py
index 0b35555b614ba3..b6fdb7da2c829b 100644
--- a/common/kalman/simple_kalman.py
+++ b/common/kalman/simple_kalman.py
@@ -6,5 +6,4 @@
subprocess.check_call(["make", "simple_kalman_impl.so"], cwd=kalman_dir)
from .simple_kalman_impl import KF1D as KF1D
-# Silence pyflakes
assert KF1D
diff --git a/common/op_params.py b/common/op_params.py
index d43e9bf76587f5..3f63638b4cc36e 100644
--- a/common/op_params.py
+++ b/common/op_params.py
@@ -32,7 +32,7 @@ def __init__(self):
self.read_timeout = 1.0 # max frequency to read with self.get(...) (sec)
self.default_params = {'camera_offset': 0.06, 'awareness_factor': 2.0, 'lane_hug_direction': None,
'lane_hug_mod': 1.2, 'lane_hug_angle': 10, 'use_car_caching': True, 'osm': True,
- 'speed_offset': 0}
+ 'speed_offset': 0, 'keep_openpilot_engaged': True}
self.force_update = False # replaces values with default params if True, not just add add missing key/value pairs
self.run_init() # restores, reads, and updates params
diff --git a/common/params.py b/common/params.py
index 3e6670cdb485c5..170af6ab6f79ac 100644
--- a/common/params.py
+++ b/common/params.py
@@ -77,10 +77,11 @@ class UnknownKeyName(Exception):
"LiveParameters": [TxType.PERSISTENT],
"LongitudinalControl": [TxType.PERSISTENT],
"OpenpilotEnabledToggle": [TxType.PERSISTENT],
+ "PandaFirmware": [TxType.CLEAR_ON_MANAGER_START, TxType.CLEAR_ON_PANDA_DISCONNECT],
+ "PandaDongleId": [TxType.CLEAR_ON_MANAGER_START, TxType.CLEAR_ON_PANDA_DISCONNECT],
"Passive": [TxType.PERSISTENT],
"RecordFront": [TxType.PERSISTENT],
"ReleaseNotes": [TxType.PERSISTENT],
- "SafetyModelLock": [TxType.PERSISTENT],
"ShouldDoUpdate": [TxType.CLEAR_ON_MANAGER_START],
"SpeedLimitOffset": [TxType.PERSISTENT],
"SubscriberInfo": [TxType.PERSISTENT],
@@ -90,9 +91,11 @@ class UnknownKeyName(Exception):
"Version": [TxType.PERSISTENT],
"CachedFingerprint": [TxType.PERSISTENT],
"Offroad_ChargeDisabled": [TxType.CLEAR_ON_MANAGER_START, TxType.CLEAR_ON_PANDA_DISCONNECT],
- "Offroad_TemperatureTooHigh": [TxType.CLEAR_ON_MANAGER_START],
- "Offroad_ConnectivityNeededPrompt": [TxType.CLEAR_ON_MANAGER_START],
"Offroad_ConnectivityNeeded": [TxType.CLEAR_ON_MANAGER_START],
+ "Offroad_ConnectivityNeededPrompt": [TxType.CLEAR_ON_MANAGER_START],
+ "Offroad_TemperatureTooHigh": [TxType.CLEAR_ON_MANAGER_START],
+ "Offroad_PandaFirmwareMismatch": [TxType.CLEAR_ON_MANAGER_START, TxType.CLEAR_ON_PANDA_DISCONNECT],
+ "Offroad_InvalidTime": [TxType.CLEAR_ON_MANAGER_START],
}
diff --git a/models/driving_model.dlc b/models/driving_model.dlc
index 419cee019c4df7..e04f9f93a1a0fa 100644
Binary files a/models/driving_model.dlc and b/models/driving_model.dlc differ
diff --git a/models/monitoring_model.dlc b/models/monitoring_model.dlc
index 58615915b0f829..d252d5d158dbbc 100644
Binary files a/models/monitoring_model.dlc and b/models/monitoring_model.dlc differ
diff --git a/opendbc/generator/toyota/lexus_is_2018_pt.dbc b/opendbc/generator/toyota/lexus_is_2018_pt.dbc
index ffcd949f05fbd3..e1a6922e89ce71 100644
--- a/opendbc/generator/toyota/lexus_is_2018_pt.dbc
+++ b/opendbc/generator/toyota/lexus_is_2018_pt.dbc
@@ -6,6 +6,9 @@ BO_ 550 BRAKE_MODULE: 8 XXX
SG_ BRAKE_POSITION : 16|9@0+ (1,0) [0|511] "" XXX
SG_ BRAKE_PRESSED : 37|1@0+ (1,0) [0|1] "" XXX
+BO_ 581 GAS_PEDAL_ALT: 5 XXX
+ SG_ GAS_PEDAL : 23|8@0+ (0.005,0) [0|1] "" XXX
+
BO_ 705 GAS_PEDAL: 8 XXX
SG_ GAS_RELEASED : 3|1@0+ (1,0) [0|1] "" XXX
SG_ GAS_PEDAL : 55|8@0+ (0.005,0) [0|1] "" XXX
@@ -15,6 +18,7 @@ BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_ANGLE : 31|16@0- (0.0573,0) [-500|500] "" XXX
BO_ 610 EPS_STATUS: 5 EPS
SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX
diff --git a/opendbc/honda_accord_touring_2016_can.dbc b/opendbc/honda_accord_touring_2016_can.dbc
index e8f388de08692c..744e55a9b5e3b5 100644
--- a/opendbc/honda_accord_touring_2016_can.dbc
+++ b/opendbc/honda_accord_touring_2016_can.dbc
@@ -177,14 +177,14 @@ BO_ 597 ROUGH_WHEEL_SPEED: 8 VSA
SG_ SET_TO_X55_2 : 47|8@0+ (1,0) [0|255] "" NEO
SG_ LONG_COUNTER : 55|8@0+ (1,0) [0|255] "" XXX
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
- SG_ CHECKSUM : 59|4@1+ (1,0) [0|15] "" XXX
+ SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
BO_ 660 SCM_COMMANDS: 8 SCM
SG_ RIGHT_BLINKER : 6|1@0+ (1,0) [0|1] "" NEO
SG_ LEFT_BLINKER : 5|1@0+ (1,0) [0|1] "" NEO
SG_ WIPERS_SPEED : 4|2@0+ (1,0) [0|3] "" NEO
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" XXX
- SG_ CHECKSUM : 59|4@1+ (1,0) [0|15] "" XXX
+ SG_ CHECKSUM : 59|4@0+ (1,0) [0|15] "" XXX
BO_ 661 XXX_10: 4 XXX
SG_ COUNTER : 29|2@0+ (1,0) [0|3] "" XXX
diff --git a/opendbc/lexus_is_2018_pt_generated.dbc b/opendbc/lexus_is_2018_pt_generated.dbc
index ac6bdf3832e5dc..0b1f5315e40e09 100644
--- a/opendbc/lexus_is_2018_pt_generated.dbc
+++ b/opendbc/lexus_is_2018_pt_generated.dbc
@@ -365,6 +365,9 @@ BO_ 550 BRAKE_MODULE: 8 XXX
SG_ BRAKE_POSITION : 16|9@0+ (1,0) [0|511] "" XXX
SG_ BRAKE_PRESSED : 37|1@0+ (1,0) [0|1] "" XXX
+BO_ 581 GAS_PEDAL_ALT: 5 XXX
+ SG_ GAS_PEDAL : 23|8@0+ (0.005,0) [0|1] "" XXX
+
BO_ 705 GAS_PEDAL: 8 XXX
SG_ GAS_RELEASED : 3|1@0+ (1,0) [0|1] "" XXX
SG_ GAS_PEDAL : 55|8@0+ (0.005,0) [0|1] "" XXX
@@ -374,6 +377,7 @@ BO_ 608 STEER_TORQUE_SENSOR: 8 XXX
SG_ STEER_TORQUE_DRIVER : 15|16@0- (1,0) [-32768|32767] "" XXX
SG_ STEER_OVERRIDE : 0|1@0+ (1,0) [0|1] "" XXX
SG_ CHECKSUM : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ STEER_ANGLE : 31|16@0- (0.0573,0) [-500|500] "" XXX
BO_ 610 EPS_STATUS: 5 EPS
SG_ IPAS_STATE : 3|4@0+ (1,0) [0|15] "" XXX
diff --git a/opendbc/luxgen_s5_2015.dbc b/opendbc/luxgen_s5_2015.dbc
new file mode 100644
index 00000000000000..855e67bfeba9e5
--- /dev/null
+++ b/opendbc/luxgen_s5_2015.dbc
@@ -0,0 +1,153 @@
+VERSION ""
+
+
+NS_ :
+ NS_DESC_
+ CM_
+ BA_DEF_
+ BA_
+ VAL_
+ CAT_DEF_
+ CAT_
+ FILTER
+ BA_DEF_DEF_
+ EV_DATA_
+ ENVVAR_DATA_
+ SGTYPE_
+ SGTYPE_VAL_
+ BA_DEF_SGTYPE_
+ BA_SGTYPE_
+ SIG_TYPE_REF_
+ VAL_TABLE_
+ SIG_GROUP_
+ SIG_VALTYPE_
+ SIGTYPE_VALTYPE_
+ BO_TX_BU_
+ BA_DEF_REL_
+ BA_REL_
+ BA_DEF_DEF_REL_
+ BU_SG_REL_
+ BU_EV_REL_
+ BU_BO_REL_
+ SG_MUL_VAL_
+
+BS_:
+
+BU_: XXX
+
+
+BO_ 928 EPB_STATUS: 8 XXX
+ SG_ EPB_BRAKE : 16|1@1+ (1,0) [0|3] "" XXX
+
+BO_ 1104 SEATBELT_STATUS: 8 XXX
+ SG_ DRIVER_SEAT_BELT_ONOFF : 21|1@0+ (1,0) [0|3] "" XXX
+
+BO_ 1056 BODY_ECU_STATUS: 8 XXX
+ SG_ DOOR_RL_STATUS : 18|1@0+ (1,0) [0|255] "" XXX
+ SG_ DOOR_FL_STATUS : 13|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_FR_STATUS : 12|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_RR_STATUS : 19|1@0+ (1,0) [0|1] "" XXX
+ SG_ DOOR_BACK_DOOR_STATUS : 22|1@0+ (1,0) [0|1] "" XXX
+ SG_ LEFT_SIGNAL_STATUS : 10|1@0+ (1,0) [0|1] "" XXX
+ SG_ RIGHT_SIGNAL_STATUS : 9|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 832 GEAR_RPM_SPEED_STATUS: 8 XXX
+ SG_ TRANS_MODE : 7|5@1+ (1,0) [0|0] "" XXX
+ SG_ TRANS_GEAR_POS : 2|3@0+ (1,0) [0|1] "" XXX
+ SG_ ENGINE_RPM1 : 55|8@0+ (1,0) [0|255] "" XXX
+ SG_ ENGINE_TEMP : 63|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 821 THROTTLE_STATUS: 8 XXX
+ SG_ CRUSE_ONOFF : 2|1@0+ (1,0) [0|1] "on/off" XXX
+ SG_ CRUSE_ENABLED : 4|1@0+ (1,0) [0|1] "" XXX
+ SG_ THROTTLE_PEDAL_POS : 32|8@1+ (1,0) [0|255] "" XXX
+ SG_ THROTTLE_POS : 24|8@1+ (1,0) [0|255] "" XXX
+ SG_ RPM : 48|8@1- (1,0) [0|65535] "" XXX
+
+BO_ 922 STEERING_ANGLE_STATUS: 8 XXX
+ SG_ STEER_ANGLE_9000 : 7|16@0- (1,0) [0|65535] "" XXX
+
+BO_ 906 WHEEL_SPEEDS: 8 XXX
+ SG_ SPEED_FR : 24|8@1+ (1,0) [0|255] "" XXX
+ SG_ ABS_UNDEF1 : 32|8@1+ (1,0) [0|255] "" XXX
+ SG_ SPEED_FL : 0|8@1+ (1,0) [0|255] "" XXX
+
+BO_ 848 ABS_WHEELS_STATUS: 8 XXX
+ SG_ NEW_SIGNAL_1 : 23|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_2 : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_3 : 7|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_4 : 15|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 1402 DASH_STATUS: 8 XXX
+ SG_ CAR_SPEED : 32|8@1+ (1,0) [0|255] "" XXX
+ SG_ DASH_INFO2 : 16|8@1+ (1,0) [0|255] "" XXX
+ SG_ DASH_INFO0 : 0|8@1+ (1,0) [0|255] "" XXX
+ SG_ DASH_INFO_2 : 15|8@0+ (1,0) [0|255] "" XXX
+ SG_ DASH_INFO_3 : 31|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 1306 _SPEEDX: 8 XXX
+ SG_ DASH_CAR_SPEED : 7|9@0+ (1,0) [0|255] "" XXX
+
+BO_ 1296 undefined: 8 XXX
+
+BO_ 790 ENGINE_DATA: 8 XXX
+ SG_ _X2 : 6|1@0+ (1,0) [0|1] "" XXX
+ SG_ NEW_SIGNAL_1 : 15|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_2 : 23|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_3 : 31|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_4 : 39|8@0+ (1,0) [0|255] "" XXX
+ SG_ NEW_SIGNAL_5 : 47|8@0+ (1,0) [0|255] "" XXX
+
+BO_ 1313 undefined: 8 XXX
+
+BO_ 1312 __trigger_every_range: 8 XXX
+ SG_ __SIGNAL_every_interval : 4|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 896 undefined: 8 XXX
+ SG_ NEW_SIGNAL_1 : 32|4@1+ (1,0) [0|15] "" XXX
+
+BO_ 809 undefined: 8 XXX
+
+BO_ 864 BREAK_TCS_STATUS: 8 XXX
+ SG_ SPEED3 : 24|8@1+ (1,0) [0|255] "" XXX
+ SG_ TCS_ON_FF : 45|1@0+ (1,0) [0|1] "" XXX
+ SG_ XXXX1 : 63|8@0+ (1,0) [0|255] "" XXX
+ SG_ BRAKE_PRSSED : 42|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 842 undefined: 8 XXX
+
+BO_ 880 WHEEL_RPM_STATUS: 8 XXX
+ SG_ WHEEL_RL_SPEED : 23|16@0+ (1,0) [0|255] "" XXX
+ SG_ WHEEL_FR_SPEED : 39|16@0+ (1,0) [0|255] "" XXX
+ SG_ WHEEL_FL_SPEED : 55|16@0+ (1,0) [0|255] "" XXX
+ SG_ WHEEL_RR_SPEED : 7|16@0- (1,0) [0|255] "" XXX
+
+BO_ 1040 CONSOLE_STATUS: 8 XXX
+ SG_ LEFT_SIGNAL_SWITCH : 1|1@0+ (1,0) [0|1] "" XXX
+ SG_ RIGHT_SIGNAL_SWITCH : 2|1@0+ (1,0) [0|1] "" XXX
+ SG_ HEAD_LIGHT_HANDLE_SWITCH : 3|1@0+ (1,0) [0|1] "" XXX
+ SG_ HID_LIGHT_SWITCH : 4|1@0+ (1,0) [0|1] "" XXX
+ SG_ YELLOW_WARN_TEMP_TRIGGER : 5|1@0+ (1,0) [0|1] "" XXX
+ SG_ HID_LIGHT_HANDLE_SWITCH : 6|1@0+ (1,0) [0|1] "" XXX
+ SG_ MIX_MODE : 7|1@0+ (1,0) [0|1] "" XXX
+ SG_ slider_rain_bar : 13|1@0+ (1,0) [0|1] "" XXX
+ SG_ temp_slider_rain_bar : 15|1@0+ (1,0) [0|1] "" XXX
+ SG_ temp_water_push : 11|1@0+ (1,0) [0|1] "" XXX
+
+BO_ 1120 HAVC_STATUS: 8 XXX
+ SG_ HAVC_TEMP : 32|8@1+ (1,0) [0|255] "" XXX
+
+
+CM_ SG_ 1104 DRIVER_SEAT_BELT_ONOFF "0 - on , 1 = off";
+CM_ SG_ 1056 DOOR_RL_STATUS "04 - RL - open";
+CM_ SG_ 1056 DOOR_FL_STATUS "28 - FL open , 38 - FR";
+CM_ SG_ 1056 RIGHT_SIGNAL_STATUS "R,L shows at same time means hazard";
+CM_ SG_ 832 TRANS_MODE "AT - 85 / MT - 8D";
+CM_ SG_ 832 TRANS_GEAR_POS "R-7 , 0 - N";
+CM_ SG_ 821 CRUSE_ONOFF "Cruse Switch";
+CM_ SG_ 821 CRUSE_ENABLED "Cruse enabled";
+CM_ SG_ 821 THROTTLE_PEDAL_POS "Real Pedal Pos";
+CM_ SG_ 821 THROTTLE_POS "Throttle Pos for Cruse Mode";
+CM_ SG_ 906 ABS_UNDEF1 "ABS force";
+CM_ SG_ 906 SPEED_FL "used for car speed in dash board";
+CM_ SG_ 864 TCS_ON_FF "ON = 1, OFF =0";
diff --git a/opendbc/subaru_outback_2016_eyesight.dbc b/opendbc/subaru_outback_2016_eyesight.dbc
deleted file mode 100644
index 871f7821843231..00000000000000
--- a/opendbc/subaru_outback_2016_eyesight.dbc
+++ /dev/null
@@ -1,73 +0,0 @@
-VERSION ""
-
-
-NS_ :
- NS_DESC_
- CM_
- BA_DEF_
- BA_
- VAL_
- CAT_DEF_
- CAT_
- FILTER
- BA_DEF_DEF_
- EV_DATA_
- ENVVAR_DATA_
- SGTYPE_
- SGTYPE_VAL_
- BA_DEF_SGTYPE_
- BA_SGTYPE_
- SIG_TYPE_REF_
- VAL_TABLE_
- SIG_GROUP_
- SIG_VALTYPE_
- SIGTYPE_VALTYPE_
- BO_TX_BU_
- BA_DEF_REL_
- BA_REL_
- BA_DEF_DEF_REL_
- BU_SG_REL_
- BU_EV_REL_
- BU_BO_REL_
- SG_MUL_VAL_
-
-BS_:
-
-BU_: XXX
-
-
-BO_ 884 DoorStatus: 8 XXX
- SG_ DoorOpenFD : 24|1@0+ (1,0) [0|1] "" XXX
- SG_ DoorOpenFP : 25|1@0+ (1,0) [0|1] "" XXX
- SG_ DoorOpenRP : 26|1@0+ (1,0) [0|1] "" XXX
- SG_ DoorOpenRD : 27|1@0+ (1,0) [0|1] "" XXX
- SG_ DoorOpenHatch : 28|1@0+ (1,0) [0|1] "" XXX
-
-BO_ 324 CruiseControl: 7 XXX
- SG_ BrakeApplied : 8|1@0+ (1,0) [0|0] "" XXX
- SG_ CruiseEnabled : 48|1@0+ (1,0) [0|0] "" XXX
- SG_ BrakeStatus : 51|1@0+ (1,0) [0|0] "" XXX
- SG_ CruiseButtons : 4|2@0+ (1,0) [0|3] "" XXX
-
-BO_ 320 Throttle: 8 XXX
- SG_ ThrottlePosition : 7|8@0+ (1,0) [0|255] "" XXX
-
-BO_ 209 NEW_MSG_1: 8 XXX
- SG_ BrakePosition : 23|8@0+ (1,0) [0|255] "" XXX
-
-BO_ 2 Steering: 8 XXX
- SG_ SteeringAngle : 7|16@0- (0.1,0) [-500|500] "degree" XXX
-
-BO_ 642 NEW_MSG_2: 8 XXX
- SG_ TurnSignal : 45|2@0+ (1,0) [0|3] "" XXX
-
-
-
-CM_ "CHFFR_METRIC 2 STEER_ANGLE STEER_ANGLE 0.36 180";
-
-VAL_ 324 BrakeApplied 1 "On" 0 "Off" ;
-VAL_ 324 CruiseEnabled 1 "On" 0 "Off" ;
-VAL_ 324 BrakeStatus 1 "On" 0 "Off" ;
-VAL_ 324 CruiseButtons 2 "Set" 1 "Resume" ;
-
-VAL_ 642 TurnSignal 2 "Left" 1 "Right" ;
diff --git a/opendbc/vw_golf_mk4.dbc b/opendbc/vw_golf_mk4.dbc
index 70cc8cc3aff74a..bdfe6390f77740 100644
--- a/opendbc/vw_golf_mk4.dbc
+++ b/opendbc/vw_golf_mk4.dbc
@@ -1039,3 +1039,12 @@ BO_ 1324 ADR_1: 8 XXX
SG_ Fehler_ADR_1 : 12|1@1+ (1,0) [0|0] "" XXX
SG_ Zaehler_ADR_1 : 8|4@1+ (1,0) [0|15] "" XXX
SG_ Momentenanforderung_ADR : 0|8@1+ (0.39,0) [0|99] "MDI" XXX
+
+BO_ 210 PQ_HCA: 8 XXX
+ SG_ HCA_Torque : 16|15@1+ (1,0) [0|32767] "" XXX
+ SG_ UNK_Bit : 34|1@0+ (1,0) [0|1] "" XXX
+ SG_ HCA_Torque_VZ : 31|1@0+ (1,0) [0|1] "" XXX
+ SG_ PQ_HCA_BZ : 8|4@1+ (1,0) [0|15] "" XXX
+ SG_ PQ_HCA_Checksum : 0|4@1+ (1,0) [0|15] "" XXX
+
+BO_ 1490 VIN_1: 8 XXX
diff --git a/opendbc/vw_mqb_2010.dbc b/opendbc/vw_mqb_2010.dbc
index 4529f8847a0b87..063cd1b795b614 100644
--- a/opendbc/vw_mqb_2010.dbc
+++ b/opendbc/vw_mqb_2010.dbc
@@ -37,8 +37,8 @@ BU_: Airbag_MQB BAP_Tester_MQB BMS_MQB Datenlogger_MQB Gateway_MQB Getriebe_DQ_H
BO_ 290 ACC_06: 8 Gateway_MQB
- SG_ ACC_06_CRC : 0|8@1+ (1,0) [0|255] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ ACC_06_BZ : 8|4@1+ (1,0) [0|15] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ACC_limitierte_Anfahrdyn : 12|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ACC_zul_Regelabw_unten : 16|6@1+ (0.024,0) [0|1.512] "Unit_MeterPerSeconSquar" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ACC_StartStopp_Info : 22|2@1+ (1,0) [0|3] "" Motor_Diesel_MQB,Motor_Otto_MQB
@@ -53,8 +53,8 @@ BO_ 290 ACC_06: 8 Gateway_MQB
SG_ ACC_Minimale_Bremsung : 63|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
BO_ 279 ACC_10: 8 Gateway_MQB
- SG_ ACC_10_CRC : 0|8@1+ (1,0) [0|255] "" Airbag_MQB
- SG_ ACC_10_BZ : 8|4@1+ (1,0) [0|15] "" Airbag_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Airbag_MQB
SG_ AWV1_Anf_Prefill : 16|1@1+ (1,0) [0|1] "" Airbag_MQB
SG_ ANB_CM_Info : 17|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ AWV2_Freigabe : 18|1@1+ (1,0) [0|1] "" Airbag_MQB
@@ -281,8 +281,8 @@ BO_ 257 ESP_02: 8 Gateway_MQB
SG_ ESP_Status_ESP_PLA : 60|4@1+ (1,0) [0|15] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB
BO_ 262 ESP_05: 8 Gateway_MQB
- SG_ ESP_05_CRC : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ ESP_05_BZ : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ESP_QBit_Bremsdruck : 12|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ESP_QBit_Fahrer_bremst : 13|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ESP_Schwelle_Unterdruck : 14|2@1+ (1,0) [0|3] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
@@ -360,8 +360,8 @@ BO_ 178 ESP_19: 8 Gateway_MQB
SG_ ESP_VR_Radgeschw_02 : 48|16@1+ (0.0075,0) [0|491.49] "Unit_KiloMeterPerHour" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
BO_ 1629 ESP_20: 8 Gateway_MQB
- SG_ ESP_20_CRC : 0|8@1+ (1,0) [0|255] "" Vector__XXX
- SG_ ESP_20_BZ : 8|4@1+ (1,0) [0|15] "" Vector__XXX
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Vector__XXX
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Vector__XXX
SG_ BR_Systemart : 12|2@1+ (1,0) [0|3] "" Vector__XXX
SG_ ESP_Zaehnezahl : 16|8@1+ (1,0) [0|255] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB
SG_ ESP_Charisma_FahrPr : 24|4@1+ (1,0) [0|15] "" Vector__XXX
@@ -370,8 +370,8 @@ BO_ 1629 ESP_20: 8 Gateway_MQB
SG_ BR_Reifenumfang : 52|12@1+ (1,0) [0|4095] "Unit_MilliMeter" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB
BO_ 253 ESP_21: 8 Gateway_MQB
- SG_ ESP_21_CRC : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,LEH_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ ESP_21_BZ : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,BMS_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,LEH_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,LEH_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,BMS_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,LEH_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ BR_Eingriffsmoment : 12|10@1+ (1,-509) [-509|509] "Unit_NewtoMeter" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ESP_v_Signal : 32|16@1+ (0.01,0) [0|655.32] "Unit_KiloMeterPerHour" Airbag_MQB,BMS_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,LEH_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB,SAK_MQB
SG_ ASR_Tastung_passiv : 48|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
@@ -451,8 +451,8 @@ BO_ 296 Getriebe_06: 3 Getriebe_DQ_Hybrid_MQB
SG_ GE_Testparameter_2 : 16|8@1+ (1,0) [0|255] "" Waehlhebel_MQB
BO_ 173 Getriebe_11: 8 Getriebe_DQ_Hybrid_MQB
- SG_ Getriebe_11_CRC : 0|8@1+ (1,0) [0|255] "" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ Getriebe_11_BZ : 8|4@1+ (1,0) [0|15] "" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTERXX : 8|4@1+ (1,0) [0|15] "" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GE_MMom_Soll_02 : 12|10@1+ (1,-509) [-509|509] "Unit_NewtoMeter" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GE_MMom_Vorhalt_02 : 22|10@1+ (1,-509) [-509|509] "Unit_NewtoMeter" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GE_Uefkt : 32|10@1+ (0.1,0) [0|102.2] "" Gateway_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
@@ -520,8 +520,8 @@ BO_ 158 Getriebe_Hybrid_01: 8 Getriebe_DQ_Hybrid_MQB
SG_ GE_HYB_VM_Startkontr : 63|1@1+ (1,0) [0|1] "" Motor_Hybrid_MQB
BO_ 299 GRA_ACC_01: 8 Gateway_MQB
- SG_ GRA_ACC_01_CRC : 0|8@1+ (1,0) [0|255] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ GRA_ACC_01_BZ : 8|4@1+ (1,0) [0|15] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GRA_Hauptschalter : 12|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GRA_Abbrechen : 13|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GRA_Typ_Hauptschalter : 14|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
@@ -535,10 +535,11 @@ BO_ 299 GRA_ACC_01: 8 Gateway_MQB
SG_ GRA_Fehler : 24|1@1+ (1,0) [0|1] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GRA_Typ468 : 25|2@1+ (1,0) [0|3] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ GRA_Tip_Stufe_2 : 27|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ GRA_ButtonTypeInfo : 28|2@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
BO_ 960 Klemmen_Status_01: 4 Gateway_MQB
- SG_ Klemmen_Status_01_CRC : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,BMS_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ Klemmen_Status_01_BZ : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,BMS_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,BMS_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,BMS_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ZAS_Kl_S : 16|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ ZAS_Kl_15 : 17|1@1+ (1,0) [0|1] "" Airbag_MQB,BMS_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ ZAS_Kl_X : 18|1@1+ (1,0) [0|1] "" Vector__XXX
@@ -683,16 +684,16 @@ BO_ 982 Licht_hinten_01: 8 Gateway_MQB
SG_ LH_Bremsl_re_ges_def : 55|1@1+ (1,0) [0|1] "" Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
BO_ 134 LWI_01: 8 Gateway_MQB
- SG_ LWI_01_CRC : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ LWI_01_BZ : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ LWI_Sensorstatus : 12|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ LWI_QBit_Sub_Daten : 13|1@1+ (1,0) [0|1] "" Vector__XXX
+ SG_ LWI_QBit_Lenkradwinkel : 15|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ LWI_Lenkradwinkel : 16|13@1+ (0.1,0) [0|800] "Unit_DegreOfArc" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
+ SG_ LWI_VZ_Lenkradwinkel : 29|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
SG_ LWI_VZ_Lenkradw_Geschw : 30|1@1+ (1,0) [0|1] "" Vector__XXX
SG_ LWI_Lenkradw_Geschw : 31|9@1+ (5,0) [0|2500] "Unit_DegreOfArcPerSecon" Vector__XXX
SG_ LWI_Sub_Daten : 40|16@1+ (1,0) [0|65535] "" Vector__XXX
- SG_ LWI_Lenkradwinkel : 16|13@1+ (0.1,0) [0|800] "Unit_DegreOfArc" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ LWI_QBit_Lenkradwinkel : 15|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
- SG_ LWI_VZ_Lenkradwinkel : 29|1@1+ (1,0) [0|1] "" Airbag_MQB,Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB,Motor_Diesel_MQB,Motor_Hybrid_MQB,Motor_Otto_MQB
BO_ 263 Motor_04: 8 Motor_Diesel_MQB
SG_ MO_Istgang : 8|4@1+ (1,0) [0|15] "" Gateway_MQB
@@ -1126,6 +1127,28 @@ BO_ 798 TSK_07: 8 Motor_Diesel_MQB
SG_ TSK_Status_Anzeige : 61|3@1+ (1,0) [0|7] "" Gateway_MQB
BO_ 1716 VIN_01: 8 Gateway_MQB
+ SG_ VIN_01_MUX M : 0|2@1+ (1,0) [0|3] "" Airbag_MQB
+ SG_ KS_Geheimnis_1 m0 : 8|8@1+ (1,0) [0|255] "" Vector__XXX
+ SG_ VIN_4 m1 : 8|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_11 m2 : 8|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ KS_Geheimnis_2 m0 : 16|8@1+ (1,0) [0|255] "" Vector__XXX
+ SG_ VIN_5 m1 : 16|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_12 m2 : 16|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ KS_Geheimnis_3 m0 : 24|8@1+ (1,0) [0|255] "" Vector__XXX
+ SG_ VIN_6 m1 : 24|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_13 m2 : 24|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ KS_Geheimnis_4 m0 : 32|8@1+ (1,0) [0|255] "" Vector__XXX
+ SG_ VIN_7 m1 : 32|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_14 m2 : 32|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_1 m0 : 40|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_8 m1 : 40|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_15 m2 : 40|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_2 m0 : 48|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_9 m1 : 48|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_16 m2 : 48|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_3 m0 : 56|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_10 m1 : 56|8@1+ (1,0) [0|255] "" Airbag_MQB
+ SG_ VIN_17 m2 : 56|8@1+ (1,0) [0|255] "" Airbag_MQB
BO_ 175 Waehlhebel_03: 4 Waehlhebel_MQB
SG_ WH_Status_Sperre : 0|3@1+ (1,0) [0|7] "" Getriebe_DQ_Hybrid_MQB,Getriebe_DQ_MQB
@@ -1157,30 +1180,30 @@ BO_ 1602 WIV_01: 8 Motor_Diesel_MQB
SG_ WIV_W_max : 56|7@1+ (1000,0) [0|127000] "Unit_KiloMeter" Gateway_MQB
BO_ 294 HCA_01: 8 XXX
- SG_ 3 : 15|4@0+ (1,0) [0|15] "" XXX
- SG_ 7 : 55|8@0+ (1,0) [0|255] "" XXX
- SG_ 254 : 47|8@0+ (1,0) [0|255] "" XXX
- SG_ HCA_01_CRC : 7|8@0+ (1,0) [0|255] "" XXX
- SG_ HCA_01_BZ : 11|4@0+ (1,0) [0|255] "" XXX
- SG_ Assist_Requested : 30|1@0+ (1,0) [0|1] "" XXX
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" XXX
+ SG_ COUNTER : 8|4@1+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_0X3 : 12|4@1+ (1,0) [0|15] "" XXX
SG_ Assist_Torque : 16|14@1+ (1,0) [0|300] "Nm" XXX
- SG_ Assist_VZ : 31|1@0+ (1,0) [0|1] "" XXX
+ SG_ Assist_Requested : 30|1@1+ (1,0) [0|1] "" XXX
+ SG_ Assist_VZ : 31|1@1+ (1,0) [0|1] "" XXX
SG_ HCA_Available : 32|1@1+ (1,0) [0|1] "" XXX
- SG_ HCA_Standby : 33|1@0+ (1,0) [0|1] "" XXX
- SG_ HCA_Active : 34|1@0+ (1,0) [0|1] "" XXX
+ SG_ HCA_Standby : 33|1@1+ (1,0) [0|1] "" XXX
+ SG_ HCA_Active : 34|1@1+ (1,0) [0|1] "" XXX
+ SG_ SET_ME_0XFE : 40|8@1+ (1,0) [0|255] "" XXX
+ SG_ SET_ME_0X07 : 48|8@1+ (1,0) [0|255] "" XXX
BO_ 159 EPS_01: 8 XXX
- SG_ EPS_01_CRC : 0|8@1+ (1,0) [0|255] "" XXX
- SG_ EPS_01_BZ : 8|4@1+ (1,0) [0|15] "" XXX
- SG_ Steering_Wheel_Angle : 16|13@1+ (0.075,0) [0|16383] "Unit_DegreOfArc" XXX
- SG_ Steering_Wheel_Angle_VZ : 31|1@0+ (1,0) [0|1] "" XXX
- SG_ HCA_Active : 34|1@0+ (1,0) [0|1] "" XXX
- SG_ HCA_Standby : 33|1@0+ (1,0) [0|1] "" XXX
- SG_ Unknown_Status2 : 63|1@0+ (1,0) [0|1] "" XXX
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" XXX
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" XXX
+ SG_ Steering_Wheel_Angle : 16|13@1+ (0.15,0) [0|16383] "Unit_DegreOfArc" XXX
+ SG_ Steering_Wheel_Angle_VZ : 31|1@1+ (1,0) [0|1] "" XXX
+ SG_ HCA_Active : 34|1@1+ (1,0) [0|1] "" XXX
+ SG_ HCA_Standby : 33|1@1+ (1,0) [0|1] "" XXX
+ SG_ Unknown_Status2 : 63|1@1+ (1,0) [0|1] "" XXX
SG_ HCA_Ready : 32|1@1+ (1,0) [0|3] "" XXX
SG_ Driver_Strain : 40|13@1+ (1,0) [0|255] "Nm" XXX
SG_ Driver_Strain_VZ : 55|1@1+ (1,0) [0|1] "" XXX
- SG_ Unknown_Status1 : 62|1@0+ (1,0) [0|1] "" XXX
+ SG_ Unknown_Status1 : 62|1@1+ (1,0) [0|1] "" XXX
BO_ 286 VehicleSpeed: 8 XXX
SG_ VehicleSpeed_CRC : 0|8@1+ (1,0) [0|255] "" XXX
@@ -1190,16 +1213,20 @@ BO_ 286 VehicleSpeed: 8 XXX
BO_ 919 LDW_02: 8 XXX
SG_ LDW_DLC : 40|8@1+ (0.01,0) [0|255] "m" XXX
SG_ LDW_TLC : 48|5@1+ (0.05,0) [0|255] "Seconds" XXX
- SG_ LDW_Unknown : 15|2@0+ (1,0) [0|3] "" XXX
+ SG_ LDW_Unknown : 14|2@1+ (1,0) [0|3] "" XXX
SG_ Alert_Message : 16|4@1+ (1,0) [0|15] "" XXX
- SG_ LDW_Direction : 20|1@0+ (1,0) [0|1] "" XXX
+ SG_ LDW_Direction : 20|1@1+ (1,0) [0|1] "" XXX
SG_ Right_Lane_Status : 36|2@1+ (1,0) [0|3] "" XXX
SG_ Left_Lane_Status : 38|2@1+ (1,0) [0|3] "" XXX
- SG_ Kombi_Lamp_Orange : 61|1@0+ (1,0) [0|1] "" XXX
- SG_ Kombi_Lamp_Green : 62|1@0+ (1,0) [0|1] "" XXX
+ SG_ Kombi_Lamp_Orange : 61|1@1+ (1,0) [0|1] "" XXX
+ SG_ Kombi_Lamp_Green : 62|1@1+ (1,0) [0|1] "" XXX
BO_ 780 ACC_02: 8 XXX
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" XXX
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" XXX
+ SG_ SetSpeed : 12|10@1+ (0.08865,0) [0|90.68] "Unit_MeterPerSecond" XXX
SG_ Kollision1 : 23|1@1+ (1,0) [0|1] "" XXX
+ SG_ Abstand : 24|10@1+ (0.1,0) [0|102.3] "m" XXX
SG_ ACC_MinusInv : 36|2@1+ (1,0) [0|3] "" XXX
SG_ ACC_Minus : 38|2@1+ (1,0) [0|3] "" XXX
SG_ Kollision2 : 40|1@1+ (1,0) [0|1] "" XXX
@@ -1212,10 +1239,6 @@ BO_ 780 ACC_02: 8 XXX
SG_ MotorbitB5_7 : 47|1@1+ (1,0) [0|1] "" XXX
SG_ SetAbstand : 48|4@1+ (1,0) [0|15] "" XXX
SG_ Hebel : 56|4@1+ (1,0) [0|15] "" XXX
- SG_ SetSpeed : 12|10@1+ (0.32,0) [0|320] "kmh" XXX
- SG_ Abstand : 24|10@1+ (0.1,0) [0|102.3] "m" XXX
- SG_ ACC_02_CRC : 0|8@1+ (1,0) [0|255] "" XXX
- SG_ ACC_02_BZ : 8|4@1+ (1,0) [0|15] "" XXX
BO_ 302 ACC_07: 8 XXX
SG_ ACC_07_BZ : 8|4@1+ (1,0) [0|15] "" XXX
@@ -1251,9 +1274,47 @@ BO_ 427 ESP_33: 8 XXX
SG_ ESP_33_BZ : 8|4@1+ (1,0) [0|15] "" XXX
SG_ ESP_33_CRC : 0|8@1+ (1,0) [0|255] "" XXX
+BO_ 418 ESP_15: 8 XXX
+ SG_ ESP_15_CRC : 0|8@1+ (1,0) [0|255] "" XXX
+ SG_ ESP_15_BZ : 8|4@1+ (1,0) [0|15] "" XXX
+
+BO_ 1122 PSD_04: 8 XXX
+ SG_ PSD_Object_Index : 0|6@1+ (1,0) [0|63] "" XXX
+
+BO_ 1123 PSD_05: 8 XXX
+ SG_ PSD_Current_Route_Index : 0|6@1+ (1,0) [0|63] "" XXX
+ SG_ Route_Distance_Remaining : 8|5@1+ (1,0) [0|31] "" XXX
+
+BO_ 1124 PSD_06: 8 XXX
+BO_ 988 Gateway_73: 8 XXX
+BO_ 792 Kamera_Status: 8 XXX
+BO_ 981 Licht_Anf_01: 8 XXX
+
+BO_ 1440 RLS_01: 8 XXX
+
+BO_ 870 Blinkmodi_02: 8 XXX
+
+BO_ 1385 HVEM_04: 8 XXX
+
+BO_ 1605 FLA_01: 8 XXX
+
+BO_ 1624 Licht_vorne_01: 8 XXX
+
+BO_ 1646 Klima_03: 8 XXX
+
+BO_ 1720 Kombi_03: 8 XXX
+
+BO_ 391 EV_Gearshift: 8 XXX
+ SG_ CHECKSUM : 0|8@1+ (1,0) [0|255] "" XXX
+ SG_ COUNTER : 8|4@1+ (1,0) [0|15] "" XXX
+ SG_ GearPosition : 16|4@1+ (1,0) [0|255] "" XXX
+ SG_ RegenBrakingMode : 12|2@1+ (1,0) [0|3] "" XXX
+
+CM_ SG_ 173 COUNTERXX "Message not renamed to COUNTER because J533 rate-limiting makes it look like messages are being lost";
+CM_ SG_ 134 LWI_Lenkradwinkel "Steering angle WITH variable ratio effect included";
CM_ SG_ 294 3 "May be zero when sent by older cameras";
CM_ SG_ 294 7 "May be zero when sent by older cameras";
CM_ SG_ 294 254 "May be zero when sent by older cameras";
@@ -1263,6 +1324,7 @@ CM_ SG_ 294 HCA_Available "Must be 1 for steering rack to accept HCA commands";
CM_ SG_ 159 HCA_Ready "1 if HCA is okay, 0 if the rack doesn't have HCA configured or a timer/constraint has been violated, rack will not respond to HCA commands";
CM_ SG_ 159 Driver_Strain "Steering input by driver, torque";
CM_ SG_ 159 Driver_Strain_VZ "Steering input by driver, sign (direction)";
+CM_ SG_ 159 Steering_Wheel_Angle "Steering angle WITHOUT variable ratio effect included";
CM_ SG_ 919 LDW_DLC "Probable DLC (distance to line crossing)";
CM_ SG_ 919 LDW_TLC "Probable TLC (time to line crossing)";
CM_ SG_ 919 LDW_Unknown "Might be a steering pressed / driver active flag";
@@ -1274,6 +1336,10 @@ CM_ SG_ 919 Kombi_Lamp_Orange "Enables orange LDW light in instrument cluster";
CM_ SG_ 919 Kombi_Lamp_Green "Enables green LDW light in instrument cluster";
CM_ SG_ 780 Folgefahrt "Following another vehicle";
CM_ SG_ 780 SetAbstand "Set following distance";
-CM_ SG_ 780 SetSpeed "ACC set speed";
CM_ SG_ 780 Abstand "Following distance";
-VAL_ 173 GE_Fahrstufe 5 "P" 6 "R" 7 "N" 8 "D" 9 "S" 10 "E" 14 "T" ;
+CM_ SG_ 780 SetSpeed "ACC set speed";
+CM_ SG_ 391 GearPosition "Traditional PRND plus B-mode aggressive regen, B-mode mapped to Drive";
+CM_ SG_ 960 ZAS_Kl_15 "Indicates ignition on";
+VAL_ 173 GE_Fahrstufe 5 "P" 6 "R" 7 "N" 8 "D" 9 "S" 10 "E" 14 "T";
+VAL_ 391 GearPosition 2 "P" 3 "R" 4 "N" 5 "D" 6 "D";
+VAL_ 391 RegenBrakingMode 0 "default" 1 "B1" 2 "B2" 3 "B3";
diff --git a/panda/.circleci/config.yml b/panda/.circleci/config.yml
index 6348ff0f5542f0..58fc1d13bc9dbd 100644
--- a/panda/.circleci/config.yml
+++ b/panda/.circleci/config.yml
@@ -92,6 +92,20 @@ jobs:
command: |
docker run language_check /bin/bash -c "cd /panda/tests/language; ./test_language.py"
+ linter_python:
+ machine:
+ docker_layer_caching: true
+ steps:
+ - checkout
+ - run:
+ name: Build image
+ command: "docker build -t linter_python -f tests/linter_python/Dockerfile ."
+ - run:
+ name: Run linter python test
+ command: |
+ docker run linter_python /bin/bash -c "cd /panda/tests/linter_python; PYTHONPATH=/ ./flake8_panda.sh"
+ docker run linter_python /bin/bash -c "cd /panda/tests/linter_python; PYTHONPATH=/ ./pylint_panda.sh"
+
workflows:
version: 2
main:
@@ -101,3 +115,4 @@ workflows:
- build
- safety_replay
- language_check
+ - linter_python
diff --git a/panda/Jenkinsfile b/panda/Jenkinsfile
index 7f147a2fe9e08d..204b5beb3d925a 100644
--- a/panda/Jenkinsfile
+++ b/panda/Jenkinsfile
@@ -46,6 +46,21 @@ pipeline {
}
}
}
+/*
+ stage('Test Dev Build (WIFI)') {
+ steps {
+ lock(resource: "Pandas", inversePrecedence: true, quantity: 1){
+ timeout(time: 60, unit: 'MINUTES') {
+ script {
+ sh "docker run --name ${env.DOCKER_NAME} --privileged --volume /dev/bus/usb:/dev/bus/usb --volume /var/run/dbus:/var/run/dbus --net host ${env.DOCKER_IMAGE_TAG} bash -c 'cd /tmp/panda; ./run_automated_tests.sh'"
+ sh "docker cp ${env.DOCKER_NAME}:/tmp/panda/nosetests.xml test_results_dev.xml"
+ sh "docker rm ${env.DOCKER_NAME}"
+ }
+ }
+ }
+ }
+ }
+*/
}
post {
failure {
diff --git a/panda/README.md b/panda/README.md
index 7c9bd68bf7926a..634db4c120b157 100644
--- a/panda/README.md
+++ b/panda/README.md
@@ -108,6 +108,8 @@ to ensure that the behavior remains unchanged.
* compiling the code in various configuration and flashing it both through USB and WiFi.
* Receiving, sending and forwarding CAN messages on all buses, over USB and WiFi.
+In addition, we run [Pylint](https://www.pylint.org/) and [Flake8](https://github.com/PyCQA/flake8) linters on all python files within the panda repo.
+
Hardware
------
diff --git a/panda/UPDATING.md b/panda/UPDATING.md
index 100acc6bab5fbc..ab60f88ac81694 100644
--- a/panda/UPDATING.md
+++ b/panda/UPDATING.md
@@ -1,9 +1,9 @@
# Updating your panda
-Panda should update automatically via the [Chffr](http://chffr.comma.ai/) app ([apple](https://itunes.apple.com/us/app/chffr-dash-cam-that-remembers/id1146683979) and [android](https://play.google.com/store/apps/details?id=ai.comma.chffr))
+Panda should update automatically via the [openpilot](http://openpilot.comma.ai/).
-If it doesn't however, you can use the following commands on linux or Mac OSX
- `sudo pip install --upgrade pandacan`
-` PYTHONPATH="" sudo python -c "import panda; panda.flash_release()"`
-
-(You'll need to have `pip` and `sudo` installed.)
+On Linux or Mac OSX, you can manually update it using:
+```
+sudo pip install --upgrade pandacan`
+PYTHONPATH="" sudo python -c "import panda; panda.flash_release()"`
+```
diff --git a/panda/VERSION b/panda/VERSION
index 74a63a2249463a..0fa909eb360030 100644
--- a/panda/VERSION
+++ b/panda/VERSION
@@ -1 +1 @@
-v1.5.2
\ No newline at end of file
+v1.5.9
diff --git a/panda/__init__.py b/panda/__init__.py
index b802cf5a59582a..5374d5a9ab550a 100644
--- a/panda/__init__.py
+++ b/panda/__init__.py
@@ -1 +1 @@
-from .python import Panda, PandaWifiStreaming, PandaDFU, ESPROM, CesantaFlasher, flash_release, BASEDIR, ensure_st_up_to_date, build_st, PandaSerial
+from .python import Panda, PandaWifiStreaming, PandaDFU, ESPROM, CesantaFlasher, flash_release, BASEDIR, ensure_st_up_to_date, build_st, PandaSerial # noqa: F401
diff --git a/panda/board/README.md b/panda/board/README.md
index 5fe2e4b238c2dd..7151bfbf93e32a 100644
--- a/panda/board/README.md
+++ b/panda/board/README.md
@@ -4,6 +4,7 @@ Dependencies
**Mac**
```
+xcode-select --install
./get_sdk_mac.sh
```
diff --git a/panda/board/board.h b/panda/board/board.h
index 154f32132ea9d6..5629a841d3f5fd 100644
--- a/panda/board/board.h
+++ b/panda/board/board.h
@@ -7,9 +7,12 @@
// ///// Board definition and detection ///// //
#include "drivers/harness.h"
#ifdef PANDA
+ #include "drivers/fan.h"
+ #include "drivers/rtc.h"
#include "boards/white.h"
#include "boards/grey.h"
#include "boards/black.h"
+ #include "boards/uno.h"
#else
#include "boards/pedal.h"
#endif
@@ -23,6 +26,9 @@ void detect_board_type(void) {
} else if(detect_with_pull(GPIOA, 13, PULL_DOWN)) { // Rev AB deprecated, so no pullup means black. In REV C, A13 is pulled up to 5V with a 10K
hw_type = HW_TYPE_GREY_PANDA;
current_board = &board_grey;
+ } else if(!detect_with_pull(GPIOB, 15, PULL_UP)) {
+ hw_type = HW_TYPE_UNO;
+ current_board = &board_uno;
} else {
hw_type = HW_TYPE_BLACK_PANDA;
current_board = &board_black;
@@ -31,7 +37,7 @@ void detect_board_type(void) {
#ifdef PEDAL
hw_type = HW_TYPE_PEDAL;
current_board = &board_pedal;
- #else
+ #else
hw_type = HW_TYPE_UNKNOWN;
puts("Hardware type is UNKNOWN!\n");
#endif
@@ -60,6 +66,27 @@ void detect_configuration(void) {
}
// ///// Board functions ///// //
+// TODO: Make these config options in the board struct
bool board_has_gps(void) {
- return ((hw_type == HW_TYPE_GREY_PANDA) || (hw_type == HW_TYPE_BLACK_PANDA));
-}
\ No newline at end of file
+ return ((hw_type == HW_TYPE_GREY_PANDA) || (hw_type == HW_TYPE_BLACK_PANDA) || (hw_type == HW_TYPE_UNO));
+}
+
+bool board_has_gmlan(void) {
+ return ((hw_type == HW_TYPE_WHITE_PANDA) || (hw_type == HW_TYPE_GREY_PANDA));
+}
+
+bool board_has_obd(void) {
+ return ((hw_type == HW_TYPE_BLACK_PANDA) || (hw_type == HW_TYPE_UNO));
+}
+
+bool board_has_lin(void) {
+ return ((hw_type == HW_TYPE_WHITE_PANDA) || (hw_type == HW_TYPE_GREY_PANDA));
+}
+
+bool board_has_rtc(void) {
+ return (hw_type == HW_TYPE_UNO);
+}
+
+bool board_has_relay(void) {
+ return ((hw_type == HW_TYPE_BLACK_PANDA) || (hw_type == HW_TYPE_UNO));
+}
diff --git a/panda/board/board_declarations.h b/panda/board/board_declarations.h
index 21eb140c3ef272..2fd3976a0dac68 100644
--- a/panda/board/board_declarations.h
+++ b/panda/board/board_declarations.h
@@ -8,6 +8,9 @@ typedef void (*board_set_esp_gps_mode)(uint8_t mode);
typedef void (*board_set_can_mode)(uint8_t mode);
typedef void (*board_usb_power_mode_tick)(uint64_t tcnt);
typedef bool (*board_check_ignition)(void);
+typedef uint32_t (*board_read_current)(void);
+typedef void (*board_set_ir_power)(uint8_t percentage);
+typedef void (*board_set_fan_power)(uint8_t percentage);
struct board {
const char *board_type;
@@ -21,6 +24,9 @@ struct board {
board_set_can_mode set_can_mode;
board_usb_power_mode_tick usb_power_mode_tick;
board_check_ignition check_ignition;
+ board_read_current read_current;
+ board_set_ir_power set_ir_power;
+ board_set_fan_power set_fan_power;
};
// ******************* Definitions ********************
@@ -30,6 +36,7 @@ struct board {
#define HW_TYPE_GREY_PANDA 2U
#define HW_TYPE_BLACK_PANDA 3U
#define HW_TYPE_PEDAL 4U
+#define HW_TYPE_UNO 5U
// LED colors
#define LED_RED 0U
@@ -55,3 +62,11 @@ struct board {
// ********************* Globals **********************
uint8_t usb_power_mode = USB_POWER_NONE;
+
+// ************ Board function prototypes *************
+bool board_has_gps(void);
+bool board_has_gmlan(void);
+bool board_has_obd(void);
+bool board_has_lin(void);
+bool board_has_rtc(void);
+bool board_has_relay(void);
\ No newline at end of file
diff --git a/panda/board/boards/black.h b/panda/board/boards/black.h
index c6078e3b56b370..f033e82b23ed34 100644
--- a/panda/board/boards/black.h
+++ b/panda/board/boards/black.h
@@ -23,7 +23,8 @@ void black_enable_can_transciever(uint8_t transciever, bool enabled) {
}
void black_enable_can_transcievers(bool enabled) {
- for(uint8_t i=1U; i<=4U; i++){
+ uint8_t t1 = enabled ? 1U : 2U; // leave transciever 1 enabled to detect CAN ignition
+ for(uint8_t i=t1; i<=4U; i++) {
black_enable_can_transciever(i, enabled);
}
}
@@ -132,6 +133,19 @@ bool black_check_ignition(void){
return harness_check_ignition();
}
+uint32_t black_read_current(void){
+ // No current sense on black panda
+ return 0U;
+}
+
+void black_set_ir_power(uint8_t percentage){
+ UNUSED(percentage);
+}
+
+void black_set_fan_power(uint8_t percentage){
+ UNUSED(percentage);
+}
+
void black_init(void) {
common_init_gpio();
@@ -153,9 +167,6 @@ void black_init(void) {
set_gpio_output(GPIOC, 10, 1);
set_gpio_output(GPIOC, 11, 1);
- // C8: FAN aka TIM3_CH3
- set_gpio_alternate(GPIOC, 8, GPIO_AF2_TIM3);
-
// Turn on GPS load switch.
black_set_gps_load_switch(true);
@@ -213,5 +224,8 @@ const board board_black = {
.set_esp_gps_mode = black_set_esp_gps_mode,
.set_can_mode = black_set_can_mode,
.usb_power_mode_tick = black_usb_power_mode_tick,
- .check_ignition = black_check_ignition
+ .check_ignition = black_check_ignition,
+ .read_current = black_read_current,
+ .set_fan_power = black_set_fan_power,
+ .set_ir_power = black_set_ir_power
};
diff --git a/panda/board/boards/common.h b/panda/board/boards/common.h
index d176e4eaf561a0..e33b2a2f0426c4 100644
--- a/panda/board/boards/common.h
+++ b/panda/board/boards/common.h
@@ -58,16 +58,18 @@ void peripherals_init(void){
#endif
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // main counter
- RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // slow loop and pedal
- RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // gmlan_alt
+ RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // pedal and fan PWM
+ RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // gmlan_alt and IR PWM
//RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
//RCC->APB1ENR |= RCC_APB1ENR_TIM6EN;
+ RCC->APB1ENR |= RCC_APB1ENR_PWREN; // for RTC config
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
//RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
+ RCC->APB2ENR |= RCC_APB2ENR_TIM9EN; // slow loop
}
// Detection with internal pullup
diff --git a/panda/board/boards/grey.h b/panda/board/boards/grey.h
index 1927b5459196bb..1a39bce07fad9b 100644
--- a/panda/board/boards/grey.h
+++ b/panda/board/boards/grey.h
@@ -14,5 +14,8 @@ const board board_grey = {
.set_esp_gps_mode = white_set_esp_gps_mode,
.set_can_mode = white_set_can_mode,
.usb_power_mode_tick = white_usb_power_mode_tick,
- .check_ignition = white_check_ignition
+ .check_ignition = white_check_ignition,
+ .read_current = white_read_current,
+ .set_fan_power = white_set_fan_power,
+ .set_ir_power = white_set_ir_power
};
\ No newline at end of file
diff --git a/panda/board/boards/pedal.h b/panda/board/boards/pedal.h
index 9209a33ba79fdf..02612d3f0966e7 100644
--- a/panda/board/boards/pedal.h
+++ b/panda/board/boards/pedal.h
@@ -60,6 +60,19 @@ bool pedal_check_ignition(void){
return false;
}
+uint32_t pedal_read_current(void){
+ // No current sense on pedal
+ return 0U;
+}
+
+void pedal_set_ir_power(uint8_t percentage){
+ UNUSED(percentage);
+}
+
+void pedal_set_fan_power(uint8_t percentage){
+ UNUSED(percentage);
+}
+
void pedal_init(void) {
common_init_gpio();
@@ -93,4 +106,7 @@ const board board_pedal = {
.set_can_mode = pedal_set_can_mode,
.usb_power_mode_tick = pedal_usb_power_mode_tick,
.check_ignition = pedal_check_ignition,
+ .read_current = pedal_read_current,
+ .set_fan_power = pedal_set_fan_power,
+ .set_ir_power = pedal_set_ir_power
};
\ No newline at end of file
diff --git a/panda/board/boards/uno.h b/panda/board/boards/uno.h
new file mode 100644
index 00000000000000..f5765c226f8a6f
--- /dev/null
+++ b/panda/board/boards/uno.h
@@ -0,0 +1,247 @@
+// ///////////// //
+// Uno + Harness //
+// ///////////// //
+
+void uno_enable_can_transciever(uint8_t transciever, bool enabled) {
+ switch (transciever){
+ case 1U:
+ set_gpio_output(GPIOC, 1, !enabled);
+ break;
+ case 2U:
+ set_gpio_output(GPIOC, 13, !enabled);
+ break;
+ case 3U:
+ set_gpio_output(GPIOA, 0, !enabled);
+ break;
+ case 4U:
+ set_gpio_output(GPIOB, 10, !enabled);
+ break;
+ default:
+ puts("Invalid CAN transciever ("); puth(transciever); puts("): enabling failed\n");
+ break;
+ }
+}
+
+void uno_enable_can_transcievers(bool enabled) {
+ for(uint8_t i=1U; i<=4U; i++){
+ uno_enable_can_transciever(i, enabled);
+ }
+}
+
+void uno_set_led(uint8_t color, bool enabled) {
+ switch (color){
+ case LED_RED:
+ set_gpio_output(GPIOC, 9, !enabled);
+ break;
+ case LED_GREEN:
+ set_gpio_output(GPIOC, 7, !enabled);
+ break;
+ case LED_BLUE:
+ set_gpio_output(GPIOC, 6, !enabled);
+ break;
+ default:
+ break;
+ }
+}
+
+void uno_set_gps_load_switch(bool enabled) {
+ set_gpio_output(GPIOC, 12, enabled);
+}
+
+void uno_set_usb_power_mode(uint8_t mode) {
+ UNUSED(mode);
+ puts("Setting USB mode makes no sense on UNO\n");
+}
+
+void uno_set_esp_gps_mode(uint8_t mode) {
+ switch (mode) {
+ case ESP_GPS_DISABLED:
+ // GPS OFF
+ set_gpio_output(GPIOB, 1, 0);
+ set_gpio_output(GPIOC, 5, 0);
+ uno_set_gps_load_switch(false);
+ break;
+ case ESP_GPS_ENABLED:
+ // GPS ON
+ set_gpio_output(GPIOB, 1, 1);
+ set_gpio_output(GPIOC, 5, 1);
+ uno_set_gps_load_switch(true);
+ break;
+ case ESP_GPS_BOOTMODE:
+ set_gpio_output(GPIOB, 1, 1);
+ set_gpio_output(GPIOC, 5, 0);
+ uno_set_gps_load_switch(true);
+ break;
+ default:
+ puts("Invalid ESP/GPS mode\n");
+ break;
+ }
+}
+
+void uno_set_can_mode(uint8_t mode){
+ switch (mode) {
+ case CAN_MODE_NORMAL:
+ case CAN_MODE_OBD_CAN2:
+ if ((bool)(mode == CAN_MODE_NORMAL) != (bool)(car_harness_status == HARNESS_STATUS_NORMAL)) {
+ // B12,B13: disable OBD mode
+ set_gpio_mode(GPIOB, 12, MODE_INPUT);
+ set_gpio_mode(GPIOB, 13, MODE_INPUT);
+
+ // B5,B6: normal CAN2 mode
+ set_gpio_alternate(GPIOB, 5, GPIO_AF9_CAN2);
+ set_gpio_alternate(GPIOB, 6, GPIO_AF9_CAN2);
+ } else {
+ // B5,B6: disable normal CAN2 mode
+ set_gpio_mode(GPIOB, 5, MODE_INPUT);
+ set_gpio_mode(GPIOB, 6, MODE_INPUT);
+
+ // B12,B13: OBD mode
+ set_gpio_alternate(GPIOB, 12, GPIO_AF9_CAN2);
+ set_gpio_alternate(GPIOB, 13, GPIO_AF9_CAN2);
+ }
+ break;
+ default:
+ puts("Tried to set unsupported CAN mode: "); puth(mode); puts("\n");
+ break;
+ }
+}
+
+void uno_set_bootkick(bool enabled){
+ set_gpio_output(GPIOB, 14, !enabled);
+}
+
+void uno_usb_power_mode_tick(uint64_t tcnt){
+ if(tcnt == 3U){
+ uno_set_bootkick(false);
+ }
+}
+
+bool uno_check_ignition(void){
+ // ignition is checked through harness
+ return harness_check_ignition();
+}
+
+void uno_set_usb_switch(bool phone){
+ set_gpio_output(GPIOB, 3, phone);
+}
+
+void uno_set_ir_power(uint8_t percentage){
+ pwm_set(TIM4, 2, percentage);
+}
+
+void uno_set_fan_power(uint8_t percentage){
+ // Enable fan power only if percentage is non-zero.
+ set_gpio_output(GPIOA, 1, (percentage != 0U));
+ fan_set_power(percentage);
+}
+
+uint32_t uno_read_current(void){
+ // No current sense on Uno
+ return 0U;
+}
+
+void uno_init(void) {
+ common_init_gpio();
+
+ // A8,A15: normal CAN3 mode
+ set_gpio_alternate(GPIOA, 8, GPIO_AF11_CAN3);
+ set_gpio_alternate(GPIOA, 15, GPIO_AF11_CAN3);
+
+ // C0: OBD_SBU1 (orientation detection)
+ // C3: OBD_SBU2 (orientation detection)
+ set_gpio_mode(GPIOC, 0, MODE_ANALOG);
+ set_gpio_mode(GPIOC, 3, MODE_ANALOG);
+
+ // C10: OBD_SBU1_RELAY (harness relay driving output)
+ // C11: OBD_SBU2_RELAY (harness relay driving output)
+ set_gpio_mode(GPIOC, 10, MODE_OUTPUT);
+ set_gpio_mode(GPIOC, 11, MODE_OUTPUT);
+ set_gpio_output_type(GPIOC, 10, OUTPUT_TYPE_OPEN_DRAIN);
+ set_gpio_output_type(GPIOC, 11, OUTPUT_TYPE_OPEN_DRAIN);
+ set_gpio_output(GPIOC, 10, 1);
+ set_gpio_output(GPIOC, 11, 1);
+
+ // C8: FAN PWM aka TIM3_CH3
+ set_gpio_alternate(GPIOC, 8, GPIO_AF2_TIM3);
+
+ // Turn on GPS load switch.
+ uno_set_gps_load_switch(true);
+
+ // Turn on phone regulator
+ set_gpio_output(GPIOB, 4, 1);
+
+ // Initialize IR PWM and set to 0%
+ set_gpio_alternate(GPIOB, 7, GPIO_AF2_TIM4);
+ pwm_init(TIM4, 2);
+ uno_set_ir_power(0U);
+
+ // Initialize fan and set to 0%
+ fan_init();
+ uno_set_fan_power(0U);
+
+ // Initialize harness
+ harness_init();
+
+ // Initialize RTC
+ rtc_init();
+
+ // Enable CAN transcievers
+ uno_enable_can_transcievers(true);
+
+ // Disable LEDs
+ uno_set_led(LED_RED, false);
+ uno_set_led(LED_GREEN, false);
+ uno_set_led(LED_BLUE, false);
+
+ // Set normal CAN mode
+ uno_set_can_mode(CAN_MODE_NORMAL);
+
+ // flip CAN0 and CAN2 if we are flipped
+ if (car_harness_status == HARNESS_STATUS_NORMAL) {
+ can_flip_buses(0, 2);
+ }
+
+ // init multiplexer
+ can_set_obd(car_harness_status, false);
+
+ // Switch to phone usb mode if harness connection is powered by less than 7V
+ if(adc_get_voltage() < 7000U){
+ uno_set_usb_switch(true);
+ } else {
+ uno_set_usb_switch(false);
+ }
+
+ // Bootkick phone
+ uno_set_bootkick(true);
+}
+
+const harness_configuration uno_harness_config = {
+ .has_harness = true,
+ .GPIO_SBU1 = GPIOC,
+ .GPIO_SBU2 = GPIOC,
+ .GPIO_relay_normal = GPIOC,
+ .GPIO_relay_flipped = GPIOC,
+ .pin_SBU1 = 0,
+ .pin_SBU2 = 3,
+ .pin_relay_normal = 10,
+ .pin_relay_flipped = 11,
+ .adc_channel_SBU1 = 10,
+ .adc_channel_SBU2 = 13
+};
+
+const board board_uno = {
+ .board_type = "Uno",
+ .harness_config = &uno_harness_config,
+ .init = uno_init,
+ .enable_can_transciever = uno_enable_can_transciever,
+ .enable_can_transcievers = uno_enable_can_transcievers,
+ .set_led = uno_set_led,
+ .set_usb_power_mode = uno_set_usb_power_mode,
+ .set_esp_gps_mode = uno_set_esp_gps_mode,
+ .set_can_mode = uno_set_can_mode,
+ .usb_power_mode_tick = uno_usb_power_mode_tick,
+ .check_ignition = uno_check_ignition,
+ .read_current = uno_read_current,
+ .set_fan_power = uno_set_fan_power,
+ .set_ir_power = uno_set_ir_power
+};
diff --git a/panda/board/boards/white.h b/panda/board/boards/white.h
index 241f1b91bcf8dd..899ba8d4fef9f5 100644
--- a/panda/board/boards/white.h
+++ b/panda/board/boards/white.h
@@ -20,8 +20,10 @@ void white_enable_can_transciever(uint8_t transciever, bool enabled) {
}
void white_enable_can_transcievers(bool enabled) {
- for(uint8_t i=1; i<=3U; i++)
+ uint8_t t1 = enabled ? 1U : 2U; // leave transciever 1 enabled to detect CAN ignition
+ for(uint8_t i=t1; i<=3U; i++) {
white_enable_can_transciever(i, enabled);
+ }
}
void white_set_led(uint8_t color, bool enabled) {
@@ -150,6 +152,10 @@ void white_set_can_mode(uint8_t mode){
}
}
+uint32_t white_read_current(void){
+ return adc_get(ADCCHAN_CURRENT);
+}
+
uint64_t marker = 0;
void white_usb_power_mode_tick(uint64_t tcnt){
@@ -158,7 +164,7 @@ void white_usb_power_mode_tick(uint64_t tcnt){
#define CURRENT_THRESHOLD 0xF00U
#define CLICKS 5U // 5 seconds to switch modes
- uint32_t current = adc_get(ADCCHAN_CURRENT);
+ uint32_t current = white_read_current();
// ~0x9a = 500 ma
// puth(current); puts("\n");
@@ -217,6 +223,14 @@ void white_usb_power_mode_tick(uint64_t tcnt){
#endif
}
+void white_set_ir_power(uint8_t percentage){
+ UNUSED(percentage);
+}
+
+void white_set_fan_power(uint8_t percentage){
+ UNUSED(percentage);
+}
+
bool white_check_ignition(void){
// ignition is on PA1
return !get_gpio_input(GPIOA, 1);
@@ -315,5 +329,8 @@ const board board_white = {
.set_esp_gps_mode = white_set_esp_gps_mode,
.set_can_mode = white_set_can_mode,
.usb_power_mode_tick = white_usb_power_mode_tick,
- .check_ignition = white_check_ignition
+ .check_ignition = white_check_ignition,
+ .read_current = white_read_current,
+ .set_fan_power = white_set_fan_power,
+ .set_ir_power = white_set_ir_power
};
diff --git a/panda/board/bootstub.c b/panda/board/bootstub.c
index 51ce6695db79ee..8ada20c7383224 100644
--- a/panda/board/bootstub.c
+++ b/panda/board/bootstub.c
@@ -33,6 +33,7 @@ const board *current_board;
#include "drivers/clock.h"
#include "drivers/llgpio.h"
#include "drivers/adc.h"
+#include "drivers/pwm.h"
#include "board.h"
diff --git a/panda/board/drivers/can.h b/panda/board/drivers/can.h
index c45a3fe8d1d754..c9bf2d25436b35 100644
--- a/panda/board/drivers/can.h
+++ b/panda/board/drivers/can.h
@@ -30,6 +30,9 @@ void can_init_all(void);
void can_send(CAN_FIFOMailBox_TypeDef *to_push, uint8_t bus_number);
bool can_pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem);
+// Ignition detected from CAN meessages
+bool ignition_can = false;
+
// end API
#define ALL_CAN_SILENT 0xFF
@@ -173,7 +176,7 @@ void can_flip_buses(uint8_t bus1, uint8_t bus2){
// TODO: Cleanup with new abstraction
void can_set_gmlan(uint8_t bus) {
- if(hw_type != HW_TYPE_BLACK_PANDA){
+ if(board_has_gmlan()){
// first, disable GMLAN on prev bus
uint8_t prev_bus = can_num_lookup[3];
if (bus != prev_bus) {
@@ -226,7 +229,7 @@ void can_set_obd(uint8_t harness_orientation, bool obd){
} else {
puts("setting CAN2 to be normal\n");
}
- if(hw_type == HW_TYPE_BLACK_PANDA){
+ if(board_has_obd()){
if(obd != (bool)(harness_orientation == HARNESS_STATUS_NORMAL)){
// B5,B6: disable normal mode
set_gpio_mode(GPIOB, 5, MODE_INPUT);
@@ -243,7 +246,7 @@ void can_set_obd(uint8_t harness_orientation, bool obd){
set_gpio_mode(GPIOB, 13, MODE_INPUT);
}
} else {
- puts("OBD CAN not available on non-black panda\n");
+ puts("OBD CAN not available on this board\n");
}
}
@@ -332,6 +335,36 @@ void process_can(uint8_t can_number) {
}
}
+void ignition_can_hook(CAN_FIFOMailBox_TypeDef *to_push) {
+
+ int bus = GET_BUS(to_push);
+ int addr = GET_ADDR(to_push);
+ int len = GET_LEN(to_push);
+
+ if (bus == 0) {
+ // GM exception
+ if ((addr == 0x1F1) && (len == 8)) {
+ //Bit 5 is ignition "on"
+ ignition_can = (GET_BYTE(to_push, 0) & 0x20) != 0;
+ }
+ // Tesla exception
+ if ((addr == 0x348) && (len == 8)) {
+ // GTW_status
+ ignition_can = (GET_BYTE(to_push, 0) & 0x1) != 0;
+ }
+ // Cadillac exception
+ if ((addr == 0x160) && (len == 5)) {
+ // this message isn't all zeros when ignition is on
+ ignition_can = GET_BYTES_04(to_push) != 0;
+ }
+ // VW exception
+ if ((addr == 0x3C0) && (len == 4)) {
+ // VW Terminal 15 (ignition-on) state
+ ignition_can = (GET_BYTE(to_push, 2) & 0x2) != 0;
+ }
+ }
+}
+
// CAN receive handlers
// blink blue when we are receiving CAN messages
void can_rx(uint8_t can_number) {
@@ -365,6 +398,7 @@ void can_rx(uint8_t can_number) {
}
safety_rx_hook(&to_push);
+ ignition_can_hook(&to_push);
current_board->set_led(LED_BLUE, true);
can_send_errs += can_push(&can_rx_q, &to_push) ? 0U : 1U;
diff --git a/panda/board/drivers/fan.h b/panda/board/drivers/fan.h
new file mode 100644
index 00000000000000..d7326ec0b33d59
--- /dev/null
+++ b/panda/board/drivers/fan.h
@@ -0,0 +1,36 @@
+void fan_init(void){
+ // Init PWM speed control
+ pwm_init(TIM3, 3);
+
+ // Init TACH interrupt
+ SYSCFG->EXTICR[0] = SYSCFG_EXTICR1_EXTI2_PD;
+ EXTI->IMR |= (1U << 2);
+ EXTI->RTSR |= (1U << 2);
+ EXTI->FTSR |= (1U << 2);
+ NVIC_EnableIRQ(EXTI2_IRQn);
+}
+
+void fan_set_power(uint8_t percentage){
+ pwm_set(TIM3, 3, percentage);
+}
+
+uint16_t fan_tach_counter = 0U;
+uint16_t fan_rpm = 0U;
+
+// Can be way more acurate than this, but this is probably good enough for our purposes.
+
+// Call this every second
+void fan_tick(void){
+ // 4 interrupts per rotation
+ fan_rpm = fan_tach_counter * 15U;
+ fan_tach_counter = 0U;
+}
+
+// TACH interrupt handler
+void EXTI2_IRQHandler(void) {
+ volatile unsigned int pr = EXTI->PR & (1U << 2);
+ if ((pr & (1U << 2)) != 0U) {
+ fan_tach_counter++;
+ }
+ EXTI->PR = (1U << 2);
+}
\ No newline at end of file
diff --git a/panda/board/drivers/pwm.h b/panda/board/drivers/pwm.h
new file mode 100644
index 00000000000000..d2e1652c1ce4ff
--- /dev/null
+++ b/panda/board/drivers/pwm.h
@@ -0,0 +1,55 @@
+#define PWM_COUNTER_OVERFLOW 2000U // To get ~50kHz
+
+void pwm_init(TIM_TypeDef *TIM, uint8_t channel){
+ // Enable timer and auto-reload
+ TIM->CR1 = TIM_CR1_CEN | TIM_CR1_ARPE;
+
+ // Set channel as PWM mode 1 and enable output
+ switch(channel){
+ case 1U:
+ TIM->CCMR1 |= (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE);
+ TIM->CCER |= TIM_CCER_CC1E;
+ break;
+ case 2U:
+ TIM->CCMR1 |= (TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2PE);
+ TIM->CCER |= TIM_CCER_CC2E;
+ break;
+ case 3U:
+ TIM->CCMR2 |= (TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3PE);
+ TIM->CCER |= TIM_CCER_CC3E;
+ break;
+ case 4U:
+ TIM->CCMR2 |= (TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4PE);
+ TIM->CCER |= TIM_CCER_CC4E;
+ break;
+ default:
+ break;
+ }
+
+ // Set max counter value
+ TIM->ARR = PWM_COUNTER_OVERFLOW;
+
+ // Update registers and clear counter
+ TIM->EGR |= TIM_EGR_UG;
+}
+
+// TODO: Implement for 32-bit timers
+void pwm_set(TIM_TypeDef *TIM, uint8_t channel, uint8_t percentage){
+ uint16_t comp_value = (((uint16_t) percentage * PWM_COUNTER_OVERFLOW) / 100U);
+ switch(channel){
+ case 1U:
+ TIM->CCR1 = comp_value;
+ break;
+ case 2U:
+ TIM->CCR2 = comp_value;
+ break;
+ case 3U:
+ TIM->CCR3 = comp_value;
+ break;
+ case 4U:
+ TIM->CCR4 = comp_value;
+ break;
+ default:
+ break;
+ }
+}
\ No newline at end of file
diff --git a/panda/board/drivers/rtc.h b/panda/board/drivers/rtc.h
new file mode 100644
index 00000000000000..9cf113a02e82fb
--- /dev/null
+++ b/panda/board/drivers/rtc.h
@@ -0,0 +1,108 @@
+#define RCC_BDCR_OPTIONS (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL_0 | RCC_BDCR_LSEON)
+#define RCC_BDCR_MASK (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL | RCC_BDCR_LSEMOD | RCC_BDCR_LSEBYP | RCC_BDCR_LSEON)
+
+#define YEAR_OFFSET 2000U
+
+typedef struct __attribute__((packed)) timestamp_t {
+ uint16_t year;
+ uint8_t month;
+ uint8_t day;
+ uint8_t weekday;
+ uint8_t hour;
+ uint8_t minute;
+ uint8_t second;
+} timestamp_t;
+
+uint8_t to_bcd(uint16_t value){
+ return (((value / 10U) & 0x0FU) << 4U) | ((value % 10U) & 0x0FU);
+}
+
+uint16_t from_bcd(uint8_t value){
+ return (((value & 0xF0U) >> 4U) * 10U) + (value & 0x0FU);
+}
+
+void rtc_init(void){
+ if(board_has_rtc()){
+ // Initialize RTC module and clock if not done already.
+ if((RCC->BDCR & RCC_BDCR_MASK) != RCC_BDCR_OPTIONS){
+ puts("Initializing RTC\n");
+ // Reset backup domain
+ RCC->BDCR |= RCC_BDCR_BDRST;
+
+ // Disable write protection
+ PWR->CR |= PWR_CR_DBP;
+
+ // Clear backup domain reset
+ RCC->BDCR &= ~(RCC_BDCR_BDRST);
+
+ // Set RTC options
+ RCC->BDCR = RCC_BDCR_OPTIONS | (RCC->BDCR & (~RCC_BDCR_MASK));
+
+ // Enable write protection
+ PWR->CR &= ~(PWR_CR_DBP);
+ }
+ }
+}
+
+void rtc_set_time(timestamp_t time){
+ if(board_has_rtc()){
+ puts("Setting RTC time\n");
+
+ // Disable write protection
+ PWR->CR |= PWR_CR_DBP;
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ // Enable initialization mode
+ RTC->ISR |= RTC_ISR_INIT;
+ while((RTC->ISR & RTC_ISR_INITF) == 0){}
+
+ // Set time
+ RTC->TR = (to_bcd(time.hour) << RTC_TR_HU_Pos) | (to_bcd(time.minute) << RTC_TR_MNU_Pos) | (to_bcd(time.second) << RTC_TR_SU_Pos);
+ RTC->DR = (to_bcd(time.year - YEAR_OFFSET) << RTC_DR_YU_Pos) | (time.weekday << RTC_DR_WDU_Pos) | (to_bcd(time.month) << RTC_DR_MU_Pos) | (to_bcd(time.day) << RTC_DR_DU_Pos);
+
+ // Set options
+ RTC->CR = 0U;
+
+ // Disable initalization mode
+ RTC->ISR &= ~(RTC_ISR_INIT);
+
+ // Wait for synchronization
+ while((RTC->ISR & RTC_ISR_RSF) == 0){}
+
+ // Re-enable write protection
+ RTC->WPR = 0x00;
+ PWR->CR &= ~(PWR_CR_DBP);
+ }
+}
+
+timestamp_t rtc_get_time(void){
+ timestamp_t result;
+ // Init with zero values in case there is no RTC running
+ result.year = 0U;
+ result.month = 0U;
+ result.day = 0U;
+ result.weekday = 0U;
+ result.hour = 0U;
+ result.minute = 0U;
+ result.second = 0U;
+
+ if(board_has_rtc()){
+ // Wait until the register sync flag is set
+ while((RTC->ISR & RTC_ISR_RSF) == 0){}
+
+ // Read time and date registers. Since our HSE > 7*LSE, this should be fine.
+ uint32_t time = RTC->TR;
+ uint32_t date = RTC->DR;
+
+ // Parse values
+ result.year = from_bcd((date & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos) + YEAR_OFFSET;
+ result.month = from_bcd((date & (RTC_DR_MT | RTC_DR_MU)) >> RTC_DR_MU_Pos);
+ result.day = from_bcd((date & (RTC_DR_DT | RTC_DR_DU)) >> RTC_DR_DU_Pos);
+ result.weekday = ((date & RTC_DR_WDU) >> RTC_DR_WDU_Pos);
+ result.hour = from_bcd((time & (RTC_TR_HT | RTC_TR_HU)) >> RTC_TR_HU_Pos);
+ result.minute = from_bcd((time & (RTC_TR_MNT | RTC_TR_MNU)) >> RTC_TR_MNU_Pos);
+ result.second = from_bcd((time & (RTC_TR_ST | RTC_TR_SU)) >> RTC_TR_SU_Pos);
+ }
+ return result;
+}
\ No newline at end of file
diff --git a/panda/board/get_sdk.sh b/panda/board/get_sdk.sh
index 7b8d1f9154c0ac..3a009a5a13173f 100755
--- a/panda/board/get_sdk.sh
+++ b/panda/board/get_sdk.sh
@@ -1,3 +1,3 @@
#!/bin/bash
sudo apt-get install gcc-arm-none-eabi python-pip
-sudo pip2 install libusb1 pycrypto requests
+sudo pip install libusb1 pycrypto requests
diff --git a/panda/board/get_sdk_mac.sh b/panda/board/get_sdk_mac.sh
index a6f641dce12116..a0a919f7d85e04 100755
--- a/panda/board/get_sdk_mac.sh
+++ b/panda/board/get_sdk_mac.sh
@@ -2,4 +2,4 @@
# Need formula for gcc
brew tap ArmMbed/homebrew-formulae
brew install python dfu-util arm-none-eabi-gcc
-pip2 install libusb1 pycrypto requests
+pip install --user libusb1 pycrypto requests
diff --git a/panda/board/inc/cmsis_compiler.h b/panda/board/inc/cmsis_compiler.h
new file mode 100644
index 00000000000000..d0f39eef67ed91
--- /dev/null
+++ b/panda/board/inc/cmsis_compiler.h
@@ -0,0 +1,284 @@
+/**************************************************************************//**
+ * @file cmsis_compiler.h
+ * @brief CMSIS compiler generic header file
+ * @version V5.1.0
+ * @date 09. October 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include
+
+/*
+ * Arm Compiler 4/5
+ */
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+
+/*
+ * Arm Compiler 6.6 LTM (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+ #include "cmsis_armclang_ltm.h"
+
+ /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
+ #include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+ #include
+
+
+/*
+ * TI Arm Compiler
+ */
+#elif defined ( __TI_ARM__ )
+ #include
+
+ #ifndef __ASM
+ #define __ASM __asm
+ #endif
+ #ifndef __INLINE
+ #define __INLINE inline
+ #endif
+ #ifndef __STATIC_INLINE
+ #define __STATIC_INLINE static inline
+ #endif
+ #ifndef __STATIC_FORCEINLINE
+ #define __STATIC_FORCEINLINE __STATIC_INLINE
+ #endif
+ #ifndef __NO_RETURN
+ #define __NO_RETURN __attribute__((noreturn))
+ #endif
+ #ifndef __USED
+ #define __USED __attribute__((used))
+ #endif
+ #ifndef __WEAK
+ #define __WEAK __attribute__((weak))
+ #endif
+ #ifndef __PACKED
+ #define __PACKED __attribute__((packed))
+ #endif
+ #ifndef __PACKED_STRUCT
+ #define __PACKED_STRUCT struct __attribute__((packed))
+ #endif
+ #ifndef __PACKED_UNION
+ #define __PACKED_UNION union __attribute__((packed))
+ #endif
+ #ifndef __UNALIGNED_UINT32 /* deprecated */
+ struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+ #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+ #endif
+ #ifndef __UNALIGNED_UINT16_WRITE
+ __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+ #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
+ #endif
+ #ifndef __UNALIGNED_UINT16_READ
+ __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+ #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+ #endif
+ #ifndef __UNALIGNED_UINT32_WRITE
+ __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+ #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+ #endif
+ #ifndef __UNALIGNED_UINT32_READ
+ __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+ #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+ #endif
+ #ifndef __ALIGNED
+ #define __ALIGNED(x) __attribute__((aligned(x)))
+ #endif
+ #ifndef __RESTRICT
+ #define __RESTRICT __restrict
+ #endif
+ #ifndef __COMPILER_BARRIER
+ #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+ #define __COMPILER_BARRIER() (void)0
+ #endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+ #ifndef __ASM
+ #define __ASM __asm
+ #endif
+ #ifndef __INLINE
+ #define __INLINE inline
+ #endif
+ #ifndef __STATIC_INLINE
+ #define __STATIC_INLINE static inline
+ #endif
+ #ifndef __STATIC_FORCEINLINE
+ #define __STATIC_FORCEINLINE __STATIC_INLINE
+ #endif
+ #ifndef __NO_RETURN
+ #define __NO_RETURN __attribute__((noreturn))
+ #endif
+ #ifndef __USED
+ #define __USED __attribute__((used))
+ #endif
+ #ifndef __WEAK
+ #define __WEAK __attribute__((weak))
+ #endif
+ #ifndef __PACKED
+ #define __PACKED __packed__
+ #endif
+ #ifndef __PACKED_STRUCT
+ #define __PACKED_STRUCT struct __packed__
+ #endif
+ #ifndef __PACKED_UNION
+ #define __PACKED_UNION union __packed__
+ #endif
+ #ifndef __UNALIGNED_UINT32 /* deprecated */
+ struct __packed__ T_UINT32 { uint32_t v; };
+ #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+ #endif
+ #ifndef __UNALIGNED_UINT16_WRITE
+ __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+ #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+ #endif
+ #ifndef __UNALIGNED_UINT16_READ
+ __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+ #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+ #endif
+ #ifndef __UNALIGNED_UINT32_WRITE
+ __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+ #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+ #endif
+ #ifndef __UNALIGNED_UINT32_READ
+ __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+ #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+ #endif
+ #ifndef __ALIGNED
+ #define __ALIGNED(x) __align(x)
+ #endif
+ #ifndef __RESTRICT
+ #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+ #define __RESTRICT
+ #endif
+ #ifndef __COMPILER_BARRIER
+ #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+ #define __COMPILER_BARRIER() (void)0
+ #endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+ #include
+
+ #ifndef __ASM
+ #define __ASM _asm
+ #endif
+ #ifndef __INLINE
+ #define __INLINE inline
+ #endif
+ #ifndef __STATIC_INLINE
+ #define __STATIC_INLINE static inline
+ #endif
+ #ifndef __STATIC_FORCEINLINE
+ #define __STATIC_FORCEINLINE __STATIC_INLINE
+ #endif
+ #ifndef __NO_RETURN
+ // NO RETURN is automatically detected hence no warning here
+ #define __NO_RETURN
+ #endif
+ #ifndef __USED
+ #warning No compiler specific solution for __USED. __USED is ignored.
+ #define __USED
+ #endif
+ #ifndef __WEAK
+ #define __WEAK __weak
+ #endif
+ #ifndef __PACKED
+ #define __PACKED @packed
+ #endif
+ #ifndef __PACKED_STRUCT
+ #define __PACKED_STRUCT @packed struct
+ #endif
+ #ifndef __PACKED_UNION
+ #define __PACKED_UNION @packed union
+ #endif
+ #ifndef __UNALIGNED_UINT32 /* deprecated */
+ @packed struct T_UINT32 { uint32_t v; };
+ #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+ #endif
+ #ifndef __UNALIGNED_UINT16_WRITE
+ __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+ #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+ #endif
+ #ifndef __UNALIGNED_UINT16_READ
+ __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+ #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+ #endif
+ #ifndef __UNALIGNED_UINT32_WRITE
+ __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+ #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+ #endif
+ #ifndef __UNALIGNED_UINT32_READ
+ __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+ #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+ #endif
+ #ifndef __ALIGNED
+ #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+ #define __ALIGNED(x)
+ #endif
+ #ifndef __RESTRICT
+ #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+ #define __RESTRICT
+ #endif
+ #ifndef __COMPILER_BARRIER
+ #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+ #define __COMPILER_BARRIER() (void)0
+ #endif
+
+
+#else
+ #error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+
+
diff --git a/panda/board/inc/cmsis_gcc.h b/panda/board/inc/cmsis_gcc.h
index bb89fbba9e4000..3589d18b243b7d 100644
--- a/panda/board/inc/cmsis_gcc.h
+++ b/panda/board/inc/cmsis_gcc.h
@@ -1,48 +1,186 @@
/**************************************************************************//**
* @file cmsis_gcc.h
- * @brief CMSIS Cortex-M Core Function/Instruction Header File
- * @version V4.30
- * @date 20. October 2015
+ * @brief CMSIS compiler GCC header file
+ * @version V5.2.0
+ * @date 08. May 2019
******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
#ifndef __CMSIS_GCC_H
#define __CMSIS_GCC_H
/* ignore some GCC warnings */
-#if defined ( __GNUC__ )
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wsign-conversion"
#pragma GCC diagnostic ignored "-Wconversion"
#pragma GCC diagnostic ignored "-Wunused-parameter"
+
+/* Fallback for __has_builtin */
+#ifndef __has_builtin
+ #define __has_builtin(x) (0)
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef __ASM
+ #define __ASM __asm
+#endif
+#ifndef __INLINE
+ #define __INLINE inline
+#endif
+#ifndef __STATIC_INLINE
+ #define __STATIC_INLINE static inline
+#endif
+#ifndef __STATIC_FORCEINLINE
+ #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
+#endif
+#ifndef __NO_RETURN
+ #define __NO_RETURN __attribute__((__noreturn__))
+#endif
+#ifndef __USED
+ #define __USED __attribute__((used))
+#endif
+#ifndef __WEAK
+ #define __WEAK __attribute__((weak))
+#endif
+#ifndef __PACKED
+ #define __PACKED __attribute__((packed, aligned(1)))
+#endif
+#ifndef __PACKED_STRUCT
+ #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef __PACKED_UNION
+ #define __PACKED_UNION union __attribute__((packed, aligned(1)))
+#endif
+#ifndef __UNALIGNED_UINT32 /* deprecated */
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wpacked"
+ #pragma GCC diagnostic ignored "-Wattributes"
+ struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+ #pragma GCC diagnostic pop
+ #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef __UNALIGNED_UINT16_WRITE
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wpacked"
+ #pragma GCC diagnostic ignored "-Wattributes"
+ __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+ #pragma GCC diagnostic pop
+ #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT16_READ
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wpacked"
+ #pragma GCC diagnostic ignored "-Wattributes"
+ __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+ #pragma GCC diagnostic pop
+ #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __UNALIGNED_UINT32_WRITE
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wpacked"
+ #pragma GCC diagnostic ignored "-Wattributes"
+ __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+ #pragma GCC diagnostic pop
+ #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef __UNALIGNED_UINT32_READ
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wpacked"
+ #pragma GCC diagnostic ignored "-Wattributes"
+ __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+ #pragma GCC diagnostic pop
+ #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef __ALIGNED
+ #define __ALIGNED(x) __attribute__((aligned(x)))
+#endif
+#ifndef __RESTRICT
+ #define __RESTRICT __restrict
+#endif
+#ifndef __COMPILER_BARRIER
+ #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
#endif
+/* ######################### Startup and Lowlevel Init ######################## */
+
+#ifndef __PROGRAM_START
+
+/**
+ \brief Initializes data and bss sections
+ \details This default implementations initialized all data and additional bss
+ sections relying on .copy.table and .zero.table specified properly
+ in the used linker script.
+
+ */
+__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
+{
+ extern void _start(void) __NO_RETURN;
+
+ typedef struct {
+ uint32_t const* src;
+ uint32_t* dest;
+ uint32_t wlen;
+ } __copy_table_t;
+
+ typedef struct {
+ uint32_t* dest;
+ uint32_t wlen;
+ } __zero_table_t;
+
+ extern const __copy_table_t __copy_table_start__;
+ extern const __copy_table_t __copy_table_end__;
+ extern const __zero_table_t __zero_table_start__;
+ extern const __zero_table_t __zero_table_end__;
+
+ for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
+ for(uint32_t i=0u; iwlen; ++i) {
+ pTable->dest[i] = pTable->src[i];
+ }
+ }
+
+ for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
+ for(uint32_t i=0u; iwlen; ++i) {
+ pTable->dest[i] = 0u;
+ }
+ }
+
+ _start();
+}
+
+#define __PROGRAM_START __cmsis_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP __StackTop
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT __StackLimit
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
+#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
@@ -55,7 +193,7 @@
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+__STATIC_FORCEINLINE void __enable_irq(void)
{
__ASM volatile ("cpsie i" : : : "memory");
}
@@ -64,9 +202,9 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
+ Can only be executed in Privileged modes.
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
}
@@ -77,7 +215,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
\details Returns the content of the Control Register.
\return Control Register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
@@ -86,23 +224,52 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
}
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Control Register (non-secure)
+ \details Returns the content of the non-secure Control Register when in secure mode.
+ \return non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
}
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Control Register (non-secure)
+ \details Writes the given value to the non-secure Control Register when in secure state.
+ \param [in] control Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+ __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
@@ -116,7 +283,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
\details Returns the content of the APSR Register.
\return APSR Register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
{
uint32_t result;
@@ -128,10 +295,9 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
-
- \return xPSR Register value
+ \return xPSR Register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
{
uint32_t result;
@@ -145,13 +311,29 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, psp" : "=r" (result) );
+ return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Process Stack Pointer (non-secure)
+ \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+ \return PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
{
- register uint32_t result;
+ uint32_t result;
- __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
+ __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
return(result);
}
+#endif
/**
@@ -159,36 +341,104 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
{
- __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
+ __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Process Stack Pointer (non-secure)
+ \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+ \param [in] topOfProcStack Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+ __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
{
- register uint32_t result;
+ uint32_t result;
- __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+ __ASM volatile ("MRS %0, msp" : "=r" (result) );
return(result);
}
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Main Stack Pointer (non-secure)
+ \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+ \return MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+ __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
- \param [in] topOfMainStack Main Stack Pointer value to set
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Main Stack Pointer (non-secure)
+ \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+ __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Stack Pointer (non-secure)
+ \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+ \return SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Stack Pointer (non-secure)
+ \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+ \param [in] topOfStack Stack Pointer value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
{
- __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
+ __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
}
+#endif
/**
@@ -196,13 +446,29 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOf
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
+ return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Priority Mask (non-secure)
+ \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+ \return Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t result;
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
+ __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
return(result);
}
+#endif
/**
@@ -210,20 +476,34 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
-#if (__CORTEX_M >= 0x03U)
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Priority Mask (non-secure)
+ \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+ \param [in] priMask Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+ __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
+__STATIC_FORCEINLINE void __enable_fault_irq(void)
{
__ASM volatile ("cpsie f" : : : "memory");
}
@@ -234,7 +514,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
+__STATIC_FORCEINLINE void __disable_fault_irq(void)
{
__ASM volatile ("cpsid f" : : : "memory");
}
@@ -245,7 +525,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
@@ -254,15 +534,44 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
}
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Base Priority (non-secure)
+ \details Returns the current value of the non-secure Base Priority register when in secure state.
+ \return Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+ __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Base Priority (non-secure)
+ \details Assigns the given value to the non-secure Base Priority register when in secure state.
+ \param [in] basePri Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+ __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
}
+#endif
/**
@@ -271,9 +580,9 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t v
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
- __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
+ __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
}
@@ -282,7 +591,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
@@ -291,38 +600,253 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void
}
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Fault Mask (non-secure)
+ \details Returns the current value of the non-secure Fault Mask register when in secure state.
+ \return Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
}
-#endif /* (__CORTEX_M >= 0x03U) */
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Fault Mask (non-secure)
+ \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+ \param [in] faultMask Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+ __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
+
+/**
+ \brief Get Process Stack Pointer Limit
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence zero is returned always in non-secure
+ mode.
+
+ \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+ \return PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+ (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+ // without main extensions, the non-secure PSPLIM is RAZ/WI
+ return 0U;
+#else
+ uint32_t result;
+ __ASM volatile ("MRS %0, psplim" : "=r" (result) );
+ return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Process Stack Pointer Limit (non-secure)
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence zero is returned always.
+
+ \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+ \return PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+ // without main extensions, the non-secure PSPLIM is RAZ/WI
+ return 0U;
+#else
+ uint32_t result;
+ __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
+ return result;
+#endif
+}
+#endif
+
+
+/**
+ \brief Set Process Stack Pointer Limit
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence the write is silently ignored in non-secure
+ mode.
+
+ \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+ \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+ (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+ // without main extensions, the non-secure PSPLIM is RAZ/WI
+ (void)ProcStackPtrLimit;
+#else
+ __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Process Stack Pointer (non-secure)
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence the write is silently ignored.
+
+ \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+ \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+ // without main extensions, the non-secure PSPLIM is RAZ/WI
+ (void)ProcStackPtrLimit;
+#else
+ __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+ \brief Get Main Stack Pointer Limit
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence zero is returned always in non-secure
+ mode.
+
+ \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+ \return MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+ (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+ // without main extensions, the non-secure MSPLIM is RAZ/WI
+ return 0U;
+#else
+ uint32_t result;
+ __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+ return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Get Main Stack Pointer Limit (non-secure)
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence zero is returned always.
+
+ \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+ \return MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+ // without main extensions, the non-secure MSPLIM is RAZ/WI
+ return 0U;
+#else
+ uint32_t result;
+ __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+ return result;
+#endif
+}
+#endif
+
+
+/**
+ \brief Set Main Stack Pointer Limit
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence the write is silently ignored in non-secure
+ mode.
+
+ \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+ \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+ (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+ // without main extensions, the non-secure MSPLIM is RAZ/WI
+ (void)MainStackPtrLimit;
+#else
+ __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+ \brief Set Main Stack Pointer Limit (non-secure)
+ Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+ Stack Pointer Limit register hence the write is silently ignored.
+
+ \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+ \param [in] MainStackPtrLimit Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+ // without main extensions, the non-secure MSPLIM is RAZ/WI
+ (void)MainStackPtrLimit;
+#else
+ __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
-#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+ (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
+#if __has_builtin(__builtin_arm_get_fpscr)
+// Re-enable using built-in when GCC has been fixed
+// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
+ /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+ return __builtin_arm_get_fpscr();
+#else
uint32_t result;
- /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("");
__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- __ASM volatile ("");
return(result);
+#endif
#else
- return(0);
+ return(0U);
#endif
}
@@ -332,19 +856,23 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("");
- __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
- __ASM volatile ("");
+__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+ (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
+#if __has_builtin(__builtin_arm_set_fpscr)
+// Re-enable using built-in when GCC has been fixed
+// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
+ /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+ __builtin_arm_set_fpscr(fpscr);
+#else
+ __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
+#endif
+#else
+ (void)fpscr;
#endif
}
-#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
-
-
/*@} end of CMSIS_Core_RegAccFunctions */
@@ -360,9 +888,11 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fps
* Otherwise, use general registers, specified by constraint "r" */
#if defined (__thumb__) && !defined (__thumb2__)
#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
#define __CMSIS_GCC_USE_REG(r) "l" (r)
#else
#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
#define __CMSIS_GCC_USE_REG(r) "r" (r)
#endif
@@ -370,41 +900,28 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fps
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
-{
- __ASM volatile ("nop");
-}
-
+#define __NOP() __ASM volatile ("nop")
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
-{
- __ASM volatile ("wfi");
-}
+#define __WFI() __ASM volatile ("wfi")
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
+ a low-power state until one of a number of events occurs.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
-{
- __ASM volatile ("wfe");
-}
+#define __WFE() __ASM volatile ("wfe")
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
-{
- __ASM volatile ("sev");
-}
+#define __SEV() __ASM volatile ("sev")
/**
@@ -413,7 +930,7 @@ __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
+__STATIC_FORCEINLINE void __ISB(void)
{
__ASM volatile ("isb 0xF":::"memory");
}
@@ -424,7 +941,7 @@ __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
+__STATIC_FORCEINLINE void __DSB(void)
{
__ASM volatile ("dsb 0xF":::"memory");
}
@@ -435,7 +952,7 @@ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
+__STATIC_FORCEINLINE void __DMB(void)
{
__ASM volatile ("dmb 0xF":::"memory");
}
@@ -443,11 +960,11 @@ __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
/**
\brief Reverse byte order (32 bit)
- \details Reverses the byte order in integer value.
+ \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
+__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
{
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
return __builtin_bswap32(value);
@@ -455,41 +972,41 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
uint32_t result;
__ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
+ return result;
#endif
}
/**
\brief Reverse byte order (16 bit)
- \details Reverses the byte order in two unsigned short values.
+ \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
{
uint32_t result;
__ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
+ return result;
}
/**
- \brief Reverse byte order in signed short value
- \details Reverses the byte order in a signed short value with sign extension to integer.
+ \brief Reverse byte order (16 bit)
+ \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
-__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
+__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
{
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- return (short)__builtin_bswap16(value);
+ return (int16_t)__builtin_bswap16(value);
#else
- int32_t result;
+ int16_t result;
__ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
+ return result;
#endif
}
@@ -497,12 +1014,17 @@ __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
+ \param [in] op1 Value to rotate
+ \param [in] op2 Number of Bits to rotate
\return Rotated value
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
{
+ op2 %= 32U;
+ if (op2 == 0U)
+ {
+ return op1;
+ }
return (op1 >> op2) | (op1 << (32U - op2));
}
@@ -523,17 +1045,19 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint
\param [in] value Value to reverse
\return Reversed value
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
#else
- int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
+ uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
- for (value >>= 1U; value; value >>= 1U)
+ for (value >>= 1U; value != 0U; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
@@ -541,7 +1065,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
}
result <<= s; /* shift when v's highest bits are zero */
#endif
- return(result);
+ return result;
}
@@ -551,18 +1075,36 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
-#define __CLZ __builtin_clz
-
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+ /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+ __builtin_clz(0) is undefined behaviour, so handle this case specially.
+ This guarantees ARM-compatible results if happening to compile on a non-ARM
+ target, and ensures the compiler doesn't decide to activate any
+ optimisations using the logic "value was passed to __builtin_clz, so it
+ is non-zero".
+ ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
+ single CLZ instruction.
+ */
+ if (value == 0U)
+ {
+ return 32U;
+ }
+ return __builtin_clz(value);
+}
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
+__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
{
uint32_t result;
@@ -584,7 +1126,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
+__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
{
uint32_t result;
@@ -606,7 +1148,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
+__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
@@ -623,7 +1165,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32
\return 0 Function succeeded
\return 1 Function failed
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
{
uint32_t result;
@@ -640,7 +1182,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value,
\return 0 Function succeeded
\return 1 Function failed
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
{
uint32_t result;
@@ -657,7 +1199,7 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value,
\return 0 Function succeeded
\return 1 Function failed
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
@@ -670,22 +1212,31 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value,
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
-__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
+__STATIC_FORCEINLINE void __CLREX(void)
{
__ASM volatile ("clrex" ::: "memory");
}
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
+
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
/**
\brief Signed Saturate
\details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
+ \param [in] ARG1 Value to be saturated
+ \param [in] ARG2 Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT(ARG1,ARG2) \
+__extension__ \
({ \
- uint32_t __RES, __ARG1 = (ARG1); \
+ int32_t __RES, __ARG1 = (ARG1); \
__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
@@ -694,11 +1245,12 @@ __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
+ \param [in] ARG1 Value to be saturated
+ \param [in] ARG2 Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT(ARG1,ARG2) \
+ __extension__ \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
@@ -713,7 +1265,7 @@ __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
\param [in] value Value to rotate
\return Rotated value
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
{
uint32_t result;
@@ -728,17 +1280,17 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
{
uint32_t result;
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
+ __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
#else
/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
accepted by assembler. So has to use following less efficient pattern.
*/
- __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+ __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
#endif
return ((uint8_t) result); /* Add explicit type cast here */
}
@@ -750,17 +1302,17 @@ __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
{
uint32_t result;
#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
+ __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
#else
/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
accepted by assembler. So has to use following less efficient pattern.
*/
- __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+ __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
#endif
return ((uint16_t) result); /* Add explicit type cast here */
}
@@ -772,11 +1324,11 @@ __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
{
uint32_t result;
- __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
+ __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
return(result);
}
@@ -787,9 +1339,9 @@ __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
-__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
{
- __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+ __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
@@ -799,9 +1351,9 @@ __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volat
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
-__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
{
- __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+ __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
}
@@ -811,12 +1363,249 @@ __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, vola
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
-__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
{
- __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
+ __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
}
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
+#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
+
+/**
+ \brief Signed Saturate
+ \details Saturates a signed value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (1..32)
+ \return Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+ if ((sat >= 1U) && (sat <= 32U))
+ {
+ const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+ const int32_t min = -1 - max ;
+ if (val > max)
+ {
+ return max;
+ }
+ else if (val < min)
+ {
+ return min;
+ }
+ }
+ return val;
+}
+
+/**
+ \brief Unsigned Saturate
+ \details Saturates an unsigned value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (0..31)
+ \return Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+ if (sat <= 31U)
+ {
+ const uint32_t max = ((1U << sat) - 1U);
+ if (val > (int32_t)max)
+ {
+ return max;
+ }
+ else if (val < 0)
+ {
+ return 0U;
+ }
+ }
+ return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
+ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
+ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
+/**
+ \brief Load-Acquire (8 bit)
+ \details Executes a LDAB instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint8_t) result);
+}
+
+
+/**
+ \brief Load-Acquire (16 bit)
+ \details Executes a LDAH instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint16_t) result);
+}
+
+
+/**
+ \brief Load-Acquire (32 bit)
+ \details Executes a LDA instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return(result);
+}
+
+
+/**
+ \brief Store-Release (8 bit)
+ \details Executes a STLB instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+ __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief Store-Release (16 bit)
+ \details Executes a STLH instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+ __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief Store-Release (32 bit)
+ \details Executes a STL instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+ __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief Load-Acquire Exclusive (8 bit)
+ \details Executes a LDAB exclusive instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint8_t) result);
+}
+
+
+/**
+ \brief Load-Acquire Exclusive (16 bit)
+ \details Executes a LDAH exclusive instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint16_t) result);
+}
+
+
+/**
+ \brief Load-Acquire Exclusive (32 bit)
+ \details Executes a LDA exclusive instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return(result);
+}
+
+
+/**
+ \brief Store-Release Exclusive (8 bit)
+ \details Executes a STLB exclusive instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+
+/**
+ \brief Store-Release Exclusive (16 bit)
+ \details Executes a STLH exclusive instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+
+/**
+ \brief Store-Release Exclusive (32 bit)
+ \details Executes a STL exclusive instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
@@ -827,9 +1616,9 @@ __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volat
@{
*/
-#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -837,7 +1626,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -845,7 +1634,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -853,7 +1642,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -861,7 +1650,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -869,7 +1658,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -878,7 +1667,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -886,7 +1675,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -894,7 +1683,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -902,7 +1691,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -910,7 +1699,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -918,7 +1707,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -927,7 +1716,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -935,7 +1724,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -943,7 +1732,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -951,7 +1740,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -959,7 +1748,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -967,7 +1756,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -975,7 +1764,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -983,7 +1772,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -991,7 +1780,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -999,7 +1788,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1007,7 +1796,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1015,7 +1804,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1023,7 +1812,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1031,7 +1820,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1039,7 +1828,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1047,7 +1836,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1055,7 +1844,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1063,7 +1852,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1071,7 +1860,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1079,7 +1868,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1087,7 +1876,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1095,7 +1884,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1103,7 +1892,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1111,7 +1900,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1119,7 +1908,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1127,7 +1916,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
@@ -1149,7 +1938,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op
__RES; \
})
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
{
uint32_t result;
@@ -1157,7 +1946,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1165,7 +1954,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
{
uint32_t result;
@@ -1173,7 +1962,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1181,7 +1970,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1189,7 +1978,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1197,7 +1986,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
@@ -1205,7 +1994,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
@@ -1213,7 +2002,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
@@ -1230,7 +2019,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t o
return(llr.w64);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
@@ -1247,7 +2036,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t
return(llr.w64);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1255,7 +2044,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1263,7 +2052,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
@@ -1271,7 +2060,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
{
uint32_t result;
@@ -1279,7 +2068,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t o
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
@@ -1296,7 +2085,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t o
return(llr.w64);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
{
union llreg_u{
uint32_t w32[2];
@@ -1313,7 +2102,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t
return(llr.w64);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
+__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
{
uint32_t result;
@@ -1321,7 +2110,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
+__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
{
int32_t result;
@@ -1329,7 +2118,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1,
return(result);
}
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
+__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
{
int32_t result;
@@ -1337,6 +2126,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1,
return(result);
}
+#if 0
#define __PKHBT(ARG1,ARG2,ARG3) \
({ \
uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
@@ -1353,8 +2143,15 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1,
__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
__RES; \
})
+#endif
+
+#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
+ ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
+ ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
{
int32_t result;
@@ -1362,12 +2159,11 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1
return(result);
}
-#endif /* (__CORTEX_M >= 0x04) */
+#endif /* (__ARM_FEATURE_DSP == 1) */
/*@} end of group CMSIS_SIMD_intrinsics */
-#if defined ( __GNUC__ )
#pragma GCC diagnostic pop
-#endif
#endif /* __CMSIS_GCC_H */
+
diff --git a/panda/board/inc/cmsis_version.h b/panda/board/inc/cmsis_version.h
new file mode 100644
index 00000000000000..bf57cf3e805348
--- /dev/null
+++ b/panda/board/inc/cmsis_version.h
@@ -0,0 +1,40 @@
+/**************************************************************************//**
+ * @file cmsis_version.h
+ * @brief CMSIS Core(M) Version definitions
+ * @version V5.0.3
+ * @date 24. June 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/* CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+ __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
+#endif
+
diff --git a/panda/board/inc/core_cm3.h b/panda/board/inc/core_cm3.h
index b4ac4c7b05a799..0918c5eb4c827b 100644
--- a/panda/board/inc/core_cm3.h
+++ b/panda/board/inc/core_cm3.h
@@ -1,40 +1,30 @@
/**************************************************************************//**
* @file core_cm3.h
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version V4.30
- * @date 20. October 2015
+ * @version V5.1.0
+ * @date 13. March 2019
******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
@@ -70,53 +60,15 @@
@{
*/
+#include "cmsis_version.h"
+
/* CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
-#define __CM3_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
+#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
- __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x03U) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __CSMC__ )
- #define __packed
- #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
- #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
- #define __STATIC_INLINE static inline
+ __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-#else
- #error Unknown compiler
-#endif
+#define __CORTEX_M (3U) /*!< Cortex-M Core */
/** __FPU_USED indicates whether an FPU is used or not.
This core does not support an FPU at all
@@ -128,8 +80,8 @@
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #if defined __ARM_FP
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
@@ -143,7 +95,7 @@
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
-#elif defined ( __TMS470__ )
+#elif defined ( __TI_ARM__ )
#if defined __TI_VFP_SUPPORT__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
@@ -160,8 +112,8 @@
#endif
-#include "core_cmInstr.h" /* Core Instruction Access */
-#include "core_cmFunc.h" /* Core Function Access */
+#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
+
#ifdef __cplusplus
}
@@ -191,7 +143,7 @@
#endif
#ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4U
+ #define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
@@ -308,9 +260,11 @@ typedef union
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
+ uint32_t _reserved0:1; /*!< bit: 9 Reserved */
+ uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */
+ uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */
+ uint32_t T:1; /*!< bit: 24 Thumb bit */
+ uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
@@ -336,12 +290,15 @@ typedef union
#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
-#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
+#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
+#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
+
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
@@ -385,7 +342,7 @@ typedef struct
__IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[24U];
__IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
+ uint32_t RESERVED1[24U];
__IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[24U];
__IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
@@ -487,7 +444,7 @@ typedef struct
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
/* SCB Vector Table Offset Register Definitions */
-#if (__CM3_REV < 0x0201U) /* core r2p1 */
+#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */
#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */
#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
@@ -602,6 +559,60 @@ typedef struct
#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
/* SCB Hard Fault Status Register Definitions */
#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
@@ -645,7 +656,7 @@ typedef struct
{
uint32_t RESERVED0[1U];
__IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
-#if ((defined __CM3_REV) && (__CM3_REV >= 0x200U))
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
__IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
#else
uint32_t RESERVED1[1U];
@@ -657,6 +668,12 @@ typedef struct
#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
/* Auxiliary Control Register Definitions */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
@@ -666,6 +683,7 @@ typedef struct
#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
+#endif
/*@} end of group CMSIS_SCnotSCB */
@@ -746,10 +764,7 @@ typedef struct
__IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
uint32_t RESERVED2[15U];
__IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
+ uint32_t RESERVED3[32U];
uint32_t RESERVED4[43U];
__OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
__IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
@@ -770,7 +785,7 @@ typedef struct
/* ITM Trace Privilege Register Definitions */
#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
/* ITM Trace Control Register Definitions */
#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
@@ -800,18 +815,6 @@ typedef struct
#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
/* ITM Lock Status Register Definitions */
#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
@@ -984,7 +987,7 @@ typedef struct
*/
typedef struct
{
- __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
+ __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
__IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
uint32_t RESERVED0[2U];
__IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
@@ -995,7 +998,7 @@ typedef struct
__IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
__IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
+ __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
__IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
__IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
uint32_t RESERVED4[1U];
@@ -1044,13 +1047,13 @@ typedef struct
/* TPI Integration ETM Data Register Definitions (FIFO0) */
#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1065,18 +1068,21 @@ typedef struct
#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */
/* TPI Integration ITM Data Register Definitions (FIFO1) */
#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1091,12 +1097,15 @@ typedef struct
#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */
/* TPI Integration Mode Control Register Definitions */
#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
/* TPI DEVID Register Definitions */
#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
@@ -1118,16 +1127,16 @@ typedef struct
#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
+#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
+
/*@}*/ /* end of group CMSIS_TPI */
-#if (__MPU_PRESENT == 1U)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_MPU Memory Protection Unit (MPU)
@@ -1153,6 +1162,8 @@ typedef struct
__IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
} MPU_Type;
+#define MPU_TYPE_RALIASES 4U
+
/* MPU Type Register Definitions */
#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
@@ -1337,18 +1348,18 @@ typedef struct
/**
\brief Mask and shift a bit field value for use in a register bit range.
\param[in] field Name of the register bit field.
- \param[in] value Value of the bit field.
+ \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
\return Masked and shifted value.
*/
-#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
+#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
/**
\brief Mask and shift a register value to extract a bit filed value.
\param[in] field Name of the register bit field.
- \param[in] value Value of register.
+ \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
\return Masked and shifted bit field value.
*/
-#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
+#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
/*@} end of group CMSIS_core_bitfield */
@@ -1360,7 +1371,7 @@ typedef struct
@{
*/
-/* Memory mapping of Cortex-M3 Hardware */
+/* Memory mapping of Core Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
@@ -1379,7 +1390,7 @@ typedef struct
#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-#if (__MPU_PRESENT == 1U)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
#endif
@@ -1410,6 +1421,45 @@ typedef struct
@{
*/
+#ifdef CMSIS_NVIC_VIRTUAL
+ #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+ #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+ #endif
+ #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+ #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
+ #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
+ #define NVIC_EnableIRQ __NVIC_EnableIRQ
+ #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
+ #define NVIC_DisableIRQ __NVIC_DisableIRQ
+ #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
+ #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
+ #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
+ #define NVIC_GetActive __NVIC_GetActive
+ #define NVIC_SetPriority __NVIC_SetPriority
+ #define NVIC_GetPriority __NVIC_GetPriority
+ #define NVIC_SystemReset __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+ #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+ #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+ #endif
+ #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+ #define NVIC_SetVector __NVIC_SetVector
+ #define NVIC_GetVector __NVIC_GetVector
+#endif /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET 16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
+#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
+#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
+
+
/**
\brief Set Priority Grouping
\details Sets the priority grouping field using the required unlock sequence.
@@ -1419,7 +1469,7 @@ typedef struct
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
@@ -1428,7 +1478,7 @@ __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
+ (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
SCB->AIRCR = reg_value;
}
@@ -1438,121 +1488,180 @@ __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
}
/**
- \brief Enable External Interrupt
- \details Enables a device-specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn External interrupt number. Value cannot be negative.
+ \brief Enable Interrupt
+ \details Enables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ if ((int32_t)(IRQn) >= 0)
+ {
+ __COMPILER_BARRIER();
+ NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ __COMPILER_BARRIER();
+ }
+}
+
+
+/**
+ \brief Get Interrupt Enable status
+ \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \return 0 Interrupt is not enabled.
+ \return 1 Interrupt is enabled.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
{
- NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ }
+ else
+ {
+ return(0U);
+ }
}
/**
- \brief Disable External Interrupt
- \details Disables a device-specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn External interrupt number. Value cannot be negative.
+ \brief Disable Interrupt
+ \details Disables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
- NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ __DSB();
+ __ISB();
+ }
}
/**
\brief Get Pending Interrupt
- \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
- \param [in] IRQn Interrupt number.
+ \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+ \param [in] IRQn Device specific interrupt number.
\return 0 Interrupt status is not pending.
\return 1 Interrupt status is pending.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ }
+ else
+ {
+ return(0U);
+ }
}
/**
\brief Set Pending Interrupt
- \details Sets the pending bit of an external interrupt.
- \param [in] IRQn Interrupt number. Value cannot be negative.
+ \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
- NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ }
}
/**
\brief Clear Pending Interrupt
- \details Clears the pending bit of an external interrupt.
- \param [in] IRQn External interrupt number. Value cannot be negative.
+ \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
- NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ }
}
/**
\brief Get Active Interrupt
- \details Reads the active register in NVIC and returns the active bit.
- \param [in] IRQn Interrupt number.
+ \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+ \param [in] IRQn Device specific interrupt number.
\return 0 Interrupt status is not active.
\return 1 Interrupt status is active.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
{
- return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ }
+ else
+ {
+ return(0U);
+ }
}
/**
\brief Set Interrupt Priority
- \details Sets the priority of an interrupt.
- \note The priority cannot be set for every core interrupt.
+ \details Sets the priority of a device specific interrupt or a processor exception.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
+ \note The priority cannot be set for every processor exception.
*/
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
- if ((int32_t)(IRQn) < 0)
+ if ((int32_t)(IRQn) >= 0)
{
- SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
else
{
- NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
/**
\brief Get Interrupt Priority
- \details Reads the priority of an interrupt.
- The interrupt number can be positive to specify an external (device specific) interrupt,
- or negative to specify an internal (core) interrupt.
+ \details Reads the priority of a device specific interrupt or a processor exception.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\return Interrupt Priority.
Value is aligned automatically to the implemented priority bits of the microcontroller.
*/
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
{
- if ((int32_t)(IRQn) < 0)
+ if ((int32_t)(IRQn) >= 0)
{
- return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+ return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
}
else
{
- return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+ return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
}
}
@@ -1609,11 +1718,43 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
}
+/**
+ \brief Set Interrupt Vector
+ \details Sets an interrupt vector in SRAM based interrupt vector table.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
+ VTOR must been relocated to SRAM before.
+ \param [in] IRQn Interrupt number
+ \param [in] vector Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+ uint32_t vectors = (uint32_t )SCB->VTOR;
+ (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+ /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
+}
+
+
+/**
+ \brief Get Interrupt Vector
+ \details Reads an interrupt vector from interrupt vector table.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
+ \param [in] IRQn Interrupt number.
+ \return Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+ uint32_t vectors = (uint32_t )SCB->VTOR;
+ return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
+
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
@@ -1630,6 +1771,39 @@ __STATIC_INLINE void NVIC_SystemReset(void)
/*@} end of CMSIS_Core_NVICFunctions */
+/* ########################## MPU functions #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ########################## FPU functions #################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_FpuFunctions FPU Functions
+ \brief Function that provides FPU type.
+ @{
+ */
+
+/**
+ \brief get FPU type
+ \details returns the FPU type
+ \returns
+ - \b 0: No FPU
+ - \b 1: Single precision FPU
+ - \b 2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+ return 0U; /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
/* ################################## SysTick function ############################################ */
@@ -1640,7 +1814,7 @@ __STATIC_INLINE void NVIC_SystemReset(void)
@{
*/
-#if (__Vendor_SysTickConfig == 0U)
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
/**
\brief System Tick Configuration
@@ -1683,8 +1857,8 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
@{
*/
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
/**
@@ -1761,3 +1935,4 @@ __STATIC_INLINE int32_t ITM_CheckChar (void)
#endif /* __CORE_CM3_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */
+
diff --git a/panda/board/inc/core_cm4.h b/panda/board/inc/core_cm4.h
index dc840ebf222138..0d40081a385dc1 100644
--- a/panda/board/inc/core_cm4.h
+++ b/panda/board/inc/core_cm4.h
@@ -1,40 +1,30 @@
/**************************************************************************//**
* @file core_cm4.h
* @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version V4.30
- * @date 20. October 2015
+ * @version V5.1.0
+ * @date 13. March 2019
******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
@@ -70,60 +60,22 @@
@{
*/
-/* CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
- __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x04U) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
+#include "cmsis_version.h"
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
+/* CMSIS CM4 definitions */
+#define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
+#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
+ __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
-#elif defined ( __CSMC__ )
- #define __packed
- #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
- #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
- #define __STATIC_INLINE static inline
-
-#else
- #error Unknown compiler
-#endif
+#define __CORTEX_M (4U) /*!< Cortex-M Core */
/** __FPU_USED indicates whether an FPU is used or not.
For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
*/
#if defined ( __CC_ARM )
#if defined __TARGET_FPU_VFP
- #if (__FPU_PRESENT == 1U)
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -133,9 +85,9 @@
#define __FPU_USED 0U
#endif
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #if (__FPU_PRESENT == 1)
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #if defined __ARM_FP
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -147,7 +99,7 @@
#elif defined ( __GNUC__ )
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if (__FPU_PRESENT == 1U)
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -159,7 +111,7 @@
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
- #if (__FPU_PRESENT == 1U)
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -169,9 +121,9 @@
#define __FPU_USED 0U
#endif
-#elif defined ( __TMS470__ )
+#elif defined ( __TI_ARM__ )
#if defined __TI_VFP_SUPPORT__
- #if (__FPU_PRESENT == 1U)
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -183,7 +135,7 @@
#elif defined ( __TASKING__ )
#if defined __FPU_VFP__
- #if (__FPU_PRESENT == 1U)
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -195,7 +147,7 @@
#elif defined ( __CSMC__ )
#if ( __CSMC__ & 0x400U)
- #if (__FPU_PRESENT == 1U)
+ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
#define __FPU_USED 1U
#else
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
@@ -207,9 +159,8 @@
#endif
-#include "core_cmInstr.h" /* Core Instruction Access */
-#include "core_cmFunc.h" /* Core Function Access */
-#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */
+#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
+
#ifdef __cplusplus
}
@@ -244,7 +195,7 @@
#endif
#ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4U
+ #define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
@@ -367,11 +318,12 @@ typedef union
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
+ uint32_t _reserved0:1; /*!< bit: 9 Reserved */
+ uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */
uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
+ uint32_t T:1; /*!< bit: 24 Thumb bit */
+ uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */
uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
@@ -397,8 +349,8 @@ typedef union
#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
-#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
+#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
@@ -406,6 +358,9 @@ typedef union
#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
+#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */
+
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
@@ -453,7 +408,7 @@ typedef struct
__IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[24U];
__IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
+ uint32_t RESERVED1[24U];
__IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[24U];
__IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
@@ -662,6 +617,66 @@ typedef struct
#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
/* SCB Hard Fault Status Register Definitions */
#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
@@ -807,10 +822,7 @@ typedef struct
__IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
uint32_t RESERVED2[15U];
__IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
+ uint32_t RESERVED3[32U];
uint32_t RESERVED4[43U];
__OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
__IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
@@ -831,7 +843,7 @@ typedef struct
/* ITM Trace Privilege Register Definitions */
#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
/* ITM Trace Control Register Definitions */
#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
@@ -861,18 +873,6 @@ typedef struct
#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
/* ITM Lock Status Register Definitions */
#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
@@ -1045,7 +1045,7 @@ typedef struct
*/
typedef struct
{
- __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
+ __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
__IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
uint32_t RESERVED0[2U];
__IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
@@ -1056,7 +1056,7 @@ typedef struct
__IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
__IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
+ __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */
__IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
__IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
uint32_t RESERVED4[1U];
@@ -1105,13 +1105,13 @@ typedef struct
/* TPI Integration ETM Data Register Definitions (FIFO0) */
#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1126,18 +1126,21 @@ typedef struct
#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */
/* TPI Integration ITM Data Register Definitions (FIFO1) */
#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1152,12 +1155,15 @@ typedef struct
#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */
/* TPI Integration Mode Control Register Definitions */
#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
/* TPI DEVID Register Definitions */
#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
@@ -1179,16 +1185,16 @@ typedef struct
#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */
#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
+#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
+
/*@}*/ /* end of group CMSIS_TPI */
-#if (__MPU_PRESENT == 1U)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_MPU Memory Protection Unit (MPU)
@@ -1214,6 +1220,8 @@ typedef struct
__IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
} MPU_Type;
+#define MPU_TYPE_RALIASES 4U
+
/* MPU Type Register Definitions */
#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
@@ -1280,10 +1288,9 @@ typedef struct
#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
/*@} end of group CMSIS_MPU */
-#endif
+#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
-#if (__FPU_PRESENT == 1U)
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_FPU Floating Point Unit (FPU)
@@ -1302,6 +1309,7 @@ typedef struct
__IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
__IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
__IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
+ __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */
} FPU_Type;
/* Floating-Point Context Control Register Definitions */
@@ -1387,8 +1395,12 @@ typedef struct
#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos 4U /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk (0xFUL << FPU_MVFR2_VFP_Misc_Pos) /*!< MVFR2: VFP Misc bits Mask */
+
/*@} end of group CMSIS_FPU */
-#endif
/**
@@ -1506,18 +1518,18 @@ typedef struct
/**
\brief Mask and shift a bit field value for use in a register bit range.
\param[in] field Name of the register bit field.
- \param[in] value Value of the bit field.
+ \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
\return Masked and shifted value.
*/
-#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
+#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
/**
\brief Mask and shift a register value to extract a bit filed value.
\param[in] field Name of the register bit field.
- \param[in] value Value of register.
+ \param[in] value Value of register. This parameter is interpreted as an uint32_t type.
\return Masked and shifted bit field value.
*/
-#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
+#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
/*@} end of group CMSIS_core_bitfield */
@@ -1529,7 +1541,7 @@ typedef struct
@{
*/
-/* Memory mapping of Cortex-M4 Hardware */
+/* Memory mapping of Core Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
@@ -1548,15 +1560,13 @@ typedef struct
#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-#if (__MPU_PRESENT == 1U)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
#define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
#endif
-#if (__FPU_PRESENT == 1U)
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-#endif
+#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
+#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
/*@} */
@@ -1584,6 +1594,48 @@ typedef struct
@{
*/
+#ifdef CMSIS_NVIC_VIRTUAL
+ #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+ #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+ #endif
+ #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+ #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
+ #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
+ #define NVIC_EnableIRQ __NVIC_EnableIRQ
+ #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
+ #define NVIC_DisableIRQ __NVIC_DisableIRQ
+ #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
+ #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
+ #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
+ #define NVIC_GetActive __NVIC_GetActive
+ #define NVIC_SetPriority __NVIC_SetPriority
+ #define NVIC_GetPriority __NVIC_GetPriority
+ #define NVIC_SystemReset __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+ #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+ #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+ #endif
+ #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+ #define NVIC_SetVector __NVIC_SetVector
+ #define NVIC_GetVector __NVIC_GetVector
+#endif /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET 16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
+#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
+#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
+#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */
+#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */
+#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */
+
+
/**
\brief Set Priority Grouping
\details Sets the priority grouping field using the required unlock sequence.
@@ -1593,7 +1645,7 @@ typedef struct
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
@@ -1602,7 +1654,7 @@ __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
+ (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
SCB->AIRCR = reg_value;
}
@@ -1612,121 +1664,180 @@ __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
}
/**
- \brief Enable External Interrupt
- \details Enables a device-specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn External interrupt number. Value cannot be negative.
+ \brief Enable Interrupt
+ \details Enables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ if ((int32_t)(IRQn) >= 0)
+ {
+ __COMPILER_BARRIER();
+ NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ __COMPILER_BARRIER();
+ }
+}
+
+
+/**
+ \brief Get Interrupt Enable status
+ \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \return 0 Interrupt is not enabled.
+ \return 1 Interrupt is enabled.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
{
- NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ }
+ else
+ {
+ return(0U);
+ }
}
/**
- \brief Disable External Interrupt
- \details Disables a device-specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn External interrupt number. Value cannot be negative.
+ \brief Disable Interrupt
+ \details Disables a device specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
- NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ __DSB();
+ __ISB();
+ }
}
/**
\brief Get Pending Interrupt
- \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
- \param [in] IRQn Interrupt number.
+ \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+ \param [in] IRQn Device specific interrupt number.
\return 0 Interrupt status is not pending.
\return 1 Interrupt status is pending.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ }
+ else
+ {
+ return(0U);
+ }
}
/**
\brief Set Pending Interrupt
- \details Sets the pending bit of an external interrupt.
- \param [in] IRQn Interrupt number. Value cannot be negative.
+ \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
- NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ }
}
/**
\brief Clear Pending Interrupt
- \details Clears the pending bit of an external interrupt.
- \param [in] IRQn External interrupt number. Value cannot be negative.
+ \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+ \param [in] IRQn Device specific interrupt number.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
- NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ }
}
/**
\brief Get Active Interrupt
- \details Reads the active register in NVIC and returns the active bit.
- \param [in] IRQn Interrupt number.
+ \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+ \param [in] IRQn Device specific interrupt number.
\return 0 Interrupt status is not active.
\return 1 Interrupt status is active.
+ \note IRQn must not be negative.
*/
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
{
- return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ if ((int32_t)(IRQn) >= 0)
+ {
+ return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+ }
+ else
+ {
+ return(0U);
+ }
}
/**
\brief Set Interrupt Priority
- \details Sets the priority of an interrupt.
- \note The priority cannot be set for every core interrupt.
+ \details Sets the priority of a device specific interrupt or a processor exception.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
+ \note The priority cannot be set for every processor exception.
*/
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
- if ((int32_t)(IRQn) < 0)
+ if ((int32_t)(IRQn) >= 0)
{
- SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
else
{
- NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
/**
\brief Get Interrupt Priority
- \details Reads the priority of an interrupt.
- The interrupt number can be positive to specify an external (device specific) interrupt,
- or negative to specify an internal (core) interrupt.
+ \details Reads the priority of a device specific interrupt or a processor exception.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\return Interrupt Priority.
Value is aligned automatically to the implemented priority bits of the microcontroller.
*/
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
{
- if ((int32_t)(IRQn) < 0)
+ if ((int32_t)(IRQn) >= 0)
{
- return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+ return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
}
else
{
- return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+ return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
}
}
@@ -1783,11 +1894,43 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
}
+/**
+ \brief Set Interrupt Vector
+ \details Sets an interrupt vector in SRAM based interrupt vector table.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
+ VTOR must been relocated to SRAM before.
+ \param [in] IRQn Interrupt number
+ \param [in] vector Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+ uint32_t vectors = (uint32_t )SCB->VTOR;
+ (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+ /* ARM Application Note 321 states that the M4 does not require the architectural barrier */
+}
+
+
+/**
+ \brief Get Interrupt Vector
+ \details Reads an interrupt vector from interrupt vector table.
+ The interrupt number can be positive to specify a device specific interrupt,
+ or negative to specify a processor exception.
+ \param [in] IRQn Interrupt number.
+ \return Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+ uint32_t vectors = (uint32_t )SCB->VTOR;
+ return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
+
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
@@ -1805,6 +1948,50 @@ __STATIC_INLINE void NVIC_SystemReset(void)
/*@} end of CMSIS_Core_NVICFunctions */
+/* ########################## MPU functions #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ########################## FPU functions #################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_FpuFunctions FPU Functions
+ \brief Function that provides FPU type.
+ @{
+ */
+
+/**
+ \brief get FPU type
+ \details returns the FPU type
+ \returns
+ - \b 0: No FPU
+ - \b 1: Single precision FPU
+ - \b 2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+ uint32_t mvfr0;
+
+ mvfr0 = FPU->MVFR0;
+ if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+ {
+ return 1U; /* Single precision FPU */
+ }
+ else
+ {
+ return 0U; /* No FPU */
+ }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
/* ################################## SysTick function ############################################ */
/**
@@ -1814,7 +2001,7 @@ __STATIC_INLINE void NVIC_SystemReset(void)
@{
*/
-#if (__Vendor_SysTickConfig == 0U)
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
/**
\brief System Tick Configuration
@@ -1857,8 +2044,8 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
@{
*/
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
/**
@@ -1935,3 +2122,4 @@ __STATIC_INLINE int32_t ITM_CheckChar (void)
#endif /* __CORE_CM4_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */
+
diff --git a/panda/board/inc/core_cmFunc.h b/panda/board/inc/core_cmFunc.h
deleted file mode 100644
index 652a48af07a93d..00000000000000
--- a/panda/board/inc/core_cmFunc.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/**************************************************************************//**
- * @file core_cmFunc.h
- * @brief CMSIS Cortex-M Core Function Access Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
- #include
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
- #include
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
- #include
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-#endif /* __CORE_CMFUNC_H */
diff --git a/panda/board/inc/core_cmInstr.h b/panda/board/inc/core_cmInstr.h
deleted file mode 100644
index f474b0e6f362c7..00000000000000
--- a/panda/board/inc/core_cmInstr.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/**************************************************************************//**
- * @file core_cmInstr.h
- * @brief CMSIS Cortex-M Core Instruction Access Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMINSTR_H
-#define __CORE_CMINSTR_H
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
- #include
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
- #include
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
- #include
-
-#endif
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-#endif /* __CORE_CMINSTR_H */
diff --git a/panda/board/inc/core_cmSimd.h b/panda/board/inc/core_cmSimd.h
deleted file mode 100644
index 66bf5c2a725b6d..00000000000000
--- a/panda/board/inc/core_cmSimd.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**************************************************************************//**
- * @file core_cmSimd.h
- * @brief CMSIS Cortex-M SIMD Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMSIMD_H
-#define __CORE_CMSIMD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
- #include
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
- #include
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
- #include
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CMSIMD_H */
diff --git a/panda/board/inc/mpu_armv7.h b/panda/board/inc/mpu_armv7.h
new file mode 100644
index 00000000000000..ef8e6810ca42ff
--- /dev/null
+++ b/panda/board/inc/mpu_armv7.h
@@ -0,0 +1,273 @@
+/******************************************************************************
+ * @file mpu_armv7.h
+ * @brief CMSIS MPU API for Armv7-M MPU
+ * @version V5.1.0
+ * @date 08. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef ARM_MPU_ARMV7_H
+#define ARM_MPU_ARMV7_H
+
+#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
+#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
+#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
+#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
+#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
+#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
+#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
+#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
+#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
+#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
+#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
+#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
+#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
+#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
+#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
+#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
+#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
+#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
+#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
+#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
+#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
+#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
+#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
+#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
+#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
+#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
+#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
+#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
+
+#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
+#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
+#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
+#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
+#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
+#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
+
+/** MPU Region Base Address Register Value
+*
+* \param Region The region to be configured, number 0 to 15.
+* \param BaseAddress The base address for the region.
+*/
+#define ARM_MPU_RBAR(Region, BaseAddress) \
+ (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
+ ((Region) & MPU_RBAR_REGION_Msk) | \
+ (MPU_RBAR_VALID_Msk))
+
+/**
+* MPU Memory Access Attributes
+*
+* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
+* \param IsShareable Region is shareable between multiple bus masters.
+* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
+* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
+*/
+#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
+ ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
+ (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
+ (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
+ (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
+
+/**
+* MPU Region Attribute and Size Register Value
+*
+* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
+* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
+* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
+* \param SubRegionDisable Sub-region disable field.
+* \param Size Region size of the region to be configured, for example 4K, 8K.
+*/
+#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
+ ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
+ (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
+ (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
+ (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
+ (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
+ (((MPU_RASR_ENABLE_Msk))))
+
+/**
+* MPU Region Attribute and Size Register Value
+*
+* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
+* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
+* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
+* \param IsShareable Region is shareable between multiple bus masters.
+* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
+* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
+* \param SubRegionDisable Sub-region disable field.
+* \param Size Region size of the region to be configured, for example 4K, 8K.
+*/
+#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
+ ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
+
+/**
+* MPU Memory Access Attribute for strongly ordered memory.
+* - TEX: 000b
+* - Shareable
+* - Non-cacheable
+* - Non-bufferable
+*/
+#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
+
+/**
+* MPU Memory Access Attribute for device memory.
+* - TEX: 000b (if shareable) or 010b (if non-shareable)
+* - Shareable or non-shareable
+* - Non-cacheable
+* - Bufferable (if shareable) or non-bufferable (if non-shareable)
+*
+* \param IsShareable Configures the device memory as shareable or non-shareable.
+*/
+#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
+
+/**
+* MPU Memory Access Attribute for normal memory.
+* - TEX: 1BBb (reflecting outer cacheability rules)
+* - Shareable or non-shareable
+* - Cacheable or non-cacheable (reflecting inner cacheability rules)
+* - Bufferable or non-bufferable (reflecting inner cacheability rules)
+*
+* \param OuterCp Configures the outer cache policy.
+* \param InnerCp Configures the inner cache policy.
+* \param IsShareable Configures the memory as shareable or non-shareable.
+*/
+#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
+
+/**
+* MPU Memory Access Attribute non-cacheable policy.
+*/
+#define ARM_MPU_CACHEP_NOCACHE 0U
+
+/**
+* MPU Memory Access Attribute write-back, write and read allocate policy.
+*/
+#define ARM_MPU_CACHEP_WB_WRA 1U
+
+/**
+* MPU Memory Access Attribute write-through, no write allocate policy.
+*/
+#define ARM_MPU_CACHEP_WT_NWA 2U
+
+/**
+* MPU Memory Access Attribute write-back, no write allocate policy.
+*/
+#define ARM_MPU_CACHEP_WB_NWA 3U
+
+
+/**
+* Struct for a single MPU Region
+*/
+typedef struct {
+ uint32_t RBAR; //!< The region base address register value (RBAR)
+ uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
+} ARM_MPU_Region_t;
+
+/** Enable the MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
+{
+ MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+ SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+ __DSB();
+ __ISB();
+}
+
+/** Disable the MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable(void)
+{
+ __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+ SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+ MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
+}
+
+/** Clear and disable the given MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
+{
+ MPU->RNR = rnr;
+ MPU->RASR = 0U;
+}
+
+/** Configure an MPU region.
+* \param rbar Value for RBAR register.
+* \param rsar Value for RSAR register.
+*/
+__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
+{
+ MPU->RBAR = rbar;
+ MPU->RASR = rasr;
+}
+
+/** Configure the given MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rsar Value for RSAR register.
+*/
+__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
+{
+ MPU->RNR = rnr;
+ MPU->RBAR = rbar;
+ MPU->RASR = rasr;
+}
+
+/** Memcopy with strictly ordered memory access, e.g. for register targets.
+* \param dst Destination data is copied to.
+* \param src Source data is copied from.
+* \param len Amount of data words to be copied.
+*/
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+{
+ uint32_t i;
+ for (i = 0U; i < len; ++i)
+ {
+ dst[i] = src[i];
+ }
+}
+
+/** Load the given number of MPU regions from a table.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
+{
+ const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
+ while (cnt > MPU_TYPE_RALIASES) {
+ ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
+ table += MPU_TYPE_RALIASES;
+ cnt -= MPU_TYPE_RALIASES;
+ }
+ ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
+}
+
+#endif
+
diff --git a/panda/board/main.c b/panda/board/main.c
index df134e046baaad..3bcae876e203d0 100644
--- a/panda/board/main.c
+++ b/panda/board/main.c
@@ -13,6 +13,7 @@
#include "drivers/llcan.h"
#include "drivers/llgpio.h"
#include "drivers/adc.h"
+#include "drivers/pwm.h"
#include "board.h"
@@ -35,6 +36,10 @@
// ********************* Serial debugging *********************
+bool check_started(void) {
+ return current_board->check_ignition() || ignition_can;
+}
+
void debug_ring_callback(uart_ring *ring) {
char rcv;
while (getc(ring, &rcv)) {
@@ -80,10 +85,10 @@ void started_interrupt_handler(uint8_t interrupt_line) {
#ifdef EON
// set power savings mode here if on EON build
- int power_save_state = current_board->check_ignition() ? POWER_SAVE_STATUS_DISABLED : POWER_SAVE_STATUS_ENABLED;
+ int power_save_state = check_started() ? POWER_SAVE_STATUS_DISABLED : POWER_SAVE_STATUS_ENABLED;
set_power_save_state(power_save_state);
// set CDP usb power mode everytime that the car starts to make sure EON is charging
- if (current_board->check_ignition()) {
+ if (check_started()) {
current_board->set_usb_power_mode(USB_POWER_CDP);
}
#endif
@@ -117,7 +122,7 @@ void set_safety_mode(uint16_t mode, int16_t param) {
switch (mode) {
case SAFETY_NOOUTPUT:
set_intercept_relay(false);
- if(hw_type == HW_TYPE_BLACK_PANDA){
+ if(board_has_obd()){
current_board->set_can_mode(CAN_MODE_NORMAL);
}
can_silent = ALL_CAN_SILENT;
@@ -125,7 +130,7 @@ void set_safety_mode(uint16_t mode, int16_t param) {
case SAFETY_ELM327:
set_intercept_relay(false);
heartbeat_counter = 0U;
- if(hw_type == HW_TYPE_BLACK_PANDA){
+ if(board_has_obd()){
current_board->set_can_mode(CAN_MODE_OBD_CAN2);
}
can_silent = ALL_CAN_LIVE;
@@ -133,19 +138,12 @@ void set_safety_mode(uint16_t mode, int16_t param) {
default:
set_intercept_relay(true);
heartbeat_counter = 0U;
- if(hw_type == HW_TYPE_BLACK_PANDA){
+ if(board_has_obd()){
current_board->set_can_mode(CAN_MODE_NORMAL);
}
can_silent = ALL_CAN_LIVE;
break;
}
- if (safety_ignition_hook() != -1) {
- // if the ignition hook depends on something other than the started GPIO
- // we have to disable power savings (fix for GM and Tesla)
- set_power_save_state(POWER_SAVE_STATUS_DISABLED);
- } else {
- // power mode is already POWER_SAVE_STATUS_DISABLED and CAN TXs are active
- }
can_init_all();
}
}
@@ -159,30 +157,21 @@ int get_health_pkt(void *dat) {
uint32_t can_send_errs_pkt;
uint32_t can_fwd_errs_pkt;
uint32_t gmlan_send_errs_pkt;
- uint8_t started_pkt;
+ uint8_t ignition_line_pkt;
+ uint8_t ignition_can_pkt;
uint8_t controls_allowed_pkt;
uint8_t gas_interceptor_detected_pkt;
uint8_t car_harness_status_pkt;
uint8_t usb_power_mode_pkt;
+ uint8_t safety_mode_pkt;
} *health = dat;
health->voltage_pkt = adc_get_voltage();
+ health->current_pkt = current_board->read_current();
- // No current sense on panda black
- if(hw_type != HW_TYPE_BLACK_PANDA){
- health->current_pkt = adc_get(ADCCHAN_CURRENT);
- } else {
- health->current_pkt = 0;
- }
-
- int safety_ignition = safety_ignition_hook();
- if (safety_ignition < 0) {
- //Use the GPIO pin to determine ignition
- health->started_pkt = (uint8_t)(current_board->check_ignition());
- } else {
- //Current safety hooks want to determine ignition (ex: GM)
- health->started_pkt = safety_ignition;
- }
+ //Use the GPIO pin to determine ignition or use a CAN based logic
+ health->ignition_line_pkt = (uint8_t)(current_board->check_ignition());
+ health->ignition_can_pkt = (uint8_t)(ignition_can);
health->controls_allowed_pkt = controls_allowed;
health->gas_interceptor_detected_pkt = gas_interceptor_detected;
@@ -191,10 +180,17 @@ int get_health_pkt(void *dat) {
health->gmlan_send_errs_pkt = gmlan_send_errs;
health->car_harness_status_pkt = car_harness_status;
health->usb_power_mode_pkt = usb_power_mode;
+ health->safety_mode_pkt = (uint8_t)(current_safety_mode);
return sizeof(*health);
}
+int get_rtc_pkt(void *dat) {
+ timestamp_t t = rtc_get_time();
+ (void)memcpy(dat, &t, sizeof(t));
+ return sizeof(t);
+}
+
int usb_cb_ep1_in(void *usbdata, int len, bool hardwired) {
UNUSED(hardwired);
CAN_FIFOMailBox_TypeDef *reply = (CAN_FIFOMailBox_TypeDef *)usbdata;
@@ -247,7 +243,76 @@ int usb_cb_control_msg(USB_Setup_TypeDef *setup, uint8_t *resp, bool hardwired)
unsigned int resp_len = 0;
uart_ring *ur = NULL;
int i;
+ timestamp_t t;
switch (setup->b.bRequest) {
+ // **** 0xa0: get rtc time
+ case 0xa0:
+ resp_len = get_rtc_pkt(resp);
+ break;
+ // **** 0xa1: set rtc year
+ case 0xa1:
+ t = rtc_get_time();
+ t.year = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xa2: set rtc month
+ case 0xa2:
+ t = rtc_get_time();
+ t.month = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xa3: set rtc day
+ case 0xa3:
+ t = rtc_get_time();
+ t.day = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xa4: set rtc weekday
+ case 0xa4:
+ t = rtc_get_time();
+ t.weekday = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xa5: set rtc hour
+ case 0xa5:
+ t = rtc_get_time();
+ t.hour = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xa6: set rtc minute
+ case 0xa6:
+ t = rtc_get_time();
+ t.minute = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xa7: set rtc second
+ case 0xa7:
+ t = rtc_get_time();
+ t.second = setup->b.wValue.w;
+ rtc_set_time(t);
+ break;
+ // **** 0xb0: set IR power
+ case 0xb0:
+ if(power_save_status == POWER_SAVE_STATUS_DISABLED){
+ current_board->set_ir_power(setup->b.wValue.w);
+ } else {
+ puts("Setting IR power not allowed in power saving mode\n");
+ }
+ break;
+ // **** 0xb1: set fan power
+ case 0xb1:
+ if(power_save_status == POWER_SAVE_STATUS_DISABLED){
+ current_board->set_fan_power(setup->b.wValue.w);
+ } else {
+ puts("Setting fan power not allowed in power saving mode\n");
+ }
+ break;
+ // **** 0xb2: get fan rpm
+ case 0xb2:
+ resp[0] = (fan_rpm & 0x00FFU);
+ resp[1] = ((fan_rpm & 0xFF00U) >> 8U);
+ resp_len = 2;
+ break;
// **** 0xc0: get CAN debug info
case 0xc0:
puts("can tx: "); puth(can_tx_cnt);
@@ -335,7 +400,7 @@ int usb_cb_control_msg(USB_Setup_TypeDef *setup, uint8_t *resp, bool hardwired)
break;
// **** 0xdb: set GMLAN (white/grey) or OBD CAN (black) multiplexing mode
case 0xdb:
- if(hw_type == HW_TYPE_BLACK_PANDA){
+ if(board_has_obd()){
if (setup->b.wValue.w == 1U) {
// Enable OBD CAN
current_board->set_can_mode(CAN_MODE_OBD_CAN2);
@@ -583,8 +648,8 @@ uint64_t tcnt = 0;
// called once per second
// cppcheck-suppress unusedFunction ; used in headers not included in cppcheck
-void TIM3_IRQHandler(void) {
- if (TIM3->SR != 0) {
+void TIM1_BRK_TIM9_IRQHandler(void) {
+ if (TIM9->SR != 0) {
can_live = pending_can_live;
current_board->usb_power_mode_tick(tcnt);
@@ -602,6 +667,10 @@ void TIM3_IRQHandler(void) {
puth(can_tx2_q.r_ptr); puts(" "); puth(can_tx2_q.w_ptr); puts("\n");
#endif
+ // Tick fan driver
+ fan_tick();
+ //puts("Fan speed: "); puth((unsigned int) fan_rpm); puts("rpm\n");
+
// set green LED to be controls allowed
current_board->set_led(LED_GREEN, controls_allowed);
@@ -616,7 +685,7 @@ void TIM3_IRQHandler(void) {
// check heartbeat counter if we are running EON code. If the heartbeat has been gone for a while, go to NOOUTPUT safety mode.
#ifdef EON
- if (heartbeat_counter >= (current_board->check_ignition() ? EON_HEARTBEAT_IGNITION_CNT_ON : EON_HEARTBEAT_IGNITION_CNT_OFF)) {
+ if (heartbeat_counter >= (check_started() ? EON_HEARTBEAT_IGNITION_CNT_ON : EON_HEARTBEAT_IGNITION_CNT_OFF)) {
puts("EON hasn't sent a heartbeat for 0x"); puth(heartbeat_counter); puts(" seconds. Safety is set to NOOUTPUT mode.\n");
if(current_safety_mode != SAFETY_NOOUTPUT){
set_safety_mode(SAFETY_NOOUTPUT, 0U);
@@ -627,7 +696,7 @@ void TIM3_IRQHandler(void) {
// on to the next one
tcnt += 1U;
}
- TIM3->SR = 0;
+ TIM9->SR = 0;
}
int main(void) {
@@ -675,8 +744,7 @@ int main(void) {
uart_init(&uart_ring_esp_gps, 115200);
}
- // there is no LIN on panda black
- if(hw_type != HW_TYPE_BLACK_PANDA){
+ if(board_has_lin()){
// enable LIN
uart_init(&uart_ring_lin1, 10400);
UART5->CR2 |= USART_CR2_LINEN;
@@ -714,14 +782,13 @@ int main(void) {
current_board->set_esp_gps_mode(ESP_GPS_DISABLED);
}
// only enter power save after the first cycle
- /*if (current_board->check_ignition()) {
+ /*if (check_started()) {
set_power_save_state(POWER_SAVE_STATUS_ENABLED);
}*/
#endif
-
- // 48mhz / 65536 ~= 732 / 732 = 1
- timer_init(TIM3, 732);
- NVIC_EnableIRQ(TIM3_IRQn);
+ // 1hz
+ timer_init(TIM9, 1464);
+ NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn);
#ifdef DEBUG
puts("DEBUG ENABLED\n");
diff --git a/panda/board/power_saving.h b/panda/board/power_saving.h
index 0a926c119d3e22..d397884f6e6a8f 100644
--- a/panda/board/power_saving.h
+++ b/panda/board/power_saving.h
@@ -25,7 +25,6 @@ void set_power_save_state(int state) {
enable = true;
}
- // Switch CAN transcievers
current_board->enable_can_transcievers(enable);
// Switch EPS/GPS
@@ -34,17 +33,25 @@ void set_power_save_state(int state) {
} else {
current_board->set_esp_gps_mode(ESP_GPS_DISABLED);
}
-
- if(hw_type != HW_TYPE_BLACK_PANDA){
+
+ if(board_has_gmlan()){
// turn on GMLAN
set_gpio_output(GPIOB, 14, enable);
set_gpio_output(GPIOB, 15, enable);
+ }
- // turn on LIN
+ if(board_has_lin()){
+ // turn on LIN
set_gpio_output(GPIOB, 7, enable);
set_gpio_output(GPIOA, 14, enable);
}
+ // Switch off IR and fan when in power saving
+ if(!enable){
+ current_board->set_ir_power(0U);
+ current_board->set_fan_power(0U);
+ }
+
power_save_status = state;
}
}
diff --git a/panda/board/safety.h b/panda/board/safety.h
index ffdfebb45472b5..c68eda2c4a4864 100644
--- a/panda/board/safety.h
+++ b/panda/board/safety.h
@@ -14,6 +14,7 @@
#include "safety/safety_chrysler.h"
#include "safety/safety_subaru.h"
#include "safety/safety_mazda.h"
+#include "safety/safety_volkswagen.h"
#include "safety/safety_elm327.h"
// from cereal.car.CarParams.SafetyModel
@@ -29,8 +30,8 @@
#define SAFETY_CHRYSLER 9U
#define SAFETY_TESLA 10U
#define SAFETY_SUBARU 11U
-#define SAFETY_GM_PASSIVE 12U
#define SAFETY_MAZDA 13U
+#define SAFETY_VOLKSWAGEN 15U
#define SAFETY_TOYOTA_IPAS 16U
#define SAFETY_ALLOUTPUT 17U
#define SAFETY_GM_ASCM 18U
@@ -50,12 +51,6 @@ int safety_tx_lin_hook(int lin_num, uint8_t *data, int len){
return current_hooks->tx_lin(lin_num, data, len);
}
-// -1 = Disabled (Use GPIO to determine ignition)
-// 0 = Off (not started)
-// 1 = On (started)
-int safety_ignition_hook() {
- return current_hooks->ignition();
-}
int safety_fwd_hook(int bus_num, CAN_FIFOMailBox_TypeDef *to_fwd) {
return current_hooks->fwd(bus_num, to_fwd);
}
@@ -78,8 +73,8 @@ const safety_hook_config safety_hook_registry[] = {
{SAFETY_CHRYSLER, &chrysler_hooks},
{SAFETY_TESLA, &tesla_hooks},
{SAFETY_SUBARU, &subaru_hooks},
- {SAFETY_GM_PASSIVE, &gm_passive_hooks},
{SAFETY_MAZDA, &mazda_hooks},
+ {SAFETY_VOLKSWAGEN, &volkswagen_hooks},
{SAFETY_TOYOTA_IPAS, &toyota_ipas_hooks},
{SAFETY_ALLOUTPUT, &alloutput_hooks},
{SAFETY_GM_ASCM, &gm_ascm_hooks},
diff --git a/panda/board/safety/safety_cadillac.h b/panda/board/safety/safety_cadillac.h
index ef63360955fe7f..4ae2045505d8a7 100644
--- a/panda/board/safety/safety_cadillac.h
+++ b/panda/board/safety/safety_cadillac.h
@@ -10,7 +10,6 @@ const int CADILLAC_MAX_RATE_DOWN = 5;
const int CADILLAC_DRIVER_TORQUE_ALLOWANCE = 50;
const int CADILLAC_DRIVER_TORQUE_FACTOR = 4;
-bool cadillac_ign = 0;
int cadillac_cruise_engaged_last = 0;
int cadillac_rt_torque_last = 0;
const int cadillac_torque_msgs_n = 4;
@@ -35,11 +34,6 @@ static void cadillac_rx_hook(CAN_FIFOMailBox_TypeDef *to_push) {
update_sample(&cadillac_torque_driver, torque_driver_new);
}
- // this message isn't all zeros when ignition is on
- if ((addr == 0x160) && (bus == 0)) {
- cadillac_ign = GET_BYTES_04(to_push) != 0;
- }
-
// enter controls on rising edge of ACC, exit controls on ACC off
if ((addr == 0x370) && (bus == 0)) {
int cruise_engaged = GET_BYTE(to_push, 2) & 0x80; // bit 23
@@ -118,11 +112,6 @@ static int cadillac_tx_hook(CAN_FIFOMailBox_TypeDef *to_send) {
static void cadillac_init(int16_t param) {
UNUSED(param);
controls_allowed = 0;
- cadillac_ign = 0;
-}
-
-static int cadillac_ign_hook(void) {
- return cadillac_ign;
}
const safety_hooks cadillac_hooks = {
@@ -130,6 +119,5 @@ const safety_hooks cadillac_hooks = {
.rx = cadillac_rx_hook,
.tx = cadillac_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = cadillac_ign_hook,
.fwd = default_fwd_hook,
};
diff --git a/panda/board/safety/safety_chrysler.h b/panda/board/safety/safety_chrysler.h
index e608785739b109..9b8fc361546f59 100644
--- a/panda/board/safety/safety_chrysler.h
+++ b/panda/board/safety/safety_chrysler.h
@@ -136,6 +136,5 @@ const safety_hooks chrysler_hooks = {
.rx = chrysler_rx_hook,
.tx = chrysler_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = chrysler_fwd_hook,
};
diff --git a/panda/board/safety/safety_defaults.h b/panda/board/safety/safety_defaults.h
index 9dc23b54b79906..2743db96fe6eff 100644
--- a/panda/board/safety/safety_defaults.h
+++ b/panda/board/safety/safety_defaults.h
@@ -2,10 +2,6 @@ void default_rx_hook(CAN_FIFOMailBox_TypeDef *to_push) {
UNUSED(to_push);
}
-int default_ign_hook(void) {
- return -1; // use GPIO to determine ignition
-}
-
// *** no output safety mode ***
static void nooutput_init(int16_t param) {
@@ -36,7 +32,6 @@ const safety_hooks nooutput_hooks = {
.rx = default_rx_hook,
.tx = nooutput_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = default_fwd_hook,
};
@@ -64,6 +59,5 @@ const safety_hooks alloutput_hooks = {
.rx = default_rx_hook,
.tx = alloutput_tx_hook,
.tx_lin = alloutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = default_fwd_hook,
};
diff --git a/panda/board/safety/safety_elm327.h b/panda/board/safety/safety_elm327.h
index bbad909f28cb37..ce405b47675f11 100644
--- a/panda/board/safety/safety_elm327.h
+++ b/panda/board/safety/safety_elm327.h
@@ -38,6 +38,5 @@ const safety_hooks elm327_hooks = {
.rx = default_rx_hook,
.tx = elm327_tx_hook,
.tx_lin = elm327_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = default_fwd_hook,
};
diff --git a/panda/board/safety/safety_ford.h b/panda/board/safety/safety_ford.h
index 0bb839f2f6513d..22fc604ff1dd9d 100644
--- a/panda/board/safety/safety_ford.h
+++ b/panda/board/safety/safety_ford.h
@@ -97,6 +97,5 @@ const safety_hooks ford_hooks = {
.rx = ford_rx_hook,
.tx = ford_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = default_fwd_hook,
};
diff --git a/panda/board/safety/safety_gm.h b/panda/board/safety/safety_gm.h
index 7899c6a6daf86c..65a381e27f0b61 100644
--- a/panda/board/safety/safety_gm.h
+++ b/panda/board/safety/safety_gm.h
@@ -27,7 +27,6 @@ int gm_gas_prev = 0;
bool gm_moving = false;
// silence everything if stock car control ECUs are still online
bool gm_ascm_detected = 0;
-bool gm_ignition_started = 0;
int gm_rt_torque_last = 0;
int gm_desired_torque_last = 0;
uint32_t gm_ts_last = 0;
@@ -44,13 +43,6 @@ static void gm_rx_hook(CAN_FIFOMailBox_TypeDef *to_push) {
update_sample(&gm_torque_driver, torque_driver_new);
}
- if ((addr == 0x1F1) && (bus_number == 0)) {
- //Bit 5 should be ignition "on"
- //Backup plan is Bit 2 (accessory power)
- bool ign = (GET_BYTE(to_push, 0) & 0x20) != 0;
- gm_ignition_started = ign;
- }
-
// sample speed, really only care if car is moving or not
// rear left wheel speed
if (addr == 842) {
@@ -227,41 +219,13 @@ static int gm_tx_hook(CAN_FIFOMailBox_TypeDef *to_send) {
static void gm_init(int16_t param) {
UNUSED(param);
controls_allowed = 0;
- gm_ignition_started = 0;
-}
-
-static int gm_ign_hook(void) {
- return gm_ignition_started;
}
-// All sending is disallowed.
-// The only difference from "no output" model
-// is using GM ignition hook.
-
-static void gm_passive_rx_hook(CAN_FIFOMailBox_TypeDef *to_push) {
- int bus_number = GET_BUS(to_push);
- int addr = GET_ADDR(to_push);
-
- if ((addr == 0x1F1) && (bus_number == 0)) {
- bool ign = (GET_BYTE(to_push, 0) & 0x20) != 0;
- gm_ignition_started = ign;
- }
-}
const safety_hooks gm_hooks = {
.init = gm_init,
.rx = gm_rx_hook,
.tx = gm_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = gm_ign_hook,
- .fwd = default_fwd_hook,
-};
-
-const safety_hooks gm_passive_hooks = {
- .init = gm_init,
- .rx = gm_passive_rx_hook,
- .tx = nooutput_tx_hook,
- .tx_lin = nooutput_tx_lin_hook,
- .ignition = gm_ign_hook,
.fwd = default_fwd_hook,
};
diff --git a/panda/board/safety/safety_gm_ascm.h b/panda/board/safety/safety_gm_ascm.h
index 82f1db6ae5741e..36fd1d8f2adfa9 100644
--- a/panda/board/safety/safety_gm_ascm.h
+++ b/panda/board/safety/safety_gm_ascm.h
@@ -39,7 +39,6 @@ const safety_hooks gm_ascm_hooks = {
.rx = default_rx_hook,
.tx = alloutput_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = gm_ascm_fwd_hook,
};
diff --git a/panda/board/safety/safety_honda.h b/panda/board/safety/safety_honda.h
index 950da45e26b9b2..eb54d8168c03f4 100644
--- a/panda/board/safety/safety_honda.h
+++ b/panda/board/safety/safety_honda.h
@@ -156,7 +156,7 @@ static int honda_tx_hook(CAN_FIFOMailBox_TypeDef *to_send) {
// FORCE CANCEL: safety check only relevant when spamming the cancel button in Bosch HW
// ensuring that only the cancel button press is sent (VAL 2) when controls are off.
// This avoids unintended engagements while still allowing resume spam
- int bus_pt = ((hw_type == HW_TYPE_BLACK_PANDA) && honda_bosch_hardware)? 1 : 0;
+ int bus_pt = ((board_has_relay()) && honda_bosch_hardware)? 1 : 0;
if ((addr == 0x296) && honda_bosch_hardware &&
!current_controls_allowed && (bus == bus_pt)) {
if (((GET_BYTE(to_send, 0) >> 5) & 0x7) != 2) {
@@ -210,8 +210,8 @@ static int honda_fwd_hook(int bus_num, CAN_FIFOMailBox_TypeDef *to_fwd) {
static int honda_bosch_fwd_hook(int bus_num, CAN_FIFOMailBox_TypeDef *to_fwd) {
int bus_fwd = -1;
- int bus_rdr_cam = (hw_type == HW_TYPE_BLACK_PANDA) ? 2 : 1; // radar bus, camera side
- int bus_rdr_car = (hw_type == HW_TYPE_BLACK_PANDA) ? 0 : 2; // radar bus, car side
+ int bus_rdr_cam = (board_has_relay()) ? 2 : 1; // radar bus, camera side
+ int bus_rdr_car = (board_has_relay()) ? 0 : 2; // radar bus, car side
if (bus_num == bus_rdr_car) {
bus_fwd = bus_rdr_cam;
@@ -231,7 +231,6 @@ const safety_hooks honda_hooks = {
.rx = honda_rx_hook,
.tx = honda_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = honda_fwd_hook,
};
@@ -240,6 +239,5 @@ const safety_hooks honda_bosch_hooks = {
.rx = honda_rx_hook,
.tx = honda_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = honda_bosch_fwd_hook,
};
diff --git a/panda/board/safety/safety_hyundai.h b/panda/board/safety/safety_hyundai.h
index aed30621f44b00..21796e4caaf128 100644
--- a/panda/board/safety/safety_hyundai.h
+++ b/panda/board/safety/safety_hyundai.h
@@ -155,6 +155,5 @@ const safety_hooks hyundai_hooks = {
.rx = hyundai_rx_hook,
.tx = hyundai_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = hyundai_fwd_hook,
};
diff --git a/panda/board/safety/safety_mazda.h b/panda/board/safety/safety_mazda.h
index 63fbcdfd6f919f..60d8b2bda9b16a 100644
--- a/panda/board/safety/safety_mazda.h
+++ b/panda/board/safety/safety_mazda.h
@@ -164,6 +164,5 @@ const safety_hooks mazda_hooks = {
.rx = mazda_rx_hook,
.tx = mazda_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = mazda_fwd_hook,
};
diff --git a/panda/board/safety/safety_subaru.h b/panda/board/safety/safety_subaru.h
index 5b482973e6ec2f..c09b9d6225ed19 100644
--- a/panda/board/safety/safety_subaru.h
+++ b/panda/board/safety/safety_subaru.h
@@ -124,6 +124,5 @@ const safety_hooks subaru_hooks = {
.rx = subaru_rx_hook,
.tx = subaru_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = subaru_fwd_hook,
};
diff --git a/panda/board/safety/safety_tesla.h b/panda/board/safety/safety_tesla.h
index 188b12ac481dfc..2e5d20c622826e 100644
--- a/panda/board/safety/safety_tesla.h
+++ b/panda/board/safety/safety_tesla.h
@@ -39,9 +39,6 @@ int tesla_gas_prev = 0;
int tesla_speed = 0;
int eac_status = 0;
-int tesla_ignition_started = 0;
-
-
void set_gmlan_digital_output(int to_set);
void reset_gmlan_switch_timeout(void);
void gmlan_switch_init(int timeout_enable);
@@ -66,13 +63,6 @@ static void tesla_rx_hook(CAN_FIFOMailBox_TypeDef *to_push) {
}
}
- // Detect drive rail on (ignition) (start recording)
- if (addr == 0x348) {
- // GTW_status
- int drive_rail_on = GET_BYTE(to_push, 0) & 0x1;
- tesla_ignition_started = drive_rail_on == 1;
- }
-
// exit controls on brake press
// DI_torque2::DI_brakePedal 0x118
if (addr == 0x118) {
@@ -183,14 +173,9 @@ static int tesla_tx_hook(CAN_FIFOMailBox_TypeDef *to_send) {
static void tesla_init(int16_t param) {
UNUSED(param);
controls_allowed = 0;
- tesla_ignition_started = 0;
gmlan_switch_init(1); //init the gmlan switch with 1s timeout enabled
}
-static int tesla_ign_hook(void) {
- return tesla_ignition_started;
-}
-
static int tesla_fwd_hook(int bus_num, CAN_FIFOMailBox_TypeDef *to_fwd) {
int bus_fwd = -1;
@@ -224,6 +209,5 @@ const safety_hooks tesla_hooks = {
.rx = tesla_rx_hook,
.tx = tesla_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = tesla_ign_hook,
.fwd = tesla_fwd_hook,
};
diff --git a/panda/board/safety/safety_toyota.h b/panda/board/safety/safety_toyota.h
index a6304b8393f6ce..866ae177f47fbe 100644
--- a/panda/board/safety/safety_toyota.h
+++ b/panda/board/safety/safety_toyota.h
@@ -13,8 +13,8 @@ const int TOYOTA_MAX_RT_DELTA = 375; // max delta torque allowed for real t
const uint32_t TOYOTA_RT_INTERVAL = 250000; // 250ms between real time checks
// longitudinal limits
-const int TOYOTA_MAX_ACCEL = 3000; // 3.0 m/s2
-const int TOYOTA_MIN_ACCEL = -3000; // 3.0 m/s2
+const int TOYOTA_MAX_ACCEL = 3500; // 3.0 m/s2
+const int TOYOTA_MIN_ACCEL = -4000; // 3.0 m/s2
const int TOYOTA_GAS_INTERCEPTOR_THRESHOLD = 475; // ratio between offset and gain from dbc file
@@ -232,6 +232,5 @@ const safety_hooks toyota_hooks = {
.rx = toyota_rx_hook,
.tx = toyota_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = toyota_fwd_hook,
};
diff --git a/panda/board/safety/safety_toyota_ipas.h b/panda/board/safety/safety_toyota_ipas.h
index 3e3a3b3a24134f..d5833e45db5544 100644
--- a/panda/board/safety/safety_toyota_ipas.h
+++ b/panda/board/safety/safety_toyota_ipas.h
@@ -164,6 +164,5 @@ const safety_hooks toyota_ipas_hooks = {
.rx = toyota_ipas_rx_hook,
.tx = toyota_ipas_tx_hook,
.tx_lin = nooutput_tx_lin_hook,
- .ignition = default_ign_hook,
.fwd = toyota_fwd_hook,
};
diff --git a/panda/board/safety/safety_volkswagen.h b/panda/board/safety/safety_volkswagen.h
new file mode 100644
index 00000000000000..bb184cd91f5418
--- /dev/null
+++ b/panda/board/safety/safety_volkswagen.h
@@ -0,0 +1,167 @@
+const int VOLKSWAGEN_MAX_STEER = 250; // 2.5 Nm (EPS side max of 3.0Nm with fault if violated)
+const int VOLKSWAGEN_MAX_RT_DELTA = 75; // 4 max rate up * 50Hz send rate * 250000 RT interval / 1000000 = 50 ; 50 * 1.5 for safety pad = 75
+const uint32_t VOLKSWAGEN_RT_INTERVAL = 250000; // 250ms between real time checks
+const int VOLKSWAGEN_MAX_RATE_UP = 4; // 2.0 Nm/s available rate of change from the steering rack (EPS side delta-limit of 5.0 Nm/s)
+const int VOLKSWAGEN_MAX_RATE_DOWN = 10; // 5.0 Nm/s available rate of change from the steering rack (EPS side delta-limit of 5.0 Nm/s)
+const int VOLKSWAGEN_DRIVER_TORQUE_ALLOWANCE = 80;
+const int VOLKSWAGEN_DRIVER_TORQUE_FACTOR = 3;
+
+struct sample_t volkswagen_torque_driver; // last few driver torques measured
+int volkswagen_rt_torque_last = 0;
+int volkswagen_desired_torque_last = 0;
+uint32_t volkswagen_ts_last = 0;
+int volkswagen_gas_prev = 0;
+
+// Safety-relevant CAN messages for the Volkswagen MQB platform.
+#define MSG_EPS_01 0x09F
+#define MSG_MOTOR_20 0x121
+#define MSG_ACC_06 0x122
+#define MSG_HCA_01 0x126
+#define MSG_GRA_ACC_01 0x12B
+#define MSG_LDW_02 0x397
+#define MSG_KLEMMEN_STATUS_01 0x3C0
+
+static void volkswagen_init(int16_t param) {
+ UNUSED(param); // May use param in the future to indicate MQB vs PQ35/PQ46/NMS vs MLB, or wiring configuration.
+ controls_allowed = 0;
+}
+
+static void volkswagen_rx_hook(CAN_FIFOMailBox_TypeDef *to_push) {
+ int bus = GET_BUS(to_push);
+ int addr = GET_ADDR(to_push);
+
+ // Update driver input torque samples from EPS_01.Driver_Strain for absolute torque, and EPS_01.Driver_Strain_VZ
+ // for the direction.
+ if ((bus == 0) && (addr == MSG_EPS_01)) {
+ int torque_driver_new = GET_BYTE(to_push, 5) | ((GET_BYTE(to_push, 6) & 0x1F) << 8);
+ int sign = (GET_BYTE(to_push, 6) & 0x80) >> 7;
+ if (sign == 1) {
+ torque_driver_new *= -1;
+ }
+
+ update_sample(&volkswagen_torque_driver, torque_driver_new);
+ }
+
+ // Monitor ACC_06.ACC_Status_ACC for stock ACC status. Because the current MQB port is lateral-only, OP's control
+ // allowed state is directly driven by stock ACC engagement. Permit the ACC message to come from either bus, in
+ // order to accommodate future camera-side integrations if needed.
+ if (addr == MSG_ACC_06) {
+ int acc_status = (GET_BYTE(to_push, 7) & 0x70) >> 4;
+ controls_allowed = ((acc_status == 3) || (acc_status == 4) || (acc_status == 5)) ? 1 : 0;
+ }
+
+ // exit controls on rising edge of gas press. Bits [12-20)
+ if (addr == MSG_MOTOR_20) {
+ int gas = (GET_BYTES_04(to_push) >> 12) & 0xFF;
+ if ((gas > 0) && (volkswagen_gas_prev == 0) && long_controls_allowed) {
+ controls_allowed = 0;
+ }
+ volkswagen_gas_prev = gas;
+ }
+}
+
+static int volkswagen_tx_hook(CAN_FIFOMailBox_TypeDef *to_send) {
+ int addr = GET_ADDR(to_send);
+ int bus = GET_BUS(to_send);
+ int tx = 1;
+
+ // Safety check for HCA_01 Heading Control Assist torque.
+ if (addr == MSG_HCA_01) {
+ bool violation = false;
+
+ int desired_torque = GET_BYTE(to_send, 2) | ((GET_BYTE(to_send, 3) & 0x3F) << 8);
+ int sign = (GET_BYTE(to_send, 3) & 0x80) >> 7;
+ if (sign == 1) {
+ desired_torque *= -1;
+ }
+
+ uint32_t ts = TIM2->CNT;
+
+ if (controls_allowed) {
+
+ // *** global torque limit check ***
+ violation |= max_limit_check(desired_torque, VOLKSWAGEN_MAX_STEER, -VOLKSWAGEN_MAX_STEER);
+
+ // *** torque rate limit check ***
+ violation |= driver_limit_check(desired_torque, volkswagen_desired_torque_last, &volkswagen_torque_driver,
+ VOLKSWAGEN_MAX_STEER, VOLKSWAGEN_MAX_RATE_UP, VOLKSWAGEN_MAX_RATE_DOWN,
+ VOLKSWAGEN_DRIVER_TORQUE_ALLOWANCE, VOLKSWAGEN_DRIVER_TORQUE_FACTOR);
+ volkswagen_desired_torque_last = desired_torque;
+
+ // *** torque real time rate limit check ***
+ violation |= rt_rate_limit_check(desired_torque, volkswagen_rt_torque_last, VOLKSWAGEN_MAX_RT_DELTA);
+
+ // every RT_INTERVAL set the new limits
+ uint32_t ts_elapsed = get_ts_elapsed(ts, volkswagen_ts_last);
+ if (ts_elapsed > VOLKSWAGEN_RT_INTERVAL) {
+ volkswagen_rt_torque_last = desired_torque;
+ volkswagen_ts_last = ts;
+ }
+ }
+
+ // no torque if controls is not allowed
+ if (!controls_allowed && (desired_torque != 0)) {
+ violation = true;
+ }
+
+ // reset to 0 if either controls is not allowed or there's a violation
+ if (violation || !controls_allowed) {
+ volkswagen_desired_torque_last = 0;
+ volkswagen_rt_torque_last = 0;
+ volkswagen_ts_last = ts;
+ }
+
+ if (violation) {
+ tx = 0;
+ }
+ }
+
+ // FORCE CANCEL: ensuring that only the cancel button press is sent when controls are off.
+ // This avoids unintended engagements while still allowing resume spam
+ if ((bus == 2) && (addr == MSG_GRA_ACC_01) && !controls_allowed) {
+ // disallow resume and set: bits 16 and 19
+ if ((GET_BYTE(to_send, 2) & 0x9) != 0) {
+ tx = 0;
+ }
+ }
+
+ // 1 allows the message through
+ return tx;
+}
+
+static int volkswagen_fwd_hook(int bus_num, CAN_FIFOMailBox_TypeDef *to_fwd) {
+ int addr = GET_ADDR(to_fwd);
+ int bus_fwd = -1;
+
+ // NOTE: Will need refactoring for other bus layouts, such as no-forwarding at camera or J533 running-gear CAN
+
+ switch (bus_num) {
+ case 0:
+ // Forward all traffic from J533 gateway to Extended CAN devices.
+ bus_fwd = 2;
+ break;
+ case 2:
+ if ((addr == MSG_HCA_01) || (addr == MSG_LDW_02)) {
+ // OP takes control of the Heading Control Assist and Lane Departure Warning messages from the camera.
+ bus_fwd = -1;
+ } else {
+ // Forward all remaining traffic from Extended CAN devices to J533 gateway.
+ bus_fwd = 0;
+ }
+ break;
+ default:
+ // No other buses should be in use; fallback to do-not-forward.
+ bus_fwd = -1;
+ break;
+ }
+
+ return bus_fwd;
+}
+
+const safety_hooks volkswagen_hooks = {
+ .init = volkswagen_init,
+ .rx = volkswagen_rx_hook,
+ .tx = volkswagen_tx_hook,
+ .tx_lin = nooutput_tx_lin_hook,
+ .fwd = volkswagen_fwd_hook,
+};
diff --git a/panda/board/safety_declarations.h b/panda/board/safety_declarations.h
index 7e0a54d73e8231..efa6a4e2b8744c 100644
--- a/panda/board/safety_declarations.h
+++ b/panda/board/safety_declarations.h
@@ -14,7 +14,6 @@ struct lookup_t {
void safety_rx_hook(CAN_FIFOMailBox_TypeDef *to_push);
int safety_tx_hook(CAN_FIFOMailBox_TypeDef *to_send);
int safety_tx_lin_hook(int lin_num, uint8_t *data, int len);
-int safety_ignition_hook(void);
uint32_t get_ts_elapsed(uint32_t ts, uint32_t ts_last);
int to_signed(int d, int bits);
void update_sample(struct sample_t *sample, int sample_new);
@@ -31,12 +30,10 @@ typedef void (*safety_hook_init)(int16_t param);
typedef void (*rx_hook)(CAN_FIFOMailBox_TypeDef *to_push);
typedef int (*tx_hook)(CAN_FIFOMailBox_TypeDef *to_send);
typedef int (*tx_lin_hook)(int lin_num, uint8_t *data, int len);
-typedef int (*ign_hook)(void);
typedef int (*fwd_hook)(int bus_num, CAN_FIFOMailBox_TypeDef *to_fwd);
typedef struct {
safety_hook_init init;
- ign_hook ignition;
rx_hook rx;
tx_hook tx;
tx_lin_hook tx_lin;
diff --git a/panda/board/tools/enter_download_mode.py b/panda/board/tools/enter_download_mode.py
index 3dd6545f4caffe..17d30dda1131e8 100755
--- a/panda/board/tools/enter_download_mode.py
+++ b/panda/board/tools/enter_download_mode.py
@@ -11,7 +11,7 @@ def enter_download_mode(device):
try:
handle.controlWrite(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xd1, 0, 0, b'')
- except (usb1.USBErrorIO, usb1.USBErrorPipe) as e:
+ except (usb1.USBErrorIO, usb1.USBErrorPipe):
print("Device download mode enabled.")
time.sleep(1)
else:
diff --git a/panda/crypto/getcertheader.py b/panda/crypto/getcertheader.py
index b323cd101d81b3..bbbe475ef8b000 100755
--- a/panda/crypto/getcertheader.py
+++ b/panda/crypto/getcertheader.py
@@ -1,6 +1,5 @@
#!/usr/bin/env python3
import sys
-import struct
from Crypto.PublicKey import RSA
def egcd(a, b):
diff --git a/panda/examples/can_bit_transition.py b/panda/examples/can_bit_transition.py
index 1cd72a6831cde5..aa4aa9df95f010 100755
--- a/panda/examples/can_bit_transition.py
+++ b/panda/examples/can_bit_transition.py
@@ -1,6 +1,4 @@
#!/usr/bin/env python3
-
-import binascii
import csv
import sys
diff --git a/panda/examples/can_unique.py b/panda/examples/can_unique.py
index 05f24a7d91d254..fdd586c3d3517d 100755
--- a/panda/examples/can_unique.py
+++ b/panda/examples/can_unique.py
@@ -13,10 +13,8 @@
# 0,344,c000c00000000000
-import binascii
import csv
import sys
-from panda import Panda
class Message():
"""Details about a specific message ID."""
diff --git a/panda/examples/eps_read_software_ids.py b/panda/examples/eps_read_software_ids.py
new file mode 100755
index 00000000000000..a3292207c7e90c
--- /dev/null
+++ b/panda/examples/eps_read_software_ids.py
@@ -0,0 +1,59 @@
+#!/usr/bin/env python3
+from panda import Panda
+from panda.python.uds import UdsClient, NegativeResponseError, DATA_IDENTIFIER_TYPE
+
+if __name__ == "__main__":
+ address = 0x18da30f1 # Honda EPS
+ panda = Panda()
+ uds_client = UdsClient(panda, address, debug=False)
+
+ print("tester present ...")
+ uds_client.tester_present()
+
+ try:
+ print("")
+ print("read data by id: boot software id ...")
+ data = uds_client.read_data_by_identifier(DATA_IDENTIFIER_TYPE.BOOT_SOFTWARE_IDENTIFICATION)
+ print(data.decode('utf-8'))
+ except NegativeResponseError as e:
+ print(e)
+
+ try:
+ print("")
+ print("read data by id: application software id ...")
+ data = uds_client.read_data_by_identifier(DATA_IDENTIFIER_TYPE.APPLICATION_SOFTWARE_IDENTIFICATION)
+ print(data.decode('utf-8'))
+ except NegativeResponseError as e:
+ print(e)
+
+ try:
+ print("")
+ print("read data by id: application data id ...")
+ data = uds_client.read_data_by_identifier(DATA_IDENTIFIER_TYPE.APPLICATION_DATA_IDENTIFICATION)
+ print(data.decode('utf-8'))
+ except NegativeResponseError as e:
+ print(e)
+
+ try:
+ print("")
+ print("read data by id: boot software fingerprint ...")
+ data = uds_client.read_data_by_identifier(DATA_IDENTIFIER_TYPE.BOOT_SOFTWARE_FINGERPRINT)
+ print(data.decode('utf-8'))
+ except NegativeResponseError as e:
+ print(e)
+
+ try:
+ print("")
+ print("read data by id: application software fingerprint ...")
+ data = uds_client.read_data_by_identifier(DATA_IDENTIFIER_TYPE.APPLICATION_SOFTWARE_FINGERPRINT)
+ print(data.decode('utf-8'))
+ except NegativeResponseError as e:
+ print(e)
+
+ try:
+ print("")
+ print("read data by id: application data fingerprint ...")
+ data = uds_client.read_data_by_identifier(DATA_IDENTIFIER_TYPE.APPLICATION_DATA_FINGERPRINT)
+ print(data.decode('utf-8'))
+ except NegativeResponseError as e:
+ print(e)
diff --git a/panda/examples/get_panda_password.py b/panda/examples/get_panda_password.py
index 13dacf25340c4b..54cbe57ec363a6 100644
--- a/panda/examples/get_panda_password.py
+++ b/panda/examples/get_panda_password.py
@@ -1,4 +1,5 @@
#!/usr/bin/env python3
+import sys
from panda import Panda
def get_panda_password():
diff --git a/panda/examples/query_vin_and_stats.py b/panda/examples/query_vin_and_stats.py
index 9a0df78ec1d05a..f8b5d9b2eb880a 100755
--- a/panda/examples/query_vin_and_stats.py
+++ b/panda/examples/query_vin_and_stats.py
@@ -8,9 +8,10 @@
# 0x7e0 = Toyota
# 0x18DB33F1 for Honda?
+
def get_current_data_for_pid(pid):
# 01 xx = Show current data
- isotp_send(panda, "\x01"+chr(pid), 0x7e0)
+ isotp_send(panda, b"\x01"+ bytes([pid]), 0x7e0)
return isotp_recv(panda, 0x7e8)
def get_supported_pids():
@@ -33,15 +34,15 @@ def get_supported_pids():
panda.can_clear(0)
# 09 02 = Get VIN
- isotp_send(panda, "\x09\x02", 0x7df)
+ isotp_send(panda, b"\x09\x02", 0x7df)
ret = isotp_recv(panda, 0x7e8)
hexdump(ret)
- print("VIN: %s" % ret[2:])
+ print("VIN: %s" % "".join(map(chr, ret[:2])))
# 03 = get DTCS
- isotp_send(panda, "\x03", 0x7e0)
+ isotp_send(panda, b"\x03", 0x7e0)
dtcs = isotp_recv(panda, 0x7e8)
- print("DTCs:", dtcs[2:].encode("hex"))
+ print("DTCs:", "".join(map(chr, dtcs[:2])))
supported_pids = get_supported_pids()
print("Supported PIDs:",supported_pids)
diff --git a/panda/examples/tesla_tester.py b/panda/examples/tesla_tester.py
index 74f19f25528da7..9a77eb4edf502a 100644
--- a/panda/examples/tesla_tester.py
+++ b/panda/examples/tesla_tester.py
@@ -29,11 +29,11 @@ def tesla_tester():
# BDY 0x248 is the MCU_commands message, which includes folding mirrors, opening the trunk, frunk, setting the cars lock state and more. For our test, we will edit the 3rd byte, which is MCU_lockRequest. 0x01 will lock, 0x02 will unlock:
print("Unlocking Tesla...")
- p.can_send(0x248, "\x00\x00\x02\x00\x00\x00\x00\x00", body_bus_num)
+ p.can_send(0x248, b"\x00\x00\x02\x00\x00\x00\x00\x00", body_bus_num)
#Or, we can set the first byte, MCU_frontHoodCommand + MCU_liftgateSwitch, to 0x01 to pop the frunk, or 0x04 to open/close the trunk (0x05 should open both)
print("Opening Frunk...")
- p.can_send(0x248, "\x01\x00\x00\x00\x00\x00\x00\x00", body_bus_num)
+ p.can_send(0x248, b"\x01\x00\x00\x00\x00\x00\x00\x00", body_bus_num)
#Back to safety...
print("Disabling output on Panda...")
diff --git a/panda/python/__init__.py b/panda/python/__init__.py
index 565770918a61e9..326128d3ec306a 100644
--- a/panda/python/__init__.py
+++ b/panda/python/__init__.py
@@ -1,5 +1,5 @@
# python library to interface with panda
-
+import datetime
import binascii
import struct
import hashlib
@@ -10,10 +10,10 @@
import traceback
import subprocess
from .dfu import PandaDFU
-from .esptool import ESPROM, CesantaFlasher
-from .flash_release import flash_release
-from .update import ensure_st_up_to_date
-from .serial import PandaSerial
+from .esptool import ESPROM, CesantaFlasher # noqa: F401
+from .flash_release import flash_release # noqa: F401
+from .update import ensure_st_up_to_date # noqa: F401
+from .serial import PandaSerial # noqa: F401
from .isotp import isotp_send, isotp_recv
__version__ = '0.0.9'
@@ -27,10 +27,10 @@ def build_st(target, mkfile="Makefile"):
from panda import BASEDIR
cmd = 'cd %s && make -f %s clean && make -f %s %s >/dev/null' % (os.path.join(BASEDIR, "board"), mkfile, mkfile, target)
try:
- output = subprocess.check_output(cmd, stderr=subprocess.STDOUT, shell=True)
- except subprocess.CalledProcessError as exception:
- output = exception.output
- returncode = exception.returncode
+ _ = subprocess.check_output(cmd, stderr=subprocess.STDOUT, shell=True)
+ except subprocess.CalledProcessError:
+ #output = exception.output
+ #returncode = exception.returncode
raise
def parse_can_buffer(dat):
@@ -122,8 +122,8 @@ class Panda(object):
SAFETY_CHRYSLER = 9
SAFETY_TESLA = 10
SAFETY_SUBARU = 11
- SAFETY_GM_PASSIVE = 12
SAFETY_MAZDA = 13
+ SAFETY_VOLKSWAGEN = 15
SAFETY_TOYOTA_IPAS = 16
SAFETY_ALLOUTPUT = 17
SAFETY_GM_ASCM = 18
@@ -144,6 +144,7 @@ class Panda(object):
HW_TYPE_GREY_PANDA = b'\x02'
HW_TYPE_BLACK_PANDA = b'\x03'
HW_TYPE_PEDAL = b'\x04'
+ HW_TYPE_UNO = b'\x05'
def __init__(self, serial=None, claim=True):
self._serial = serial
@@ -382,11 +383,14 @@ def is_grey(self):
def is_black(self):
return self.get_type() == Panda.HW_TYPE_BLACK_PANDA
+ def is_uno(self):
+ return self.get_type() == Panda.HW_TYPE_UNO
+
def get_serial(self):
dat = self._handle.controlRead(Panda.REQUEST_IN, 0xd0, 0, 0, 0x20)
hashsig, calc_hash = dat[0x1c:], hashlib.sha1(dat[0:0x1c]).digest()[0:4]
assert(hashsig == calc_hash)
- return [dat[0:0x10], dat[0x10:0x10+10]]
+ return [dat[0:0x10].decode("utf8"), dat[0x10:0x10+10].decode("utf8")]
def get_secret(self):
return self._handle.controlRead(Panda.REQUEST_IN, 0xd0, 1, 0, 0x10)
@@ -557,7 +561,7 @@ def kline_drain(self, bus=2):
def kline_ll_recv(self, cnt, bus=2):
echo = bytearray()
while len(echo) != cnt:
- ret = str(self._handle.controlRead(Panda.REQUEST_OUT, 0xe0, bus, 0, cnt-len(echo)))
+ ret = self._handle.controlRead(Panda.REQUEST_OUT, 0xe0, bus, 0, cnt-len(echo))
if DEBUG and len(ret) > 0:
print("kline recv: " + binascii.hexlify(ret))
echo += ret
@@ -577,7 +581,7 @@ def get_checksum(dat):
ts = x[i:i+0xf]
if DEBUG:
print("kline send: " + binascii.hexlify(ts))
- self._handle.bulkWrite(2, chr(bus).encode()+ts)
+ self._handle.bulkWrite(2, bytes([bus]) + ts)
echo = self.kline_ll_recv(len(ts), bus=bus)
if echo != ts:
print("**** ECHO ERROR %d ****" % i)
@@ -592,3 +596,31 @@ def kline_recv(self, bus=2):
def send_heartbeat(self):
self._handle.controlWrite(Panda.REQUEST_OUT, 0xf3, 0, 0, b'')
+
+ # ******************* RTC *******************
+ def set_datetime(self, dt):
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa1, int(dt.year), 0, b'')
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa2, int(dt.month), 0, b'')
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa3, int(dt.day), 0, b'')
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa4, int(dt.isoweekday()), 0, b'')
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa5, int(dt.hour), 0, b'')
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa6, int(dt.minute), 0, b'')
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xa7, int(dt.second), 0, b'')
+
+ def get_datetime(self):
+ dat = self._handle.controlRead(Panda.REQUEST_IN, 0xa0, 0, 0, 8)
+ a = struct.unpack("HBBBBBB", dat)
+ return datetime.datetime(a[0], a[1], a[2], a[4], a[5], a[6])
+
+ # ******************* IR *******************
+ def set_ir_power(self, percentage):
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xb0, int(percentage), 0, b'')
+
+ # ******************* Fan ******************
+ def set_fan_power(self, percentage):
+ self._handle.controlWrite(Panda.REQUEST_OUT, 0xb1, int(percentage), 0, b'')
+
+ def get_fan_rpm(self):
+ dat = self._handle.controlRead(Panda.REQUEST_IN, 0xb2, 0, 0, 2)
+ a = struct.unpack("H", dat)
+ return a[0]
\ No newline at end of file
diff --git a/panda/python/dfu.py b/panda/python/dfu.py
index bbab812b0709ea..d9d619a822de80 100644
--- a/panda/python/dfu.py
+++ b/panda/python/dfu.py
@@ -1,8 +1,6 @@
-
import os
import usb1
import struct
-import time
import binascii
# *** DFU mode ***
@@ -116,6 +114,6 @@ def reset(self):
self.status()
try:
self._handle.controlWrite(0x21, DFU_DNLOAD, 2, 0, b"")
- stat = str(self._handle.controlRead(0x21, DFU_GETSTATUS, 0, 0, 6))
+ _ = str(self._handle.controlRead(0x21, DFU_GETSTATUS, 0, 0, 6))
except Exception:
pass
diff --git a/panda/python/esptool.py b/panda/python/esptool.py
index 941c3557c8a00c..74e383eb08600c 100755
--- a/panda/python/esptool.py
+++ b/panda/python/esptool.py
@@ -29,7 +29,7 @@
import sys
import tempfile
import time
-import traceback
+#import traceback
import usb1
__version__ = "1.2"
@@ -44,7 +44,7 @@ def __init__(self, serial=None):
@property
def baudrate(self):
- return self._baudrate
+ return self.baudrate
@baudrate.setter
def baudrate(self, x):
@@ -434,7 +434,7 @@ def append_checksum(self, f, checksum):
def write_v1_header(self, f, segments):
f.write(struct.pack('>8)) + chr(len(x)&0xFF)).encode("utf8") + x[0:5]
+ ss = bytes([subaddr, 0x10 + (len(x) >> 8), len(x) & 0xFF]) + x[0:5]
x = x[5:]
else:
- ss = (chr(0x10 + (len(x)>>8)) + chr(len(x)&0xFF)).encode("utf8") + x[0:6]
+ ss = bytes([0x10 + (len(x) >> 8), len(x) & 0xFF]) + x[0:6]
x = x[6:]
idx = 1
sends = []
while len(x) > 0:
if subaddr:
- sends.append((((chr(subaddr) + chr(0x20 + (idx&0xF))).encode('utf8') + x[0:6]).ljust(8, b"\x00")))
+ sends.append(((bytes([subaddr, 0x20 + (idx & 0xF)]) + x[0:6]).ljust(8, b"\x00")))
x = x[6:]
else:
- sends.append(((chr(0x20 + (idx&0xF)).encode("utf8") + x[0:7]).ljust(8, b"\x00")))
+ sends.append(((bytes([0x20 + (idx & 0xF)]) + x[0:7]).ljust(8, b"\x00")))
x = x[7:]
idx += 1
@@ -107,7 +107,7 @@ def isotp_recv(panda, addr, bus=0, sendaddr=None, subaddr=None):
else:
msg = recv(panda, 1, addr, bus)[0]
- if msg[0]&0xf0 == 0x10:
+ if msg[0] & 0xf0 == 0x10:
# first
tlen = ((msg[0] & 0xf) << 8) | msg[1]
dat = msg[2:]
@@ -122,7 +122,7 @@ def isotp_recv(panda, addr, bus=0, sendaddr=None, subaddr=None):
assert mm[0] == (0x20 | (idx&0xF))
dat += mm[1:]
idx += 1
- elif msg[0]&0xf0 == 0x00:
+ elif msg[0] & 0xf0 == 0x00:
# single
tlen = msg[0] & 0xf
dat = msg[1:]
diff --git a/panda/python/serial.py b/panda/python/serial.py
index 72ab3de92b6752..4d900cf29f6610 100644
--- a/panda/python/serial.py
+++ b/panda/python/serial.py
@@ -19,10 +19,7 @@ def read(self, l=1):
def write(self, dat):
#print "W: ", dat.encode("hex")
#print ' pigeon_send("' + ''.join(map(lambda x: "\\x%02X" % ord(x), dat)) + '");'
- if(isinstance(dat, bytes)):
- return self.panda.serial_write(self.port, dat)
- else:
- return self.panda.serial_write(self.port, str.encode(dat))
+ return self.panda.serial_write(self.port, dat)
def close(self):
pass
diff --git a/panda/python/uds.py b/panda/python/uds.py
new file mode 100644
index 00000000000000..5f5ae53bfbac01
--- /dev/null
+++ b/panda/python/uds.py
@@ -0,0 +1,770 @@
+#!/usr/bin/env python3
+import time
+import struct
+from typing import NamedTuple, List
+from enum import IntEnum
+from queue import Queue, Empty
+from threading import Thread
+from binascii import hexlify
+
+class SERVICE_TYPE(IntEnum):
+ DIAGNOSTIC_SESSION_CONTROL = 0x10
+ ECU_RESET = 0x11
+ SECURITY_ACCESS = 0x27
+ COMMUNICATION_CONTROL = 0x28
+ TESTER_PRESENT = 0x3E
+ ACCESS_TIMING_PARAMETER = 0x83
+ SECURED_DATA_TRANSMISSION = 0x84
+ CONTROL_DTC_SETTING = 0x85
+ RESPONSE_ON_EVENT = 0x86
+ LINK_CONTROL = 0x87
+ READ_DATA_BY_IDENTIFIER = 0x22
+ READ_MEMORY_BY_ADDRESS = 0x23
+ READ_SCALING_DATA_BY_IDENTIFIER = 0x24
+ READ_DATA_BY_PERIODIC_IDENTIFIER = 0x2A
+ DYNAMICALLY_DEFINE_DATA_IDENTIFIER = 0x2C
+ WRITE_DATA_BY_IDENTIFIER = 0x2E
+ WRITE_MEMORY_BY_ADDRESS = 0x3D
+ CLEAR_DIAGNOSTIC_INFORMATION = 0x14
+ READ_DTC_INFORMATION = 0x19
+ INPUT_OUTPUT_CONTROL_BY_IDENTIFIER = 0x2F
+ ROUTINE_CONTROL = 0x31
+ REQUEST_DOWNLOAD = 0x34
+ REQUEST_UPLOAD = 0x35
+ TRANSFER_DATA = 0x36
+ REQUEST_TRANSFER_EXIT = 0x37
+
+class SESSION_TYPE(IntEnum):
+ DEFAULT = 1
+ PROGRAMMING = 2
+ EXTENDED_DIAGNOSTIC = 3
+ SAFETY_SYSTEM_DIAGNOSTIC = 4
+
+class RESET_TYPE(IntEnum):
+ HARD = 1
+ KEY_OFF_ON = 2
+ SOFT = 3
+ ENABLE_RAPID_POWER_SHUTDOWN = 4
+ DISABLE_RAPID_POWER_SHUTDOWN = 5
+
+class ACCESS_TYPE(IntEnum):
+ REQUEST_SEED = 1
+ SEND_KEY = 2
+
+class CONTROL_TYPE(IntEnum):
+ ENABLE_RX_ENABLE_TX = 0
+ ENABLE_RX_DISABLE_TX = 1
+ DISABLE_RX_ENABLE_TX = 2
+ DISABLE_RX_DISABLE_TX = 3
+
+class MESSAGE_TYPE(IntEnum):
+ NORMAL = 1
+ NETWORK_MANAGEMENT = 2
+ NORMAL_AND_NETWORK_MANAGEMENT = 3
+
+class TIMING_PARAMETER_TYPE(IntEnum):
+ READ_EXTENDED_SET = 1
+ SET_TO_DEFAULT_VALUES = 2
+ READ_CURRENTLY_ACTIVE = 3
+ SET_TO_GIVEN_VALUES = 4
+
+class DTC_SETTING_TYPE(IntEnum):
+ ON = 1
+ OFF = 2
+
+class RESPONSE_EVENT_TYPE(IntEnum):
+ STOP_RESPONSE_ON_EVENT = 0
+ ON_DTC_STATUS_CHANGE = 1
+ ON_TIMER_INTERRUPT = 2
+ ON_CHANGE_OF_DATA_IDENTIFIER = 3
+ REPORT_ACTIVATED_EVENTS = 4
+ START_RESPONSE_ON_EVENT = 5
+ CLEAR_RESPONSE_ON_EVENT = 6
+ ON_COMPARISON_OF_VALUES = 7
+
+class LINK_CONTROL_TYPE(IntEnum):
+ VERIFY_BAUDRATE_TRANSITION_WITH_FIXED_BAUDRATE = 1
+ VERIFY_BAUDRATE_TRANSITION_WITH_SPECIFIC_BAUDRATE = 2
+ TRANSITION_BAUDRATE = 3
+
+class BAUD_RATE_TYPE(IntEnum):
+ PC9600 = 1
+ PC19200 = 2
+ PC38400 = 3
+ PC57600 = 4
+ PC115200 = 5
+ CAN125000 = 16
+ CAN250000 = 17
+ CAN500000 = 18
+ CAN1000000 = 19
+
+class DATA_IDENTIFIER_TYPE(IntEnum):
+ BOOT_SOFTWARE_IDENTIFICATION = 0xF180
+ APPLICATION_SOFTWARE_IDENTIFICATION = 0xF181
+ APPLICATION_DATA_IDENTIFICATION = 0xF182
+ BOOT_SOFTWARE_FINGERPRINT = 0xF183
+ APPLICATION_SOFTWARE_FINGERPRINT = 0xF184
+ APPLICATION_DATA_FINGERPRINT = 0xF185
+ ACTIVE_DIAGNOSTIC_SESSION = 0xF186
+ VEHICLE_MANUFACTURER_SPARE_PART_NUMBER = 0xF187
+ VEHICLE_MANUFACTURER_ECU_SOFTWARE_NUMBER = 0xF188
+ VEHICLE_MANUFACTURER_ECU_SOFTWARE_VERSION_NUMBER = 0xF189
+ SYSTEM_SUPPLIER_IDENTIFIER = 0xF18A
+ ECU_MANUFACTURING_DATE = 0xF18B
+ ECU_SERIAL_NUMBER = 0xF18C
+ SUPPORTED_FUNCTIONAL_UNITS = 0xF18D
+ VEHICLE_MANUFACTURER_KIT_ASSEMBLY_PART_NUMBER = 0xF18E
+ VIN = 0xF190
+ VEHICLE_MANUFACTURER_ECU_HARDWARE_NUMBER = 0xF191
+ SYSTEM_SUPPLIER_ECU_HARDWARE_NUMBER = 0xF192
+ SYSTEM_SUPPLIER_ECU_HARDWARE_VERSION_NUMBER = 0xF193
+ SYSTEM_SUPPLIER_ECU_SOFTWARE_NUMBER = 0xF194
+ SYSTEM_SUPPLIER_ECU_SOFTWARE_VERSION_NUMBER = 0xF195
+ EXHAUST_REGULATION_OR_TYPE_APPROVAL_NUMBER = 0xF196
+ SYSTEM_NAME_OR_ENGINE_TYPE = 0xF197
+ REPAIR_SHOP_CODE_OR_TESTER_SERIAL_NUMBER = 0xF198
+ PROGRAMMING_DATE = 0xF199
+ CALIBRATION_REPAIR_SHOP_CODE_OR_CALIBRATION_EQUIPMENT_SERIAL_NUMBER = 0xF19A
+ CALIBRATION_DATE = 0xF19B
+ CALIBRATION_EQUIPMENT_SOFTWARE_NUMBER = 0xF19C
+ ECU_INSTALLATION_DATE = 0xF19D
+ ODX_FILE = 0xF19E
+ ENTITY = 0xF19F
+
+class TRANSMISSION_MODE_TYPE(IntEnum):
+ SEND_AT_SLOW_RATE = 1
+ SEND_AT_MEDIUM_RATE = 2
+ SEND_AT_FAST_RATE = 3
+ STOP_SENDING = 4
+
+class DYNAMIC_DEFINITION_TYPE(IntEnum):
+ DEFINE_BY_IDENTIFIER = 1
+ DEFINE_BY_MEMORY_ADDRESS = 2
+ CLEAR_DYNAMICALLY_DEFINED_DATA_IDENTIFIER = 3
+
+class DynamicSourceDefinition(NamedTuple):
+ data_identifier: int
+ position: int
+ memory_size: int
+ memory_address: int
+
+class DTC_GROUP_TYPE(IntEnum):
+ EMISSIONS = 0x000000
+ ALL = 0xFFFFFF
+
+class DTC_REPORT_TYPE(IntEnum):
+ NUMBER_OF_DTC_BY_STATUS_MASK = 0x01
+ DTC_BY_STATUS_MASK = 0x02
+ DTC_SNAPSHOT_IDENTIFICATION = 0x03
+ DTC_SNAPSHOT_RECORD_BY_DTC_NUMBER = 0x04
+ DTC_SNAPSHOT_RECORD_BY_RECORD_NUMBER = 0x05
+ DTC_EXTENDED_DATA_RECORD_BY_DTC_NUMBER = 0x06
+ NUMBER_OF_DTC_BY_SEVERITY_MASK_RECORD = 0x07
+ DTC_BY_SEVERITY_MASK_RECORD = 0x08
+ SEVERITY_INFORMATION_OF_DTC = 0x09
+ SUPPORTED_DTC = 0x0A
+ FIRST_TEST_FAILED_DTC = 0x0B
+ FIRST_CONFIRMED_DTC = 0x0C
+ MOST_RECENT_TEST_FAILED_DTC = 0x0D
+ MOST_RECENT_CONFIRMED_DTC = 0x0E
+ MIRROR_MEMORY_DTC_BY_STATUS_MASK = 0x0F
+ MIRROR_MEMORY_DTC_EXTENDED_DATA_RECORD_BY_DTC_NUMBER = 0x10
+ NUMBER_OF_MIRROR_MEMORY_DTC_BY_STATUS_MASK = 0x11
+ NUMBER_OF_EMISSIONS_RELATED_OBD_DTC_BY_STATUS_MASK = 0x12
+ EMISSIONS_RELATED_OBD_DTC_BY_STATUS_MASK = 0x13
+ DTC_FAULT_DETECTION_COUNTER = 0x14
+ DTC_WITH_PERMANENT_STATUS = 0x15
+
+class DTC_STATUS_MASK_TYPE(IntEnum):
+ TEST_FAILED = 0x01
+ TEST_FAILED_THIS_OPERATION_CYCLE = 0x02
+ PENDING_DTC = 0x04
+ CONFIRMED_DTC = 0x08
+ TEST_NOT_COMPLETED_SINCE_LAST_CLEAR = 0x10
+ TEST_FAILED_SINCE_LAST_CLEAR = 0x20
+ TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE = 0x40
+ WARNING_INDICATOR_REQUESTED = 0x80
+ ALL = 0xFF
+
+class DTC_SEVERITY_MASK_TYPE(IntEnum):
+ MAINTENANCE_ONLY = 0x20
+ CHECK_AT_NEXT_HALT = 0x40
+ CHECK_IMMEDIATELY = 0x80
+ ALL = 0xE0
+
+class CONTROL_PARAMETER_TYPE(IntEnum):
+ RETURN_CONTROL_TO_ECU = 0
+ RESET_TO_DEFAULT = 1
+ FREEZE_CURRENT_STATE = 2
+ SHORT_TERM_ADJUSTMENT = 3
+
+class ROUTINE_CONTROL_TYPE(IntEnum):
+ START = 1
+ STOP = 2
+ REQUEST_RESULTS = 3
+
+class ROUTINE_IDENTIFIER_TYPE(IntEnum):
+ ERASE_MEMORY = 0xFF00
+ CHECK_PROGRAMMING_DEPENDENCIES = 0xFF01
+ ERASE_MIRROR_MEMORY_DTCS = 0xFF02
+
+class MessageTimeoutError(Exception):
+ pass
+
+class NegativeResponseError(Exception):
+ def __init__(self, message, service_id, error_code):
+ self.message = message
+ self.service_id = service_id
+ self.error_code = error_code
+
+ def __str__(self):
+ return self.message
+
+class InvalidServiceIdError(Exception):
+ pass
+
+class InvalidSubFunctioneError(Exception):
+ pass
+
+_negative_response_codes = {
+ 0x00: 'positive response',
+ 0x10: 'general reject',
+ 0x11: 'service not supported',
+ 0x12: 'sub-function not supported',
+ 0x13: 'incorrect message length or invalid format',
+ 0x14: 'response too long',
+ 0x21: 'busy repeat request',
+ 0x22: 'conditions not correct',
+ 0x24: 'request sequence error',
+ 0x25: 'no response from subnet component',
+ 0x26: 'failure prevents execution of requested action',
+ 0x31: 'request out of range',
+ 0x33: 'security access denied',
+ 0x35: 'invalid key',
+ 0x36: 'exceed numebr of attempts',
+ 0x37: 'required time delay not expired',
+ 0x70: 'upload download not accepted',
+ 0x71: 'transfer data suspended',
+ 0x72: 'general programming failure',
+ 0x73: 'wrong block sequence counter',
+ 0x78: 'request correctly received - response pending',
+ 0x7e: 'sub-function not supported in active session',
+ 0x7f: 'service not supported in active session',
+ 0x81: 'rpm too high',
+ 0x82: 'rpm too low',
+ 0x83: 'engine is running',
+ 0x84: 'engine is not running',
+ 0x85: 'engine run time too low',
+ 0x86: 'temperature too high',
+ 0x87: 'temperature too low',
+ 0x88: 'vehicle speed too high',
+ 0x89: 'vehicle speed too low',
+ 0x8a: 'throttle/pedal too high',
+ 0x8b: 'throttle/pedal too low',
+ 0x8c: 'transmission not in neutral',
+ 0x8d: 'transmission not in gear',
+ 0x8f: 'brake switch(es) not closed',
+ 0x90: 'shifter lever not in park',
+ 0x91: 'torque converter clutch locked',
+ 0x92: 'voltage too high',
+ 0x93: 'voltage too low',
+}
+
+class IsoTpMessage():
+ def __init__(self, can_tx_queue: Queue, can_rx_queue: Queue, timeout: float, debug: bool=False):
+ self.can_tx_queue = can_tx_queue
+ self.can_rx_queue = can_rx_queue
+ self.timeout = timeout
+ self.debug = debug
+
+ def send(self, dat: bytes) -> None:
+ self.tx_dat = dat
+ self.tx_len = len(dat)
+ self.tx_idx = 0
+ self.tx_done = False
+
+ if self.debug: print(f"ISO-TP: REQUEST - {hexlify(self.tx_dat)}")
+ self._tx_first_frame()
+
+ def _tx_first_frame(self) -> None:
+ if self.tx_len < 8:
+ # single frame (send all bytes)
+ if self.debug: print("ISO-TP: TX - single frame")
+ msg = (bytes([self.tx_len]) + self.tx_dat).ljust(8, b"\x00")
+ self.tx_done = True
+ else:
+ # first frame (send first 6 bytes)
+ if self.debug: print("ISO-TP: TX - first frame")
+ msg = (struct.pack("!H", 0x1000 | self.tx_len) + self.tx_dat[:6]).ljust(8, b"\x00")
+ self.can_tx_queue.put(msg)
+
+ def recv(self) -> bytes:
+ self.rx_dat = b""
+ self.rx_len = 0
+ self.rx_idx = 0
+ self.rx_done = False
+
+ try:
+ while True:
+ self._isotp_rx_next()
+ if self.tx_done and self.rx_done:
+ return self.rx_dat
+ except Empty:
+ raise MessageTimeoutError("timeout waiting for response")
+ finally:
+ if self.debug: print(f"ISO-TP: RESPONSE - {hexlify(self.rx_dat)}")
+
+ def _isotp_rx_next(self) -> None:
+ rx_data = self.can_rx_queue.get(block=True, timeout=self.timeout)
+
+ # single rx_frame
+ if rx_data[0] >> 4 == 0x0:
+ self.rx_len = rx_data[0] & 0xFF
+ self.rx_dat = rx_data[1:1+self.rx_len]
+ self.rx_idx = 0
+ self.rx_done = True
+ if self.debug: print(f"ISO-TP: RX - single frame - idx={self.rx_idx} done={self.rx_done}")
+ return
+
+ # first rx_frame
+ if rx_data[0] >> 4 == 0x1:
+ self.rx_len = ((rx_data[0] & 0x0F) << 8) + rx_data[1]
+ self.rx_dat = rx_data[2:]
+ self.rx_idx = 0
+ self.rx_done = False
+ if self.debug: print(f"ISO-TP: RX - first frame - idx={self.rx_idx} done={self.rx_done}")
+ if self.debug: print(f"ISO-TP: TX - flow control continue")
+ # send flow control message (send all bytes)
+ msg = b"\x30\x00\x00".ljust(8, b"\x00")
+ self.can_tx_queue.put(msg)
+ return
+
+ # consecutive rx frame
+ if rx_data[0] >> 4 == 0x2:
+ assert self.rx_done == False, "isotp - rx: consecutive frame with no active frame"
+ self.rx_idx += 1
+ assert self.rx_idx & 0xF == rx_data[0] & 0xF, "isotp - rx: invalid consecutive frame index"
+ rx_size = self.rx_len - len(self.rx_dat)
+ self.rx_dat += rx_data[1:1+min(rx_size, 7)]
+ if self.rx_len == len(self.rx_dat):
+ self.rx_done = True
+ if self.debug: print(f"ISO-TP: RX - consecutive frame - idx={self.rx_idx} done={self.rx_done}")
+ return
+
+ # flow control
+ if rx_data[0] >> 4 == 0x3:
+ assert self.tx_done == False, "isotp - rx: flow control with no active frame"
+ assert rx_data[0] != 0x32, "isotp - rx: flow-control overflow/abort"
+ assert rx_data[0] == 0x30 or rx_data[0] == 0x31, "isotp - rx: flow-control transfer state indicator invalid"
+ if rx_data[0] == 0x30:
+ if self.debug: print("ISO-TP: RX - flow control continue")
+ delay_ts = rx_data[2] & 0x7F
+ # scale is 1 milliseconds if first bit == 0, 100 micro seconds if first bit == 1
+ delay_div = 1000. if rx_data[2] & 0x80 == 0 else 10000.
+ # first frame = 6 bytes, each consecutive frame = 7 bytes
+ start = 6 + self.tx_idx * 7
+ count = rx_data[1]
+ end = start + count * 7 if count > 0 else self.tx_len
+ for i in range(start, end, 7):
+ if delay_ts > 0 and i > start:
+ delay_s = delay_ts / delay_div
+ if self.debug: print(f"ISO-TP: TX - delay - seconds={delay_s}")
+ time.sleep(delay_s)
+ self.tx_idx += 1
+ # consecutive tx frames
+ msg = (bytes([0x20 | (self.tx_idx & 0xF)]) + self.tx_dat[i:i+7]).ljust(8, b"\x00")
+ self.can_tx_queue.put(msg)
+ if end >= self.tx_len:
+ self.tx_done = True
+ if self.debug: print(f"ISO-TP: TX - consecutive frame - idx={self.tx_idx} done={self.tx_done}")
+ elif rx_data[0] == 0x31:
+ # wait (do nothing until next flow control message)
+ if self.debug: print("ISO-TP: TX - flow control wait")
+
+class UdsClient():
+ def __init__(self, panda, tx_addr: int, rx_addr: int=None, bus: int=0, timeout: float=10, debug: bool=False):
+ self.panda = panda
+ self.bus = bus
+ self.tx_addr = tx_addr
+ if rx_addr == None:
+ if tx_addr < 0xFFF8:
+ # standard 11 bit response addr (add 8)
+ self.rx_addr = tx_addr+8
+ elif tx_addr > 0x10000000 and tx_addr < 0xFFFFFFFF:
+ # standard 29 bit response addr (flip last two bytes)
+ self.rx_addr = (tx_addr & 0xFFFF0000) + (tx_addr<<8 & 0xFF00) + (tx_addr>>8 & 0xFF)
+ else:
+ raise ValueError("invalid tx_addr: {}".format(tx_addr))
+
+ self.can_tx_queue = Queue()
+ self.can_rx_queue = Queue()
+ self.timeout = timeout
+ self.debug = debug
+
+ self.can_thread = Thread(target=self._can_thread, args=(self.debug,))
+ self.can_thread.daemon = True
+ self.can_thread.start()
+
+ def _can_thread(self, debug: bool=False):
+ try:
+ # allow all output
+ self.panda.set_safety_mode(0x1337)
+ # clear tx buffer
+ self.panda.can_clear(self.bus)
+ # clear rx buffer
+ self.panda.can_clear(0xFFFF)
+
+ while True:
+ # send
+ while not self.can_tx_queue.empty():
+ msg = self.can_tx_queue.get(block=False)
+ if debug: print("CAN-TX: {} - {}".format(hex(self.tx_addr), hexlify(msg)))
+ self.panda.can_send(self.tx_addr, msg, self.bus)
+
+ # receive
+ msgs = self.panda.can_recv()
+ for rx_addr, rx_ts, rx_data, rx_bus in msgs:
+ if rx_bus != self.bus or rx_addr != self.rx_addr or len(rx_data) == 0:
+ continue
+ if debug: print("CAN-RX: {} - {}".format(hex(self.rx_addr), hexlify(rx_data)))
+ self.can_rx_queue.put(rx_data)
+ else:
+ time.sleep(0.01)
+ finally:
+ self.panda.close()
+
+ # generic uds request
+ def _uds_request(self, service_type: SERVICE_TYPE, subfunction: int=None, data: bytes=None) -> bytes:
+ req = bytes([service_type])
+ if subfunction is not None:
+ req += bytes([subfunction])
+ if data is not None:
+ req += data
+
+ # send request, wait for response
+ isotp_msg = IsoTpMessage(self.can_tx_queue, self.can_rx_queue, self.timeout, self.debug)
+ isotp_msg.send(req)
+ while True:
+ resp = isotp_msg.recv()
+ resp_sid = resp[0] if len(resp) > 0 else None
+
+ # negative response
+ if resp_sid == 0x7F:
+ service_id = resp[1] if len(resp) > 1 else -1
+ try:
+ service_desc = SERVICE_TYPE(service_id).name
+ except Exception:
+ service_desc = 'NON_STANDARD_SERVICE'
+ error_code = resp[2] if len(resp) > 2 else -1
+ try:
+ error_desc = _negative_response_codes[error_code]
+ except Exception:
+ error_desc = resp[3:]
+ # wait for another message if response pending
+ if error_code == 0x78:
+ if self.debug: print("UDS-RX: response pending")
+ continue
+ raise NegativeResponseError('{} - {}'.format(service_desc, error_desc), service_id, error_code)
+
+ # positive response
+ if service_type+0x40 != resp_sid:
+ resp_sid_hex = hex(resp_sid) if resp_sid is not None else None
+ raise InvalidServiceIdError('invalid response service id: {}'.format(resp_sid_hex))
+
+ if subfunction is not None:
+ resp_sfn = resp[1] if len(resp) > 1 else None
+ if subfunction != resp_sfn:
+ resp_sfn_hex = hex(resp_sfn) if resp_sfn is not None else None
+ raise InvalidSubFunctioneError('invalid response subfunction: {}'.format(hex(resp_sfn_hex)))
+
+ # return data (exclude service id and sub-function id)
+ return resp[(1 if subfunction is None else 2):]
+
+ # services
+ def diagnostic_session_control(self, session_type: SESSION_TYPE):
+ self._uds_request(SERVICE_TYPE.DIAGNOSTIC_SESSION_CONTROL, subfunction=session_type)
+
+ def ecu_reset(self, reset_type: RESET_TYPE):
+ resp = self._uds_request(SERVICE_TYPE.ECU_RESET, subfunction=reset_type)
+ power_down_time = None
+ if reset_type == RESET_TYPE.ENABLE_RAPID_POWER_SHUTDOWN:
+ power_down_time = resp[0]
+ return power_down_time
+
+ def security_access(self, access_type: ACCESS_TYPE, security_key: bytes=None):
+ request_seed = access_type % 2 != 0
+ if request_seed and security_key is not None:
+ raise ValueError('security_key not allowed')
+ if not request_seed and security_key is None:
+ raise ValueError('security_key is missing')
+ resp = self._uds_request(SERVICE_TYPE.SECURITY_ACCESS, subfunction=access_type, data=security_key)
+ if request_seed:
+ security_seed = resp
+ return security_seed
+
+ def communication_control(self, control_type: CONTROL_TYPE, message_type: MESSAGE_TYPE):
+ data = bytes([message_type])
+ self._uds_request(SERVICE_TYPE.COMMUNICATION_CONTROL, subfunction=control_type, data=data)
+
+ def tester_present(self, ):
+ self._uds_request(SERVICE_TYPE.TESTER_PRESENT, subfunction=0x00)
+
+ def access_timing_parameter(self, timing_parameter_type: TIMING_PARAMETER_TYPE, parameter_values: bytes=None):
+ write_custom_values = timing_parameter_type == TIMING_PARAMETER_TYPE.SET_TO_GIVEN_VALUES
+ read_values = (
+ timing_parameter_type == TIMING_PARAMETER_TYPE.READ_CURRENTLY_ACTIVE or
+ timing_parameter_type == TIMING_PARAMETER_TYPE.READ_EXTENDED_SET
+ )
+ if not write_custom_values and parameter_values is not None:
+ raise ValueError('parameter_values not allowed')
+ if write_custom_values and parameter_values is None:
+ raise ValueError('parameter_values is missing')
+ resp = self._uds_request(SERVICE_TYPE.ACCESS_TIMING_PARAMETER, subfunction=timing_parameter_type, data=parameter_values)
+ if read_values:
+ # TODO: parse response into values?
+ parameter_values = resp
+ return parameter_values
+
+ def secured_data_transmission(self, data: bytes):
+ # TODO: split data into multiple input parameters?
+ resp = self._uds_request(SERVICE_TYPE.SECURED_DATA_TRANSMISSION, subfunction=None, data=data)
+ # TODO: parse response into multiple output values?
+ return resp
+
+ def control_dtc_setting(self, dtc_setting_type: DTC_SETTING_TYPE):
+ self._uds_request(SERVICE_TYPE.CONTROL_DTC_SETTING, subfunction=dtc_setting_type)
+
+ def response_on_event(self, response_event_type: RESPONSE_EVENT_TYPE, store_event: bool, window_time: int, event_type_record: int, service_response_record: int):
+ if store_event:
+ response_event_type |= 0x20
+ # TODO: split record parameters into arrays
+ data = bytes([window_time, event_type_record, service_response_record])
+ resp = self._uds_request(SERVICE_TYPE.RESPONSE_ON_EVENT, subfunction=response_event_type, data=data)
+
+ if response_event_type == RESPONSE_EVENT_TYPE.REPORT_ACTIVATED_EVENTS:
+ return {
+ "num_of_activated_events": resp[0],
+ "data": resp[1:], # TODO: parse the reset of response
+ }
+
+ return {
+ "num_of_identified_events": resp[0],
+ "event_window_time": resp[1],
+ "data": resp[2:], # TODO: parse the reset of response
+ }
+
+ def link_control(self, link_control_type: LINK_CONTROL_TYPE, baud_rate_type: BAUD_RATE_TYPE=None):
+ if link_control_type == LINK_CONTROL_TYPE.VERIFY_BAUDRATE_TRANSITION_WITH_FIXED_BAUDRATE:
+ # baud_rate_type = BAUD_RATE_TYPE
+ data = bytes([baud_rate_type])
+ elif link_control_type == LINK_CONTROL_TYPE.VERIFY_BAUDRATE_TRANSITION_WITH_SPECIFIC_BAUDRATE:
+ # baud_rate_type = custom value (3 bytes big-endian)
+ data = struct.pack('!I', baud_rate_type)[1:]
+ else:
+ data = None
+ self._uds_request(SERVICE_TYPE.LINK_CONTROL, subfunction=link_control_type, data=data)
+
+ def read_data_by_identifier(self, data_identifier_type: DATA_IDENTIFIER_TYPE):
+ # TODO: support list of identifiers
+ data = struct.pack('!H', data_identifier_type)
+ resp = self._uds_request(SERVICE_TYPE.READ_DATA_BY_IDENTIFIER, subfunction=None, data=data)
+ resp_id = struct.unpack('!H', resp[0:2])[0] if len(resp) >= 2 else None
+ if resp_id != data_identifier_type:
+ raise ValueError('invalid response data identifier: {}'.format(hex(resp_id)))
+ return resp[2:]
+
+ def read_memory_by_address(self, memory_address: int, memory_size: int, memory_address_bytes: int=4, memory_size_bytes: int=1):
+ if memory_address_bytes < 1 or memory_address_bytes > 4:
+ raise ValueError('invalid memory_address_bytes: {}'.format(memory_address_bytes))
+ if memory_size_bytes < 1 or memory_size_bytes > 4:
+ raise ValueError('invalid memory_size_bytes: {}'.format(memory_size_bytes))
+ data = bytes([memory_size_bytes<<4 | memory_address_bytes])
+
+ if memory_address >= 1<<(memory_address_bytes*8):
+ raise ValueError('invalid memory_address: {}'.format(memory_address))
+ data += struct.pack('!I', memory_address)[4-memory_address_bytes:]
+ if memory_size >= 1<<(memory_size_bytes*8):
+ raise ValueError('invalid memory_size: {}'.format(memory_size))
+ data += struct.pack('!I', memory_size)[4-memory_size_bytes:]
+
+ resp = self._uds_request(SERVICE_TYPE.READ_MEMORY_BY_ADDRESS, subfunction=None, data=data)
+ return resp
+
+ def read_scaling_data_by_identifier(self, data_identifier_type: DATA_IDENTIFIER_TYPE):
+ data = struct.pack('!H', data_identifier_type)
+ resp = self._uds_request(SERVICE_TYPE.READ_SCALING_DATA_BY_IDENTIFIER, subfunction=None, data=data)
+ resp_id = struct.unpack('!H', resp[0:2])[0] if len(resp) >= 2 else None
+ if resp_id != data_identifier_type:
+ raise ValueError('invalid response data identifier: {}'.format(hex(resp_id)))
+ return resp[2:] # TODO: parse the response
+
+ def read_data_by_periodic_identifier(self, transmission_mode_type: TRANSMISSION_MODE_TYPE, periodic_data_identifier: int):
+ # TODO: support list of identifiers
+ data = bytes([transmission_mode_type, periodic_data_identifier])
+ self._uds_request(SERVICE_TYPE.READ_DATA_BY_PERIODIC_IDENTIFIER, subfunction=None, data=data)
+
+ def dynamically_define_data_identifier(self, dynamic_definition_type: DYNAMIC_DEFINITION_TYPE, dynamic_data_identifier: int, source_definitions: List[DynamicSourceDefinition], memory_address_bytes: int=4, memory_size_bytes: int=1):
+ if memory_address_bytes < 1 or memory_address_bytes > 4:
+ raise ValueError('invalid memory_address_bytes: {}'.format(memory_address_bytes))
+ if memory_size_bytes < 1 or memory_size_bytes > 4:
+ raise ValueError('invalid memory_size_bytes: {}'.format(memory_size_bytes))
+
+ data = struct.pack('!H', dynamic_data_identifier)
+ if dynamic_definition_type == DYNAMIC_DEFINITION_TYPE.DEFINE_BY_IDENTIFIER:
+ for s in source_definitions:
+ data += struct.pack('!H', s["data_identifier"]) + bytes([s["position"], s["memory_size"]])
+ elif dynamic_definition_type == DYNAMIC_DEFINITION_TYPE.DEFINE_BY_MEMORY_ADDRESS:
+ data += bytes([memory_size_bytes<<4 | memory_address_bytes])
+ for s in source_definitions:
+ if s["memory_address"] >= 1<<(memory_address_bytes*8):
+ raise ValueError('invalid memory_address: {}'.format(s["memory_address"]))
+ data += struct.pack('!I', s["memory_address"])[4-memory_address_bytes:]
+ if s["memory_size"] >= 1<<(memory_size_bytes*8):
+ raise ValueError('invalid memory_size: {}'.format(s["memory_size"]))
+ data += struct.pack('!I', s["memory_size"])[4-memory_size_bytes:]
+ elif dynamic_definition_type == DYNAMIC_DEFINITION_TYPE.CLEAR_DYNAMICALLY_DEFINED_DATA_IDENTIFIER:
+ pass
+ else:
+ raise ValueError('invalid dynamic identifier type: {}'.format(hex(dynamic_definition_type)))
+ self._uds_request(SERVICE_TYPE.DYNAMICALLY_DEFINE_DATA_IDENTIFIER, subfunction=dynamic_definition_type, data=data)
+
+ def write_data_by_identifier(self, data_identifier_type: DATA_IDENTIFIER_TYPE, data_record: bytes):
+ data = struct.pack('!H', data_identifier_type) + data_record
+ resp = self._uds_request(SERVICE_TYPE.WRITE_DATA_BY_IDENTIFIER, subfunction=None, data=data)
+ resp_id = struct.unpack('!H', resp[0:2])[0] if len(resp) >= 2 else None
+ if resp_id != data_identifier_type:
+ raise ValueError('invalid response data identifier: {}'.format(hex(resp_id)))
+
+ def write_memory_by_address(self, memory_address: int, memory_size: int, data_record: bytes, memory_address_bytes: int=4, memory_size_bytes: int=1):
+ if memory_address_bytes < 1 or memory_address_bytes > 4:
+ raise ValueError('invalid memory_address_bytes: {}'.format(memory_address_bytes))
+ if memory_size_bytes < 1 or memory_size_bytes > 4:
+ raise ValueError('invalid memory_size_bytes: {}'.format(memory_size_bytes))
+ data = bytes([memory_size_bytes<<4 | memory_address_bytes])
+
+ if memory_address >= 1<<(memory_address_bytes*8):
+ raise ValueError('invalid memory_address: {}'.format(memory_address))
+ data += struct.pack('!I', memory_address)[4-memory_address_bytes:]
+ if memory_size >= 1<<(memory_size_bytes*8):
+ raise ValueError('invalid memory_size: {}'.format(memory_size))
+ data += struct.pack('!I', memory_size)[4-memory_size_bytes:]
+
+ data += data_record
+ self._uds_request(SERVICE_TYPE.WRITE_MEMORY_BY_ADDRESS, subfunction=0x00, data=data)
+
+ def clear_diagnostic_information(self, dtc_group_type: DTC_GROUP_TYPE):
+ data = struct.pack('!I', dtc_group_type)[1:] # 3 bytes
+ self._uds_request(SERVICE_TYPE.CLEAR_DIAGNOSTIC_INFORMATION, subfunction=None, data=data)
+
+ def read_dtc_information(self, dtc_report_type: DTC_REPORT_TYPE, dtc_status_mask_type: DTC_STATUS_MASK_TYPE=DTC_STATUS_MASK_TYPE.ALL, dtc_severity_mask_type: DTC_SEVERITY_MASK_TYPE=DTC_SEVERITY_MASK_TYPE.ALL, dtc_mask_record: int=0xFFFFFF, dtc_snapshot_record_num: int=0xFF, dtc_extended_record_num: int=0xFF):
+ data = b''
+ # dtc_status_mask_type
+ if dtc_report_type == DTC_REPORT_TYPE.NUMBER_OF_DTC_BY_STATUS_MASK or \
+ dtc_report_type == DTC_REPORT_TYPE.DTC_BY_STATUS_MASK or \
+ dtc_report_type == DTC_REPORT_TYPE.MIRROR_MEMORY_DTC_BY_STATUS_MASK or \
+ dtc_report_type == DTC_REPORT_TYPE.NUMBER_OF_MIRROR_MEMORY_DTC_BY_STATUS_MASK or \
+ dtc_report_type == DTC_REPORT_TYPE.NUMBER_OF_EMISSIONS_RELATED_OBD_DTC_BY_STATUS_MASK or \
+ dtc_report_type == DTC_REPORT_TYPE.EMISSIONS_RELATED_OBD_DTC_BY_STATUS_MASK:
+ data += bytes([dtc_status_mask_type])
+ # dtc_mask_record
+ if dtc_report_type == DTC_REPORT_TYPE.DTC_SNAPSHOT_IDENTIFICATION or \
+ dtc_report_type == DTC_REPORT_TYPE.DTC_SNAPSHOT_RECORD_BY_DTC_NUMBER or \
+ dtc_report_type == DTC_REPORT_TYPE.DTC_EXTENDED_DATA_RECORD_BY_DTC_NUMBER or \
+ dtc_report_type == DTC_REPORT_TYPE.MIRROR_MEMORY_DTC_EXTENDED_DATA_RECORD_BY_DTC_NUMBER or \
+ dtc_report_type == DTC_REPORT_TYPE.SEVERITY_INFORMATION_OF_DTC:
+ data += struct.pack('!I', dtc_mask_record)[1:] # 3 bytes
+ # dtc_snapshot_record_num
+ if dtc_report_type == DTC_REPORT_TYPE.DTC_SNAPSHOT_IDENTIFICATION or \
+ dtc_report_type == DTC_REPORT_TYPE.DTC_SNAPSHOT_RECORD_BY_DTC_NUMBER or \
+ dtc_report_type == DTC_REPORT_TYPE.DTC_SNAPSHOT_RECORD_BY_RECORD_NUMBER:
+ data += ord(dtc_snapshot_record_num)
+ # dtc_extended_record_num
+ if dtc_report_type == DTC_REPORT_TYPE.DTC_EXTENDED_DATA_RECORD_BY_DTC_NUMBER or \
+ dtc_report_type == DTC_REPORT_TYPE.MIRROR_MEMORY_DTC_EXTENDED_DATA_RECORD_BY_DTC_NUMBER:
+ data += bytes([dtc_extended_record_num])
+ # dtc_severity_mask_type
+ if dtc_report_type == DTC_REPORT_TYPE.NUMBER_OF_DTC_BY_SEVERITY_MASK_RECORD or \
+ dtc_report_type == DTC_REPORT_TYPE.DTC_BY_SEVERITY_MASK_RECORD:
+ data += bytes([dtc_severity_mask_type, dtc_status_mask_type])
+
+ resp = self._uds_request(SERVICE_TYPE.READ_DTC_INFORMATION, subfunction=dtc_report_type, data=data)
+
+ # TODO: parse response
+ return resp
+
+ def input_output_control_by_identifier(self, data_identifier_type: DATA_IDENTIFIER_TYPE, control_parameter_type: CONTROL_PARAMETER_TYPE, control_option_record: bytes, control_enable_mask_record: bytes=b''):
+ data = struct.pack('!H', data_identifier_type) + bytes([control_parameter_type]) + control_option_record + control_enable_mask_record
+ resp = self._uds_request(SERVICE_TYPE.INPUT_OUTPUT_CONTROL_BY_IDENTIFIER, subfunction=None, data=data)
+ resp_id = struct.unpack('!H', resp[0:2])[0] if len(resp) >= 2 else None
+ if resp_id != data_identifier_type:
+ raise ValueError('invalid response data identifier: {}'.format(hex(resp_id)))
+ return resp[2:]
+
+ def routine_control(self, routine_control_type: ROUTINE_CONTROL_TYPE, routine_identifier_type: ROUTINE_IDENTIFIER_TYPE, routine_option_record: bytes=b''):
+ data = struct.pack('!H', routine_identifier_type) + routine_option_record
+ resp = self._uds_request(SERVICE_TYPE.ROUTINE_CONTROL, subfunction=routine_control_type, data=data)
+ resp_id = struct.unpack('!H', resp[0:2])[0] if len(resp) >= 2 else None
+ if resp_id != routine_identifier_type:
+ raise ValueError('invalid response routine identifier: {}'.format(hex(resp_id)))
+ return resp[2:]
+
+ def request_download(self, memory_address: int, memory_size: int, memory_address_bytes: int=4, memory_size_bytes: int=4, data_format: int=0x00):
+ data = bytes([data_format])
+
+ if memory_address_bytes < 1 or memory_address_bytes > 4:
+ raise ValueError('invalid memory_address_bytes: {}'.format(memory_address_bytes))
+ if memory_size_bytes < 1 or memory_size_bytes > 4:
+ raise ValueError('invalid memory_size_bytes: {}'.format(memory_size_bytes))
+ data += bytes([memory_size_bytes<<4 | memory_address_bytes])
+
+ if memory_address >= 1<<(memory_address_bytes*8):
+ raise ValueError('invalid memory_address: {}'.format(memory_address))
+ data += struct.pack('!I', memory_address)[4-memory_address_bytes:]
+ if memory_size >= 1<<(memory_size_bytes*8):
+ raise ValueError('invalid memory_size: {}'.format(memory_size))
+ data += struct.pack('!I', memory_size)[4-memory_size_bytes:]
+
+ resp = self._uds_request(SERVICE_TYPE.REQUEST_DOWNLOAD, subfunction=None, data=data)
+ max_num_bytes_len = resp[0] >> 4 if len(resp) > 0 else None
+ if max_num_bytes_len >= 1 and max_num_bytes_len <= 4:
+ max_num_bytes = struct.unpack('!I', (b"\x00"*(4-max_num_bytes_len))+resp[1:max_num_bytes_len+1])[0]
+ else:
+ raise ValueError('invalid max_num_bytes_len: {}'.format(max_num_bytes_len))
+
+ return max_num_bytes # max number of bytes per transfer data request
+
+ def request_upload(self, memory_address: int, memory_size: int, memory_address_bytes: int=4, memory_size_bytes: int=4, data_format: int=0x00):
+ data = bytes([data_format])
+
+ if memory_address_bytes < 1 or memory_address_bytes > 4:
+ raise ValueError('invalid memory_address_bytes: {}'.format(memory_address_bytes))
+ if memory_size_bytes < 1 or memory_size_bytes > 4:
+ raise ValueError('invalid memory_size_bytes: {}'.format(memory_size_bytes))
+ data += bytes([memory_size_bytes<<4 | memory_address_bytes])
+
+ if memory_address >= 1<<(memory_address_bytes*8):
+ raise ValueError('invalid memory_address: {}'.format(memory_address))
+ data += struct.pack('!I', memory_address)[4-memory_address_bytes:]
+ if memory_size >= 1<<(memory_size_bytes*8):
+ raise ValueError('invalid memory_size: {}'.format(memory_size))
+ data += struct.pack('!I', memory_size)[4-memory_size_bytes:]
+
+ resp = self._uds_request(SERVICE_TYPE.REQUEST_UPLOAD, subfunction=None, data=data)
+ max_num_bytes_len = resp[0] >> 4 if len(resp) > 0 else None
+ if max_num_bytes_len >= 1 and max_num_bytes_len <= 4:
+ max_num_bytes = struct.unpack('!I', (b"\x00"*(4-max_num_bytes_len))+resp[1:max_num_bytes_len+1])[0]
+ else:
+ raise ValueError('invalid max_num_bytes_len: {}'.format(max_num_bytes_len))
+
+ return max_num_bytes # max number of bytes per transfer data request
+
+ def transfer_data(self, block_sequence_count: int, data: bytes=b''):
+ data = bytes([block_sequence_count]) + data
+ resp = self._uds_request(SERVICE_TYPE.TRANSFER_DATA, subfunction=None, data=data)
+ resp_id = resp[0] if len(resp) > 0 else None
+ if resp_id != block_sequence_count:
+ raise ValueError('invalid block_sequence_count: {}'.format(resp_id))
+ return resp[1:]
+
+ def request_transfer_exit(self):
+ self._uds_request(SERVICE_TYPE.REQUEST_TRANSFER_EXIT, subfunction=None)
diff --git a/panda/python/update.py b/panda/python/update.py
index d72de11645f0c6..7d8d2c04023b8e 100755
--- a/panda/python/update.py
+++ b/panda/python/update.py
@@ -12,7 +12,6 @@ def ensure_st_up_to_date():
panda = None
panda_dfu = None
- should_flash_recover = False
while 1:
# break on normal mode Panda
diff --git a/panda/requirements.txt b/panda/requirements.txt
index ad6b4c76e054f3..e7cf9931d550e7 100644
--- a/panda/requirements.txt
+++ b/panda/requirements.txt
@@ -1,7 +1,11 @@
libusb1 == 1.6.6
-hexdump
-pycrypto
-tqdm
+numpy==1.17.2
+hexdump>=3.3
+pycrypto==2.6.1
+tqdm>=4.14.0
nose
parameterized
requests
+flake8==3.7.8
+pylint==2.4.2
+cffi==1.11.4
diff --git a/panda/setup.py b/panda/setup.py
index 2acd9b9e1654df..f34905d7a2ee17 100644
--- a/panda/setup.py
+++ b/panda/setup.py
@@ -13,7 +13,7 @@
import codecs
import os
import re
-from setuptools import setup, Extension
+from setuptools import setup
here = os.path.abspath(os.path.dirname(__file__))
diff --git a/panda/tests/automated/0_builds.py b/panda/tests/automated/0_builds.py
index df4186cce4e6f6..fa3a1125d48244 100644
--- a/panda/tests/automated/0_builds.py
+++ b/panda/tests/automated/0_builds.py
@@ -1,4 +1,3 @@
-import os
from panda import build_st
def test_build_panda():
diff --git a/panda/tests/automated/1_program.py b/panda/tests/automated/1_program.py
index 944db18d9aaed6..538f18c0c7f63a 100644
--- a/panda/tests/automated/1_program.py
+++ b/panda/tests/automated/1_program.py
@@ -1,6 +1,4 @@
-import os
-from panda import Panda
-from .helpers import panda_type_to_serial, test_white_and_grey, test_all_pandas, panda_connect_and_init
+from .helpers import test_all_pandas, panda_connect_and_init
@test_all_pandas
@panda_connect_and_init
diff --git a/panda/tests/automated/2_usb_to_can.py b/panda/tests/automated/2_usb_to_can.py
index 645f686e155914..32ef558cfc409a 100644
--- a/panda/tests/automated/2_usb_to_can.py
+++ b/panda/tests/automated/2_usb_to_can.py
@@ -1,5 +1,3 @@
-
-import os
import sys
import time
from panda import Panda
@@ -180,6 +178,6 @@ def test_gmlan_bad_toggle(p):
@test_all_pandas
@panda_connect_and_init
def test_serial_debug(p):
- junk = p.serial_read(Panda.SERIAL_DEBUG)
+ _ = p.serial_read(Panda.SERIAL_DEBUG) # junk
p.call_control_api(0xc0)
assert(p.serial_read(Panda.SERIAL_DEBUG).startswith(b"can "))
diff --git a/panda/tests/automated/3_wifi.py b/panda/tests/automated/3_wifi.py
index f57dbbd0210c69..df66d6c0f37d2f 100644
--- a/panda/tests/automated/3_wifi.py
+++ b/panda/tests/automated/3_wifi.py
@@ -1,5 +1,3 @@
-
-import os
import time
from panda import Panda
from .helpers import connect_wifi, test_white, test_all_pandas, panda_type_to_serial, panda_connect_and_init
diff --git a/panda/tests/automated/4_wifi_functionality.py b/panda/tests/automated/4_wifi_functionality.py
index 67cce4bf9c37a6..ee349ddcbf69b8 100644
--- a/panda/tests/automated/4_wifi_functionality.py
+++ b/panda/tests/automated/4_wifi_functionality.py
@@ -1,8 +1,6 @@
-
import time
from panda import Panda
from .helpers import time_many_sends, connect_wifi, test_white, panda_type_to_serial
-from nose.tools import timed, assert_equal, assert_less, assert_greater
@test_white
@panda_type_to_serial
diff --git a/panda/tests/automated/5_wifi_udp.py b/panda/tests/automated/5_wifi_udp.py
index 642d8f02a59961..fd905aa895e4b3 100644
--- a/panda/tests/automated/5_wifi_udp.py
+++ b/panda/tests/automated/5_wifi_udp.py
@@ -3,7 +3,7 @@
import time
from .helpers import time_many_sends, connect_wifi, test_white, panda_type_to_serial
from panda import Panda, PandaWifiStreaming
-from nose.tools import timed, assert_equal, assert_less, assert_greater
+from nose.tools import assert_less, assert_greater
@test_white
@panda_type_to_serial
diff --git a/panda/tests/automated/6_two_panda.py b/panda/tests/automated/6_two_panda.py
index 711b83fddf63e6..f91403545f367a 100644
--- a/panda/tests/automated/6_two_panda.py
+++ b/panda/tests/automated/6_two_panda.py
@@ -171,7 +171,7 @@ def _test_buses(send_panda, recv_panda, _test_array):
time.sleep(0.1)
# check for receive
- cans_echo = send_panda.can_recv()
+ _ = send_panda.can_recv() # cans echo
cans_loop = recv_panda.can_recv()
loop_buses = []
diff --git a/panda/tests/automated/helpers.py b/panda/tests/automated/helpers.py
index f73a17dc043e21..2642e9156ad316 100644
--- a/panda/tests/automated/helpers.py
+++ b/panda/tests/automated/helpers.py
@@ -2,13 +2,12 @@
import sys
import time
import random
-import binascii
import subprocess
import requests
import _thread
from functools import wraps
from panda import Panda
-from nose.tools import timed, assert_equal, assert_less, assert_greater
+from nose.tools import assert_equal
from parameterized import parameterized, param
SPEED_NORMAL = 500
@@ -50,7 +49,7 @@ def connect_wifi(serial=None):
FNULL = open(os.devnull, 'w')
def _connect_wifi(dongle_id, pw, insecure_okay=False):
- ssid = "panda-" + dongle_id.decode("utf8")
+ ssid = "panda-" + dongle_id
r = subprocess.call(["ping", "-W", "4", "-c", "1", "192.168.0.10"], stdout=FNULL, stderr=subprocess.STDOUT)
if not r:
@@ -69,7 +68,7 @@ def _connect_wifi(dongle_id, pw, insecure_okay=False):
if sys.platform == "darwin":
os.system("networksetup -setairportnetwork en0 %s %s" % (ssid, pw))
else:
- wlan_interface = subprocess.check_output(["sh", "-c", "iw dev | awk '/Interface/ {print $2}'"]).strip()
+ wlan_interface = subprocess.check_output(["sh", "-c", "iw dev | awk '/Interface/ {print $2}'"]).strip().decode('utf8')
cnt = 0
MAX_TRIES = 10
while cnt < MAX_TRIES:
@@ -87,13 +86,13 @@ def _connect_wifi(dongle_id, pw, insecure_okay=False):
if "-pair" in wifi_scan[0]:
os.system("nmcli d wifi connect %s-pair" % (ssid))
connect_cnt = 0
- MAX_TRIES = 20
+ MAX_TRIES = 100
while connect_cnt < MAX_TRIES:
connect_cnt += 1
r = subprocess.call(["ping", "-W", "4", "-c", "1", "192.168.0.10"], stdout=FNULL, stderr=subprocess.STDOUT)
if r:
print("Waiting for panda to ping...")
- time.sleep(0.1)
+ time.sleep(0.5)
else:
break
if insecure_okay:
diff --git a/panda/tests/black_loopback_test.py b/panda/tests/black_loopback_test.py
index 0953cba4faba02..5fe0c48077e238 100755
--- a/panda/tests/black_loopback_test.py
+++ b/panda/tests/black_loopback_test.py
@@ -11,9 +11,6 @@
import random
import argparse
-from hexdump import hexdump
-from itertools import permutations
-
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
from panda import Panda
@@ -33,7 +30,7 @@ def run_test(sleep_duration):
pandas[0] = Panda(pandas[0])
pandas[1] = Panda(pandas[1])
- # find out the hardware types
+ # find out the hardware types
if not pandas[0].is_black() or not pandas[1].is_black():
print("Connect two black pandas to run this test!")
assert False
@@ -66,14 +63,14 @@ def run_test(sleep_duration):
test_buses(pandas[0], pandas[1], test_array, sleep_duration)
print("***************** TESTING (1 --> 0) *****************")
test_buses(pandas[1], pandas[0], test_array, sleep_duration)
-
+
def test_buses(send_panda, recv_panda, test_array, sleep_duration):
for send_bus, send_obd, recv_obd, recv_buses in test_array:
send_panda.send_heartbeat()
recv_panda.send_heartbeat()
print("\nSend bus:", send_bus, " Send OBD:", send_obd, " Recv OBD:", recv_obd)
-
+
# set OBD on pandas
send_panda.set_gmlan(True if send_obd else None)
recv_panda.set_gmlan(True if recv_obd else None)
@@ -92,7 +89,7 @@ def test_buses(send_panda, recv_panda, test_array, sleep_duration):
time.sleep(0.1)
# check for receive
- cans_echo = send_panda.can_recv()
+ _ = send_panda.can_recv() # cans echo
cans_loop = recv_panda.can_recv()
loop_buses = []
@@ -101,7 +98,7 @@ def test_buses(send_panda, recv_panda, test_array, sleep_duration):
loop_buses.append(loop[3])
if len(cans_loop) == 0:
print(" No loop")
-
+
# test loop buses
recv_buses.sort()
loop_buses.sort()
diff --git a/panda/tests/black_white_loopback_test.py b/panda/tests/black_white_loopback_test.py
index 7ad2107fa0918f..66c5e80f452ad6 100755
--- a/panda/tests/black_white_loopback_test.py
+++ b/panda/tests/black_white_loopback_test.py
@@ -11,9 +11,6 @@
import random
import argparse
-from hexdump import hexdump
-from itertools import permutations
-
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
from panda import Panda
@@ -118,10 +115,10 @@ def test_buses(black_panda, other_panda, direction, test_array, sleep_duration):
# check for receive
if direction:
- cans_echo = black_panda.can_recv()
+ _ = black_panda.can_recv() # can echo
cans_loop = other_panda.can_recv()
else:
- cans_echo = other_panda.can_recv()
+ _ = other_panda.can_recv() # can echo
cans_loop = black_panda.can_recv()
loop_buses = []
diff --git a/panda/tests/black_white_relay_endurance.py b/panda/tests/black_white_relay_endurance.py
index 3eaaa1655575e1..6970966526c7bc 100755
--- a/panda/tests/black_white_relay_endurance.py
+++ b/panda/tests/black_white_relay_endurance.py
@@ -11,9 +11,6 @@
import random
import argparse
-from hexdump import hexdump
-from itertools import permutations
-
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
from panda import Panda
@@ -42,7 +39,7 @@ def run_test(sleep_duration):
black_panda = None
other_panda = None
-
+
# find out which one is black
if pandas[0].is_black() and not pandas[1].is_black():
black_panda = pandas[0]
@@ -69,7 +66,7 @@ def run_test(sleep_duration):
test_buses(black_panda, other_panda, True, [(0, False, [0]), (1, False, [1]), (2, False, [2]), (1, True, [0])], sleep_duration)
test_buses(black_panda, other_panda, False, [(0, False, [0]), (1, False, [1]), (2, False, [2]), (0, True, [0, 1])], sleep_duration)
counter += 1
-
+
runtime = time.time() - start_time
print("Number of cycles:", counter, "Non-zero bus errors:", nonzero_bus_errors, "Zero bus errors:", zero_bus_errors, "Content errors:", content_errors, "Runtime: ", runtime)
@@ -80,7 +77,7 @@ def run_test(sleep_duration):
black_panda.set_safety_mode(Panda.SAFETY_ALLOUTPUT)
time.sleep(1)
temp_start_time = time.time()
-
+
def test_buses(black_panda, other_panda, direction, test_array, sleep_duration):
global nonzero_bus_errors, zero_bus_errors, content_errors
@@ -94,7 +91,7 @@ def test_buses(black_panda, other_panda, direction, test_array, sleep_duration):
black_panda.send_heartbeat()
other_panda.send_heartbeat()
print("\ntest can: ", send_bus, " OBD: ", obd)
-
+
# set OBD on black panda
black_panda.set_gmlan(True if obd else None)
@@ -109,7 +106,7 @@ def test_buses(black_panda, other_panda, direction, test_array, sleep_duration):
other_panda.can_clear(recv_bus)
else:
black_panda.can_clear(recv_bus)
-
+
black_panda.can_recv()
other_panda.can_recv()
@@ -124,10 +121,10 @@ def test_buses(black_panda, other_panda, direction, test_array, sleep_duration):
# check for receive
if direction:
- cans_echo = black_panda.can_recv()
+ _ = black_panda.can_recv() # cans echo
cans_loop = other_panda.can_recv()
else:
- cans_echo = other_panda.can_recv()
+ _ = other_panda.can_recv() # cans echo
cans_loop = black_panda.can_recv()
loop_buses = []
@@ -141,7 +138,7 @@ def test_buses(black_panda, other_panda, direction, test_array, sleep_duration):
print(" No loop")
if not os.getenv("NOASSERT"):
assert False
-
+
# test loop buses
recv_buses.sort()
loop_buses.sort()
diff --git a/panda/tests/black_white_relay_test.py b/panda/tests/black_white_relay_test.py
index 65877dc29f7058..d80490f7d465da 100755
--- a/panda/tests/black_white_relay_test.py
+++ b/panda/tests/black_white_relay_test.py
@@ -10,9 +10,6 @@
import random
import argparse
-from hexdump import hexdump
-from itertools import permutations
-
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
from panda import Panda
@@ -46,7 +43,7 @@ def run_test(sleep_duration):
black_panda = None
other_panda = None
-
+
if type0 == "\x03" and type1 != "\x03":
black_panda = pandas[0]
other_panda = pandas[1]
@@ -86,15 +83,15 @@ def run_test(sleep_duration):
assert False
counter += 1
- print("Number of cycles:", counter, "Open errors:", open_errors, "Closed errors:", closed_errors, "Content errors:", content_errors)
+ print("Number of cycles:", counter, "Open errors:", open_errors, "Closed errors:", closed_errors, "Content errors:", content_errors)
def test_buses(black_panda, other_panda, test_obj):
global content_errors
send_bus, obd, recv_buses = test_obj
-
+
black_panda.send_heartbeat()
other_panda.send_heartbeat()
-
+
# Set OBD on send panda
other_panda.set_gmlan(True if obd else None)
@@ -103,7 +100,7 @@ def test_buses(black_panda, other_panda, test_obj):
for recv_bus in recv_buses:
black_panda.can_clear(recv_bus)
-
+
black_panda.can_recv()
other_panda.can_recv()
@@ -114,7 +111,7 @@ def test_buses(black_panda, other_panda, test_obj):
time.sleep(0.05)
# check for receive
- cans_echo = other_panda.can_recv()
+ _ = other_panda.can_recv() # can echo
cans_loop = black_panda.can_recv()
loop_buses = []
@@ -122,7 +119,7 @@ def test_buses(black_panda, other_panda, test_obj):
if (loop[0] != at) or (loop[2] != st):
content_errors += 1
loop_buses.append(loop[3])
-
+
# test loop buses
recv_buses.sort()
loop_buses.sort()
diff --git a/panda/tests/elm_car_simulator.py b/panda/tests/elm_car_simulator.py
index ffb309664e4532..01b79c88404e48 100755
--- a/panda/tests/elm_car_simulator.py
+++ b/panda/tests/elm_car_simulator.py
@@ -109,9 +109,9 @@ def _lin_send(self, to_addr, msg):
print(" LIN Reply (%x)" % to_addr, binascii.hexlify(msg))
PHYS_ADDR = 0x80
- FUNC_ADDR = 0xC0
+ #FUNC_ADDR = 0xC0
RECV = 0xF1
- SEND = 0x33 # Car OBD Functional Address
+ #SEND = 0x33 # Car OBD Functional Address
headers = struct.pack("BBB", PHYS_ADDR | len(msg), RECV, to_addr)
if not self.__silent:
print(" Sending LIN", binascii.hexlify(headers+msg),
@@ -172,7 +172,7 @@ def __can_monitor(self):
while not self.__stop:
for address, ts, data, src in self.panda.can_recv():
- if self.__on and src is 0 and len(data) == 8 and data[0] >= 2:
+ if self.__on and src == 0 and len(data) == 8 and data[0] >= 2:
if not self.__silent:
print("Processing CAN message", src, hex(address), binascii.hexlify(data))
self.__can_process_msg(data[1], data[2], address, ts, data, src)
diff --git a/panda/tests/elm_wifi.py b/panda/tests/elm_wifi.py
index 6c4a334b73d152..b0645ea8898d22 100644
--- a/panda/tests/elm_wifi.py
+++ b/panda/tests/elm_wifi.py
@@ -1,16 +1,14 @@
-
import os
import sys
import time
import socket
import select
-import pytest
import struct
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
-from . import elm_car_simulator
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), "..", ".."))
from panda import Panda
+from panda.tests import elm_car_simulator
def elm_connect():
s = socket.create_connection(("192.168.0.10", 35000))
@@ -234,35 +232,35 @@ def test_elm_send_lin_multiline_msg():
send_compare(s, b'0902\r', # headers OFF, Spaces ON
b"BUS INIT: OK\r"
- "49 02 01 00 00 00 31 \r"
- "49 02 02 44 34 47 50 \r"
- "49 02 03 30 30 52 35 \r"
- "49 02 04 35 42 31 32 \r"
- "49 02 05 33 34 35 36 \r\r>")
+ b"49 02 01 00 00 00 31 \r"
+ b"49 02 02 44 34 47 50 \r"
+ b"49 02 03 30 30 52 35 \r"
+ b"49 02 04 35 42 31 32 \r"
+ b"49 02 05 33 34 35 36 \r\r>")
send_compare(s, b'ATS0\r', b'OK\r\r>') # Spaces OFF
send_compare(s, b'0902\r', # Headers OFF, Spaces OFF
b"49020100000031\r"
- "49020244344750\r"
- "49020330305235\r"
- "49020435423132\r"
- "49020533343536\r\r>")
+ b"49020244344750\r"
+ b"49020330305235\r"
+ b"49020435423132\r"
+ b"49020533343536\r\r>")
send_compare(s, b'ATH1\r', b'OK\r\r>') # Headers ON
send_compare(s, b'0902\r', # Headers ON, Spaces OFF
b"87F1104902010000003105\r"
- "87F11049020244344750E4\r"
- "87F11049020330305235BD\r"
- "87F11049020435423132B1\r"
- "87F11049020533343536AA\r\r>")
+ b"87F11049020244344750E4\r"
+ b"87F11049020330305235BD\r"
+ b"87F11049020435423132B1\r"
+ b"87F11049020533343536AA\r\r>")
send_compare(s, b'ATS1\r', b'OK\r\r>') # Spaces ON
send_compare(s, b'0902\r', # Headers ON, Spaces ON
b"87 F1 10 49 02 01 00 00 00 31 05 \r"
- "87 F1 10 49 02 02 44 34 47 50 E4 \r"
- "87 F1 10 49 02 03 30 30 52 35 BD \r"
- "87 F1 10 49 02 04 35 42 31 32 B1 \r"
- "87 F1 10 49 02 05 33 34 35 36 AA \r\r>")
+ b"87 F1 10 49 02 02 44 34 47 50 E4 \r"
+ b"87 F1 10 49 02 03 30 30 52 35 BD \r"
+ b"87 F1 10 49 02 04 35 42 31 32 B1 \r"
+ b"87 F1 10 49 02 05 33 34 35 36 AA \r\r>")
finally:
sim.stop()
sim.join()
@@ -322,7 +320,7 @@ def timed_recv_check(p, bus, goodmsg):
def kline_send(p, x, bus=2):
p.kline_drain(bus=bus)
- p._handle.bulkWrite(2, chr(bus).encode()+x)
+ p._handle.bulkWrite(2, bytes([bus]) + x)
return timed_recv_check(p, bus, x)
def did_send(priority, toaddr, fromaddr, dat, bus=2, checkbyte=None):
@@ -461,7 +459,7 @@ def test_elm_send_can_multimsg():
sim.can_add_extra_noise(b'\x03\x41\x0D\xFA', addr=0x7E9)# Inject message into the stream
send_compare(s, b'010D\r',
b"7E8 03 41 0D 53 \r"
- "7E9 03 41 0D FA \r\r>") # Check it was ignored.
+ b"7E9 03 41 0D FA \r\r>") # Check it was ignored.
finally:
sim.stop()
sim.join()
@@ -503,28 +501,28 @@ def test_elm_send_can_multiline_msg():
send_compare(s, b'0902\r', # headers OFF, Spaces ON
b"014 \r"
- "0: 49 02 01 31 44 34 \r"
- "1: 47 50 30 30 52 35 35 \r"
- "2: 42 31 32 33 34 35 36 \r\r>")
+ b"0: 49 02 01 31 44 34 \r"
+ b"1: 47 50 30 30 52 35 35 \r"
+ b"2: 42 31 32 33 34 35 36 \r\r>")
send_compare(s, b'ATS0\r', b'OK\r\r>') # Spaces OFF
send_compare(s, b'0902\r', # Headers OFF, Spaces OFF
b"014\r"
- "0:490201314434\r"
- "1:47503030523535\r"
- "2:42313233343536\r\r>")
+ b"0:490201314434\r"
+ b"1:47503030523535\r"
+ b"2:42313233343536\r\r>")
send_compare(s, b'ATH1\r', b'OK\r\r>') # Headers ON
send_compare(s, b'0902\r', # Headers ON, Spaces OFF
b"7E81014490201314434\r"
- "7E82147503030523535\r"
- "7E82242313233343536\r\r>")
+ b"7E82147503030523535\r"
+ b"7E82242313233343536\r\r>")
send_compare(s, b'ATS1\r', b'OK\r\r>') # Spaces ON
send_compare(s, b'0902\r', # Headers ON, Spaces ON
b"7E8 10 14 49 02 01 31 44 34 \r"
- "7E8 21 47 50 30 30 52 35 35 \r"
- "7E8 22 42 31 32 33 34 35 36 \r\r>")
+ b"7E8 21 47 50 30 30 52 35 35 \r"
+ b"7E8 22 42 31 32 33 34 35 36 \r\r>")
finally:
sim.stop()
sim.join()
diff --git a/panda/tests/fan_test.py b/panda/tests/fan_test.py
new file mode 100755
index 00000000000000..73856988281b19
--- /dev/null
+++ b/panda/tests/fan_test.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+import os
+import sys
+import time
+
+sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
+from panda import Panda
+
+power = 0
+if __name__ == "__main__":
+ p = Panda()
+ while True:
+ p.set_fan_power(power)
+ time.sleep(5)
+ print("Power: ", power, "RPM: ", str(p.get_fan_rpm()))
+ power += 10
+ power %=100
diff --git a/panda/tests/gmbitbang/recv.py b/panda/tests/gmbitbang/recv.py
index 92111ed7eca369..3949c424d9ef36 100755
--- a/panda/tests/gmbitbang/recv.py
+++ b/panda/tests/gmbitbang/recv.py
@@ -1,17 +1,16 @@
#!/usr/bin/env python3
-import time
from panda import Panda
p = Panda()
p.set_safety_mode(Panda.SAFETY_ALLOUTPUT)
p.set_gmlan(bus=2)
-#p.can_send(0xaaa, "\x00\x00", bus=3)
+#p.can_send(0xaaa, b"\x00\x00", bus=3)
last_add = None
while 1:
ret = p.can_recv()
if len(ret) > 0:
add = ret[0][0]
- if last_add is not None and add != last_add+1:
- print("MISS %d %d" % (last_add, add))
+ if last_add is not None and add != last_add + 1:
+ print("MISS: ", last_add, add)
last_add = add
print(ret)
diff --git a/panda/tests/gmbitbang/rigol.py b/panda/tests/gmbitbang/rigol.py
index f2efb0340ec06e..5fcdf243ecd4d7 100755
--- a/panda/tests/gmbitbang/rigol.py
+++ b/panda/tests/gmbitbang/rigol.py
@@ -1,4 +1,5 @@
#!/usr/bin/env python3
+# pylint: skip-file
import numpy as np
import visa
import matplotlib.pyplot as plt
diff --git a/panda/tests/gps_stability_test.py b/panda/tests/gps_stability_test.py
index c96aaf123b3529..529970e0f4e1fa 100755
--- a/panda/tests/gps_stability_test.py
+++ b/panda/tests/gps_stability_test.py
@@ -77,7 +77,7 @@ def add_nmea_checksum(msg):
# Upping baud rate
print("Upping GPS baud rate")
- msg = add_nmea_checksum("$PUBX,41,1,0007,0003,%d,0" % GPS_BAUD)+"\r\n"
+ msg = str.encode(add_nmea_checksum("$PUBX,41,1,0007,0003,%d,0" % GPS_BAUD)+"\r\n")
ser.write(msg)
time.sleep(1) # needs a wait for it to actually send
@@ -86,24 +86,24 @@ def add_nmea_checksum(msg):
# Sending all config messages boardd sends
print("Sending config")
- ser.write("\xB5\x62\x06\x00\x14\x00\x03\xFF\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x01\x00\x00\x00\x00\x00\x1E\x7F")
- ser.write("\xB5\x62\x06\x3E\x00\x00\x44\xD2")
- ser.write("\xB5\x62\x06\x00\x14\x00\x00\xFF\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x19\x35")
- ser.write("\xB5\x62\x06\x00\x14\x00\x01\x00\x00\x00\xC0\x08\x00\x00\x00\x08\x07\x00\x01\x00\x01\x00\x00\x00\x00\x00\xF4\x80")
- ser.write("\xB5\x62\x06\x00\x14\x00\x04\xFF\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x1D\x85")
- ser.write("\xB5\x62\x06\x00\x00\x00\x06\x18")
- ser.write("\xB5\x62\x06\x00\x01\x00\x01\x08\x22")
- ser.write("\xB5\x62\x06\x00\x01\x00\x02\x09\x23")
- ser.write("\xB5\x62\x06\x00\x01\x00\x03\x0A\x24")
- ser.write("\xB5\x62\x06\x08\x06\x00\x64\x00\x01\x00\x00\x00\x79\x10")
- ser.write("\xB5\x62\x06\x24\x24\x00\x05\x00\x04\x03\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x5A\x63")
- ser.write("\xB5\x62\x06\x1E\x14\x00\x00\x00\x00\x00\x01\x03\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x3C\x37")
- ser.write("\xB5\x62\x06\x24\x00\x00\x2A\x84")
- ser.write("\xB5\x62\x06\x23\x00\x00\x29\x81")
- ser.write("\xB5\x62\x06\x1E\x00\x00\x24\x72")
- ser.write("\xB5\x62\x06\x01\x03\x00\x01\x07\x01\x13\x51")
- ser.write("\xB5\x62\x06\x01\x03\x00\x02\x15\x01\x22\x70")
- ser.write("\xB5\x62\x06\x01\x03\x00\x02\x13\x01\x20\x6C")
+ ser.write(b"\xB5\x62\x06\x00\x14\x00\x03\xFF\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x01\x00\x00\x00\x00\x00\x1E\x7F")
+ ser.write(b"\xB5\x62\x06\x3E\x00\x00\x44\xD2")
+ ser.write(b"\xB5\x62\x06\x00\x14\x00\x00\xFF\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x19\x35")
+ ser.write(b"\xB5\x62\x06\x00\x14\x00\x01\x00\x00\x00\xC0\x08\x00\x00\x00\x08\x07\x00\x01\x00\x01\x00\x00\x00\x00\x00\xF4\x80")
+ ser.write(b"\xB5\x62\x06\x00\x14\x00\x04\xFF\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x1D\x85")
+ ser.write(b"\xB5\x62\x06\x00\x00\x00\x06\x18")
+ ser.write(b"\xB5\x62\x06\x00\x01\x00\x01\x08\x22")
+ ser.write(b"\xB5\x62\x06\x00\x01\x00\x02\x09\x23")
+ ser.write(b"\xB5\x62\x06\x00\x01\x00\x03\x0A\x24")
+ ser.write(b"\xB5\x62\x06\x08\x06\x00\x64\x00\x01\x00\x00\x00\x79\x10")
+ ser.write(b"\xB5\x62\x06\x24\x24\x00\x05\x00\x04\x03\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x5A\x63")
+ ser.write(b"\xB5\x62\x06\x1E\x14\x00\x00\x00\x00\x00\x01\x03\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x3C\x37")
+ ser.write(b"\xB5\x62\x06\x24\x00\x00\x2A\x84")
+ ser.write(b"\xB5\x62\x06\x23\x00\x00\x29\x81")
+ ser.write(b"\xB5\x62\x06\x1E\x00\x00\x24\x72")
+ ser.write(b"\xB5\x62\x06\x01\x03\x00\x01\x07\x01\x13\x51")
+ ser.write(b"\xB5\x62\x06\x01\x03\x00\x02\x15\x01\x22\x70")
+ ser.write(b"\xB5\x62\x06\x01\x03\x00\x02\x13\x01\x20\x6C")
print("Initialized GPS")
@@ -163,7 +163,3 @@ def gps_read_thread(panda):
print("Total max failures: ", max_failures)
received_messages = 0
received_bytes = 0
-
-
-
-
\ No newline at end of file
diff --git a/panda/tests/ir_test.py b/panda/tests/ir_test.py
new file mode 100755
index 00000000000000..caef9e4909d3d9
--- /dev/null
+++ b/panda/tests/ir_test.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+import os
+import sys
+import time
+
+sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
+from panda import Panda
+
+power = 0
+if __name__ == "__main__":
+ p = Panda()
+ while True:
+ p.set_ir_power(power)
+ print("Power: ", str(power))
+ time.sleep(1)
+ power += 10
+ power %=100
diff --git a/panda/tests/language/Dockerfile b/panda/tests/language/Dockerfile
index fe957ff7230722..6a1d8bb7c77ff9 100644
--- a/panda/tests/language/Dockerfile
+++ b/panda/tests/language/Dockerfile
@@ -14,5 +14,4 @@ RUN pyenv install 3.7.3
RUN pyenv global 3.7.3
RUN pyenv rehash
-COPY tests/safety/requirements.txt /panda/tests/safety/requirements.txt
COPY . /panda
diff --git a/panda/tests/language/test_language.py b/panda/tests/language/test_language.py
index 353f37e8546fb8..98b029042551e9 100755
--- a/panda/tests/language/test_language.py
+++ b/panda/tests/language/test_language.py
@@ -20,7 +20,7 @@
res = subprocess.check_output(cmd, shell=True, stderr=subprocess.STDOUT)
print(res)
found_bad_language = True
- except subprocess.CalledProcessError as e:
+ except subprocess.CalledProcessError:
pass
if found_bad_language:
sys.exit("Failed: found bad language")
diff --git a/panda/tests/linter_python/.pylintrc b/panda/tests/linter_python/.pylintrc
new file mode 100644
index 00000000000000..64a55daf8fabb3
--- /dev/null
+++ b/panda/tests/linter_python/.pylintrc
@@ -0,0 +1,585 @@
+[MASTER]
+
+# A comma-separated list of package or module names from where C extensions may
+# be loaded. Extensions are loading into the active Python interpreter and may
+# run arbitrary code
+extension-pkg-whitelist=scipy
+
+# Add files or directories to the blacklist. They should be base names, not
+# paths.
+ignore=CVS
+
+# Add files or directories matching the regex patterns to the blacklist. The
+# regex matches against base names, not paths.
+ignore-patterns=
+
+# Python code to execute, usually for sys.path manipulation such as
+# pygtk.require().
+#init-hook=
+
+# Use multiple processes to speed up Pylint.
+jobs=4
+
+# List of plugins (as comma separated values of python modules names) to load,
+# usually to register additional checkers.
+load-plugins=
+
+# Pickle collected data for later comparisons.
+persistent=yes
+
+# Specify a configuration file.
+#rcfile=
+
+# When enabled, pylint would attempt to guess common misconfiguration and emit
+# user-friendly hints instead of false-positive error messages
+suggestion-mode=yes
+
+# Allow loading of arbitrary C extensions. Extensions are imported into the
+# active Python interpreter and may run arbitrary code.
+unsafe-load-any-extension=no
+
+
+[MESSAGES CONTROL]
+
+# Only show warnings with the listed confidence levels. Leave empty to show
+# all. Valid levels: HIGH, INFERENCE, INFERENCE_FAILURE, UNDEFINED
+confidence=
+
+# Disable the message, report, category or checker with the given id(s). You
+# can either give multiple identifiers separated by comma (,) or put this
+# option multiple times (only on the command line, not in the configuration
+# file where it should appear only once).You can also use "--disable=all" to
+# disable everything first and then reenable specific checks. For example, if
+# you want to run only the similarities checker, you can use "--disable=all
+# --enable=similarities". If you want to run only the classes checker, but have
+# no Warning level messages displayed, use"--disable=all --enable=classes
+# --disable=W"
+disable=print-statement,
+ parameter-unpacking,
+ unpacking-in-except,
+ old-raise-syntax,
+ backtick,
+ long-suffix,
+ old-ne-operator,
+ old-octal-literal,
+ import-star-module-level,
+ non-ascii-bytes-literal,
+ raw-checker-failed,
+ bad-inline-option,
+ locally-disabled,
+ locally-enabled,
+ file-ignored,
+ suppressed-message,
+ useless-suppression,
+ deprecated-pragma,
+ apply-builtin,
+ basestring-builtin,
+ buffer-builtin,
+ cmp-builtin,
+ coerce-builtin,
+ execfile-builtin,
+ file-builtin,
+ long-builtin,
+ raw_input-builtin,
+ reduce-builtin,
+ standarderror-builtin,
+ unicode-builtin,
+ xrange-builtin,
+ coerce-method,
+ delslice-method,
+ getslice-method,
+ setslice-method,
+ no-absolute-import,
+ old-division,
+ dict-iter-method,
+ dict-view-method,
+ next-method-called,
+ metaclass-assignment,
+ indexing-exception,
+ raising-string,
+ reload-builtin,
+ oct-method,
+ hex-method,
+ nonzero-method,
+ cmp-method,
+ input-builtin,
+ round-builtin,
+ intern-builtin,
+ unichr-builtin,
+ map-builtin-not-iterating,
+ zip-builtin-not-iterating,
+ range-builtin-not-iterating,
+ filter-builtin-not-iterating,
+ using-cmp-argument,
+ eq-without-hash,
+ div-method,
+ idiv-method,
+ rdiv-method,
+ exception-message-attribute,
+ invalid-str-codec,
+ sys-max-int,
+ bad-python3-import,
+ deprecated-string-function,
+ deprecated-str-translate-call,
+ deprecated-itertools-function,
+ deprecated-types-field,
+ next-method-defined,
+ dict-items-not-iterating,
+ dict-keys-not-iterating,
+ dict-values-not-iterating,
+ bad-indentation,
+ line-too-long,
+ missing-docstring,
+ multiple-statements,
+ bad-continuation,
+ invalid-name,
+ too-many-arguments,
+ too-many-locals,
+ superfluous-parens,
+ bad-whitespace,
+ too-many-instance-attributes,
+ wrong-import-position,
+ ungrouped-imports,
+ wrong-import-order,
+ protected-access,
+ trailing-whitespace,
+ too-many-branches,
+ too-few-public-methods,
+ too-many-statements,
+ trailing-newlines,
+ attribute-defined-outside-init,
+ too-many-return-statements,
+ too-many-public-methods,
+ unused-argument,
+ old-style-class,
+ no-init,
+ len-as-condition,
+ unneeded-not,
+ no-self-use,
+ multiple-imports,
+ no-else-return,
+ logging-not-lazy,
+ fixme,
+ redefined-outer-name,
+ unused-variable,
+ unsubscriptable-object,
+ expression-not-assigned,
+ too-many-boolean-expressions,
+ consider-using-ternary,
+ invalid-unary-operand-type,
+ relative-import,
+ deprecated-lambda
+
+
+# Enable the message, report, category or checker with the given id(s). You can
+# either give multiple identifier separated by comma (,) or put this option
+# multiple time (only on the command line, not in the configuration file where
+# it should appear only once). See also the "--disable" option for examples.
+enable=c-extension-no-member
+
+
+[REPORTS]
+
+# Python expression which should return a note less than 10 (10 is the highest
+# note). You have access to the variables errors warning, statement which
+# respectively contain the number of errors / warnings messages and the total
+# number of statements analyzed. This is used by the global evaluation report
+# (RP0004).
+evaluation=10.0 - ((float(5 * error + warning + refactor + convention) / statement) * 10)
+
+# Template used to display messages. This is a python new-style format string
+# used to format the message information. See doc for all details
+#msg-template=
+
+# Set the output format. Available formats are text, parseable, colorized, json
+# and msvs (visual studio).You can also give a reporter class, eg
+# mypackage.mymodule.MyReporterClass.
+output-format=text
+
+# Tells whether to display a full report or only the messages
+reports=no
+
+# Activate the evaluation score.
+score=yes
+
+
+[REFACTORING]
+
+# Maximum number of nested blocks for function / method body
+max-nested-blocks=5
+
+# Complete name of functions that never returns. When checking for
+# inconsistent-return-statements if a never returning function is called then
+# it will be considered as an explicit return statement and no message will be
+# printed.
+never-returning-functions=optparse.Values,sys.exit
+
+
+[LOGGING]
+
+# Logging modules to check that the string format arguments are in logging
+# function parameter format
+logging-modules=logging
+
+
+[SPELLING]
+
+# Limits count of emitted suggestions for spelling mistakes
+max-spelling-suggestions=4
+
+# Spelling dictionary name. Available dictionaries: none. To make it working
+# install python-enchant package.
+spelling-dict=
+
+# List of comma separated words that should not be checked.
+spelling-ignore-words=
+
+# A path to a file that contains private dictionary; one word per line.
+spelling-private-dict-file=
+
+# Tells whether to store unknown words to indicated private dictionary in
+# --spelling-private-dict-file option instead of raising a message.
+spelling-store-unknown-words=no
+
+
+[MISCELLANEOUS]
+
+# List of note tags to take in consideration, separated by a comma.
+notes=FIXME,
+ XXX,
+ TODO
+
+
+[SIMILARITIES]
+
+# Ignore comments when computing similarities.
+ignore-comments=yes
+
+# Ignore docstrings when computing similarities.
+ignore-docstrings=yes
+
+# Ignore imports when computing similarities.
+ignore-imports=no
+
+# Minimum lines number of a similarity.
+min-similarity-lines=4
+
+
+[TYPECHECK]
+
+# List of decorators that produce context managers, such as
+# contextlib.contextmanager. Add to this list to register other decorators that
+# produce valid context managers.
+contextmanager-decorators=contextlib.contextmanager
+
+# List of members which are set dynamically and missed by pylint inference
+# system, and so shouldn't trigger E1101 when accessed. Python regular
+# expressions are accepted.
+generated-members=capnp.* cereal.* pygame.* zmq.* setproctitle.* smbus2.* usb1.* serial.* cv2.*
+
+# Tells whether missing members accessed in mixin class should be ignored. A
+# mixin class is detected if its name ends with "mixin" (case insensitive).
+ignore-mixin-members=yes
+
+# This flag controls whether pylint should warn about no-member and similar
+# checks whenever an opaque object is returned when inferring. The inference
+# can return multiple potential results while evaluating a Python object, but
+# some branches might not be evaluated, which results in partial inference. In
+# that case, it might be useful to still emit no-member and other checks for
+# the rest of the inferred objects.
+ignore-on-opaque-inference=yes
+
+# List of class names for which member attributes should not be checked (useful
+# for classes with dynamically set attributes). This supports the use of
+# qualified names.
+ignored-classes=optparse.Values,thread._local,_thread._local
+
+# List of module names for which member attributes should not be checked
+# (useful for modules/projects where namespaces are manipulated during runtime
+# and thus existing member attributes cannot be deduced by static analysis. It
+# supports qualified module names, as well as Unix pattern matching.
+ignored-modules=flask setproctitle usb1 flask.ext.socketio smbus2 usb1.*
+
+# Show a hint with possible names when a member name was not found. The aspect
+# of finding the hint is based on edit distance.
+missing-member-hint=yes
+
+# The minimum edit distance a name should have in order to be considered a
+# similar match for a missing member name.
+missing-member-hint-distance=1
+
+# The total number of similar names that should be taken in consideration when
+# showing a hint for a missing member.
+missing-member-max-choices=1
+
+
+[VARIABLES]
+
+# List of additional names supposed to be defined in builtins. Remember that
+# you should avoid to define new builtins when possible.
+additional-builtins=
+
+# Tells whether unused global variables should be treated as a violation.
+allow-global-unused-variables=yes
+
+# List of strings which can identify a callback function by name. A callback
+# name must start or end with one of those strings.
+callbacks=cb_,
+ _cb
+
+# A regular expression matching the name of dummy variables (i.e. expectedly
+# not used).
+dummy-variables-rgx=_+$|(_[a-zA-Z0-9_]*[a-zA-Z0-9]+?$)|dummy|^ignored_|^unused_
+
+# Argument names that match this expression will be ignored. Default to name
+# with leading underscore
+ignored-argument-names=_.*|^ignored_|^unused_
+
+# Tells whether we should check for unused import in __init__ files.
+init-import=no
+
+# List of qualified module names which can have objects that can redefine
+# builtins.
+redefining-builtins-modules=six.moves,past.builtins,future.builtins
+
+
+[FORMAT]
+
+# Expected format of line ending, e.g. empty (any line ending), LF or CRLF.
+expected-line-ending-format=
+
+# Regexp for a line that is allowed to be longer than the limit.
+ignore-long-lines=^\s*(# )??$
+
+# Number of spaces of indent required inside a hanging or continued line.
+indent-after-paren=4
+
+# String used as indentation unit. This is usually " " (4 spaces) or "\t" (1
+# tab).
+indent-string=' '
+
+# Maximum number of characters on a single line.
+max-line-length=100
+
+# Maximum number of lines in a module
+max-module-lines=1000
+
+# List of optional constructs for which whitespace checking is disabled. `dict-
+# separator` is used to allow tabulation in dicts, etc.: {1 : 1,\n222: 2}.
+# `trailing-comma` allows a space between comma and closing bracket: (a, ).
+# `empty-line` allows space-only lines.
+no-space-check=trailing-comma,
+ dict-separator
+
+# Allow the body of a class to be on the same line as the declaration if body
+# contains single statement.
+single-line-class-stmt=no
+
+# Allow the body of an if to be on the same line as the test if there is no
+# else.
+single-line-if-stmt=no
+
+
+[BASIC]
+
+# Naming style matching correct argument names
+argument-naming-style=snake_case
+
+# Regular expression matching correct argument names. Overrides argument-
+# naming-style
+#argument-rgx=
+
+# Naming style matching correct attribute names
+attr-naming-style=snake_case
+
+# Regular expression matching correct attribute names. Overrides attr-naming-
+# style
+#attr-rgx=
+
+# Bad variable names which should always be refused, separated by a comma
+bad-names=foo,
+ bar,
+ baz,
+ toto,
+ tutu,
+ tata
+
+# Naming style matching correct class attribute names
+class-attribute-naming-style=any
+
+# Regular expression matching correct class attribute names. Overrides class-
+# attribute-naming-style
+#class-attribute-rgx=
+
+# Naming style matching correct class names
+class-naming-style=PascalCase
+
+# Regular expression matching correct class names. Overrides class-naming-style
+#class-rgx=
+
+# Naming style matching correct constant names
+const-naming-style=UPPER_CASE
+
+# Regular expression matching correct constant names. Overrides const-naming-
+# style
+#const-rgx=
+
+# Minimum line length for functions/classes that require docstrings, shorter
+# ones are exempt.
+docstring-min-length=-1
+
+# Naming style matching correct function names
+function-naming-style=snake_case
+
+# Regular expression matching correct function names. Overrides function-
+# naming-style
+#function-rgx=
+
+# Good variable names which should always be accepted, separated by a comma
+good-names=i,
+ j,
+ k,
+ ex,
+ Run,
+ _
+
+# Include a hint for the correct naming format with invalid-name
+include-naming-hint=no
+
+# Naming style matching correct inline iteration names
+inlinevar-naming-style=any
+
+# Regular expression matching correct inline iteration names. Overrides
+# inlinevar-naming-style
+#inlinevar-rgx=
+
+# Naming style matching correct method names
+method-naming-style=snake_case
+
+# Regular expression matching correct method names. Overrides method-naming-
+# style
+#method-rgx=
+
+# Naming style matching correct module names
+module-naming-style=snake_case
+
+# Regular expression matching correct module names. Overrides module-naming-
+# style
+#module-rgx=
+
+# Colon-delimited sets of names that determine each other's naming style when
+# the name regexes allow several styles.
+name-group=
+
+# Regular expression which should only match function or class names that do
+# not require a docstring.
+no-docstring-rgx=^_
+
+# List of decorators that produce properties, such as abc.abstractproperty. Add
+# to this list to register other decorators that produce valid properties.
+property-classes=abc.abstractproperty
+
+# Naming style matching correct variable names
+variable-naming-style=snake_case
+
+# Regular expression matching correct variable names. Overrides variable-
+# naming-style
+#variable-rgx=
+
+
+[DESIGN]
+
+# Maximum number of arguments for function / method
+max-args=5
+
+# Maximum number of attributes for a class (see R0902).
+max-attributes=7
+
+# Maximum number of boolean expressions in a if statement
+max-bool-expr=5
+
+# Maximum number of branch for function / method body
+max-branches=12
+
+# Maximum number of locals for function / method body
+max-locals=15
+
+# Maximum number of parents for a class (see R0901).
+max-parents=7
+
+# Maximum number of public methods for a class (see R0904).
+max-public-methods=20
+
+# Maximum number of return / yield for function / method body
+max-returns=6
+
+# Maximum number of statements in function / method body
+max-statements=50
+
+# Minimum number of public methods for a class (see R0903).
+min-public-methods=2
+
+
+[CLASSES]
+
+# List of method names used to declare (i.e. assign) instance attributes.
+defining-attr-methods=__init__,
+ __new__,
+ setUp
+
+# List of member names, which should be excluded from the protected access
+# warning.
+exclude-protected=_asdict,
+ _fields,
+ _replace,
+ _source,
+ _make
+
+# List of valid names for the first argument in a class method.
+valid-classmethod-first-arg=cls
+
+# List of valid names for the first argument in a metaclass class method.
+valid-metaclass-classmethod-first-arg=mcs
+
+
+[IMPORTS]
+
+# Allow wildcard imports from modules that define __all__.
+allow-wildcard-with-all=no
+
+# Analyse import fallback blocks. This can be used to support both Python 2 and
+# 3 compatible code, which means that the block might have code that exists
+# only in one or another interpreter, leading to false positives when analysed.
+analyse-fallback-blocks=no
+
+# Deprecated modules which should not be used, separated by a comma
+deprecated-modules=regsub,
+ TERMIOS,
+ Bastion,
+ rexec
+
+# Create a graph of external dependencies in the given file (report RP0402 must
+# not be disabled)
+ext-import-graph=
+
+# Create a graph of every (i.e. internal and external) dependencies in the
+# given file (report RP0402 must not be disabled)
+import-graph=
+
+# Create a graph of internal dependencies in the given file (report RP0402 must
+# not be disabled)
+int-import-graph=
+
+# Force import order to recognize a module as part of the standard
+# compatibility libraries.
+known-standard-library=
+
+# Force import order to recognize a module as part of a third party library.
+known-third-party=enchant
+
+
+[EXCEPTIONS]
+
+# Exceptions that will emit a warning when being caught. Defaults to
+# "Exception"
+overgeneral-exceptions=Exception
diff --git a/panda/tests/linter_python/Dockerfile b/panda/tests/linter_python/Dockerfile
new file mode 100644
index 00000000000000..819d692109e1c3
--- /dev/null
+++ b/panda/tests/linter_python/Dockerfile
@@ -0,0 +1,19 @@
+FROM ubuntu:16.04
+
+RUN apt-get update && apt-get install -y make python python-pip locales curl git zlib1g-dev libffi-dev bzip2 libssl-dev
+
+RUN sed -i -e 's/# en_US.UTF-8 UTF-8/en_US.UTF-8 UTF-8/' /etc/locale.gen && locale-gen
+ENV LANG en_US.UTF-8
+ENV LANGUAGE en_US:en
+ENV LC_ALL en_US.UTF-8
+
+RUN curl -L https://github.com/pyenv/pyenv-installer/raw/master/bin/pyenv-installer | bash
+
+ENV PATH="/root/.pyenv/bin:/root/.pyenv/shims:${PATH}"
+RUN pyenv install 3.7.3
+RUN pyenv global 3.7.3
+RUN pyenv rehash
+
+COPY requirements.txt /tmp/
+RUN pip install -r /tmp/requirements.txt
+COPY . /panda
diff --git a/panda/tests/linter_python/flake8_panda.sh b/panda/tests/linter_python/flake8_panda.sh
new file mode 100755
index 00000000000000..a1d02ea548eabe
--- /dev/null
+++ b/panda/tests/linter_python/flake8_panda.sh
@@ -0,0 +1,8 @@
+#!/usr/bin/env bash
+
+RESULT=$(python3 -m flake8 --select=F $(find ../../ -type f | grep -v "/boardesp/" | grep -v "/cppcheck/" | grep "\.py$"))
+if [[ $RESULT ]]; then
+ echo "Pyflakes found errors in the code. Please fix and try again"
+ echo "$RESULT"
+ exit 1
+fi
diff --git a/panda/tests/linter_python/pylint_panda.sh b/panda/tests/linter_python/pylint_panda.sh
new file mode 100755
index 00000000000000..1486bd839cceff
--- /dev/null
+++ b/panda/tests/linter_python/pylint_panda.sh
@@ -0,0 +1,11 @@
+#!/usr/bin/env bash
+
+python3 -m pylint --disable=R,C,W $(find ../../ -type f | grep -v "/boardesp/" | grep -v "/cppcheck/" | grep "\.py$")
+
+exit_status=$?
+(( res = exit_status & 3 ))
+
+if [[ $res != 0 ]]; then
+ echo "Pylint found errors in the code. Please fix and try again"
+ exit 1
+fi
diff --git a/panda/tests/location_listener.py b/panda/tests/location_listener.py
index 62ade10f03fdde..1a784babc98806 100755
--- a/panda/tests/location_listener.py
+++ b/panda/tests/location_listener.py
@@ -30,7 +30,7 @@ def add_nmea_checksum(msg):
baudrate = 460800
print("upping baud rate")
- msg = add_nmea_checksum("$PUBX,41,1,0007,0003,%d,0" % baudrate)+"\r\n"
+ msg = str.encode(add_nmea_checksum("$PUBX,41,1,0007,0003,%d,0" % baudrate)+"\r\n")
print(msg)
ser.write(msg)
time.sleep(0.1) # needs a wait for it to actually send
diff --git a/panda/tests/loopback_test.py b/panda/tests/loopback_test.py
index 02c8d2cd144a12..60009fae51fd00 100755
--- a/panda/tests/loopback_test.py
+++ b/panda/tests/loopback_test.py
@@ -55,7 +55,7 @@ def run_test_w_pandas(pandas, sleep_duration):
# send the characters
st = get_test_string()
- st = b"\xaa"+chr(len(st)+3).encode()+st
+ st = bytes([0xaa, len(st) + 3]) + st
h[ho[0]].kline_send(st, bus=bus, checksum=False)
# check for receive
diff --git a/panda/tests/misra/Dockerfile b/panda/tests/misra/Dockerfile
index e63cc7e9e151ed..06882834fcdfbe 100644
--- a/panda/tests/misra/Dockerfile
+++ b/panda/tests/misra/Dockerfile
@@ -1,6 +1,19 @@
FROM ubuntu:16.04
-RUN apt-get update && apt-get install -y make python python-pip git
-COPY tests/safety/requirements.txt /panda/tests/safety/requirements.txt
-RUN pip install -r /panda/tests/safety/requirements.txt
+RUN apt-get update && apt-get install -y clang make python python-pip git curl locales zlib1g-dev libffi-dev bzip2 libssl-dev libbz2-dev libusb-1.0-0
+
+RUN sed -i -e 's/# en_US.UTF-8 UTF-8/en_US.UTF-8 UTF-8/' /etc/locale.gen && locale-gen
+ENV LANG en_US.UTF-8
+ENV LANGUAGE en_US:en
+ENV LC_ALL en_US.UTF-8
+
+RUN curl -L https://github.com/pyenv/pyenv-installer/raw/master/bin/pyenv-installer | bash
+
+ENV PATH="/root/.pyenv/bin:/root/.pyenv/shims:${PATH}"
+RUN pyenv install 3.7.3
+RUN pyenv global 3.7.3
+RUN pyenv rehash
+
+COPY requirements.txt /tmp/
+RUN pip install -r /tmp/requirements.txt
COPY . /panda
diff --git a/panda/tests/misra/coverage_table b/panda/tests/misra/coverage_table
index a00cd84a5f304d..dcb5992bc74743 100644
--- a/panda/tests/misra/coverage_table
+++ b/panda/tests/misra/coverage_table
@@ -9,9 +9,9 @@
2.6 X (Cppcheck)
2.7
3.1 X (Addon)
-3.2
+3.2 X (Addon)
4.1 X (Addon)
-4.2
+4.2 X (Addon)
5.1 X (Addon)
5.2 X (Addon)
5.3 X (Addon)
@@ -123,7 +123,7 @@
20.12
20.13 X (Addon)
20.14 X (Addon)
-21.1
+21.1 X (Addon)
21.2
21.3 X (Addon)
21.4 X (Addon)
@@ -134,7 +134,7 @@
21.9 X (Addon)
21.10 X (Addon)
21.11 X (Addon)
-21.12
+21.12 X (Addon)
22.1 X (Cppcheck)
22.2 X (Cppcheck)
22.3
diff --git a/panda/tests/misra/suppressions.txt b/panda/tests/misra/suppressions.txt
index b98a491eeb07ad..e0a270831a3526 100644
--- a/panda/tests/misra/suppressions.txt
+++ b/panda/tests/misra/suppressions.txt
@@ -4,3 +4,5 @@ misra.19.2
misra.11.4
# Advisory: casting from void pointer to type pointer is ok. Done by STM libraries as well
misra.11.5
+# Required: it's ok re-defining potentially reserved Macro names. Not likely to cause confusion
+misra.21.1
diff --git a/panda/tests/misra/test_misra.sh b/panda/tests/misra/test_misra.sh
index c4aceaa92c010d..2542290744d963 100755
--- a/panda/tests/misra/test_misra.sh
+++ b/panda/tests/misra/test_misra.sh
@@ -4,7 +4,7 @@ mkdir /tmp/misra || true
git clone https://github.com/danmar/cppcheck.git || true
cd cppcheck
git fetch
-git checkout ff7dba91e177dfb712477faddb9e91bece7e743c
+git checkout bdd41151ed550e3d240a6dd6847859216b7ad736
make -j4
cd ../../../
diff --git a/panda/tests/pedal/enter_canloader.py b/panda/tests/pedal/enter_canloader.py
index cc37f2b843533c..4488c3205626cf 100755
--- a/panda/tests/pedal/enter_canloader.py
+++ b/panda/tests/pedal/enter_canloader.py
@@ -1,5 +1,4 @@
#!/usr/bin/env python3
-import sys
import time
import struct
import argparse
diff --git a/panda/tests/rtc_test.py b/panda/tests/rtc_test.py
new file mode 100755
index 00000000000000..3732cb765f81e9
--- /dev/null
+++ b/panda/tests/rtc_test.py
@@ -0,0 +1,13 @@
+#!/usr/bin/env python
+import os
+import sys
+import datetime
+
+sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
+from panda import Panda
+
+if __name__ == "__main__":
+ p = Panda()
+
+ p.set_datetime(datetime.datetime.now())
+ print(p.get_datetime())
diff --git a/panda/tests/safety/Dockerfile b/panda/tests/safety/Dockerfile
index b0135b085f6595..3c70d253411b26 100644
--- a/panda/tests/safety/Dockerfile
+++ b/panda/tests/safety/Dockerfile
@@ -14,6 +14,7 @@ RUN pyenv install 3.7.3
RUN pyenv global 3.7.3
RUN pyenv rehash
-COPY tests/safety/requirements.txt requirements.txt
-RUN pip install -r requirements.txt
+COPY requirements.txt /tmp/
+RUN pip install -r /tmp/requirements.txt
+
COPY . /panda
diff --git a/panda/tests/safety/libpandasafety_py.py b/panda/tests/safety/libpandasafety_py.py
index bb332e52b6b8e0..819fcada37e3d2 100644
--- a/panda/tests/safety/libpandasafety_py.py
+++ b/panda/tests/safety/libpandasafety_py.py
@@ -30,6 +30,8 @@
uint32_t CNT;
} TIM_TypeDef;
+bool board_has_relay(void);
+
void set_controls_allowed(bool c);
bool get_controls_allowed(void);
void set_long_controls_allowed(bool c);
@@ -94,6 +96,11 @@
void set_subaru_rt_torque_last(int t);
void set_subaru_torque_driver(int min, int max);
+void init_tests_volkswagen(void);
+void set_volkswagen_desired_torque_last(int t);
+void set_volkswagen_rt_torque_last(int t);
+void set_volkswagen_torque_driver(int min, int max);
+int get_volkswagen_gas_prev(void);
""")
diff --git a/panda/tests/safety/requirements.txt b/panda/tests/safety/requirements.txt
deleted file mode 100644
index 0c3124d87fb216..00000000000000
--- a/panda/tests/safety/requirements.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-cffi==1.11.4
-numpy==1.14.5
-libusb1==1.6.6
-requests
diff --git a/panda/tests/safety/test.c b/panda/tests/safety/test.c
index d92eb8680f6ecd..c61f64077c63b1 100644
--- a/panda/tests/safety/test.c
+++ b/panda/tests/safety/test.c
@@ -29,10 +29,27 @@ struct sample_t gm_torque_driver;
struct sample_t hyundai_torque_driver;
struct sample_t chrysler_torque_meas;
struct sample_t subaru_torque_driver;
+struct sample_t volkswagen_torque_driver;
TIM_TypeDef timer;
TIM_TypeDef *TIM2 = &timer;
+// from board_declarations.h
+#define HW_TYPE_UNKNOWN 0U
+#define HW_TYPE_WHITE_PANDA 1U
+#define HW_TYPE_GREY_PANDA 2U
+#define HW_TYPE_BLACK_PANDA 3U
+#define HW_TYPE_PEDAL 4U
+#define HW_TYPE_UNO 5U
+
+// from main_declarations.h
+uint8_t hw_type = HW_TYPE_UNKNOWN;
+
+// from board.h
+bool board_has_relay(void) {
+ return hw_type == HW_TYPE_BLACK_PANDA || hw_type == HW_TYPE_UNO;
+}
+
// from config.h
#define MIN(a,b) \
({ __typeof__ (a) _a = (a); \
@@ -52,16 +69,6 @@ TIM_TypeDef *TIM2 = &timer;
#define GET_BYTES_04(msg) ((msg)->RDLR)
#define GET_BYTES_48(msg) ((msg)->RDHR)
-// from board_declarations.h
-#define HW_TYPE_UNKNOWN 0U
-#define HW_TYPE_WHITE_PANDA 1U
-#define HW_TYPE_GREY_PANDA 2U
-#define HW_TYPE_BLACK_PANDA 3U
-#define HW_TYPE_PEDAL 4U
-
-// from main_declarations.h
-uint8_t hw_type = 0U;
-
#define UNUSED(x) (void)(x)
#define PANDA
@@ -155,6 +162,11 @@ void set_subaru_torque_driver(int min, int max){
subaru_torque_driver.max = max;
}
+void set_volkswagen_torque_driver(int min, int max){
+ volkswagen_torque_driver.min = min;
+ volkswagen_torque_driver.max = max;
+}
+
int get_chrysler_torque_meas_min(void){
return chrysler_torque_meas.min;
}
@@ -199,6 +211,10 @@ void set_subaru_rt_torque_last(int t){
subaru_rt_torque_last = t;
}
+void set_volkswagen_rt_torque_last(int t){
+ volkswagen_rt_torque_last = t;
+}
+
void set_toyota_desired_torque_last(int t){
toyota_desired_torque_last = t;
}
@@ -223,6 +239,14 @@ void set_subaru_desired_torque_last(int t){
subaru_desired_torque_last = t;
}
+void set_volkswagen_desired_torque_last(int t){
+ volkswagen_desired_torque_last = t;
+}
+
+int get_volkswagen_gas_prev(void){
+ return volkswagen_gas_prev;
+}
+
bool get_honda_moving(void){
return honda_moving;
}
@@ -316,6 +340,16 @@ void init_tests_subaru(void){
set_timer(0);
}
+void init_tests_volkswagen(void){
+ init_tests();
+ volkswagen_torque_driver.min = 0;
+ volkswagen_torque_driver.max = 0;
+ volkswagen_desired_torque_last = 0;
+ volkswagen_rt_torque_last = 0;
+ volkswagen_ts_last = 0;
+ set_timer(0);
+}
+
void init_tests_honda(void){
init_tests();
honda_moving = false;
diff --git a/panda/tests/safety/test.sh b/panda/tests/safety/test.sh
index 2674281addd9f4..39d70ff615bee8 100755
--- a/panda/tests/safety/test.sh
+++ b/panda/tests/safety/test.sh
@@ -6,11 +6,12 @@
# HW_TYPE_GREY_PANDA 2U
# HW_TYPE_BLACK_PANDA 3U
# HW_TYPE_PEDAL 4U
+# HW_TYPE_UNO 5U
# Make sure test fails if one HW_TYPE fails
set -e
-for hw_type in 0 1 2 3 4
+for hw_type in 0 1 2 3 4 5
do
echo "Testing HW_TYPE: $hw_type"
HW_TYPE=$hw_type python -m unittest discover .
diff --git a/panda/tests/safety/test_cadillac.py b/panda/tests/safety/test_cadillac.py
index 5573682d0cd44c..f211908b7bd11d 100644
--- a/panda/tests/safety/test_cadillac.py
+++ b/panda/tests/safety/test_cadillac.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_RATE_UP = 2
diff --git a/panda/tests/safety/test_chrysler.py b/panda/tests/safety/test_chrysler.py
index 25f50a11f9fb31..37bffe0eaf392b 100755
--- a/panda/tests/safety/test_chrysler.py
+++ b/panda/tests/safety/test_chrysler.py
@@ -1,9 +1,7 @@
#!/usr/bin/env python3
-import csv
-import glob
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_RATE_UP = 3
diff --git a/panda/tests/safety/test_gm.py b/panda/tests/safety/test_gm.py
index e2251f7b557f8f..304dbbe939bf48 100644
--- a/panda/tests/safety/test_gm.py
+++ b/panda/tests/safety/test_gm.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_RATE_UP = 7
diff --git a/panda/tests/safety/test_honda.py b/panda/tests/safety/test_honda.py
index a5eb04ad6632c5..55a376a2e58a37 100755
--- a/panda/tests/safety/test_honda.py
+++ b/panda/tests/safety/test_honda.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_BRAKE = 255
@@ -34,9 +34,9 @@ def _button_msg(self, buttons, msg):
to_send = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
to_send[0].RIR = msg << 21
to_send[0].RDLR = buttons << 5
- is_panda_black = self.safety.get_hw_type() == 3 # black_panda
+ has_relay = self.safety.board_has_relay()
honda_bosch_hardware = self.safety.get_honda_bosch_hardware()
- bus = 1 if is_panda_black and honda_bosch_hardware else 0
+ bus = 1 if has_relay and honda_bosch_hardware else 0
to_send[0].RDTR = bus << 4
return to_send
diff --git a/panda/tests/safety/test_honda_bosch.py b/panda/tests/safety/test_honda_bosch.py
index 3affc74c9a72f8..7571e1eddc4576 100755
--- a/panda/tests/safety/test_honda_bosch.py
+++ b/panda/tests/safety/test_honda_bosch.py
@@ -1,7 +1,6 @@
#!/usr/bin/env python3
import unittest
-import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_BRAKE = 255
@@ -22,12 +21,13 @@ def _send_msg(self, bus, addr, length):
return to_send
def test_fwd_hook(self):
- buss = list(range(0x0, 0x3))
- msgs = list(range(0x1, 0x800))
- is_panda_black = self.safety.get_hw_type() == 3 # black panda
- bus_rdr_cam = 2 if is_panda_black else 1
- bus_rdr_car = 0 if is_panda_black else 2
- bus_pt = 1 if is_panda_black else 0
+ buss = range(0x0, 0x3)
+ msgs = range(0x1, 0x800)
+ #has_relay = self.safety.get_hw_type() == 3 # black panda
+ has_relay = self.safety.board_has_relay()
+ bus_rdr_cam = 2 if has_relay else 1
+ bus_rdr_car = 0 if has_relay else 2
+ bus_pt = 1 if has_relay else 0
blocked_msgs = [0xE4, 0x33D]
for b in buss:
diff --git a/panda/tests/safety/test_hyundai.py b/panda/tests/safety/test_hyundai.py
index d836dad37b266f..d8fa02691b6d41 100644
--- a/panda/tests/safety/test_hyundai.py
+++ b/panda/tests/safety/test_hyundai.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_RATE_UP = 3
diff --git a/panda/tests/safety/test_subaru.py b/panda/tests/safety/test_subaru.py
index 93859e0217837b..49933e6636dd3c 100644
--- a/panda/tests/safety/test_subaru.py
+++ b/panda/tests/safety/test_subaru.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_RATE_UP = 50
diff --git a/panda/tests/safety/test_toyota.py b/panda/tests/safety/test_toyota.py
index af82c5de7cee9d..4d3c9661c85f17 100644
--- a/panda/tests/safety/test_toyota.py
+++ b/panda/tests/safety/test_toyota.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
MAX_RATE_UP = 10
diff --git a/panda/tests/safety/test_toyota_ipas.py b/panda/tests/safety/test_toyota_ipas.py
index 8d565553fd2144..df0f36ffd76e47 100644
--- a/panda/tests/safety/test_toyota_ipas.py
+++ b/panda/tests/safety/test_toyota_ipas.py
@@ -1,7 +1,7 @@
#!/usr/bin/env python3
import unittest
import numpy as np
-import libpandasafety_py
+import libpandasafety_py # pylint: disable=import-error
from panda import Panda
IPAS_OVERRIDE_THRESHOLD = 200
@@ -233,8 +233,8 @@ def test_angle_measured_rate(self):
self.safety.safety_tx_hook(self._ipas_control_msg(a, 1))
self.safety.set_controls_allowed(1)
self.safety.safety_rx_hook(self._speed_msg(s))
- max_delta_up = int(np.interp(s, ANGLE_DELTA_BP, ANGLE_DELTA_V) * 2 / 3. + 1.)
- max_delta_down = int(np.interp(s, ANGLE_DELTA_BP, ANGLE_DELTA_VU) * 2 / 3. + 1.)
+ #max_delta_up = int(np.interp(s, ANGLE_DELTA_BP, ANGLE_DELTA_V) * 2 / 3. + 1.)
+ #max_delta_down = int(np.interp(s, ANGLE_DELTA_BP, ANGLE_DELTA_VU) * 2 / 3. + 1.)
self.safety.safety_rx_hook(self._angle_meas_msg(a))
self.assertTrue(self.safety.get_controls_allowed())
self.safety.safety_rx_hook(self._angle_meas_msg(a + 150))
diff --git a/panda/tests/safety/test_volkswagen.py b/panda/tests/safety/test_volkswagen.py
new file mode 100644
index 00000000000000..aa535cdac9cbf1
--- /dev/null
+++ b/panda/tests/safety/test_volkswagen.py
@@ -0,0 +1,247 @@
+#!/usr/bin/env python3
+import unittest
+import numpy as np
+import libpandasafety_py # pylint: disable=import-error
+from panda import Panda
+
+MAX_RATE_UP = 4
+MAX_RATE_DOWN = 10
+MAX_STEER = 250
+
+MAX_RT_DELTA = 75
+RT_INTERVAL = 250000
+
+DRIVER_TORQUE_ALLOWANCE = 80
+DRIVER_TORQUE_FACTOR = 3
+
+def sign(a):
+ if a > 0:
+ return 1
+ else:
+ return -1
+
+class TestVolkswagenSafety(unittest.TestCase):
+ @classmethod
+ def setUp(cls):
+ cls.safety = libpandasafety_py.libpandasafety
+ cls.safety.safety_set_mode(Panda.SAFETY_VOLKSWAGEN, 0)
+ cls.safety.init_tests_volkswagen()
+
+ def _send_msg(self, bus, addr, length):
+ to_send = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_send[0].RIR = addr << 21
+ to_send[0].RDTR = length
+ to_send[0].RDTR = bus << 4
+ return to_send
+
+ def _set_prev_torque(self, t):
+ self.safety.set_volkswagen_desired_torque_last(t)
+ self.safety.set_volkswagen_rt_torque_last(t)
+
+ def _torque_driver_msg(self, torque):
+ to_send = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_send[0].RIR = 0x9F << 21
+
+ t = abs(torque)
+ to_send[0].RDHR = ((t & 0x1FFF) << 8)
+ if torque < 0:
+ to_send[0].RDHR |= 0x1 << 23
+ return to_send
+
+ def _torque_msg(self, torque):
+ to_send = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_send[0].RIR = 0x126 << 21
+
+ t = abs(torque)
+ to_send[0].RDLR = (t & 0xFFF) << 16
+ if torque < 0:
+ to_send[0].RDLR |= 0x1 << 31
+ return to_send
+
+ def _gas_msg(self, gas):
+ to_send = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_send[0].RIR = 0x121 << 21
+ to_send[0].RDLR = (gas & 0xFF) << 12
+
+ return to_send
+
+ def _button_msg(self, bit):
+ to_send = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_send[0].RIR = 0x12B << 21
+ to_send[0].RDLR = 1 << bit
+ to_send[0].RDTR = 2 << 4
+
+ return to_send
+
+ def test_prev_gas(self):
+ for g in range(0, 256):
+ self.safety.safety_rx_hook(self._gas_msg(g))
+ self.assertEqual(g, self.safety.get_volkswagen_gas_prev())
+
+ def test_default_controls_not_allowed(self):
+ self.assertFalse(self.safety.get_controls_allowed())
+
+ def test_enable_control_allowed_from_cruise(self):
+ to_push = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_push[0].RIR = 0x122 << 21
+ to_push[0].RDHR = 0x30000000
+
+ self.safety.safety_rx_hook(to_push)
+ self.assertTrue(self.safety.get_controls_allowed())
+
+ def test_disable_control_allowed_from_cruise(self):
+ to_push = libpandasafety_py.ffi.new('CAN_FIFOMailBox_TypeDef *')
+ to_push[0].RIR = 0x122 << 21
+ to_push[0].RDHR = 0
+
+ self.safety.set_controls_allowed(1)
+ self.safety.safety_rx_hook(to_push)
+ self.assertFalse(self.safety.get_controls_allowed())
+
+ def test_disengage_on_gas(self):
+ for long_controls_allowed in [0, 1]:
+ self.safety.set_long_controls_allowed(long_controls_allowed)
+ self.safety.safety_rx_hook(self._gas_msg(0))
+ self.safety.set_controls_allowed(True)
+ self.safety.safety_rx_hook(self._gas_msg(1))
+ if long_controls_allowed:
+ self.assertFalse(self.safety.get_controls_allowed())
+ else:
+ self.assertTrue(self.safety.get_controls_allowed())
+ self.safety.set_long_controls_allowed(True)
+
+ def test_allow_engage_with_gas_pressed(self):
+ self.safety.safety_rx_hook(self._gas_msg(1))
+ self.safety.set_controls_allowed(True)
+ self.safety.safety_rx_hook(self._gas_msg(1))
+ self.assertTrue(self.safety.get_controls_allowed())
+ self.safety.safety_rx_hook(self._gas_msg(1))
+ self.assertTrue(self.safety.get_controls_allowed())
+
+
+ def test_steer_safety_check(self):
+ for enabled in [0, 1]:
+ for t in range(-500, 500):
+ self.safety.set_controls_allowed(enabled)
+ self._set_prev_torque(t)
+ if abs(t) > MAX_STEER or (not enabled and abs(t) > 0):
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg(t)))
+ else:
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(t)))
+
+ def test_manually_enable_controls_allowed(self):
+ self.safety.set_controls_allowed(1)
+ self.assertTrue(self.safety.get_controls_allowed())
+ self.safety.set_controls_allowed(0)
+ self.assertFalse(self.safety.get_controls_allowed())
+
+ def test_spam_cancel_safety_check(self):
+ BIT_CANCEL = 13
+ BIT_RESUME = 19
+ BIT_SET = 16
+ self.safety.set_controls_allowed(0)
+ self.assertTrue(self.safety.safety_tx_hook(self._button_msg(BIT_CANCEL)))
+ self.assertFalse(self.safety.safety_tx_hook(self._button_msg(BIT_RESUME)))
+ self.assertFalse(self.safety.safety_tx_hook(self._button_msg(BIT_SET)))
+ # do not block resume if we are engaged already
+ self.safety.set_controls_allowed(1)
+ self.assertTrue(self.safety.safety_tx_hook(self._button_msg(BIT_RESUME)))
+
+ def test_non_realtime_limit_up(self):
+ self.safety.set_volkswagen_torque_driver(0, 0)
+ self.safety.set_controls_allowed(True)
+
+ self._set_prev_torque(0)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(MAX_RATE_UP)))
+ self._set_prev_torque(0)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(-MAX_RATE_UP)))
+
+ self._set_prev_torque(0)
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg(MAX_RATE_UP + 1)))
+ self.safety.set_controls_allowed(True)
+ self._set_prev_torque(0)
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg(-MAX_RATE_UP - 1)))
+
+ def test_non_realtime_limit_down(self):
+ self.safety.set_volkswagen_torque_driver(0, 0)
+ self.safety.set_controls_allowed(True)
+
+ def test_against_torque_driver(self):
+ self.safety.set_controls_allowed(True)
+
+ for sign in [-1, 1]:
+ for t in np.arange(0, DRIVER_TORQUE_ALLOWANCE + 1, 1):
+ t *= -sign
+ self.safety.set_volkswagen_torque_driver(t, t)
+ self._set_prev_torque(MAX_STEER * sign)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(MAX_STEER * sign)))
+
+ self.safety.set_volkswagen_torque_driver(DRIVER_TORQUE_ALLOWANCE + 1, DRIVER_TORQUE_ALLOWANCE + 1)
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg(-MAX_STEER)))
+
+ # spot check some individual cases
+ for sign in [-1, 1]:
+ driver_torque = (DRIVER_TORQUE_ALLOWANCE + 10) * sign
+ torque_desired = (MAX_STEER - 10 * DRIVER_TORQUE_FACTOR) * sign
+ delta = 1 * sign
+ self._set_prev_torque(torque_desired)
+ self.safety.set_volkswagen_torque_driver(-driver_torque, -driver_torque)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(torque_desired)))
+ self._set_prev_torque(torque_desired + delta)
+ self.safety.set_volkswagen_torque_driver(-driver_torque, -driver_torque)
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg(torque_desired + delta)))
+
+ self._set_prev_torque(MAX_STEER * sign)
+ self.safety.set_volkswagen_torque_driver(-MAX_STEER * sign, -MAX_STEER * sign)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg((MAX_STEER - MAX_RATE_DOWN) * sign)))
+ self._set_prev_torque(MAX_STEER * sign)
+ self.safety.set_volkswagen_torque_driver(-MAX_STEER * sign, -MAX_STEER * sign)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(0)))
+ self._set_prev_torque(MAX_STEER * sign)
+ self.safety.set_volkswagen_torque_driver(-MAX_STEER * sign, -MAX_STEER * sign)
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg((MAX_STEER - MAX_RATE_DOWN + 1) * sign)))
+
+
+ def test_realtime_limits(self):
+ self.safety.set_controls_allowed(True)
+
+ for sign in [-1, 1]:
+ self.safety.init_tests_volkswagen()
+ self._set_prev_torque(0)
+ self.safety.set_volkswagen_torque_driver(0, 0)
+ for t in np.arange(0, MAX_RT_DELTA, 1):
+ t *= sign
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(t)))
+ self.assertFalse(self.safety.safety_tx_hook(self._torque_msg(sign * (MAX_RT_DELTA + 1))))
+
+ self._set_prev_torque(0)
+ for t in np.arange(0, MAX_RT_DELTA, 1):
+ t *= sign
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(t)))
+
+ # Increase timer to update rt_torque_last
+ self.safety.set_timer(RT_INTERVAL + 1)
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(sign * (MAX_RT_DELTA - 1))))
+ self.assertTrue(self.safety.safety_tx_hook(self._torque_msg(sign * (MAX_RT_DELTA + 1))))
+
+
+ def test_fwd_hook(self):
+ buss = list(range(0x0, 0x2))
+ msgs = list(range(0x1, 0x800))
+ blocked_msgs_0to2 = []
+ blocked_msgs_2to0 = [0x122, 0x397]
+ for b in buss:
+ for m in msgs:
+ if b == 0:
+ fwd_bus = -1 if m in blocked_msgs_0to2 else 2
+ elif b == 1:
+ fwd_bus = -1
+ elif b == 2:
+ fwd_bus = -1 if m in blocked_msgs_2to0 else 0
+
+ # assume len 8
+ self.assertEqual(fwd_bus, self.safety.safety_fwd_hook(b, self._send_msg(b, m, 8)))
+
+
+if __name__ == "__main__":
+ unittest.main()
diff --git a/panda/tests/safety_replay/Dockerfile b/panda/tests/safety_replay/Dockerfile
index 80663964d3e2da..f5175c74582005 100644
--- a/panda/tests/safety_replay/Dockerfile
+++ b/panda/tests/safety_replay/Dockerfile
@@ -14,8 +14,10 @@ RUN pyenv install 3.7.3
RUN pyenv global 3.7.3
RUN pyenv rehash
-COPY tests/safety_replay/requirements.txt requirements.txt
-RUN pip install -r requirements.txt
+COPY requirements.txt /tmp/
+RUN pip install -r /tmp/requirements.txt
+COPY tests/safety_replay/requirements_extra.txt requirements_extra.txt
+RUN pip install -r requirements_extra.txt
COPY tests/safety_replay/install_capnp.sh install_capnp.sh
RUN ./install_capnp.sh
diff --git a/panda/tests/safety_replay/replay_drive.py b/panda/tests/safety_replay/replay_drive.py
index d92ab8e7080533..3db57dfd168fae 100755
--- a/panda/tests/safety_replay/replay_drive.py
+++ b/panda/tests/safety_replay/replay_drive.py
@@ -2,12 +2,9 @@
import os
import sys
-from panda import Panda
import panda.tests.safety.libpandasafety_py as libpandasafety_py
-from panda.tests.safety_replay.helpers import is_steering_msg, get_steer_torque, \
- set_desired_torque_last, package_can_msg, \
- init_segment
-from tools.lib.logreader import LogReader
+from panda.tests.safety_replay.helpers import package_can_msg, init_segment
+from tools.lib.logreader import LogReader # pylint: disable=import-error
# replay a drive to check for safety violations
def replay_drive(lr, safety_mode, param):
diff --git a/panda/tests/safety_replay/requirements.txt b/panda/tests/safety_replay/requirements.txt
deleted file mode 100644
index 4c9d301dce0b4d..00000000000000
--- a/panda/tests/safety_replay/requirements.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-aenum
-cffi==1.11.4
-libusb1==1.6.6
-numpy==1.14.5
-requests
-subprocess32
-libarchive
-pycapnp
diff --git a/panda/tests/safety_replay/requirements_extra.txt b/panda/tests/safety_replay/requirements_extra.txt
new file mode 100644
index 00000000000000..b04b7674d76efa
--- /dev/null
+++ b/panda/tests/safety_replay/requirements_extra.txt
@@ -0,0 +1,4 @@
+aenum
+subprocess32
+libarchive
+pycapnp
diff --git a/panda/tests/safety_replay/test_safety_replay.py b/panda/tests/safety_replay/test_safety_replay.py
index e6e49dc02d8556..cb38a94edff66a 100755
--- a/panda/tests/safety_replay/test_safety_replay.py
+++ b/panda/tests/safety_replay/test_safety_replay.py
@@ -5,7 +5,7 @@
from panda import Panda
from replay_drive import replay_drive
-from tools.lib.logreader import LogReader
+from tools.lib.logreader import LogReader # pylint: disable=import-error
BASE_URL = "https://commadataci.blob.core.windows.net/openpilotci/"
diff --git a/panda/tests/spam_can.py b/panda/tests/spam_can.py
index 6b0c2d9c60a581..1daffdbd91009d 100755
--- a/panda/tests/spam_can.py
+++ b/panda/tests/spam_can.py
@@ -2,7 +2,6 @@
import os
import sys
-import time
import random
sys.path.append(os.path.join(os.path.dirname(os.path.realpath(__file__)), ".."))
@@ -21,4 +20,4 @@ def get_test_string():
st = get_test_string()[0:8]
bus = random.randint(0, 2)
p.can_send(at, st, bus)
- #print("Sent message on bus: ", bus)
\ No newline at end of file
+ #print("Sent message on bus: ", bus)
diff --git a/panda/tests/throughput_test.py b/panda/tests/throughput_test.py
index 69b06c7646d0b2..9f6021240173e9 100755
--- a/panda/tests/throughput_test.py
+++ b/panda/tests/throughput_test.py
@@ -25,7 +25,7 @@
# p_in.can_recv()
#sys.exit(0)
- p_out.set_controls_allowed(True)
+ p_out.set_safety_mode(Panda.SAFETY_ALLOUTPUT)
set_out, set_in = set(), set()
diff --git a/panda/tests/tucan_loopback.py b/panda/tests/tucan_loopback.py
index 1b5ed016633837..cb5d1cbfea12e8 100755
--- a/panda/tests/tucan_loopback.py
+++ b/panda/tests/tucan_loopback.py
@@ -33,7 +33,7 @@ def run_test_w_pandas(pandas, sleep_duration):
print("H", h)
for hh in h:
- hh.set_controls_allowed(True)
+ hh.set_safety_mode(Panda.SAFETY_ALLOUTPUT)
# test both directions
for ho in permutations(list(range(len(h))), r=2):
@@ -55,7 +55,7 @@ def run_test_w_pandas(pandas, sleep_duration):
# send the characters
st = get_test_string()
- st = b"\xaa"+chr(len(st)+3).encode()+st
+ st = bytes([0xaa, len(st) + 3]) + st
h[ho[0]].kline_send(st, bus=bus, checksum=False)
# check for receive
@@ -70,8 +70,8 @@ def run_test_w_pandas(pandas, sleep_duration):
time.sleep(sleep_duration)
# **** test can line loopback ****
-# for bus, gmlan in [(0, None), (1, False), (2, False), (1, True), (2, True)]:
-for bus, gmlan in [(0, None), (1, None)]:
+ # for bus, gmlan in [(0, None), (1, False), (2, False), (1, True), (2, True)]:
+ for bus, gmlan in [(0, None), (1, None)]:
print("\ntest can", bus)
# flush
cans_echo = panda0.can_recv()
diff --git a/phonelibs/yaml-cpp/lib/libyaml-cpp.a b/phonelibs/yaml-cpp/lib/libyaml-cpp.a
index c03917510782c7..f871781d35c297 100644
Binary files a/phonelibs/yaml-cpp/lib/libyaml-cpp.a and b/phonelibs/yaml-cpp/lib/libyaml-cpp.a differ
diff --git a/phonelibs/yaml-cpp/x64/lib/libyaml-cpp.a b/phonelibs/yaml-cpp/x64/lib/libyaml-cpp.a
new file mode 100644
index 00000000000000..eb1a3637d93605
Binary files /dev/null and b/phonelibs/yaml-cpp/x64/lib/libyaml-cpp.a differ
diff --git a/run_docker_tests.sh b/run_docker_tests.sh
old mode 100755
new mode 100644
index 2726baaeb565f3..7d2484d79a60a2
--- a/run_docker_tests.sh
+++ b/run_docker_tests.sh
@@ -1,16 +1,19 @@
#!/bin/bash
set -e
+SETUP="cd /tmp/openpilot && make -C cereal && "
+
docker build -t tmppilot -f Dockerfile.openpilot .
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && cd /tmp/openpilot/selfdrive/test/ && ./test_fingerprints.py'
-#docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && pyflakes $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda" | grep -vi "^\./tools")'
-#docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && pylint $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda" | grep -vi "^\./tools"); exit $(($? & 3))'
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover common'
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover selfdrive/can'
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover selfdrive/boardd'
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && python -m unittest discover selfdrive/controls'
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && python -m unittest discover selfdrive/loggerd'
-docker run --rm -v "$(pwd)"/selfdrive/test/longitudinal_maneuvers/out:/tmp/openpilot/selfdrive/test/longitudinal_maneuvers/out tmppilot /bin/sh -c 'cd /tmp/openpilot/selfdrive/test/longitudinal_maneuvers && OPTEST=1 ./test_longitudinal.py'
-docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && make -C cereal && cd /tmp/openpilot/selfdrive/test/process_replay/ && ./test_processes.py'
-docker run --rm tmppilot /bin/sh -c 'mkdir -p /data/params && cd /tmp/openpilot/ && make -C cereal && cd /tmp/openpilot/selfdrive/test/ && ./test_car_models.py'
+
+docker run --rm tmppilot /bin/sh -c "$SETUP cd /tmp/openpilot/selfdrive/test/ && ./test_fingerprints.py"
+# docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && flake8 --select=F $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda" | grep -vi "^\./tools")'
+# docker run --rm tmppilot /bin/sh -c 'cd /tmp/openpilot/ && pylint $(find . -iname "*.py" | grep -vi "^\./pyextra.*" | grep -vi "^\./panda" | grep -vi "^\./tools"); exit $(($? & 3))'
+docker run --rm tmppilot /bin/sh -c "$SETUP python -m unittest discover common"
+docker run --rm tmppilot /bin/sh -c "$SETUP make -C selfdrive/can -j4 && python -m unittest discover selfdrive/can"
+docker run --rm tmppilot /bin/sh -c "$SETUP python -m unittest discover selfdrive/boardd"
+docker run --rm tmppilot /bin/sh -c "$SETUP make -C selfdrive/can -j4 && python -m unittest discover selfdrive/controls"
+docker run --rm tmppilot /bin/sh -c "$SETUP python -m unittest discover selfdrive/loggerd"
+docker run --rm -v "$(pwd)"/selfdrive/test/longitudinal_maneuvers/out:/tmp/openpilot/selfdrive/test/longitudinal_maneuvers/out tmppilot /bin/sh -c "$SETUP make -C selfdrive/can -j4 && cd /tmp/openpilot/selfdrive/test/longitudinal_maneuvers && OPTEST=1 ./test_longitudinal.py"
+docker run --rm tmppilot /bin/sh -c "$SETUP make -C selfdrive/can -j4 && cd /tmp/openpilot/selfdrive/test/process_replay/ && ./test_processes.py"
+docker run --rm tmppilot /bin/sh -c "$SETUP make -C selfdrive/can -j4 && mkdir -p /data/params && cd /tmp/openpilot/selfdrive/test/ && ./test_car_models.py"
diff --git a/selfdrive/athena/athenad.py b/selfdrive/athena/athenad.py
old mode 100755
new mode 100644
index 1474b346ba780d..d3b98e71314798
--- a/selfdrive/athena/athenad.py
+++ b/selfdrive/athena/athenad.py
@@ -10,22 +10,19 @@
import time
import threading
import traceback
-import zmq
import base64
import requests
-import six.moves.queue
+import queue
from functools import partial
from jsonrpc import JSONRPCResponseManager, dispatcher
from websocket import create_connection, WebSocketTimeoutException, ABNF
from selfdrive.loggerd.config import ROOT
-import selfdrive.crash as crash
import selfdrive.messaging as messaging
from common.api import Api
from common.params import Params
from selfdrive.services import service_list
from selfdrive.swaglog import cloudlog
-from selfdrive.version import version, dirty
from functools import reduce
ATHENA_HOST = os.getenv('ATHENA_HOST', 'wss://athena.comma.ai')
@@ -33,8 +30,8 @@
LOCAL_PORT_WHITELIST = set([8022])
dispatcher["echo"] = lambda s: s
-payload_queue = six.moves.queue.Queue()
-response_queue = six.moves.queue.Queue()
+payload_queue = queue.Queue()
+response_queue = queue.Queue()
def handle_long_poll(ws):
end_event = threading.Event()
@@ -66,7 +63,7 @@ def jsonrpc_handler(end_event):
data = payload_queue.get(timeout=1)
response = JSONRPCResponseManager.handle(data, dispatcher)
response_queue.put_nowait(response)
- except six.moves.queue.Empty:
+ except queue.Empty:
pass
except Exception as e:
cloudlog.exception("athena jsonrpc handler failed")
@@ -79,8 +76,8 @@ def jsonrpc_handler(end_event):
def getMessage(service=None, timeout=1000):
if service is None or service not in service_list:
raise Exception("invalid service")
- socket = messaging.sub_sock(service_list[service].port)
- socket.setsockopt(zmq.RCVTIMEO, timeout)
+ socket = messaging.sub_sock(service)
+ socket.setTimeout(timeout)
ret = messaging.recv_one(socket)
return ret.to_dict()
@@ -99,8 +96,6 @@ def uploadFileToUrl(fn, url, headers):
def startLocalProxy(global_end_event, remote_ws_uri, local_port):
try:
- cloudlog.event("athena startLocalProxy", remote_ws_uri=remote_ws_uri, local_port=local_port)
-
if local_port not in LOCAL_PORT_WHITELIST:
raise Exception("Requested local port not whitelisted")
@@ -169,9 +164,12 @@ def takeSnapshot():
ret = snapshot()
if ret is not None:
def b64jpeg(x):
- f = io.BytesIO()
- jpeg_write(f, x)
- return base64.b64encode(f.getvalue()).decode("utf-8")
+ if x is not None:
+ f = io.BytesIO()
+ jpeg_write(f, x)
+ return base64.b64encode(f.getvalue()).decode("utf-8")
+ else:
+ return None
return {'jpegBack': b64jpeg(ret[0]),
'jpegFront': b64jpeg(ret[1])}
else:
@@ -185,6 +183,7 @@ def ws_proxy_recv(ws, local_sock, ssock, end_event, global_end_event):
except WebSocketTimeoutException:
pass
except Exception:
+ cloudlog.exception("athenad.ws_proxy_recv.exception")
traceback.print_exc()
break
@@ -208,8 +207,9 @@ def ws_proxy_send(ws, local_sock, signal_sock, end_event):
ws.send(data, ABNF.OPCODE_BINARY)
except Exception:
- traceback.print_exc()
- end_event.set()
+ cloudlog.exception("athenad.ws_proxy_send.exception")
+ traceback.print_exc()
+ end_event.set()
def ws_recv(ws, end_event):
while not end_event.is_set():
@@ -219,6 +219,7 @@ def ws_recv(ws, end_event):
except WebSocketTimeoutException:
pass
except Exception:
+ cloudlog.exception("athenad.ws_recv.exception")
traceback.print_exc()
end_event.set()
@@ -227,9 +228,10 @@ def ws_send(ws, end_event):
try:
response = response_queue.get(timeout=1)
ws.send(response.json)
- except six.moves.queue.Empty:
+ except queue.Empty:
pass
except Exception:
+ cloudlog.exception("athenad.ws_send.exception")
traceback.print_exc()
end_event.set()
@@ -241,31 +243,26 @@ def main(gctx=None):
dongle_id = params.get("DongleId").decode('utf-8')
ws_uri = ATHENA_HOST + "/ws/v2/" + dongle_id
- crash.bind_user(id=dongle_id)
- crash.bind_extra(version=version, dirty=dirty, is_eon=True)
- crash.install()
-
api = Api(dongle_id)
conn_retries = 0
while 1:
try:
- print("connecting to %s" % ws_uri)
ws = create_connection(ws_uri,
cookie="jwt=" + api.get_token(),
enable_multithread=True)
+ cloudlog.event("athenad.main.connected_ws", ws_uri=ws_uri)
ws.settimeout(1)
conn_retries = 0
handle_long_poll(ws)
except (KeyboardInterrupt, SystemExit):
break
except Exception:
+ cloudlog.exception("athenad.main.exception")
conn_retries += 1
traceback.print_exc()
time.sleep(backoff(conn_retries))
- params.delete("AthenadPid")
-
if __name__ == "__main__":
main()
diff --git a/selfdrive/athena/manage_athenad.py b/selfdrive/athena/manage_athenad.py
new file mode 100644
index 00000000000000..034bfac5cb0dad
--- /dev/null
+++ b/selfdrive/athena/manage_athenad.py
@@ -0,0 +1,36 @@
+#!/usr/bin/env python3
+
+import time
+from multiprocessing import Process
+
+import selfdrive.crash as crash
+from common.params import Params
+from selfdrive.manager import launcher
+from selfdrive.swaglog import cloudlog
+from selfdrive.version import version, dirty
+
+ATHENA_MGR_PID_PARAM = "AthenadPid"
+
+def main():
+ params = Params()
+ dongle_id = params.get("DongleId").decode('utf-8')
+ cloudlog.bind_global(dongle_id=dongle_id, version=version, dirty=dirty, is_eon=True)
+ crash.bind_user(id=dongle_id)
+ crash.bind_extra(version=version, dirty=dirty, is_eon=True)
+ crash.install()
+
+ try:
+ while 1:
+ cloudlog.info("starting athena daemon")
+ proc = Process(name='athenad', target=launcher, args=('selfdrive.athena.athenad',))
+ proc.start()
+ proc.join()
+ cloudlog.event("athenad exited", exitcode=proc.exitcode)
+ time.sleep(5)
+ except:
+ cloudlog.exception("manage_athenad.exception")
+ finally:
+ params.delete(ATHENA_MGR_PID_PARAM)
+
+if __name__ == '__main__':
+ main()
\ No newline at end of file
diff --git a/selfdrive/boardd/Makefile b/selfdrive/boardd/Makefile
index 67a315d8d98e82..f9d0155c6f27f1 100644
--- a/selfdrive/boardd/Makefile
+++ b/selfdrive/boardd/Makefile
@@ -16,7 +16,8 @@ WARN_FLAGS = -Werror=implicit-function-declaration \
CFLAGS = -std=gnu11 -g -fPIC -I../ -I../../ -O2 $(WARN_FLAGS)
CXXFLAGS = -std=c++11 -g -fPIC -I../ -I../../ -O2 $(WARN_FLAGS)
-ZMQ_LIBS = -l:libczmq.a -l:libzmq.a -lgnustl_shared
+MESSAGING_FLAGS = -I$(BASEDIR)/selfdrive/messaging
+MESSAGING_LIBS = $(BASEDIR)/selfdrive/messaging/messaging.a
JSON_FLAGS = -I$(PHONELIBS)/json/src
@@ -31,13 +32,12 @@ EXTRA_LIBS = -lusb-1.0
ifeq ($(ARCH),aarch64)
CFLAGS += -mcpu=cortex-a57
CXXFLAGS += -mcpu=cortex-a57
+EXTRA_LIBS += -lgnustl_shared
endif
ifeq ($(ARCH),x86_64)
ZMQ_FLAGS = -I$(PHONELIBS)/zmq/aarch64/include
-ZMQ_LIBS = -L$(BASEDIR)/external/zmq/lib/ \
- -l:libczmq.a -l:libzmq.a
EXTRA_LIBS = -lusb-1.0 -lpthread
CXXFLAGS += -I/usr/include/libusb-1.0
CFLAGS += -I/usr/include/libusb-1.0
@@ -58,11 +58,10 @@ OBJS = boardd.o \
DEPS := $(OBJS:.o=.d)
-boardd: $(OBJS)
+boardd: $(OBJS) $(MESSAGING_LIBS)
@echo "[ LINK ] $@"
$(CXX) -fPIC -o '$@' $^ \
$(CEREAL_LIBS) \
- $(ZMQ_LIBS) \
$(EXTRA_LIBS)
boardd.o: boardd.cc
@@ -72,6 +71,7 @@ boardd.o: boardd.cc
$(CEREAL_CFLAGS) \
$(CEREAL_CXXFLAGS) \
$(ZMQ_FLAGS) \
+ $(MESSAGING_FLAGS) \
-I../ \
-I../../ \
-c -o '$@' '$<'
@@ -100,6 +100,7 @@ libcan_list_to_can_capnp.a: can_list_to_can_capnp.o $(CEREAL_OBJS)
-Iinclude -I.. -I../.. \
$(CEREAL_CXXFLAGS) \
$(ZMQ_FLAGS) \
+ $(MESSAGING_FLAGS) \
-c -o '$@' '$<'
.PHONY: clean
diff --git a/selfdrive/boardd/boardd.cc b/selfdrive/boardd/boardd.cc
index fde2b3ea21ca2d..b94bf3a3ed23f4 100644
--- a/selfdrive/boardd/boardd.cc
+++ b/selfdrive/boardd/boardd.cc
@@ -1,11 +1,12 @@
#include
+#include
#include
#include
#include
#include
#include
#include
-#include
+#include
#include
#include
#include
@@ -14,7 +15,6 @@
#include
#include
-#include
#include
#include
@@ -25,6 +25,7 @@
#include "common/params.h"
#include "common/swaglog.h"
#include "common/timing.h"
+#include "messaging.hpp"
#include
@@ -36,6 +37,16 @@ namespace {
volatile sig_atomic_t do_exit = 0;
+struct __attribute__((packed)) timestamp_t {
+ uint16_t year;
+ uint8_t month;
+ uint8_t day;
+ uint8_t weekday;
+ uint8_t hour;
+ uint8_t minute;
+ uint8_t second;
+};
+
libusb_context *ctx = NULL;
libusb_device_handle *dev_handle;
pthread_mutex_t usb_lock;
@@ -48,8 +59,7 @@ bool is_pigeon = false;
const uint32_t NO_IGNITION_CNT_MAX = 2 * 60 * 60 * 24 * 3; // turn off charge after 3 days
uint32_t no_ignition_cnt = 0;
bool connected_once = false;
-uint8_t ignition_last = 0;
-bool safety_model_locked = false;
+bool ignition_last = false;
pthread_t safety_setter_thread_handle = -1;
pthread_t pigeon_thread_handle = -1;
@@ -76,11 +86,9 @@ void *safety_setter_thread(void *s) {
LOGW("got CarVin %s", value_vin);
// VIN query done, stop listening to OBDII
- if (!safety_model_locked) {
- pthread_mutex_lock(&usb_lock);
- libusb_control_transfer(dev_handle, 0x40, 0xdc, (uint16_t)(cereal::CarParams::SafetyModel::NO_OUTPUT), 0, NULL, 0, TIMEOUT);
- pthread_mutex_unlock(&usb_lock);
- }
+ pthread_mutex_lock(&usb_lock);
+ libusb_control_transfer(dev_handle, 0x40, 0xdc, (uint16_t)(cereal::CarParams::SafetyModel::NO_OUTPUT), 0, NULL, 0, TIMEOUT);
+ pthread_mutex_unlock(&usb_lock);
char *value;
size_t value_sz = 0;
@@ -103,7 +111,7 @@ void *safety_setter_thread(void *s) {
capnp::FlatArrayMessageReader cmsg(amsg);
cereal::CarParams::Reader car_params = cmsg.getRoot();
- auto safety_model = car_params.getSafetyModel();
+ int safety_model = int(car_params.getSafetyModel());
auto safety_param = car_params.getSafetyParam();
LOGW("setting safety model: %d with param %d", safety_model, safety_param);
@@ -115,7 +123,7 @@ void *safety_setter_thread(void *s) {
// set if long_control is allowed by openpilot. Hardcoded to True for now
libusb_control_transfer(dev_handle, 0x40, 0xdf, 1, 0, NULL, 0, TIMEOUT);
- libusb_control_transfer(dev_handle, 0x40, 0xdc, (uint16_t)(cereal::CarParams::SafetyModel(safety_model)), safety_param, NULL, 0, TIMEOUT);
+ libusb_control_transfer(dev_handle, 0x40, 0xdc, safety_model, safety_param, NULL, 0, TIMEOUT);
pthread_mutex_unlock(&usb_lock);
@@ -126,12 +134,14 @@ void *safety_setter_thread(void *s) {
bool usb_connect() {
int err;
unsigned char hw_query[1] = {0};
- char *value_safety_model;
- size_t value_safety_model_sz = 0;
- int safety_model;
- const int result = read_db_value(NULL, "SafetyModelLock", &value_safety_model, &value_safety_model_sz);
+ unsigned char fw_ver_buf[64];
+ unsigned char serial_buf[16];
+ const char *fw_ver;
+ const char *serial;
+ int fw_ver_sz = 0;
+ int serial_sz = 0;
- ignition_last = 0;
+ ignition_last = false;
dev_handle = libusb_open_device_with_vid_pid(ctx, 0xbbaa, 0xddcc);
if (dev_handle == NULL) { goto fail; }
@@ -146,15 +156,26 @@ bool usb_connect() {
libusb_control_transfer(dev_handle, 0xc0, 0xe5, 1, 0, NULL, 0, TIMEOUT);
}
- // check if safety mode is forced (needed to support gm)
- if (value_safety_model_sz > 0) {
- sscanf(value_safety_model, "%d", &safety_model);
- // sanity check that we are not setting all output
- assert(safety_model != (int)(cereal::CarParams::SafetyModel::ALL_OUTPUT));
- safety_model_locked = true;
- LOGW("Setting Locked Safety Model %s", value_safety_model);
- libusb_control_transfer(dev_handle, 0x40, 0xdc, (uint16_t)(cereal::CarParams::SafetyModel(safety_model)), 0, NULL, 0, TIMEOUT);
+ // get panda fw
+ err = libusb_control_transfer(dev_handle, 0xc0, 0xd6, 0, 0, fw_ver_buf, 64, TIMEOUT);
+ if (err > 0) {
+ fw_ver = (const char *)fw_ver_buf;
+ fw_ver_sz = err;
+ write_db_value(NULL, "PandaFirmware", fw_ver, fw_ver_sz);
+ printf("panda fw: %.*s\n", fw_ver_sz, fw_ver);
}
+ else { goto fail; }
+
+ // get panda serial
+ err = libusb_control_transfer(dev_handle, 0xc0, 0xd0, 0, 0, serial_buf, 16, TIMEOUT);
+
+ if (err > 0) {
+ serial = (const char *)serial_buf;
+ serial_sz = strnlen(serial, err);
+ write_db_value(NULL, "PandaDongleId", serial, serial_sz);
+ printf("panda serial: %.*s\n", serial_sz, serial);
+ }
+ else { goto fail; }
// power off ESP
libusb_control_transfer(dev_handle, 0xc0, 0xd9, 0, 0, NULL, 0, TIMEOUT);
@@ -182,6 +203,38 @@ bool usb_connect() {
}
}
+ if (hw_type == cereal::HealthData::HwType::UNO){
+ // Get time from system
+ time_t rawtime;
+ time(&rawtime);
+
+ struct tm * sys_time = gmtime(&rawtime);
+
+ // Get time from RTC
+ timestamp_t rtc_time;
+ libusb_control_transfer(dev_handle, 0xc0, 0xa0, 0, 0, (unsigned char*)&rtc_time, sizeof(rtc_time), TIMEOUT);
+
+ //printf("System: %d-%d-%d\t%d:%d:%d\n", 1900 + sys_time->tm_year, 1 + sys_time->tm_mon, sys_time->tm_mday, sys_time->tm_hour, sys_time->tm_min, sys_time->tm_sec);
+ //printf("RTC: %d-%d-%d\t%d:%d:%d\n", rtc_time.year, rtc_time.month, rtc_time.day, rtc_time.hour, rtc_time.minute, rtc_time.second);
+
+ // Update system time from RTC if it looks off, and RTC time is good
+ if (1900 + sys_time->tm_year < 2019 && rtc_time.year >= 2019){
+ LOGE("System time wrong, setting from RTC");
+
+ struct tm new_time = { 0 };
+ new_time.tm_year = rtc_time.year - 1900;
+ new_time.tm_mon = rtc_time.month - 1;
+ new_time.tm_mday = rtc_time.day;
+ new_time.tm_hour = rtc_time.hour;
+ new_time.tm_min = rtc_time.minute;
+ new_time.tm_sec = rtc_time.second;
+
+ setenv("TZ","UTC",1);
+ const struct timeval tv = {mktime(&new_time), 0};
+ settimeofday(&tv, 0);
+ }
+ }
+
return true;
fail:
return false;
@@ -202,7 +255,7 @@ void handle_usb_issue(int err, const char func[]) {
// TODO: check other errors, is simply retrying okay?
}
-void can_recv(void *s) {
+void can_recv(PubSocket *publisher) {
int err;
uint32_t data[RECV_SIZE/4];
int recv;
@@ -256,10 +309,10 @@ void can_recv(void *s) {
// send to can
auto words = capnp::messageToFlatArray(msg);
auto bytes = words.asBytes();
- zmq_send(s, bytes.begin(), bytes.size(), 0);
+ publisher->send((char*)bytes.begin(), bytes.size());
}
-void can_health(void *s) {
+void can_health(PubSocket *publisher) {
int cnt;
int err;
@@ -270,11 +323,13 @@ void can_health(void *s) {
uint32_t can_send_errs;
uint32_t can_fwd_errs;
uint32_t gmlan_send_errs;
- uint8_t started;
+ uint8_t ignition_line;
+ uint8_t ignition_can;
uint8_t controls_allowed;
uint8_t gas_interceptor_detected;
uint8_t car_harness_status;
uint8_t usb_power_mode;
+ uint8_t safety_model;
} health;
// recv from board
@@ -289,7 +344,9 @@ void can_health(void *s) {
pthread_mutex_unlock(&usb_lock);
- if (health.started == 0) {
+ bool ignition = ((health.ignition_line != 0) || (health.ignition_can != 0));
+
+ if (!ignition) {
no_ignition_cnt += 1;
} else {
no_ignition_cnt = 0;
@@ -305,7 +362,7 @@ void can_health(void *s) {
#endif
// clear VIN, CarParams, and set new safety on car start
- if ((health.started != 0) && (ignition_last == 0)) {
+ if (ignition && !ignition_last) {
int result = delete_db_value(NULL, "CarVin");
assert((result == 0) || (result == ERR_NO_VALUE));
@@ -313,18 +370,46 @@ void can_health(void *s) {
assert((result == 0) || (result == ERR_NO_VALUE));
// diagnostic only is the default, needed for VIN query
- if (!safety_model_locked) {
- pthread_mutex_lock(&usb_lock);
- libusb_control_transfer(dev_handle, 0x40, 0xdc, (uint16_t)(cereal::CarParams::SafetyModel::ELM327), 0, NULL, 0, TIMEOUT);
- pthread_mutex_unlock(&usb_lock);
- }
+ pthread_mutex_lock(&usb_lock);
+ libusb_control_transfer(dev_handle, 0x40, 0xdc, (uint16_t)(cereal::CarParams::SafetyModel::ELM327), 0, NULL, 0, TIMEOUT);
+ pthread_mutex_unlock(&usb_lock);
+
if (safety_setter_thread_handle == -1) {
err = pthread_create(&safety_setter_thread_handle, NULL, safety_setter_thread, NULL);
assert(err == 0);
}
}
- ignition_last = health.started;
+ // Get fan RPM
+ uint16_t fan_speed_rpm = 0;
+
+ pthread_mutex_lock(&usb_lock);
+ int sz = libusb_control_transfer(dev_handle, 0xc0, 0xb2, 0, 0, (unsigned char*)&fan_speed_rpm, sizeof(fan_speed_rpm), TIMEOUT);
+ pthread_mutex_unlock(&usb_lock);
+
+ // Write to rtc once per minute when no ignition present
+ if ((hw_type == cereal::HealthData::HwType::UNO) && !ignition && (no_ignition_cnt % 120 == 1)){
+ // Get time from system
+ time_t rawtime;
+ time(&rawtime);
+
+ struct tm * sys_time = gmtime(&rawtime);
+
+ // Write time to RTC if it looks reasonable
+ if (1900 + sys_time->tm_year >= 2019){
+ pthread_mutex_lock(&usb_lock);
+ libusb_control_transfer(dev_handle, 0x40, 0xa1, (uint16_t)(1900 + sys_time->tm_year), 0, NULL, 0, TIMEOUT);
+ libusb_control_transfer(dev_handle, 0x40, 0xa2, (uint16_t)(1 + sys_time->tm_mon), 0, NULL, 0, TIMEOUT);
+ libusb_control_transfer(dev_handle, 0x40, 0xa3, (uint16_t)sys_time->tm_mday, 0, NULL, 0, TIMEOUT);
+ // libusb_control_transfer(dev_handle, 0x40, 0xa4, (uint16_t)(1 + sys_time->tm_wday), 0, NULL, 0, TIMEOUT);
+ libusb_control_transfer(dev_handle, 0x40, 0xa5, (uint16_t)sys_time->tm_hour, 0, NULL, 0, TIMEOUT);
+ libusb_control_transfer(dev_handle, 0x40, 0xa6, (uint16_t)sys_time->tm_min, 0, NULL, 0, TIMEOUT);
+ libusb_control_transfer(dev_handle, 0x40, 0xa7, (uint16_t)sys_time->tm_sec, 0, NULL, 0, TIMEOUT);
+ pthread_mutex_unlock(&usb_lock);
+ }
+ }
+
+ ignition_last = ignition;
// create message
capnp::MallocMessageBuilder msg;
@@ -336,10 +421,11 @@ void can_health(void *s) {
healthData.setVoltage(health.voltage);
healthData.setCurrent(health.current);
if (spoofing_started) {
- healthData.setStarted(1);
+ healthData.setIgnitionLine(1);
} else {
- healthData.setStarted(health.started);
+ healthData.setIgnitionLine(health.ignition_line);
}
+ healthData.setIgnitionCan(health.ignition_can);
healthData.setControlsAllowed(health.controls_allowed);
healthData.setGasInterceptorDetected(health.gas_interceptor_detected);
healthData.setHasGps(is_pigeon);
@@ -348,11 +434,13 @@ void can_health(void *s) {
healthData.setGmlanSendErrs(health.gmlan_send_errs);
healthData.setHwType(hw_type);
healthData.setUsbPowerMode(cereal::HealthData::UsbPowerMode(health.usb_power_mode));
+ healthData.setSafetyModel(cereal::CarParams::SafetyModel(health.safety_model));
+ healthData.setFanSpeedRpm(fan_speed_rpm);
// send to health
auto words = capnp::messageToFlatArray(msg);
auto bytes = words.asBytes();
- zmq_send(s, bytes.begin(), bytes.size(), 0);
+ publisher->send((char*)bytes.begin(), bytes.size());
pthread_mutex_lock(&usb_lock);
@@ -363,24 +451,20 @@ void can_health(void *s) {
}
-void can_send(void *s) {
+void can_send(SubSocket *subscriber) {
int err;
// recv from sendcan
- zmq_msg_t msg;
- zmq_msg_init(&msg);
- err = zmq_msg_recv(&msg, s, 0);
- assert(err >= 0);
+ Message * msg = subscriber->receive();
- // format for board, make copy due to alignment issues, will be freed on out of scope
- auto amsg = kj::heapArray((zmq_msg_size(&msg) / sizeof(capnp::word)) + 1);
- memcpy(amsg.begin(), zmq_msg_data(&msg), zmq_msg_size(&msg));
+ auto amsg = kj::heapArray((msg->getSize() / sizeof(capnp::word)) + 1);
+ memcpy(amsg.begin(), msg->getData(), msg->getSize());
capnp::FlatArrayMessageReader cmsg(amsg);
cereal::Event::Reader event = cmsg.getRoot();
if (nanos_since_boot() - event.getLogMonoTime() > 1e9) {
//Older than 1 second. Dont send.
- zmq_msg_close(&msg);
+ delete msg;
return;
}
int msg_count = event.getCan().size();
@@ -403,7 +487,7 @@ void can_send(void *s) {
}
// release msg
- zmq_msg_close(&msg);
+ delete msg;
// send to board
int sent;
@@ -428,15 +512,17 @@ void *can_send_thread(void *crap) {
LOGD("start send thread");
// sendcan = 8017
- void *context = zmq_ctx_new();
- void *subscriber = sub_sock(context, "tcp://127.0.0.1:8017");
+ Context * context = Context::create();
+ SubSocket * subscriber = SubSocket::create(context, "sendcan");
+
// drain sendcan to delete any stale messages from previous runs
- zmq_msg_t msg;
- zmq_msg_init(&msg);
- int err = 0;
- while(err >= 0) {
- err = zmq_msg_recv(&msg, subscriber, ZMQ_DONTWAIT);
+ while (true){
+ Message * msg = subscriber->receive(true);
+ if (msg == NULL){
+ break;
+ }
+ delete msg;
}
// run as fast as messages come in
@@ -450,9 +536,8 @@ void *can_recv_thread(void *crap) {
LOGD("start recv thread");
// can = 8006
- void *context = zmq_ctx_new();
- void *publisher = zmq_socket(context, ZMQ_PUB);
- zmq_bind(publisher, "tcp://*:8006");
+ Context * c = Context::create();
+ PubSocket * publisher = PubSocket::create(c, "can");
// run at 100hz
const uint64_t dt = 10000000ULL;
@@ -479,9 +564,8 @@ void *can_recv_thread(void *crap) {
void *can_health_thread(void *crap) {
LOGD("start health thread");
// health = 8011
- void *context = zmq_ctx_new();
- void *publisher = zmq_socket(context, ZMQ_PUB);
- zmq_bind(publisher, "tcp://*:8011");
+ Context * c = Context::create();
+ PubSocket * publisher = PubSocket::create(c, "health");
// run at 2hz
while (!do_exit) {
@@ -491,6 +575,69 @@ void *can_health_thread(void *crap) {
return NULL;
}
+void *hardware_control_thread(void *crap) {
+ LOGD("start hardware control thread");
+ Context * c = Context::create();
+ SubSocket * thermal_sock = SubSocket::create(c, "thermal");
+ SubSocket * driver_monitoring_sock = SubSocket::create(c, "driverMonitoring");
+
+ Poller * poller = Poller::create({thermal_sock, driver_monitoring_sock});
+
+ // Wait for hardware type to be set.
+ while (hw_type == cereal::HealthData::HwType::UNKNOWN){
+ usleep(100*1000);
+ }
+ // Only control fan speed on UNO
+ if (hw_type != cereal::HealthData::HwType::UNO) return NULL;
+
+
+ uint16_t prev_fan_speed = 999;
+ uint16_t prev_ir_pwr = 999;
+
+ while (!do_exit) {
+ for (auto sock : poller->poll(1000)){
+ Message * msg = sock->receive();
+ if (msg == NULL) continue;
+
+ auto amsg = kj::heapArray((msg->getSize() / sizeof(capnp::word)) + 1);
+ memcpy(amsg.begin(), msg->getData(), msg->getSize());
+
+ delete msg;
+
+ capnp::FlatArrayMessageReader cmsg(amsg);
+ cereal::Event::Reader event = cmsg.getRoot();
+
+ auto type = event.which();
+ if(type == cereal::Event::THERMAL){
+ uint16_t fan_speed = event.getThermal().getFanSpeed();
+ if (fan_speed != prev_fan_speed){
+ pthread_mutex_lock(&usb_lock);
+ libusb_control_transfer(dev_handle, 0x40, 0xb1, fan_speed, 0, NULL, 0, TIMEOUT);
+ pthread_mutex_unlock(&usb_lock);
+
+ prev_fan_speed = fan_speed;
+ }
+ } else if (type == cereal::Event::DRIVER_MONITORING){
+ uint16_t ir_pwr = 100.0 * event.getDriverMonitoring().getIrPwr();
+
+ if (ir_pwr != prev_ir_pwr){
+ pthread_mutex_lock(&usb_lock);
+ libusb_control_transfer(dev_handle, 0x40, 0xb0, ir_pwr, 0, NULL, 0, TIMEOUT);
+ pthread_mutex_unlock(&usb_lock);
+
+ prev_ir_pwr = ir_pwr;
+ }
+ }
+ }
+ }
+
+ delete poller;
+ delete thermal_sock;
+ delete c;
+
+ return NULL;
+}
+
#define pigeon_send(x) _pigeon_send(x, sizeof(x)-1)
void hexdump(unsigned char *d, int l) {
@@ -582,7 +729,7 @@ void pigeon_init() {
LOGW("panda GPS on");
}
-static void pigeon_publish_raw(void *publisher, unsigned char *dat, int alen) {
+static void pigeon_publish_raw(PubSocket *publisher, unsigned char *dat, int alen) {
// create message
capnp::MallocMessageBuilder msg;
cereal::Event::Builder event = msg.initRoot();
@@ -593,15 +740,14 @@ static void pigeon_publish_raw(void *publisher, unsigned char *dat, int alen) {
// send to ubloxRaw
auto words = capnp::messageToFlatArray(msg);
auto bytes = words.asBytes();
- zmq_send(publisher, bytes.begin(), bytes.size(), 0);
+ publisher->send((char*)bytes.begin(), bytes.size());
}
void *pigeon_thread(void *crap) {
// ubloxRaw = 8042
- void *context = zmq_ctx_new();
- void *publisher = zmq_socket(context, ZMQ_PUB);
- zmq_bind(publisher, "tcp://*:8042");
+ Context * context = Context::create();
+ PubSocket * publisher = PubSocket::create(context, "ubloxRaw");
// run at ~100hz
unsigned char dat[0x1000];
@@ -695,6 +841,11 @@ int main() {
can_recv_thread, NULL);
assert(err == 0);
+ pthread_t hardware_control_thread_handle;
+ err = pthread_create(&hardware_control_thread_handle, NULL,
+ hardware_control_thread, NULL);
+ assert(err == 0);
+
// join threads
err = pthread_join(can_recv_thread_handle, NULL);
diff --git a/selfdrive/boardd/tests/boardd_old.py b/selfdrive/boardd/tests/boardd_old.py
index 3f5ad7cf6c22b3..f963004423ab98 100755
--- a/selfdrive/boardd/tests/boardd_old.py
+++ b/selfdrive/boardd/tests/boardd_old.py
@@ -12,7 +12,6 @@
import selfdrive.messaging as messaging
from common.realtime import Ratekeeper
-from selfdrive.services import service_list
from selfdrive.swaglog import cloudlog
from selfdrive.boardd.boardd import can_capnp_to_can_list
from cereal import car
@@ -46,13 +45,13 @@ def can_list_to_can_capnp(can_msgs, msgtype='can'):
def can_health():
while 1:
try:
- dat = handle.controlRead(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xd2, 0, 0, 0x10)
+ dat = handle.controlRead(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xd2, 0, 0, 0x16)
break
except (USBErrorIO, USBErrorOverflow):
cloudlog.exception("CAN: BAD HEALTH, RETRYING")
- v, i, started = struct.unpack("IIB", dat[0:9])
- # TODO: units
- return {"voltage": v, "current": i, "started": bool(started)}
+ v, i = struct.unpack("II", dat[0:8])
+ ign_line, ign_can = struct.unpack("BB", dat[20:22])
+ return {"voltage": v, "current": i, "ignition_line": bool(ign_line), "ignition_can": bool(ign_can)}
def __parse_can_buffer(dat):
ret = []
@@ -111,8 +110,8 @@ def boardd_mock_loop():
can_init()
handle.controlWrite(0x40, 0xdc, SafetyModel.allOutput, 0, b'')
- logcan = messaging.sub_sock(service_list['can'].port)
- sendcan = messaging.pub_sock(service_list['sendcan'].port)
+ logcan = messaging.sub_sock('can')
+ sendcan = messaging.pub_sock('sendcan')
while 1:
tsc = messaging.drain_sock(logcan, wait_for_one=True)
@@ -150,24 +149,24 @@ def boardd_test_loop():
cnt += 1
# *** main loop ***
-def boardd_loop(rate=200):
+def boardd_loop(rate=100):
rk = Ratekeeper(rate)
can_init()
# *** publishes can and health
- logcan = messaging.pub_sock(service_list['can'].port)
- health_sock = messaging.pub_sock(service_list['health'].port)
+ logcan = messaging.pub_sock('can')
+ health_sock = messaging.pub_sock('health')
# *** subscribes to can send
- sendcan = messaging.sub_sock(service_list['sendcan'].port)
+ sendcan = messaging.sub_sock('sendcan')
# drain sendcan to delete any stale messages from previous runs
messaging.drain_sock(sendcan)
while 1:
- # health packet @ 1hz
- if (rk.frame%rate) == 0:
+ # health packet @ 2hz
+ if (rk.frame % (rate // 2)) == 0:
health = can_health()
msg = messaging.new_message()
msg.init('health')
@@ -175,7 +174,8 @@ def boardd_loop(rate=200):
# store the health to be logged
msg.health.voltage = health['voltage']
msg.health.current = health['current']
- msg.health.started = health['started']
+ msg.health.ignitionLine = health['ignition_line']
+ msg.health.ignitionCan = health['ignition_can']
msg.health.controlsAllowed = True
health_sock.send(msg.to_bytes())
@@ -197,15 +197,15 @@ def boardd_loop(rate=200):
rk.keep_time()
# *** main loop ***
-def boardd_proxy_loop(rate=200, address="192.168.2.251"):
+def boardd_proxy_loop(rate=100, address="192.168.2.251"):
rk = Ratekeeper(rate)
can_init()
# *** subscribes can
- logcan = messaging.sub_sock(service_list['can'].port, addr=address)
+ logcan = messaging.sub_sock('can', addr=address)
# *** publishes to can send
- sendcan = messaging.pub_sock(service_list['sendcan'].port)
+ sendcan = messaging.pub_sock('sendcan')
# drain sendcan to delete any stale messages from previous runs
messaging.drain_sock(sendcan)
diff --git a/selfdrive/boardd/tests/replay_many.py b/selfdrive/boardd/tests/replay_many.py
index 548ec6549adbaa..cd94806a87c5a9 100755
--- a/selfdrive/boardd/tests/replay_many.py
+++ b/selfdrive/boardd/tests/replay_many.py
@@ -2,34 +2,37 @@
import sys
import time
import signal
+import traceback
from panda import Panda
from multiprocessing import Pool
import selfdrive.messaging as messaging
-from selfdrive.services import service_list
from selfdrive.boardd.boardd import can_capnp_to_can_list
def initializer():
- """Ignore CTRL+C in the worker process.
- source: https://stackoverflow.com/a/44869451 """
- signal.signal(signal.SIGINT, signal.SIG_IGN)
+ """Ignore CTRL+C in the worker process.
+ source: https://stackoverflow.com/a/44869451 """
+ signal.signal(signal.SIGINT, signal.SIG_IGN)
def send_thread(serial):
- panda = Panda(serial)
- panda.set_safety_mode(Panda.SAFETY_ALLOUTPUT)
- panda.set_can_loopback(False)
-
- can_sock = messaging.sub_sock(service_list['can'].port)
-
- while True:
- # Send messages one bus 0 and 1
- tsc = messaging.recv_one(can_sock)
- snd = can_capnp_to_can_list(tsc.can)
- snd = filter(lambda x: x[-1] <= 2, snd)
- panda.can_send_many(snd)
-
- # Drain panda message buffer
- panda.can_recv()
+ try:
+ panda = Panda(serial)
+ panda.set_safety_mode(Panda.SAFETY_ALLOUTPUT)
+ panda.set_can_loopback(False)
+
+ can_sock = messaging.sub_sock('can')
+
+ while True:
+ # Send messages one bus 0 and 1
+ tsc = messaging.recv_one(can_sock)
+ snd = can_capnp_to_can_list(tsc.can)
+ snd = list(filter(lambda x: x[-1] <= 2, snd))
+ panda.can_send_many(snd)
+
+ # Drain panda message buffer
+ panda.can_recv()
+ except Exception:
+ traceback.print_exc()
if __name__ == "__main__":
diff --git a/selfdrive/boardd/tests/test_boardd_loopback.py b/selfdrive/boardd/tests/test_boardd_loopback.py
index c3992bdac44e80..fefb3bf254c001 100755
--- a/selfdrive/boardd/tests/test_boardd_loopback.py
+++ b/selfdrive/boardd/tests/test_boardd_loopback.py
@@ -7,7 +7,6 @@
from selfdrive.boardd.boardd import can_list_to_can_capnp
from selfdrive.messaging import drain_sock, pub_sock, sub_sock
-from selfdrive.services import service_list
def get_test_string():
return b"test"+os.urandom(10)
@@ -15,8 +14,8 @@ def get_test_string():
BUS = 0
def main():
- rcv = sub_sock(service_list['can'].port) # port 8006
- snd = pub_sock(service_list['sendcan'].port) # port 8017
+ rcv = sub_sock('can') # port 8006
+ snd = pub_sock('sendcan') # port 8017
time.sleep(0.3) # wait to bind before send/recv
for i in range(10):
diff --git a/selfdrive/can/Makefile b/selfdrive/can/Makefile
index 85d2c494a96699..cc1175b8c1413f 100644
--- a/selfdrive/can/Makefile
+++ b/selfdrive/can/Makefile
@@ -23,17 +23,6 @@ CFLAGS += -mcpu=cortex-a57
CXXFLAGS += -mcpu=cortex-a57
endif
-ifeq ($(UNAME_S),Darwin)
- ZMQ_LIBS = -L/usr/local/lib -lzmq
-else ifeq ($(OPTEST),1)
- ZMQ_LIBS = -lzmq
-else ifeq ($(UNAME_M),x86_64)
- ZMQ_FLAGS = -I$(PHONELIBS)/zmq/x64/include
- ZMQ_LIBS = -L$(PHONELIBS)/zmq/x64/lib -l:libzmq.a
-else ifeq ($(UNAME_M),aarch64)
- ZMQ_LIBS = -l:libzmq.a -lgnustl_shared
-endif
-
OBJDIR = obj
OPENDBC_PATH := $(shell python3 -c 'import opendbc; print(opendbc.DBC_PATH)')
@@ -43,7 +32,7 @@ DBC_OBJS := $(patsubst $(OPENDBC_PATH)/%.dbc,$(OBJDIR)/%.o,$(DBC_SOURCES))
DBC_CCS := $(patsubst $(OPENDBC_PATH)/%.dbc,dbc_out/%.cc,$(DBC_SOURCES))
.SECONDARY: $(DBC_CCS)
-LIBDBC_OBJS := $(OBJDIR)/dbc.o $(OBJDIR)/parser.o $(OBJDIR)/packer.o
+LIBDBC_OBJS := $(OBJDIR)/dbc.o $(OBJDIR)/parser.o $(OBJDIR)/packer.o $(OBJDIR)/common.o
CWD := $(shell pwd)
@@ -64,8 +53,6 @@ libdbc.so:: $(LIBDBC_OBJS) $(DBC_OBJS)
-I. -I../.. \
$(CXXFLAGS) \
$(LDFLAGS) \
- $(ZMQ_FLAGS) \
- $(ZMQ_LIBS) \
$(CEREAL_CXXFLAGS) \
$(CEREAL_LIBS)
@@ -74,8 +61,8 @@ packer_impl.so: packer_impl.pyx packer_setup.py
rm -rf build
rm -f packer_impl.cpp
-parser_pyx.so: parser_pyx_setup.py parser_pyx.pyx parser_pyx.pxd
- python3 $< build_ext --inplace
+parser_pyx.so: libdbc.so parser_pyx_setup.py parser_pyx.pyx common.pxd
+ python3 parser_pyx_setup.py build_ext --inplace
rm -rf build
rm -f parser_pyx.cpp
@@ -84,7 +71,6 @@ $(OBJDIR)/%.o: %.cc
$(CXX) -fPIC -c -o '$@' $^ \
-I. -I../.. \
$(CXXFLAGS) \
- $(ZMQ_FLAGS) \
$(CEREAL_CXXFLAGS) \
$(OBJDIR)/%.o: dbc_out/%.cc
@@ -92,13 +78,11 @@ $(OBJDIR)/%.o: dbc_out/%.cc
$(CXX) -fPIC -c -o '$@' $^ \
-I. -I../.. \
$(CXXFLAGS) \
- $(ZMQ_FLAGS) \
$(CEREAL_CXXFLAGS) \
dbc_out/%.cc: process_dbc.py dbc_template.cc $(OPENDBC_PATH)/%.dbc
@echo "[ DBC GEN ] $@"
- @echo "Missing prereq $?"
- ./process_dbc.py $(OPENDBC_PATH) dbc_out
+ ./process_dbc.py $(OPENDBC_PATH) '$@'
$(OBJDIR):
mkdir -p $@
@@ -109,4 +93,5 @@ clean:
rm -f dbc_out/*.cc
rm -f dbcs.txt
rm -f dbcs.csv
+ rm -f *.so
rm -rf $(OBJDIR)/*
diff --git a/selfdrive/can/can_define.py b/selfdrive/can/can_define.py
index d6ffc5c669e9fb..eb708869f09963 100644
--- a/selfdrive/can/can_define.py
+++ b/selfdrive/can/can_define.py
@@ -35,5 +35,5 @@ def __init__(self, dbc_name):
self.dv[msgname] = {}
# two ways to lookup: address or msg name
- self.dv[address][sgname] = {v: d for v, d in zip(values, defs)} #build dict
+ self.dv[address][sgname] = dict(zip(values, defs))
self.dv[msgname][sgname] = self.dv[address][sgname]
diff --git a/selfdrive/can/common.cc b/selfdrive/can/common.cc
new file mode 100644
index 00000000000000..5a131eb6c757af
--- /dev/null
+++ b/selfdrive/can/common.cc
@@ -0,0 +1,165 @@
+#include "common.h"
+
+unsigned int honda_checksum(unsigned int address, uint64_t d, int l) {
+ d >>= ((8-l)*8); // remove padding
+ d >>= 4; // remove checksum
+
+ int s = 0;
+ while (address) { s += (address & 0xF); address >>= 4; }
+ while (d) { s += (d & 0xF); d >>= 4; }
+ s = 8-s;
+ s &= 0xF;
+
+ return s;
+}
+
+unsigned int toyota_checksum(unsigned int address, uint64_t d, int l) {
+ d >>= ((8-l)*8); // remove padding
+ d >>= 8; // remove checksum
+
+ unsigned int s = l;
+ while (address) { s += address & 0xff; address >>= 8; }
+ while (d) { s += d & 0xff; d >>= 8; }
+
+ return s & 0xFF;
+}
+
+// Static lookup table for fast computation of CRC8 poly 0x2F, aka 8H2F/AUTOSAR
+uint8_t crc8_lut_8h2f[256];
+
+void gen_crc_lookup_table(uint8_t poly, uint8_t crc_lut[]) {
+ uint8_t crc;
+ int i, j;
+
+ for (i = 0; i < 256; i++) {
+ crc = i;
+ for (j = 0; j < 8; j++) {
+ if ((crc & 0x80) != 0)
+ crc = (uint8_t)((crc << 1) ^ poly);
+ else
+ crc <<= 1;
+ }
+ crc_lut[i] = crc;
+ }
+}
+
+void init_crc_lookup_tables() {
+ // At init time, set up static lookup tables for fast CRC computation.
+
+ gen_crc_lookup_table(0x2F, crc8_lut_8h2f); // CRC-8 8H2F/AUTOSAR for Volkswagen
+}
+
+unsigned int volkswagen_crc(unsigned int address, uint64_t d, int l) {
+ // Volkswagen uses standard CRC8 8H2F/AUTOSAR, but they compute it with
+ // a magic variable padding byte tacked onto the end of the payload.
+ // https://www.autosar.org/fileadmin/user_upload/standards/classic/4-3/AUTOSAR_SWS_CRCLibrary.pdf
+
+ uint8_t *dat = (uint8_t *)&d;
+ uint8_t crc = 0xFF; // Standard init value for CRC8 8H2F/AUTOSAR
+
+ // CRC the payload first, skipping over the first byte where the CRC lives.
+ for (int i = 1; i < l; i++) {
+ crc ^= dat[i];
+ crc = crc8_lut_8h2f[crc];
+ }
+
+ // Look up and apply the magic final CRC padding byte, which permutes by CAN
+ // address, and additionally (for SOME addresses) by the message counter.
+ uint8_t counter = dat[1] & 0x0F;
+ switch(address) {
+ case 0x86: // LWI_01 Steering Angle
+ crc ^= (uint8_t[]){0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86,0x86}[counter];
+ break;
+ case 0x9F: // EPS_01 Electric Power Steering
+ crc ^= (uint8_t[]){0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5,0xF5}[counter];
+ break;
+ case 0xAD: // Getriebe_11 Automatic Gearbox
+ crc ^= (uint8_t[]){0x3F,0x69,0x39,0xDC,0x94,0xF9,0x14,0x64,0xD8,0x6A,0x34,0xCE,0xA2,0x55,0xB5,0x2C}[counter];
+ break;
+ case 0xFD: // ESP_21 Electronic Stability Program
+ crc ^= (uint8_t[]){0xB4,0xEF,0xF8,0x49,0x1E,0xE5,0xC2,0xC0,0x97,0x19,0x3C,0xC9,0xF1,0x98,0xD6,0x61}[counter];
+ break;
+ case 0x106: // ESP_05 Electronic Stability Program
+ crc ^= (uint8_t[]){0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07}[counter];
+ break;
+ case 0x117: // ACC_10 Automatic Cruise Control
+ crc ^= (uint8_t[]){0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC,0xAC}[counter];
+ break;
+ case 0x122: // ACC_06 Automatic Cruise Control
+ crc ^= (uint8_t[]){0x37,0x7D,0xF3,0xA9,0x18,0x46,0x6D,0x4D,0x3D,0x71,0x92,0x9C,0xE5,0x32,0x10,0xB9}[counter];
+ break;
+ case 0x126: // HCA_01 Heading Control Assist
+ crc ^= (uint8_t[]){0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA,0xDA}[counter];
+ break;
+ case 0x12B: // GRA_ACC_01 Steering wheel controls for ACC
+ crc ^= (uint8_t[]){0x6A,0x38,0xB4,0x27,0x22,0xEF,0xE1,0xBB,0xF8,0x80,0x84,0x49,0xC7,0x9E,0x1E,0x2B}[counter];
+ break;
+ case 0x187: // EV_Gearshift "Gear" selection data for EVs with no gearbox
+ crc ^= (uint8_t[]){0x7F,0xED,0x17,0xC2,0x7C,0xEB,0x44,0x21,0x01,0xFA,0xDB,0x15,0x4A,0x6B,0x23,0x05}[counter];
+ break;
+ case 0x30C: // ACC_02 Automatic Cruise Control
+ crc ^= (uint8_t[]){0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F}[counter];
+ break;
+ case 0x3C0: // Klemmen_Status_01 ignition and starting status
+ crc ^= (uint8_t[]){0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3,0xC3}[counter];
+ break;
+ case 0x65D: // ESP_20 Electronic Stability Program
+ crc ^= (uint8_t[]){0xAC,0xB3,0xAB,0xEB,0x7A,0xE1,0x3B,0xF7,0x73,0xBA,0x7C,0x9E,0x06,0x5F,0x02,0xD9}[counter];
+ break;
+ default: // As-yet undefined CAN message, CRC check expected to fail
+ printf("Attempt to CRC check undefined Volkswagen message 0x%02X\n", address);
+ crc ^= (uint8_t[]){0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}[counter];
+ break;
+ }
+ crc = crc8_lut_8h2f[crc];
+
+ return crc ^ 0xFF; // Return after standard final XOR for CRC8 8H2F/AUTOSAR
+}
+
+
+unsigned int pedal_checksum(uint64_t d, int l) {
+ uint8_t crc = 0xFF;
+ uint8_t poly = 0xD5; // standard crc8
+
+ d >>= ((8-l)*8); // remove padding
+ d >>= 8; // remove checksum
+
+ uint8_t *dat = (uint8_t *)&d;
+
+ int i, j;
+ for (i = 0; i < l - 1; i++) {
+ crc ^= dat[i];
+ for (j = 0; j < 8; j++) {
+ if ((crc & 0x80) != 0) {
+ crc = (uint8_t)((crc << 1) ^ poly);
+ }
+ else {
+ crc <<= 1;
+ }
+ }
+ }
+ return crc;
+}
+
+
+uint64_t read_u64_be(const uint8_t* v) {
+ return (((uint64_t)v[0] << 56)
+ | ((uint64_t)v[1] << 48)
+ | ((uint64_t)v[2] << 40)
+ | ((uint64_t)v[3] << 32)
+ | ((uint64_t)v[4] << 24)
+ | ((uint64_t)v[5] << 16)
+ | ((uint64_t)v[6] << 8)
+ | (uint64_t)v[7]);
+}
+
+uint64_t read_u64_le(const uint8_t* v) {
+ return ((uint64_t)v[0]
+ | ((uint64_t)v[1] << 8)
+ | ((uint64_t)v[2] << 16)
+ | ((uint64_t)v[3] << 24)
+ | ((uint64_t)v[4] << 32)
+ | ((uint64_t)v[5] << 40)
+ | ((uint64_t)v[6] << 48)
+ | ((uint64_t)v[7] << 56));
+}
diff --git a/selfdrive/can/common.h b/selfdrive/can/common.h
index 4f097228432543..a496c3918b91ad 100644
--- a/selfdrive/can/common.h
+++ b/selfdrive/can/common.h
@@ -1,90 +1,59 @@
-#ifndef SELFDRIVE_CAN_COMMON_H
-#define SELFDRIVE_CAN_COMMON_H
+#pragma once
-#include
-#include
-#include
+#include
+#include
-#define ARRAYSIZE(x) (sizeof(x)/sizeof(x[0]))
+#include "common_dbc.h"
+#include
+#include "cereal/gen/cpp/log.capnp.h"
+#define MAX_BAD_COUNTER 5
+// Helper functions
unsigned int honda_checksum(unsigned int address, uint64_t d, int l);
unsigned int toyota_checksum(unsigned int address, uint64_t d, int l);
-unsigned int pedal_checksum(unsigned int address, uint64_t d, int l);
-
-struct SignalPackValue {
- const char* name;
- double value;
-};
-
-
-struct SignalParseOptions {
+void init_crc_lookup_tables();
+unsigned int volkswagen_crc(unsigned int address, uint64_t d, int l);
+unsigned int pedal_checksum(uint64_t d, int l);
+uint64_t read_u64_be(const uint8_t* v);
+uint64_t read_u64_le(const uint8_t* v);
+
+class MessageState {
+public:
uint32_t address;
- const char* name;
- double default_value;
-};
+ unsigned int size;
-struct MessageParseOptions {
- uint32_t address;
- int check_frequency;
-};
+ std::vector parse_sigs;
+ std::vector vals;
-struct SignalValue {
- uint32_t address;
uint16_t ts;
- const char* name;
- double value;
-};
+ uint64_t seen;
+ uint64_t check_threshold;
+ uint8_t counter;
+ uint8_t counter_fail;
-enum SignalType {
- DEFAULT,
- HONDA_CHECKSUM,
- HONDA_COUNTER,
- TOYOTA_CHECKSUM,
- PEDAL_CHECKSUM,
- PEDAL_COUNTER,
+ bool parse(uint64_t sec, uint16_t ts_, uint8_t * dat);
+ bool update_counter_generic(int64_t v, int cnt_size);
};
-struct Signal {
- const char* name;
- int b1, b2, bo;
- bool is_signed;
- double factor, offset;
- bool is_little_endian;
- SignalType type;
-};
+class CANParser {
+private:
+ const int bus;
-struct Msg {
- const char* name;
- uint32_t address;
- unsigned int size;
- size_t num_sigs;
- const Signal *sigs;
-};
-
-struct Val {
- const char* name;
- uint32_t address;
- const char* def_val;
- const Signal *sigs;
-};
-
-struct DBC {
- const char* name;
- size_t num_msgs;
- const Msg *msgs;
- const Val *vals;
- size_t num_vals;
-};
+ const DBC *dbc = NULL;
+ std::unordered_map message_states;
-const DBC* dbc_lookup(const std::string& dbc_name);
+public:
+ bool can_valid = false;
+ uint64_t last_sec = 0;
-void dbc_register(const DBC* dbc);
+ CANParser(int abus, const std::string& dbc_name,
+ const std::vector &options,
+ const std::vector &sigoptions);
+ void UpdateCans(uint64_t sec, const capnp::List::Reader& cans);
+ void UpdateValid(uint64_t sec);
+ void update_string(std::string data);
+ std::vector query_latest();
-#define dbc_init(dbc) \
-static void __attribute__((constructor)) do_dbc_init_ ## dbc(void) { \
- dbc_register(&dbc); \
-}
-
-#endif
+};
diff --git a/selfdrive/can/common.pxd b/selfdrive/can/common.pxd
new file mode 100644
index 00000000000000..54c6e444fdfcd8
--- /dev/null
+++ b/selfdrive/can/common.pxd
@@ -0,0 +1,71 @@
+# distutils: language = c++
+#cython: language_level=3
+
+from libc.stdint cimport uint32_t, uint64_t, uint16_t
+from libcpp.vector cimport vector
+from libcpp.map cimport map
+from libcpp.string cimport string
+from libcpp.unordered_set cimport unordered_set
+from libcpp cimport bool
+
+
+cdef extern from "common.h":
+
+ ctypedef enum SignalType:
+ DEFAULT,
+ HONDA_CHECKSUM,
+ HONDA_COUNTER,
+ TOYOTA_CHECKSUM,
+ PEDAL_CHECKSUM,
+ PEDAL_COUNTER
+
+ cdef struct Signal:
+ const char* name
+ int b1, b2, bo
+ bool is_signed
+ double factor, offset
+ SignalType type
+
+ cdef struct Msg:
+ const char* name
+ uint32_t address
+ unsigned int size
+ size_t num_sigs
+ const Signal *sigs
+
+ cdef struct Val:
+ const char* name
+ uint32_t address
+ const char* def_val
+ const Signal *sigs
+
+ cdef struct DBC:
+ const char* name
+ size_t num_msgs
+ const Msg *msgs
+ const Val *vals
+ size_t num_vals
+
+ cdef struct SignalParseOptions:
+ uint32_t address
+ const char* name
+ double default_value
+
+
+ cdef struct MessageParseOptions:
+ uint32_t address
+ int check_frequency
+
+ cdef struct SignalValue:
+ uint32_t address
+ uint16_t ts
+ const char* name
+ double value
+
+ cdef const DBC* dbc_lookup(const string);
+
+ cdef cppclass CANParser:
+ bool can_valid
+ CANParser(int, string, vector[MessageParseOptions], vector[SignalParseOptions])
+ void update_string(string)
+ vector[SignalValue] query_latest()
diff --git a/selfdrive/can/common_dbc.h b/selfdrive/can/common_dbc.h
new file mode 100644
index 00000000000000..ae6f443ec90cd3
--- /dev/null
+++ b/selfdrive/can/common_dbc.h
@@ -0,0 +1,82 @@
+#pragma once
+
+#include
+#include
+#include
+
+#define ARRAYSIZE(x) (sizeof(x)/sizeof(x[0]))
+
+struct SignalPackValue {
+ const char* name;
+ double value;
+};
+
+struct SignalParseOptions {
+ uint32_t address;
+ const char* name;
+ double default_value;
+};
+
+struct MessageParseOptions {
+ uint32_t address;
+ int check_frequency;
+};
+
+struct SignalValue {
+ uint32_t address;
+ uint16_t ts;
+ const char* name;
+ double value;
+};
+
+enum SignalType {
+ DEFAULT,
+ HONDA_CHECKSUM,
+ HONDA_COUNTER,
+ TOYOTA_CHECKSUM,
+ PEDAL_CHECKSUM,
+ PEDAL_COUNTER,
+ VOLKSWAGEN_CHECKSUM,
+ VOLKSWAGEN_COUNTER,
+};
+
+struct Signal {
+ const char* name;
+ int b1, b2, bo;
+ bool is_signed;
+ double factor, offset;
+ bool is_little_endian;
+ SignalType type;
+};
+
+struct Msg {
+ const char* name;
+ uint32_t address;
+ unsigned int size;
+ size_t num_sigs;
+ const Signal *sigs;
+};
+
+struct Val {
+ const char* name;
+ uint32_t address;
+ const char* def_val;
+ const Signal *sigs;
+};
+
+struct DBC {
+ const char* name;
+ size_t num_msgs;
+ const Msg *msgs;
+ const Val *vals;
+ size_t num_vals;
+};
+
+const DBC* dbc_lookup(const std::string& dbc_name);
+
+void dbc_register(const DBC* dbc);
+
+#define dbc_init(dbc) \
+static void __attribute__((constructor)) do_dbc_init_ ## dbc(void) { \
+ dbc_register(&dbc); \
+}
diff --git a/selfdrive/can/dbc.cc b/selfdrive/can/dbc.cc
index 95d5e4d791394a..6587de7fe0163a 100644
--- a/selfdrive/can/dbc.cc
+++ b/selfdrive/can/dbc.cc
@@ -1,7 +1,6 @@
-#include
#include
-#include "common.h"
+#include "common_dbc.h"
namespace {
diff --git a/selfdrive/can/dbc_template.cc b/selfdrive/can/dbc_template.cc
index 776403b22f03ff..d916eeada06a43 100644
--- a/selfdrive/can/dbc_template.cc
+++ b/selfdrive/can/dbc_template.cc
@@ -1,6 +1,4 @@
-#include
-
-#include "common.h"
+#include "common_dbc.h"
namespace {
@@ -27,6 +25,10 @@ const Signal sigs_{{address}}[] = {
.type = SignalType::HONDA_COUNTER,
{% elif checksum_type == "toyota" and sig.name == "CHECKSUM" %}
.type = SignalType::TOYOTA_CHECKSUM,
+ {% elif checksum_type == "volkswagen" and sig.name == "CHECKSUM" %}
+ .type = SignalType::VOLKSWAGEN_CHECKSUM,
+ {% elif checksum_type == "volkswagen" and sig.name == "COUNTER" %}
+ .type = SignalType::VOLKSWAGEN_COUNTER,
{% elif address in [512, 513] and sig.name == "CHECKSUM_PEDAL" %}
.type = SignalType::PEDAL_CHECKSUM,
{% elif address in [512, 513] and sig.name == "COUNTER_PEDAL" %}
diff --git a/selfdrive/can/libdbc_py.py b/selfdrive/can/libdbc_py.py
index fbf36a3d4d0764..92093f9316896e 100644
--- a/selfdrive/can/libdbc_py.py
+++ b/selfdrive/can/libdbc_py.py
@@ -5,7 +5,7 @@
can_dir = os.path.dirname(os.path.abspath(__file__))
libdbc_fn = os.path.join(can_dir, "libdbc.so")
-subprocess.check_call(["make"], cwd=can_dir)
+subprocess.check_call(["make", "-j3"], cwd=can_dir) # don't use all the cores to avoid overheating
ffi = FFI()
ffi.cdef("""
@@ -41,6 +41,8 @@
TOYOTA_CHECKSUM,
PEDAL_CHECKSUM,
PEDAL_COUNTER,
+ VOLKSWAGEN_CHECKSUM,
+ VOLKSWAGEN_COUNTER,
} SignalType;
typedef struct {
@@ -77,10 +79,9 @@
void* can_init(int bus, const char* dbc_name,
size_t num_message_options, const MessageParseOptions* message_options,
- size_t num_signal_options, const SignalParseOptions* signal_options, bool sendcan,
- const char* tcp_addr, int timeout);
+ size_t num_signal_options, const SignalParseOptions* signal_options);
-int can_update(void* can, uint64_t sec, bool wait);
+void can_update_string(void *can, const char* dat, int len);
size_t can_query_latest(void* can, bool *out_can_valid, size_t out_values_size, SignalValue* out_values);
diff --git a/selfdrive/can/packer.cc b/selfdrive/can/packer.cc
index d0e84197887a8f..c658e56731f3f3 100644
--- a/selfdrive/can/packer.cc
+++ b/selfdrive/can/packer.cc
@@ -1,6 +1,4 @@
#include
-#include
-#include
#include
#include
#include