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platformio.ini
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platformio.ini
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; PlatformIO Project Configuration File
;
; Build options: build flags, source filter
; Upload options: custom upload port, speed and extra flags
; Library options: dependencies, extra library storages
; Advanced options: extra scripting
;
; Please visit documentation for the other options and examples
; https://docs.platformio.org/page/projectconf.html
[platformio]
description = DCF77 Zeitsignal auswerten und RTC Uhr synchronisieren
;default_envs = pro8MHzatmega328
;default_envs = nanoatmega328
;default_envs = ATmega88P
default_envs = attiny88
[common]
compile_flags =
-Os
; -I $PROJECT_DIR/include
mybuild_flags =
; -D DEV_BOARD
; -D WIRE_FAST_MODE
; -D PRINT_TIME_SERIAL
; -D DEBUG_DCF77CONTROL
; -D DEBUG_ISR
; -D DEBUG_DCF77_SEQ_ADD_CHECK
; -D DEBUG_DCF77_SEQ
; -D SET_TEST_TIME
[env]
platform = atmelavr
framework = arduino
lib_deps =
watterott/digitalWriteFast @ ^1.0.0
kair/Button_SL @ ^1.1.4
build_type = release
build_flags =
${common.compile_flags}
${common.mybuild_flags}
monitor_speed = 9600
[env:nanoatmega328]
board = nanoatmega328new
board_upload.maximum_size = 32256
[env:pro8MHzatmega328]
board = pro8MHzatmega328
board_build.mcu = atmega328p
board_build.f_cpu = 8000000L
[env:ATmega88P]
board = ATmega88P
board_build.f_cpu = 1000000L
upload_protocol = stk500v2 ;Einstellung fuer ISP Programmer
upload_flags =
-e
-PCOM11 ;Einstellung fuer ISP Programmer
-v
-b 19200
[env:attiny88]
board = attiny88
board_build.f_cpu = 1000000L
; In version 1.3.3 and later, the clock source is also made available via the CLOCK_SOURCE #define.
; CLOCK_SOURCE can take one of the following values (as of 1.4.0, it is expanded
; to cover a few weird clocking situations: the low 4 bits identify the source, and high 4 bits
; identify special things regarding it:
; 0 - Internal 8MHz oscillator, not prescaled, or prescaled to 1 MHz (ie, fully set by fuses)
; 1 - External Crystal
; 2 - External Clock (only available within the core on the 48, 88 and 828, as described above - note that
; above steps to use external clock on other parts, this will still be 1, not 2; as far as the core knows, it's a crystal)
; 3 - Internal WDT oscillator (not available on the x41, 1634, and 828)
; 4 - Internal ULP oscillator (available only on the x41, 1634, and 828)
; 5 - Internal 4MHz oscillator (present only on the x313 parts - if the 8MHz internal oscillator is prescaled to 4MHz, CLOCK_SOURCE will be 0, not 5)
; 6 - Internal PLL (x5 and x61 only)
; 15 or 0x10 (ie, 0x10 | 0) - Internal oscillator with prescaling not set by fuses (ie, not 1 MHz or 8 MHz - ie, 2 or 4 MHz)
; 17 or 0x11 (ie, 0x10 | 1) - External crystal at 16MHz, which may be prescaled to get lower frequencies (for Digispark Pro ATtiny167)
; 18 or 0x12 (ie, 0x10 | 2) - External clock at 16MHz, which may be prescaled to get lower frequencies (for MH Tiny ATtiny88)
; Standard ATtiny board setting is clock source 18! Thats wrong!
build_unflags = -DCLOCK_SOURCE=18 ; undef incorrect preset (Only useful for MH Tiny ATtiny88 Devboard)
build_flags = -DCLOCK_SOURCE=0 ; correct preset for bare ATtiny
${common.compile_flags}
${common.mybuild_flags}
upload_protocol = stk500v2 ;Einstellung fuer ISP Programmer
upload_flags =
-PCOM5 ;Einstellung fuer ISP Programmer
-v
monitor_port = COM10