From 5e67474452430f3193ce945c71cf0652247ab25a Mon Sep 17 00:00:00 2001 From: Assad Hashmi Date: Thu, 18 Nov 2021 11:00:25 +0000 Subject: [PATCH 1/4] i#2440: AArch64 v8.0 codec: add CCMP and CCMN INSTR_CREATE macros This adds immediate and register variants of CCMP and CCMN to the codec. The implementation also addresses the issues raised in PR4500. Issues: #2440, #2443, #2626 --- core/ir/aarch64/codec.c | 58 +++++ core/ir/aarch64/codec.txt | 8 +- core/ir/aarch64/disassemble.c | 6 + core/ir/aarch64/instr_create_api.h | 34 +++ suite/tests/api/dis-a64.txt | 404 ++++++++++++++++++++++++++++- suite/tests/api/ir_aarch64.c | 121 +++++++++ suite/tests/api/ir_aarch64.expect | 257 ++++++++++++++++++ 7 files changed, 875 insertions(+), 13 deletions(-) diff --git a/core/ir/aarch64/codec.c b/core/ir/aarch64/codec.c index 700a26ab662..ccffdc744e9 100644 --- a/core/ir/aarch64/codec.c +++ b/core/ir/aarch64/codec.c @@ -4342,6 +4342,64 @@ encode_opnds_bcond(byte *pc, instr_t *instr, uint enc, decode_info_t *di) return ENCFAIL; } +/* ccm: operands for conditional compare instructions */ + +static inline bool +decode_opnds_ccm(uint enc, dcontext_t *dcontext, byte *pc, instr_t *instr, int opcode) +{ + instr_set_opcode(instr, opcode); + instr_set_num_opnds(dcontext, instr, 0, 3); + + /* Rn */ + opnd_t rn; + if (!decode_opnd_rn(false, 5, enc, &rn)) + return false; + instr_set_src(instr, 0, rn); + + opnd_t rm; + if (TEST(1U << 11, enc)) /* imm5 */ + instr_set_src(instr, 1, opnd_create_immed_int(extract_uint(enc, 16, 5), OPSZ_5b)); + else if (!decode_opnd_rn(false, 16, enc, &rm)) /* Rm */ + return false; + else + instr_set_src(instr, 1, rm); + + /* nzcv */ + instr_set_src(instr, 2, opnd_create_immed_int(extract_uint(enc, 0, 4), OPSZ_4b)); + /* cond */ + instr_set_predicate(instr, DR_PRED_EQ + extract_uint(enc, 12, 4)); + + return true; +} + +static inline uint +encode_opnds_ccm(byte *pc, instr_t *instr, uint enc, decode_info_t *di) +{ + uint rn; + uint rm_imm5 = 0; + uint imm5_flag = 0; + if (instr_num_dsts(instr) == 0 && instr_num_srcs(instr) == 3 && + encode_opnd_rn(false, 5, instr_get_src(instr, 0), &rn) && /* Rn */ + opnd_is_immed_int(instr_get_src(instr, 2)) && /* nzcv */ + (uint)(instr_get_predicate(instr) - DR_PRED_EQ) < 16) /* cond */ + { + uint nzcv = opnd_get_immed_int(instr_get_src(instr, 2)); + uint cond = instr_get_predicate(instr) - DR_PRED_EQ; + if (opnd_is_immed_int(instr_get_src(instr, 1))) { /* imm5 */ + rm_imm5 = opnd_get_immed_int(instr_get_src(instr, 1)) << 16; + imm5_flag = 1; + } + else if (opnd_is_reg(instr_get_src(instr, 1))) { /* Rm */ + encode_opnd_rn(false, 16, instr_get_src(instr, 1), &rm_imm5); + } + else + return ENCFAIL; + return (enc | nzcv | rn | (imm5_flag << 11) | rm_imm5 | (cond << 12)); + } + + return ENCFAIL; +} + /* cbz: used for CBNZ and CBZ */ static inline bool diff --git a/core/ir/aarch64/codec.txt b/core/ir/aarch64/codec.txt index 132550c1b8a..6d4d39ac482 100644 --- a/core/ir/aarch64/codec.txt +++ b/core/ir/aarch64/codec.txt @@ -348,10 +348,10 @@ x1101010xx1xxxxxxxxxxxxxxxxxxxxx w 30 bics wx0 : wx5 wx16 s 01001000001xxxxx111111xxxxxxxxxx n 53 caspl x16p0 x16p1 mem0p : x16p0 x16p1 x0p0 x0p1 mem0p x0110101xxxxxxxxxxxxxxxxxxxxxxxx n 54 cbnz cbz x0110100xxxxxxxxxxxxxxxxxxxxxxxx n 55 cbz cbz -x0111010010xxxxxxxxx00xxxxx0xxxx rw 56 ccmn : wx5 wx16 nzcv cond -x0111010010xxxxxxxxx10xxxxx0xxxx rw 56 ccmn : wx5 imm5 nzcv cond -x1111010010xxxxxxxxx00xxxxx0xxxx rw 57 ccmp : wx5 wx16 nzcv cond -x1111010010xxxxxxxxx10xxxxx0xxxx rw 57 ccmp : wx5 imm5 nzcv cond +x0111010010xxxxxxxxx00xxxxx0xxxx w 56 ccmn ccm +x0111010010xxxxxxxxx10xxxxx0xxxx w 56 ccmn ccm +x1111010010xxxxxxxxx00xxxxx0xxxx w 57 ccmp ccm +x1111010010xxxxxxxxx10xxxxx0xxxx w 57 ccmp ccm 11010101000000110011xxxx01011111 n 58 clrex : imm4 x101101011000000000101xxxxxxxxxx n 59 cls wx0 : wx5 0x001110xx100000010010xxxxxxxxxx n 59 cls dq0 : dq5 bhs_sz diff --git a/core/ir/aarch64/disassemble.c b/core/ir/aarch64/disassemble.c index 219344a92a9..6f815728a3e 100644 --- a/core/ir/aarch64/disassemble.c +++ b/core/ir/aarch64/disassemble.c @@ -148,6 +148,12 @@ print_opcode_name(instr_t *instr, const char *name, char *buf, size_t bufsz, if (instr_get_opcode(instr) == OP_bcond) { print_to_buffer(buf, bufsz, sofar, "b.%s", pred_names[instr_get_predicate(instr)]); + } else if (instr_get_opcode(instr) == OP_ccmp) { + print_to_buffer(buf, bufsz, sofar, "ccmp.%s", + pred_names[instr_get_predicate(instr)]); + } else if (instr_get_opcode(instr) == OP_ccmn) { + print_to_buffer(buf, bufsz, sofar, "ccmn.%s", + pred_names[instr_get_predicate(instr)]); } else print_to_buffer(buf, bufsz, sofar, "%s", name); } diff --git a/core/ir/aarch64/instr_create_api.h b/core/ir/aarch64/instr_create_api.h index d974eb6d58a..58eb00d5a0c 100644 --- a/core/ir/aarch64/instr_create_api.h +++ b/core/ir/aarch64/instr_create_api.h @@ -567,6 +567,40 @@ enum { #define INSTR_CREATE_bl(dc, pc) \ instr_create_1dst_1src((dc), OP_bl, opnd_create_reg(DR_REG_X30), (pc)) +/** + * Creates a CCMP (Conditional Compare) instruction. Sets the NZCV flags to the + * result of a comparison of its two source values if the named input condition + * is true, or to an immediate value if the input condition is false. + * \param dc The void * dcontext used to allocate memory for the instr_t. + * \param Rn The GPR source register. + * \param Op Either a 5-bit immediate (use opnd_create_immed_uint(val, OPSZ_5b) + * to create the operand) or a GPR source register. + * \param nzcv The 4 bit NZCV flags bit specifier + * (use opnd_create_immed_uint(val, OPSZ_4b) to create the operand). + * \param cond The comparison condition specified by dr_pred_type_t, e.g. DR_PRED_EQ. + * (use opnd_create_cond(val) to create the operand). + */ +#define INSTR_CREATE_ccmp(dc, Rn, Op, nzcv, cond) \ + (INSTR_PRED(instr_create_0dst_3src(dc, OP_ccmp, Rn, Op, nzcv), (cond))) + +/** + * Creates a CCMN (Conditional Compare Negative) instruction. Sets the NZCV + * flags to the result of a comparison of its two source values if the named + * input condition is true, or to an immediate value if the input condition is + * false. The comparison is based on a negated second source value (Op) if an + * immediate, inverted if a register. + * \param dc The void * dcontext used to allocate memory for the instr_t. + * \param Rn The GPR source register. + * \param Op Either a 5-bit immediate (use opnd_create_immed_uint(val, OPSZ_5b) + * to create the operand) or a GPR source register. + * \param nzcv The 4 bit NZCV flags bit specifier + * (use opnd_create_immed_uint(val, OPSZ_4b) to create the operand). + * \param cond The comparison condition specified by dr_pred_type_t, e.g. DR_PRED_EQ. + * (use opnd_create_cond(val) to create the operand). + */ +#define INSTR_CREATE_ccmn(dc, Rn, Op, nzcv, cond) \ + (INSTR_PRED(instr_create_0dst_3src(dc, OP_ccmn, Rn, Op, nzcv), (cond))) + /** \cond disabled_until_i4106_is_fixed */ #define INSTR_CREATE_adc(dc, Rd, Rn, Rm) \ instr_create_1dst_2src((dc), OP_adc, (Rd), (Rn), (Rm)) diff --git a/suite/tests/api/dis-a64.txt b/suite/tests/api/dis-a64.txt index de45e434d77..711e739333c 100644 --- a/suite/tests/api/dis-a64.txt +++ b/suite/tests/api/dis-a64.txt @@ -598,15 +598,401 @@ b5ffffff : cbnz xzr, ffffffc : cbnz $0x000000000ffffffc %xzr 347fffff : cbz wzr, 100ffffc : cbz $0x00000000100ffffc %wzr b4ffffff : cbz xzr, ffffffc : cbz $0x000000000ffffffc %xzr -3a40f820 : ccmn w1, #0x0, #0x0, nv : ccmn %w1 $0x00 $0x00 nv -3a42f020 : ccmn w1, w2, #0x0, nv : ccmn %w1 %w2 $0x00 nv -ba55d822 : ccmn x1, #0x15, #0x2, le : ccmn %x1 $0x15 $0x02 le -ba5fd022 : ccmn x1, xzr, #0x2, le : ccmn %x1 %xzr $0x02 le - -7a42e3e1 : ccmp wzr, w2, #0x1, al : ccmp %wzr %w2 $0x01 al -7a4aebe1 : ccmp wzr, #0xa, #0x1, al : ccmp %wzr $0x0a $0x01 al -fa42c023 : ccmp x1, x2, #0x3, gt : ccmp %x1 %x2 $0x03 gt -fa5fc823 : ccmp x1, #0x1f, #0x3, gt : ccmp %x1 $0x1f $0x03 gt +# CCMN , #, #, +3a56080e : ccmn w0, #0x16, #0xe, eq : ccmn.eq %w0 $0x16 $0x0e +3a581821 : ccmn w1, #0x18, #0x1, ne : ccmn.ne %w1 $0x18 $0x01 +3a5f2841 : ccmn w2, #0x1f, #0x1, cs : ccmn.cs %w2 $0x1f $0x01 +3a44386e : ccmn w3, #0x4, #0xe, cc : ccmn.cc %w3 $0x04 $0x0e +3a5c4885 : ccmn w4, #0x1c, #0x5, mi : ccmn.mi %w4 $0x1c $0x05 +3a4058ad : ccmn w5, #0x0, #0xd, pl : ccmn.pl %w5 $0x00 $0x0d +3a4a68cd : ccmn w6, #0xa, #0xd, vs : ccmn.vs %w6 $0x0a $0x0d +3a5478ef : ccmn w7, #0x14, #0xf, vc : ccmn.vc %w7 $0x14 $0x0f +3a588908 : ccmn w8, #0x18, #0x8, hi : ccmn.hi %w8 $0x18 $0x08 +3a489928 : ccmn w9, #0x8, #0x8, ls : ccmn.ls %w9 $0x08 $0x08 +3a43a94c : ccmn w10, #0x3, #0xc, ge : ccmn.ge %w10 $0x03 $0x0c +3a4bb96d : ccmn w11, #0xb, #0xd, lt : ccmn.lt %w11 $0x0b $0x0d +3a4ac98d : ccmn w12, #0xa, #0xd, gt : ccmn.gt %w12 $0x0a $0x0d +3a59d9ab : ccmn w13, #0x19, #0xb, le : ccmn.le %w13 $0x19 $0x0b +3a5ee9c7 : ccmn w14, #0x1e, #0x7, al : ccmn.al %w14 $0x1e $0x07 +3a43f9e5 : ccmn w15, #0x3, #0x5, nv : ccmn.nv %w15 $0x03 $0x05 +3a5b1a08 : ccmn w16, #0x1b, #0x8, ne : ccmn.ne %w16 $0x1b $0x08 +3a562a28 : ccmn w17, #0x16, #0x8, cs : ccmn.cs %w17 $0x16 $0x08 +3a483a41 : ccmn w18, #0x8, #0x1, cc : ccmn.cc %w18 $0x08 $0x01 +3a494a6a : ccmn w19, #0x9, #0xa, mi : ccmn.mi %w19 $0x09 $0x0a +3a4d5a8d : ccmn w20, #0xd, #0xd, pl : ccmn.pl %w20 $0x0d $0x0d +3a496aa6 : ccmn w21, #0x9, #0x6, vs : ccmn.vs %w21 $0x09 $0x06 +3a597acf : ccmn w22, #0x19, #0xf, vc : ccmn.vc %w22 $0x19 $0x0f +3a568ae3 : ccmn w23, #0x16, #0x3, hi : ccmn.hi %w23 $0x16 $0x03 +3a4d9b03 : ccmn w24, #0xd, #0x3, ls : ccmn.ls %w24 $0x0d $0x03 +3a48ab2f : ccmn w25, #0x8, #0xf, ge : ccmn.ge %w25 $0x08 $0x0f +3a41bb4e : ccmn w26, #0x1, #0xe, lt : ccmn.lt %w26 $0x01 $0x0e +3a4acb68 : ccmn w27, #0xa, #0x8, gt : ccmn.gt %w27 $0x0a $0x08 +3a5fdb8e : ccmn w28, #0x1f, #0xe, le : ccmn.le %w28 $0x1f $0x0e +3a4aebac : ccmn w29, #0xa, #0xc, al : ccmn.al %w29 $0x0a $0x0c +3a4dfbc2 : ccmn w30, #0xd, #0x2, nv : ccmn.nv %w30 $0x0d $0x02 +ba5fd022 : ccmn x1, xzr, #0x2, le : ccmn.le %x1 %xzr $0x02 + +# CCMN , #, #, +ba510805 : ccmn x0, #0x11, #0x5, eq : ccmn.eq %x0 $0x11 $0x05 +ba50182f : ccmn x1, #0x10, #0xf, ne : ccmn.ne %x1 $0x10 $0x0f +ba442841 : ccmn x2, #0x4, #0x1, cs : ccmn.cs %x2 $0x04 $0x01 +ba593861 : ccmn x3, #0x19, #0x1, cc : ccmn.cc %x3 $0x19 $0x01 +ba54488c : ccmn x4, #0x14, #0xc, mi : ccmn.mi %x4 $0x14 $0x0c +ba4c58a6 : ccmn x5, #0xc, #0x6, pl : ccmn.pl %x5 $0x0c $0x06 +ba5868c4 : ccmn x6, #0x18, #0x4, vs : ccmn.vs %x6 $0x18 $0x04 +ba4e78e5 : ccmn x7, #0xe, #0x5, vc : ccmn.vc %x7 $0x0e $0x05 +ba53890f : ccmn x8, #0x13, #0xf, hi : ccmn.hi %x8 $0x13 $0x0f +ba529921 : ccmn x9, #0x12, #0x1, ls : ccmn.ls %x9 $0x12 $0x01 +ba4fa941 : ccmn x10, #0xf, #0x1, ge : ccmn.ge %x10 $0x0f $0x01 +ba46b964 : ccmn x11, #0x6, #0x4, lt : ccmn.lt %x11 $0x06 $0x04 +ba5bc98b : ccmn x12, #0x1b, #0xb, gt : ccmn.gt %x12 $0x1b $0x0b +ba5fd9ad : ccmn x13, #0x1f, #0xd, le : ccmn.le %x13 $0x1f $0x0d +ba4fe9cc : ccmn x14, #0xf, #0xc, al : ccmn.al %x14 $0x0f $0x0c +ba4cf9ed : ccmn x15, #0xc, #0xd, nv : ccmn.nv %x15 $0x0c $0x0d +ba5b1a02 : ccmn x16, #0x1b, #0x2, ne : ccmn.ne %x16 $0x1b $0x02 +ba492a20 : ccmn x17, #0x9, #0x0, cs : ccmn.cs %x17 $0x09 $0x00 +ba453a40 : ccmn x18, #0x5, #0x0, cc : ccmn.cc %x18 $0x05 $0x00 +ba574a67 : ccmn x19, #0x17, #0x7, mi : ccmn.mi %x19 $0x17 $0x07 +ba5d5a88 : ccmn x20, #0x1d, #0x8, pl : ccmn.pl %x20 $0x1d $0x08 +ba416aa0 : ccmn x21, #0x1, #0x0, vs : ccmn.vs %x21 $0x01 $0x00 +ba477ac6 : ccmn x22, #0x7, #0x6, vc : ccmn.vc %x22 $0x07 $0x06 +ba4a8ae9 : ccmn x23, #0xa, #0x9, hi : ccmn.hi %x23 $0x0a $0x09 +ba5d9b0a : ccmn x24, #0x1d, #0xa, ls : ccmn.ls %x24 $0x1d $0x0a +ba5aab2e : ccmn x25, #0x1a, #0xe, ge : ccmn.ge %x25 $0x1a $0x0e +ba47bb44 : ccmn x26, #0x7, #0x4, lt : ccmn.lt %x26 $0x07 $0x04 +ba53cb6a : ccmn x27, #0x13, #0xa, gt : ccmn.gt %x27 $0x13 $0x0a +ba46db81 : ccmn x28, #0x6, #0x1, le : ccmn.le %x28 $0x06 $0x01 +ba4aeba4 : ccmn x29, #0xa, #0x4, al : ccmn.al %x29 $0x0a $0x04 +ba59fbce : ccmn x30, #0x19, #0xe, nv : ccmn.nv %x30 $0x19 $0x0e + +# CCMN , , #, +3a400008 : ccmn w0, w0, #0x8, eq : ccmn.eq %w0 %w0 $0x08 +3a411025 : ccmn w1, w1, #0x5, ne : ccmn.ne %w1 %w1 $0x05 +3a42204b : ccmn w2, w2, #0xb, cs : ccmn.cs %w2 %w2 $0x0b +3a433062 : ccmn w3, w3, #0x2, cc : ccmn.cc %w3 %w3 $0x02 +3a44408a : ccmn w4, w4, #0xa, mi : ccmn.mi %w4 %w4 $0x0a +3a4550af : ccmn w5, w5, #0xf, pl : ccmn.pl %w5 %w5 $0x0f +3a4660c2 : ccmn w6, w6, #0x2, vs : ccmn.vs %w6 %w6 $0x02 +3a4770e7 : ccmn w7, w7, #0x7, vc : ccmn.vc %w7 %w7 $0x07 +3a488107 : ccmn w8, w8, #0x7, hi : ccmn.hi %w8 %w8 $0x07 +3a499121 : ccmn w9, w9, #0x1, ls : ccmn.ls %w9 %w9 $0x01 +3a4aa144 : ccmn w10, w10, #0x4, ge : ccmn.ge %w10 %w10 $0x04 +3a4bb163 : ccmn w11, w11, #0x3, lt : ccmn.lt %w11 %w11 $0x03 +3a4cc18e : ccmn w12, w12, #0xe, gt : ccmn.gt %w12 %w12 $0x0e +3a4dd1ac : ccmn w13, w13, #0xc, le : ccmn.le %w13 %w13 $0x0c +3a4ee1ca : ccmn w14, w14, #0xa, al : ccmn.al %w14 %w14 $0x0a +3a4ff1e1 : ccmn w15, w15, #0x1, nv : ccmn.nv %w15 %w15 $0x01 +3a501204 : ccmn w16, w16, #0x4, ne : ccmn.ne %w16 %w16 $0x04 +3a512227 : ccmn w17, w17, #0x7, cs : ccmn.cs %w17 %w17 $0x07 +3a52324a : ccmn w18, w18, #0xa, cc : ccmn.cc %w18 %w18 $0x0a +3a534266 : ccmn w19, w19, #0x6, mi : ccmn.mi %w19 %w19 $0x06 +3a545281 : ccmn w20, w20, #0x1, pl : ccmn.pl %w20 %w20 $0x01 +3a5562a2 : ccmn w21, w21, #0x2, vs : ccmn.vs %w21 %w21 $0x02 +3a5672ca : ccmn w22, w22, #0xa, vc : ccmn.vc %w22 %w22 $0x0a +3a5782e2 : ccmn w23, w23, #0x2, hi : ccmn.hi %w23 %w23 $0x02 +3a58930b : ccmn w24, w24, #0xb, ls : ccmn.ls %w24 %w24 $0x0b +3a59a325 : ccmn w25, w25, #0x5, ge : ccmn.ge %w25 %w25 $0x05 +3a5ab34b : ccmn w26, w26, #0xb, lt : ccmn.lt %w26 %w26 $0x0b +3a5bc36b : ccmn w27, w27, #0xb, gt : ccmn.gt %w27 %w27 $0x0b +3a5cd385 : ccmn w28, w28, #0x5, le : ccmn.le %w28 %w28 $0x05 +3a5de3a0 : ccmn w29, w29, #0x0, al : ccmn.al %w29 %w29 $0x00 +3a5ef3ca : ccmn w30, w30, #0xa, nv : ccmn.nv %w30 %w30 $0x0a + +3a530065 : ccmn w3, w19, #0x5, eq : ccmn.eq %w3 %w19 $0x05 +3a5e1185 : ccmn w12, w30, #0x5, ne : ccmn.ne %w12 %w30 $0x05 +3a5521a2 : ccmn w13, w21, #0x2, cs : ccmn.cs %w13 %w21 $0x02 +3a4d3088 : ccmn w4, w13, #0x8, cc : ccmn.cc %w4 %w13 $0x08 +3a5d400f : ccmn w0, w29, #0xf, mi : ccmn.mi %w0 %w29 $0x0f +3a4d5200 : ccmn w16, w13, #0x0, pl : ccmn.pl %w16 %w13 $0x00 +3a4e606c : ccmn w3, w14, #0xc, vs : ccmn.vs %w3 %w14 $0x0c +3a4d71ac : ccmn w13, w13, #0xc, vc : ccmn.vc %w13 %w13 $0x0c +3a58814b : ccmn w10, w24, #0xb, hi : ccmn.hi %w10 %w24 $0x0b +3a5c9003 : ccmn w0, w28, #0x3, ls : ccmn.ls %w0 %w28 $0x03 +3a55a3c8 : ccmn w30, w21, #0x8, ge : ccmn.ge %w30 %w21 $0x08 +3a42b183 : ccmn w12, w2, #0x3, lt : ccmn.lt %w12 %w2 $0x03 +3a43c3cd : ccmn w30, w3, #0xd, gt : ccmn.gt %w30 %w3 $0x0d +3a55d28d : ccmn w20, w21, #0xd, le : ccmn.le %w20 %w21 $0x0d +3a5de082 : ccmn w4, w29, #0x2, al : ccmn.al %w4 %w29 $0x02 +3a4ef323 : ccmn w25, w14, #0x3, nv : ccmn.nv %w25 %w14 $0x03 +3a50130d : ccmn w24, w16, #0xd, ne : ccmn.ne %w24 %w16 $0x0d +3a462060 : ccmn w3, w6, #0x0, cs : ccmn.cs %w3 %w6 $0x00 +3a4731e1 : ccmn w15, w7, #0x1, cc : ccmn.cc %w15 %w7 $0x01 +3a594203 : ccmn w16, w25, #0x3, mi : ccmn.mi %w16 %w25 $0x03 +3a575289 : ccmn w20, w23, #0x9, pl : ccmn.pl %w20 %w23 $0x09 +3a5e608b : ccmn w4, w30, #0xb, vs : ccmn.vs %w4 %w30 $0x0b +3a5670c4 : ccmn w6, w22, #0x4, vc : ccmn.vc %w6 %w22 $0x04 +3a4c8088 : ccmn w4, w12, #0x8, hi : ccmn.hi %w4 %w12 $0x08 +3a5c9369 : ccmn w27, w28, #0x9, ls : ccmn.ls %w27 %w28 $0x09 +3a49a126 : ccmn w9, w9, #0x6, ge : ccmn.ge %w9 %w9 $0x06 +3a40b000 : ccmn w0, w0, #0x0, lt : ccmn.lt %w0 %w0 $0x00 +3a58c347 : ccmn w26, w24, #0x7, gt : ccmn.gt %w26 %w24 $0x07 +3a43d322 : ccmn w25, w3, #0x2, le : ccmn.le %w25 %w3 $0x02 +3a52e2e8 : ccmn w23, w18, #0x8, al : ccmn.al %w23 %w18 $0x08 +3a55f0e4 : ccmn w7, w21, #0x4, nv : ccmn.nv %w7 %w21 $0x04 + +# CCMN , , #, +ba40000f : ccmn x0, x0, #0xf, eq : ccmn.eq %x0 %x0 $0x0f +ba411027 : ccmn x1, x1, #0x7, ne : ccmn.ne %x1 %x1 $0x07 +ba42204c : ccmn x2, x2, #0xc, cs : ccmn.cs %x2 %x2 $0x0c +ba43306a : ccmn x3, x3, #0xa, cc : ccmn.cc %x3 %x3 $0x0a +ba44408a : ccmn x4, x4, #0xa, mi : ccmn.mi %x4 %x4 $0x0a +ba4550a5 : ccmn x5, x5, #0x5, pl : ccmn.pl %x5 %x5 $0x05 +ba4660ce : ccmn x6, x6, #0xe, vs : ccmn.vs %x6 %x6 $0x0e +ba4770ed : ccmn x7, x7, #0xd, vc : ccmn.vc %x7 %x7 $0x0d +ba488103 : ccmn x8, x8, #0x3, hi : ccmn.hi %x8 %x8 $0x03 +ba499125 : ccmn x9, x9, #0x5, ls : ccmn.ls %x9 %x9 $0x05 +ba4aa148 : ccmn x10, x10, #0x8, ge : ccmn.ge %x10 %x10 $0x08 +ba4bb168 : ccmn x11, x11, #0x8, lt : ccmn.lt %x11 %x11 $0x08 +ba4cc18d : ccmn x12, x12, #0xd, gt : ccmn.gt %x12 %x12 $0x0d +ba4dd1a3 : ccmn x13, x13, #0x3, le : ccmn.le %x13 %x13 $0x03 +ba4ee1c7 : ccmn x14, x14, #0x7, al : ccmn.al %x14 %x14 $0x07 +ba4ff1e8 : ccmn x15, x15, #0x8, nv : ccmn.nv %x15 %x15 $0x08 +ba501201 : ccmn x16, x16, #0x1, ne : ccmn.ne %x16 %x16 $0x01 +ba51222c : ccmn x17, x17, #0xc, cs : ccmn.cs %x17 %x17 $0x0c +ba52324b : ccmn x18, x18, #0xb, cc : ccmn.cc %x18 %x18 $0x0b +ba534260 : ccmn x19, x19, #0x0, mi : ccmn.mi %x19 %x19 $0x00 +ba54528e : ccmn x20, x20, #0xe, pl : ccmn.pl %x20 %x20 $0x0e +ba5562a0 : ccmn x21, x21, #0x0, vs : ccmn.vs %x21 %x21 $0x00 +ba5672c3 : ccmn x22, x22, #0x3, vc : ccmn.vc %x22 %x22 $0x03 +ba5782e8 : ccmn x23, x23, #0x8, hi : ccmn.hi %x23 %x23 $0x08 +ba589301 : ccmn x24, x24, #0x1, ls : ccmn.ls %x24 %x24 $0x01 +ba59a32f : ccmn x25, x25, #0xf, ge : ccmn.ge %x25 %x25 $0x0f +ba5ab343 : ccmn x26, x26, #0x3, lt : ccmn.lt %x26 %x26 $0x03 +ba5bc367 : ccmn x27, x27, #0x7, gt : ccmn.gt %x27 %x27 $0x07 +ba5cd38c : ccmn x28, x28, #0xc, le : ccmn.le %x28 %x28 $0x0c +ba5de3ad : ccmn x29, x29, #0xd, al : ccmn.al %x29 %x29 $0x0d +ba5ef3c5 : ccmn x30, x30, #0x5, nv : ccmn.nv %x30 %x30 $0x05 + +ba5d0320 : ccmn x25, x29, #0x0, eq : ccmn.eq %x25 %x29 $0x00 +ba4f12a5 : ccmn x21, x15, #0x5, ne : ccmn.ne %x21 %x15 $0x05 +ba5b2105 : ccmn x8, x27, #0x5, cs : ccmn.cs %x8 %x27 $0x05 +ba553245 : ccmn x18, x21, #0x5, cc : ccmn.cc %x18 %x21 $0x05 +ba4f410a : ccmn x8, x15, #0xa, mi : ccmn.mi %x8 %x15 $0x0a +ba41534b : ccmn x26, x1, #0xb, pl : ccmn.pl %x26 %x1 $0x0b +ba4862ca : ccmn x22, x8, #0xa, vs : ccmn.vs %x22 %x8 $0x0a +ba4073a8 : ccmn x29, x0, #0x8, vc : ccmn.vc %x29 %x0 $0x08 +ba528042 : ccmn x2, x18, #0x2, hi : ccmn.hi %x2 %x18 $0x02 +ba47900a : ccmn x0, x7, #0xa, ls : ccmn.ls %x0 %x7 $0x0a +ba53a162 : ccmn x11, x19, #0x2, ge : ccmn.ge %x11 %x19 $0x02 +ba54b1c8 : ccmn x14, x20, #0x8, lt : ccmn.lt %x14 %x20 $0x08 +ba49c1ee : ccmn x15, x9, #0xe, gt : ccmn.gt %x15 %x9 $0x0e +ba59d166 : ccmn x11, x25, #0x6, le : ccmn.le %x11 %x25 $0x06 +ba57e0e6 : ccmn x7, x23, #0x6, al : ccmn.al %x7 %x23 $0x06 +ba41f2e1 : ccmn x23, x1, #0x1, nv : ccmn.nv %x23 %x1 $0x01 +ba4811c5 : ccmn x14, x8, #0x5, ne : ccmn.ne %x14 %x8 $0x05 +ba5a202d : ccmn x1, x26, #0xd, cs : ccmn.cs %x1 %x26 $0x0d +ba4631e2 : ccmn x15, x6, #0x2, cc : ccmn.cc %x15 %x6 $0x02 +ba5841e0 : ccmn x15, x24, #0x0, mi : ccmn.mi %x15 %x24 $0x00 +ba535143 : ccmn x10, x19, #0x3, pl : ccmn.pl %x10 %x19 $0x03 +ba5e616c : ccmn x11, x30, #0xc, vs : ccmn.vs %x11 %x30 $0x0c +ba4972a4 : ccmn x21, x9, #0x4, vc : ccmn.vc %x21 %x9 $0x04 +ba5080a0 : ccmn x5, x16, #0x0, hi : ccmn.hi %x5 %x16 $0x00 +ba5690e9 : ccmn x7, x22, #0x9, ls : ccmn.ls %x7 %x22 $0x09 +ba47a1c5 : ccmn x14, x7, #0x5, ge : ccmn.ge %x14 %x7 $0x05 +ba56b24e : ccmn x18, x22, #0xe, lt : ccmn.lt %x18 %x22 $0x0e +ba58c1cf : ccmn x14, x24, #0xf, gt : ccmn.gt %x14 %x24 $0x0f +ba59d142 : ccmn x10, x25, #0x2, le : ccmn.le %x10 %x25 $0x02 +ba5ae2ce : ccmn x22, x26, #0xe, al : ccmn.al %x22 %x26 $0x0e +ba4ef0cc : ccmn x6, x14, #0xc, nv : ccmn.nv %x6 %x14 $0x0c + +# CCMP , #, #, +7a5f0800 : ccmp w0, #0x1f, #0x0, eq : ccmp.eq %w0 $0x1f $0x00 +7a55182d : ccmp w1, #0x15, #0xd, ne : ccmp.ne %w1 $0x15 $0x0d +7a53284c : ccmp w2, #0x13, #0xc, cs : ccmp.cs %w2 $0x13 $0x0c +7a5f3867 : ccmp w3, #0x1f, #0x7, cc : ccmp.cc %w3 $0x1f $0x07 +7a55488a : ccmp w4, #0x15, #0xa, mi : ccmp.mi %w4 $0x15 $0x0a +7a4958a1 : ccmp w5, #0x9, #0x1, pl : ccmp.pl %w5 $0x09 $0x01 +7a4c68c9 : ccmp w6, #0xc, #0x9, vs : ccmp.vs %w6 $0x0c $0x09 +7a5378e5 : ccmp w7, #0x13, #0x5, vc : ccmp.vc %w7 $0x13 $0x05 +7a418903 : ccmp w8, #0x1, #0x3, hi : ccmp.hi %w8 $0x01 $0x03 +7a589926 : ccmp w9, #0x18, #0x6, ls : ccmp.ls %w9 $0x18 $0x06 +7a5ca94d : ccmp w10, #0x1c, #0xd, ge : ccmp.ge %w10 $0x1c $0x0d +7a5bb964 : ccmp w11, #0x1b, #0x4, lt : ccmp.lt %w11 $0x1b $0x04 +7a46c986 : ccmp w12, #0x6, #0x6, gt : ccmp.gt %w12 $0x06 $0x06 +7a5fd9ad : ccmp w13, #0x1f, #0xd, le : ccmp.le %w13 $0x1f $0x0d +7a48e9cb : ccmp w14, #0x8, #0xb, al : ccmp.al %w14 $0x08 $0x0b +7a45f9ea : ccmp w15, #0x5, #0xa, nv : ccmp.nv %w15 $0x05 $0x0a +7a501a03 : ccmp w16, #0x10, #0x3, ne : ccmp.ne %w16 $0x10 $0x03 +7a5e2a2f : ccmp w17, #0x1e, #0xf, cs : ccmp.cs %w17 $0x1e $0x0f +7a543a4c : ccmp w18, #0x14, #0xc, cc : ccmp.cc %w18 $0x14 $0x0c +7a434a60 : ccmp w19, #0x3, #0x0, mi : ccmp.mi %w19 $0x03 $0x00 +7a4a5a8d : ccmp w20, #0xa, #0xd, pl : ccmp.pl %w20 $0x0a $0x0d +7a546aa4 : ccmp w21, #0x14, #0x4, vs : ccmp.vs %w21 $0x14 $0x04 +7a5a7ac4 : ccmp w22, #0x1a, #0x4, vc : ccmp.vc %w22 $0x1a $0x04 +7a5d8aed : ccmp w23, #0x1d, #0xd, hi : ccmp.hi %w23 $0x1d $0x0d +7a489b0d : ccmp w24, #0x8, #0xd, ls : ccmp.ls %w24 $0x08 $0x0d +7a45ab2a : ccmp w25, #0x5, #0xa, ge : ccmp.ge %w25 $0x05 $0x0a +7a4fbb48 : ccmp w26, #0xf, #0x8, lt : ccmp.lt %w26 $0x0f $0x08 +7a52cb66 : ccmp w27, #0x12, #0x6, gt : ccmp.gt %w27 $0x12 $0x06 +7a4fdb87 : ccmp w28, #0xf, #0x7, le : ccmp.le %w28 $0x0f $0x07 +7a4aeba1 : ccmp w29, #0xa, #0x1, al : ccmp.al %w29 $0x0a $0x01 +7a59fbc6 : ccmp w30, #0x19, #0x6, nv : ccmp.nv %w30 $0x19 $0x06 +7a4aebe1 : ccmp wzr, #0xa, #0x1, al : ccmp.al %wzr $0x0a $0x01 + +# CCMP , , #, +7a42e3e1 : ccmp wzr, w2, #0x1, al : ccmp.al %wzr %w2 $0x01 +7a40000a : ccmp w0, w0, #0xa, eq : ccmp.eq %w0 %w0 $0x0a +7a411024 : ccmp w1, w1, #0x4, ne : ccmp.ne %w1 %w1 $0x04 +7a422042 : ccmp w2, w2, #0x2, cs : ccmp.cs %w2 %w2 $0x02 +7a433069 : ccmp w3, w3, #0x9, cc : ccmp.cc %w3 %w3 $0x09 +7a444082 : ccmp w4, w4, #0x2, mi : ccmp.mi %w4 %w4 $0x02 +7a4550a0 : ccmp w5, w5, #0x0, pl : ccmp.pl %w5 %w5 $0x00 +7a4660ca : ccmp w6, w6, #0xa, vs : ccmp.vs %w6 %w6 $0x0a +7a4770ea : ccmp w7, w7, #0xa, vc : ccmp.vc %w7 %w7 $0x0a +7a488101 : ccmp w8, w8, #0x1, hi : ccmp.hi %w8 %w8 $0x01 +7a499123 : ccmp w9, w9, #0x3, ls : ccmp.ls %w9 %w9 $0x03 +7a4aa14e : ccmp w10, w10, #0xe, ge : ccmp.ge %w10 %w10 $0x0e +7a4bb16c : ccmp w11, w11, #0xc, lt : ccmp.lt %w11 %w11 $0x0c +7a4cc18d : ccmp w12, w12, #0xd, gt : ccmp.gt %w12 %w12 $0x0d +7a4dd1a3 : ccmp w13, w13, #0x3, le : ccmp.le %w13 %w13 $0x03 +7a4ee1c9 : ccmp w14, w14, #0x9, al : ccmp.al %w14 %w14 $0x09 +7a4ff1ee : ccmp w15, w15, #0xe, nv : ccmp.nv %w15 %w15 $0x0e +7a50120f : ccmp w16, w16, #0xf, ne : ccmp.ne %w16 %w16 $0x0f +7a51222a : ccmp w17, w17, #0xa, cs : ccmp.cs %w17 %w17 $0x0a +7a523243 : ccmp w18, w18, #0x3, cc : ccmp.cc %w18 %w18 $0x03 +7a534269 : ccmp w19, w19, #0x9, mi : ccmp.mi %w19 %w19 $0x09 +7a54528d : ccmp w20, w20, #0xd, pl : ccmp.pl %w20 %w20 $0x0d +7a5562a2 : ccmp w21, w21, #0x2, vs : ccmp.vs %w21 %w21 $0x02 +7a5672c9 : ccmp w22, w22, #0x9, vc : ccmp.vc %w22 %w22 $0x09 +7a5782e9 : ccmp w23, w23, #0x9, hi : ccmp.hi %w23 %w23 $0x09 +7a58930d : ccmp w24, w24, #0xd, ls : ccmp.ls %w24 %w24 $0x0d +7a59a321 : ccmp w25, w25, #0x1, ge : ccmp.ge %w25 %w25 $0x01 +7a5ab346 : ccmp w26, w26, #0x6, lt : ccmp.lt %w26 %w26 $0x06 +7a5bc367 : ccmp w27, w27, #0x7, gt : ccmp.gt %w27 %w27 $0x07 +7a5cd38c : ccmp w28, w28, #0xc, le : ccmp.le %w28 %w28 $0x0c +7a5de3a6 : ccmp w29, w29, #0x6, al : ccmp.al %w29 %w29 $0x06 +7a5ef3c8 : ccmp w30, w30, #0x8, nv : ccmp.nv %w30 %w30 $0x08 + +7a470103 : ccmp w8, w7, #0x3, eq : ccmp.eq %w8 %w7 $0x03 +7a591020 : ccmp w1, w25, #0x0, ne : ccmp.ne %w1 %w25 $0x00 +7a5b22ef : ccmp w23, w27, #0xf, cs : ccmp.cs %w23 %w27 $0x0f +7a463008 : ccmp w0, w6, #0x8, cc : ccmp.cc %w0 %w6 $0x08 +7a454005 : ccmp w0, w5, #0x5, mi : ccmp.mi %w0 %w5 $0x05 +7a5b53c0 : ccmp w30, w27, #0x0, pl : ccmp.pl %w30 %w27 $0x00 +7a556345 : ccmp w26, w21, #0x5, vs : ccmp.vs %w26 %w21 $0x05 +7a42712f : ccmp w9, w2, #0xf, vc : ccmp.vc %w9 %w2 $0x0f +7a53814a : ccmp w10, w19, #0xa, hi : ccmp.hi %w10 %w19 $0x0a +7a4b922f : ccmp w17, w11, #0xf, ls : ccmp.ls %w17 %w11 $0x0f +7a55a1e9 : ccmp w15, w21, #0x9, ge : ccmp.ge %w15 %w21 $0x09 +7a48b34f : ccmp w26, w8, #0xf, lt : ccmp.lt %w26 %w8 $0x0f +7a4dc34c : ccmp w26, w13, #0xc, gt : ccmp.gt %w26 %w13 $0x0c +7a4fd083 : ccmp w4, w15, #0x3, le : ccmp.le %w4 %w15 $0x03 +7a5ce327 : ccmp w25, w28, #0x7, al : ccmp.al %w25 %w28 $0x07 +7a46f063 : ccmp w3, w6, #0x3, nv : ccmp.nv %w3 %w6 $0x03 +7a5212ea : ccmp w23, w18, #0xa, ne : ccmp.ne %w23 %w18 $0x0a +7a5d20e0 : ccmp w7, w29, #0x0, cs : ccmp.cs %w7 %w29 $0x00 +7a583247 : ccmp w18, w24, #0x7, cc : ccmp.cc %w18 %w24 $0x07 +7a4e42ce : ccmp w22, w14, #0xe, mi : ccmp.mi %w22 %w14 $0x0e +7a51508a : ccmp w4, w17, #0xa, pl : ccmp.pl %w4 %w17 $0x0a +7a5163c7 : ccmp w30, w17, #0x7, vs : ccmp.vs %w30 %w17 $0x07 +7a5d73ac : ccmp w29, w29, #0xc, vc : ccmp.vc %w29 %w29 $0x0c +7a508303 : ccmp w24, w16, #0x3, hi : ccmp.hi %w24 %w16 $0x03 +7a4690a6 : ccmp w5, w6, #0x6, ls : ccmp.ls %w5 %w6 $0x06 +7a45a0e8 : ccmp w7, w5, #0x8, ge : ccmp.ge %w7 %w5 $0x08 +7a5bb180 : ccmp w12, w27, #0x0, lt : ccmp.lt %w12 %w27 $0x00 +7a46c144 : ccmp w10, w6, #0x4, gt : ccmp.gt %w10 %w6 $0x04 +7a51d326 : ccmp w25, w17, #0x6, le : ccmp.le %w25 %w17 $0x06 +7a44e18b : ccmp w12, w4, #0xb, al : ccmp.al %w12 %w4 $0x0b +7a51f1c4 : ccmp w14, w17, #0x4, nv : ccmp.nv %w14 %w17 $0x04 + +# CCMP , #, #, +fa44080d : ccmp x0, #0x4, #0xd, eq : ccmp.eq %x0 $0x04 $0x0d +fa56182b : ccmp x1, #0x16, #0xb, ne : ccmp.ne %x1 $0x16 $0x0b +fa542845 : ccmp x2, #0x14, #0x5, cs : ccmp.cs %x2 $0x14 $0x05 +fa443869 : ccmp x3, #0x4, #0x9, cc : ccmp.cc %x3 $0x04 $0x09 +fa484880 : ccmp x4, #0x8, #0x0, mi : ccmp.mi %x4 $0x08 $0x00 +fa5c58a1 : ccmp x5, #0x1c, #0x1, pl : ccmp.pl %x5 $0x1c $0x01 +fa5868cd : ccmp x6, #0x18, #0xd, vs : ccmp.vs %x6 $0x18 $0x0d +fa4478e9 : ccmp x7, #0x4, #0x9, vc : ccmp.vc %x7 $0x04 $0x09 +fa588904 : ccmp x8, #0x18, #0x4, hi : ccmp.hi %x8 $0x18 $0x04 +fa409923 : ccmp x9, #0x0, #0x3, ls : ccmp.ls %x9 $0x00 $0x03 +fa42a947 : ccmp x10, #0x2, #0x7, ge : ccmp.ge %x10 $0x02 $0x07 +fa53b96f : ccmp x11, #0x13, #0xf, lt : ccmp.lt %x11 $0x13 $0x0f +fa44c986 : ccmp x12, #0x4, #0x6, gt : ccmp.gt %x12 $0x04 $0x06 +fa4dd9aa : ccmp x13, #0xd, #0xa, le : ccmp.le %x13 $0x0d $0x0a +fa5ce9cf : ccmp x14, #0x1c, #0xf, al : ccmp.al %x14 $0x1c $0x0f +fa50f9ee : ccmp x15, #0x10, #0xe, nv : ccmp.nv %x15 $0x10 $0x0e +fa5f1a01 : ccmp x16, #0x1f, #0x1, ne : ccmp.ne %x16 $0x1f $0x01 +fa4f2a2f : ccmp x17, #0xf, #0xf, cs : ccmp.cs %x17 $0x0f $0x0f +fa433a40 : ccmp x18, #0x3, #0x0, cc : ccmp.cc %x18 $0x03 $0x00 +fa5b4a6a : ccmp x19, #0x1b, #0xa, mi : ccmp.mi %x19 $0x1b $0x0a +fa5f5a85 : ccmp x20, #0x1f, #0x5, pl : ccmp.pl %x20 $0x1f $0x05 +fa466aaf : ccmp x21, #0x6, #0xf, vs : ccmp.vs %x21 $0x06 $0x0f +fa587ac8 : ccmp x22, #0x18, #0x8, vc : ccmp.vc %x22 $0x18 $0x08 +fa478ae6 : ccmp x23, #0x7, #0x6, hi : ccmp.hi %x23 $0x07 $0x06 +fa5a9b06 : ccmp x24, #0x1a, #0x6, ls : ccmp.ls %x24 $0x1a $0x06 +fa45ab2f : ccmp x25, #0x5, #0xf, ge : ccmp.ge %x25 $0x05 $0x0f +fa46bb4b : ccmp x26, #0x6, #0xb, lt : ccmp.lt %x26 $0x06 $0x0b +fa52cb6c : ccmp x27, #0x12, #0xc, gt : ccmp.gt %x27 $0x12 $0x0c +fa47db83 : ccmp x28, #0x7, #0x3, le : ccmp.le %x28 $0x07 $0x03 +fa5debab : ccmp x29, #0x1d, #0xb, al : ccmp.al %x29 $0x1d $0x0b +fa4efbca : ccmp x30, #0xe, #0xa, nv : ccmp.nv %x30 $0x0e $0x0a + +# CCMP , , #, +fa42c023 : ccmp x1, x2, #0x3, gt : ccmp.gt %x1 %x2 $0x03 +fa400008 : ccmp x0, x0, #0x8, eq : ccmp.eq %x0 %x0 $0x08 +fa411027 : ccmp x1, x1, #0x7, ne : ccmp.ne %x1 %x1 $0x07 +fa422040 : ccmp x2, x2, #0x0, cs : ccmp.cs %x2 %x2 $0x00 +fa433066 : ccmp x3, x3, #0x6, cc : ccmp.cc %x3 %x3 $0x06 +fa444085 : ccmp x4, x4, #0x5, mi : ccmp.mi %x4 %x4 $0x05 +fa4550a6 : ccmp x5, x5, #0x6, pl : ccmp.pl %x5 %x5 $0x06 +fa4660c3 : ccmp x6, x6, #0x3, vs : ccmp.vs %x6 %x6 $0x03 +fa4770e0 : ccmp x7, x7, #0x0, vc : ccmp.vc %x7 %x7 $0x00 +fa48810d : ccmp x8, x8, #0xd, hi : ccmp.hi %x8 %x8 $0x0d +fa49912f : ccmp x9, x9, #0xf, ls : ccmp.ls %x9 %x9 $0x0f +fa4aa142 : ccmp x10, x10, #0x2, ge : ccmp.ge %x10 %x10 $0x02 +fa4bb169 : ccmp x11, x11, #0x9, lt : ccmp.lt %x11 %x11 $0x09 +fa4cc183 : ccmp x12, x12, #0x3, gt : ccmp.gt %x12 %x12 $0x03 +fa4dd1a2 : ccmp x13, x13, #0x2, le : ccmp.le %x13 %x13 $0x02 +fa4ee1cd : ccmp x14, x14, #0xd, al : ccmp.al %x14 %x14 $0x0d +fa4ff1e3 : ccmp x15, x15, #0x3, nv : ccmp.nv %x15 %x15 $0x03 +fa50120c : ccmp x16, x16, #0xc, ne : ccmp.ne %x16 %x16 $0x0c +fa512225 : ccmp x17, x17, #0x5, cs : ccmp.cs %x17 %x17 $0x05 +fa52324b : ccmp x18, x18, #0xb, cc : ccmp.cc %x18 %x18 $0x0b +fa53426b : ccmp x19, x19, #0xb, mi : ccmp.mi %x19 %x19 $0x0b +fa545289 : ccmp x20, x20, #0x9, pl : ccmp.pl %x20 %x20 $0x09 +fa5562aa : ccmp x21, x21, #0xa, vs : ccmp.vs %x21 %x21 $0x0a +fa5672c0 : ccmp x22, x22, #0x0, vc : ccmp.vc %x22 %x22 $0x00 +fa5782ed : ccmp x23, x23, #0xd, hi : ccmp.hi %x23 %x23 $0x0d +fa58930b : ccmp x24, x24, #0xb, ls : ccmp.ls %x24 %x24 $0x0b +fa59a320 : ccmp x25, x25, #0x0, ge : ccmp.ge %x25 %x25 $0x00 +fa5ab34b : ccmp x26, x26, #0xb, lt : ccmp.lt %x26 %x26 $0x0b +fa5bc36b : ccmp x27, x27, #0xb, gt : ccmp.gt %x27 %x27 $0x0b +fa5cd384 : ccmp x28, x28, #0x4, le : ccmp.le %x28 %x28 $0x04 +fa5de3a6 : ccmp x29, x29, #0x6, al : ccmp.al %x29 %x29 $0x06 +fa5ef3c4 : ccmp x30, x30, #0x4, nv : ccmp.nv %x30 %x30 $0x04 + +fa5a01c7 : ccmp x14, x26, #0x7, eq : ccmp.eq %x14 %x26 $0x07 +fa4111ec : ccmp x15, x1, #0xc, ne : ccmp.ne %x15 %x1 $0x0c +fa48210c : ccmp x8, x8, #0xc, cs : ccmp.cs %x8 %x8 $0x0c +fa5a3065 : ccmp x3, x26, #0x5, cc : ccmp.cc %x3 %x26 $0x05 +fa534349 : ccmp x26, x19, #0x9, mi : ccmp.mi %x26 %x19 $0x09 +fa575202 : ccmp x16, x23, #0x2, pl : ccmp.pl %x16 %x23 $0x02 +fa51626a : ccmp x19, x17, #0xa, vs : ccmp.vs %x19 %x17 $0x0a +fa4b7247 : ccmp x18, x11, #0x7, vc : ccmp.vc %x18 %x11 $0x07 +fa4180ee : ccmp x7, x1, #0xe, hi : ccmp.hi %x7 %x1 $0x0e +fa429364 : ccmp x27, x2, #0x4, ls : ccmp.ls %x27 %x2 $0x04 +fa53a2e4 : ccmp x23, x19, #0x4, ge : ccmp.ge %x23 %x19 $0x04 +fa49b168 : ccmp x11, x9, #0x8, lt : ccmp.lt %x11 %x9 $0x08 +fa5dc06d : ccmp x3, x29, #0xd, gt : ccmp.gt %x3 %x29 $0x0d +fa5bd34d : ccmp x26, x27, #0xd, le : ccmp.le %x26 %x27 $0x0d +fa4ee16c : ccmp x11, x14, #0xc, al : ccmp.al %x11 %x14 $0x0c +fa47f3cd : ccmp x30, x7, #0xd, nv : ccmp.nv %x30 %x7 $0x0d +fa4212ac : ccmp x21, x2, #0xc, ne : ccmp.ne %x21 %x2 $0x0c +fa5d2127 : ccmp x9, x29, #0x7, cs : ccmp.cs %x9 %x29 $0x07 +fa563024 : ccmp x1, x22, #0x4, cc : ccmp.cc %x1 %x22 $0x04 +fa584347 : ccmp x26, x24, #0x7, mi : ccmp.mi %x26 %x24 $0x07 +fa4c5189 : ccmp x12, x12, #0x9, pl : ccmp.pl %x12 %x12 $0x09 +fa506167 : ccmp x11, x16, #0x7, vs : ccmp.vs %x11 %x16 $0x07 +fa51716d : ccmp x11, x17, #0xd, vc : ccmp.vc %x11 %x17 $0x0d +fa5d81ae : ccmp x13, x29, #0xe, hi : ccmp.hi %x13 %x29 $0x0e +fa5b9385 : ccmp x28, x27, #0x5, ls : ccmp.ls %x28 %x27 $0x05 +fa4fa262 : ccmp x19, x15, #0x2, ge : ccmp.ge %x19 %x15 $0x02 +fa56b02f : ccmp x1, x22, #0xf, lt : ccmp.lt %x1 %x22 $0x0f +fa44c245 : ccmp x18, x4, #0x5, gt : ccmp.gt %x18 %x4 $0x05 +fa5cd128 : ccmp x9, x28, #0x8, le : ccmp.le %x9 %x28 $0x08 +fa59e201 : ccmp x16, x25, #0x1, al : ccmp.al %x16 %x25 $0x01 +fa49f104 : ccmp x8, x9, #0x4, nv : ccmp.nv %x8 %x9 $0x04 d503305f : clrex #0x0 : clrex $0x00 d5033f5f : clrex : clrex $0x0f diff --git a/suite/tests/api/ir_aarch64.c b/suite/tests/api/ir_aarch64.c index e42bc636370..31ba54fbdf1 100644 --- a/suite/tests/api/ir_aarch64.c +++ b/suite/tests/api/ir_aarch64.c @@ -7124,6 +7124,124 @@ test_scvtf_vector_fixed(void *dc) test_instr_encoding(dc, OP_scvtf, instr); } +/* Macro expansion generates sequence of instruction creation tests for: + * CCMP , #, #, + * CCMP , #, #, + * CCMN , #, #, + * CCMN , #, #, + */ +#define ccm_r_i(cmptype, reg) \ + nzcv = 0; \ + cond = 0; \ + imm = 0; \ + for (int rsrc = DR_REG_##reg##0; rsrc < DR_REG_##reg##SP; rsrc++) { \ + instr = INSTR_CREATE_ccm##cmptype(dc, opnd_create_reg(rsrc), \ + opnd_create_immed_int(imm++, OPSZ_5b), \ + opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ + test_instr_encoding(dc, OP_ccm##cmptype, instr); \ + imm = imm > 31 ? 0 : imm; \ + nzcv = nzcv > 15 ? 0 : nzcv; \ + cond = cond > 17 ? 0 : cond; \ + } + +/* Macro expansion generates sequence of instruction creation tests for: + * CCMP , , #, + * CCMP , , #, + * CCMN , , #, + * CCMN , , #, + */ +#define ccm_r_r(cmptype, reg) \ + nzcv = 0; \ + cond = 0; \ + rsrc1 = DR_REG_##reg##30; \ + for (int rsrc0 = DR_REG_##reg##0; rsrc0 < DR_REG_##reg##SP; rsrc0++) { \ + instr = INSTR_CREATE_ccm##cmptype(dc, opnd_create_reg(rsrc0), \ + opnd_create_reg(rsrc1--), \ + opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ + test_instr_encoding(dc, OP_ccm##cmptype, instr); \ + nzcv = nzcv > 15 ? 0 : nzcv; \ + cond = cond > 17 ? 0 : cond; \ + } + +static void +test_ccmp_ccmn(void *dc) +{ + instr_t *instr; + + dr_pred_type_t conds[] = {DR_PRED_EQ, DR_PRED_NE, DR_PRED_CS, DR_PRED_CC, + DR_PRED_MI, DR_PRED_PL, DR_PRED_VS, DR_PRED_VC, DR_PRED_HI, DR_PRED_LS, + DR_PRED_GE, DR_PRED_LT, DR_PRED_GT, DR_PRED_LE, DR_PRED_AL, DR_PRED_NV, + DR_PRED_HS, DR_PRED_LO}; + + // CCMP , #, #, GE + instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_W28), + opnd_create_immed_int(10, OPSZ_5b), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); + test_instr_encoding(dc, OP_ccmp, instr); + + int imm; + int nzcv; + int cond; + ccm_r_i(p, W); + + // CCMP , #, #, EQ + instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_X0), + opnd_create_immed_int(10, OPSZ_5b), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_EQ); + test_instr_encoding(dc, OP_ccmp, instr); + + ccm_r_i(p, X); + + // CCMP , , #, GE + instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_W28), + opnd_create_reg(DR_REG_W29), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); + test_instr_encoding(dc, OP_ccmp, instr); + + int rsrc1; + ccm_r_r(p, W); + + // CCMP , , #, GE + instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_X28), + opnd_create_reg(DR_REG_X29), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); + test_instr_encoding(dc, OP_ccmp, instr); + + ccm_r_r(p, X); + + // CCMN , #, #, EQ + instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_W0), + opnd_create_immed_int(0x1f, OPSZ_5b), + opnd_create_immed_int(0b0101, OPSZ_4b), DR_PRED_EQ); + test_instr_encoding(dc, OP_ccmn, instr); + + ccm_r_i(n, W); + + // CCMN , #, #, LT + instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X15), + opnd_create_immed_int(0, OPSZ_5b), + opnd_create_immed_int(0b1001, OPSZ_4b), DR_PRED_LT); + test_instr_encoding(dc, OP_ccmn, instr); + + ccm_r_i(n, X); + + // CCMN , , #, VS + instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_W30), + opnd_create_reg(DR_REG_W29), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_VS); + test_instr_encoding(dc, OP_ccmn, instr); + + ccm_r_r(n, W); + + // CCMN , , #, PL + instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X9), + opnd_create_reg(DR_REG_X10), + opnd_create_immed_int(0b1111, OPSZ_4b), DR_PRED_PL); + test_instr_encoding(dc, OP_ccmn, instr); + + ccm_r_r(n, X); +} + int main(int argc, char *argv[]) { @@ -7286,6 +7404,9 @@ main(int argc, char *argv[]) test_scvtf_vector_fixed(dcontext); print("test_scvtf_vector_fixed complete\n"); + test_ccmp_ccmn(dcontext); + print("test_ccmp_ccmn complete\n"); + ldr(dcontext); str(dcontext); diff --git a/suite/tests/api/ir_aarch64.expect b/suite/tests/api/ir_aarch64.expect index 8741358a310..f25c29371b0 100644 --- a/suite/tests/api/ir_aarch64.expect +++ b/suite/tests/api/ir_aarch64.expect @@ -1301,6 +1301,263 @@ scvtf %d11 $0x02 $0x20 -> %d10 scvtf %d29 $0x02 $0x15 -> %d28 scvtf %d31 $0x02 $0x1f -> %d30 test_scvtf_vector_fixed complete +ccmp.ge %w28 $0x0a $0x0a +ccmp.eq %w0 $0x00 $0x00 +ccmp.ne %w1 $0x01 $0x01 +ccmp.cs %w2 $0x02 $0x02 +ccmp.cc %w3 $0x03 $0x03 +ccmp.mi %w4 $0x04 $0x04 +ccmp.pl %w5 $0x05 $0x05 +ccmp.vs %w6 $0x06 $0x06 +ccmp.vc %w7 $0x07 $0x07 +ccmp.hi %w8 $0x08 $0x08 +ccmp.ls %w9 $0x09 $0x09 +ccmp.ge %w10 $0x0a $0x0a +ccmp.lt %w11 $0x0b $0x0b +ccmp.gt %w12 $0x0c $0x0c +ccmp.le %w13 $0x0d $0x0d +ccmp.al %w14 $0x0e $0x0e +ccmp.nv %w15 $0x0f $0x0f +ccmp.cs %w16 $0x10 $0x00 +ccmp.cc %w17 $0x11 $0x01 +ccmp.eq %w18 $0x12 $0x02 +ccmp.ne %w19 $0x13 $0x03 +ccmp.cs %w20 $0x14 $0x04 +ccmp.cc %w21 $0x15 $0x05 +ccmp.mi %w22 $0x16 $0x06 +ccmp.pl %w23 $0x17 $0x07 +ccmp.vs %w24 $0x18 $0x08 +ccmp.vc %w25 $0x19 $0x09 +ccmp.hi %w26 $0x1a $0x0a +ccmp.ls %w27 $0x1b $0x0b +ccmp.ge %w28 $0x1c $0x0c +ccmp.lt %w29 $0x1d $0x0d +ccmp.gt %w30 $0x1e $0x0e +ccmp.eq %x0 $0x0a $0x0a +ccmp.eq %x0 $0x00 $0x00 +ccmp.ne %x1 $0x01 $0x01 +ccmp.cs %x2 $0x02 $0x02 +ccmp.cc %x3 $0x03 $0x03 +ccmp.mi %x4 $0x04 $0x04 +ccmp.pl %x5 $0x05 $0x05 +ccmp.vs %x6 $0x06 $0x06 +ccmp.vc %x7 $0x07 $0x07 +ccmp.hi %x8 $0x08 $0x08 +ccmp.ls %x9 $0x09 $0x09 +ccmp.ge %x10 $0x0a $0x0a +ccmp.lt %x11 $0x0b $0x0b +ccmp.gt %x12 $0x0c $0x0c +ccmp.le %x13 $0x0d $0x0d +ccmp.al %x14 $0x0e $0x0e +ccmp.nv %x15 $0x0f $0x0f +ccmp.cs %x16 $0x10 $0x00 +ccmp.cc %x17 $0x11 $0x01 +ccmp.eq %x18 $0x12 $0x02 +ccmp.ne %x19 $0x13 $0x03 +ccmp.cs %x20 $0x14 $0x04 +ccmp.cc %x21 $0x15 $0x05 +ccmp.mi %x22 $0x16 $0x06 +ccmp.pl %x23 $0x17 $0x07 +ccmp.vs %x24 $0x18 $0x08 +ccmp.vc %x25 $0x19 $0x09 +ccmp.hi %x26 $0x1a $0x0a +ccmp.ls %x27 $0x1b $0x0b +ccmp.ge %x28 $0x1c $0x0c +ccmp.lt %x29 $0x1d $0x0d +ccmp.gt %x30 $0x1e $0x0e +ccmp.ge %w28 %w29 $0x0a +ccmp.eq %w0 %w30 $0x00 +ccmp.ne %w1 %w29 $0x01 +ccmp.cs %w2 %w28 $0x02 +ccmp.cc %w3 %w27 $0x03 +ccmp.mi %w4 %w26 $0x04 +ccmp.pl %w5 %w25 $0x05 +ccmp.vs %w6 %w24 $0x06 +ccmp.vc %w7 %w23 $0x07 +ccmp.hi %w8 %w22 $0x08 +ccmp.ls %w9 %w21 $0x09 +ccmp.ge %w10 %w20 $0x0a +ccmp.lt %w11 %w19 $0x0b +ccmp.gt %w12 %w18 $0x0c +ccmp.le %w13 %w17 $0x0d +ccmp.al %w14 %w16 $0x0e +ccmp.nv %w15 %w15 $0x0f +ccmp.cs %w16 %w14 $0x00 +ccmp.cc %w17 %w13 $0x01 +ccmp.eq %w18 %w12 $0x02 +ccmp.ne %w19 %w11 $0x03 +ccmp.cs %w20 %w10 $0x04 +ccmp.cc %w21 %w9 $0x05 +ccmp.mi %w22 %w8 $0x06 +ccmp.pl %w23 %w7 $0x07 +ccmp.vs %w24 %w6 $0x08 +ccmp.vc %w25 %w5 $0x09 +ccmp.hi %w26 %w4 $0x0a +ccmp.ls %w27 %w3 $0x0b +ccmp.ge %w28 %w2 $0x0c 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%w20 %w10 $0x04 +ccmn.cc %w21 %w9 $0x05 +ccmn.mi %w22 %w8 $0x06 +ccmn.pl %w23 %w7 $0x07 +ccmn.vs %w24 %w6 $0x08 +ccmn.vc %w25 %w5 $0x09 +ccmn.hi %w26 %w4 $0x0a +ccmn.ls %w27 %w3 $0x0b +ccmn.ge %w28 %w2 $0x0c +ccmn.lt %w29 %w1 $0x0d +ccmn.gt %w30 %w0 $0x0e +ccmn.pl %x9 %x10 $0x0f +ccmn.eq %x0 %x30 $0x00 +ccmn.ne %x1 %x29 $0x01 +ccmn.cs %x2 %x28 $0x02 +ccmn.cc %x3 %x27 $0x03 +ccmn.mi %x4 %x26 $0x04 +ccmn.pl %x5 %x25 $0x05 +ccmn.vs %x6 %x24 $0x06 +ccmn.vc %x7 %x23 $0x07 +ccmn.hi %x8 %x22 $0x08 +ccmn.ls %x9 %x21 $0x09 +ccmn.ge %x10 %x20 $0x0a +ccmn.lt %x11 %x19 $0x0b +ccmn.gt %x12 %x18 $0x0c +ccmn.le %x13 %x17 $0x0d +ccmn.al %x14 %x16 $0x0e +ccmn.nv %x15 %x15 $0x0f +ccmn.cs %x16 %x14 $0x00 +ccmn.cc %x17 %x13 $0x01 +ccmn.eq %x18 %x12 $0x02 +ccmn.ne %x19 %x11 $0x03 +ccmn.cs %x20 %x10 $0x04 +ccmn.cc %x21 %x9 $0x05 +ccmn.mi %x22 %x8 $0x06 +ccmn.pl %x23 %x7 $0x07 +ccmn.vs %x24 %x6 $0x08 +ccmn.vc %x25 %x5 $0x09 +ccmn.hi %x26 %x4 $0x0a +ccmn.ls %x27 %x3 $0x0b +ccmn.ge %x28 %x2 $0x0c +ccmn.lt %x29 %x1 $0x0d +ccmn.gt %x30 %x0 $0x0e +test_ccmp_ccmn complete ldr (%x1)[4byte] %x1 $0x0000000000000081 -> %w0 %x1 ldr (%x1)[8byte] %x1 $0x0000000000000081 -> %x0 %x1 ldr (%x1)[4byte] %x1 $0x00000000000000ff -> %w0 %x1 From 07c5ba480742facf596d1595ae9dafbdf9536bfe Mon Sep 17 00:00:00 2001 From: Assad Hashmi Date: Thu, 18 Nov 2021 11:14:25 +0000 Subject: [PATCH 2/4] Fix source code format non-conformances. --- core/ir/aarch64/codec.c | 14 +++--- suite/tests/api/ir_aarch64.c | 93 ++++++++++++++++++------------------ 2 files changed, 52 insertions(+), 55 deletions(-) diff --git a/core/ir/aarch64/codec.c b/core/ir/aarch64/codec.c index ccffdc744e9..b03c32298ca 100644 --- a/core/ir/aarch64/codec.c +++ b/core/ir/aarch64/codec.c @@ -4379,20 +4379,18 @@ encode_opnds_ccm(byte *pc, instr_t *instr, uint enc, decode_info_t *di) uint rm_imm5 = 0; uint imm5_flag = 0; if (instr_num_dsts(instr) == 0 && instr_num_srcs(instr) == 3 && - encode_opnd_rn(false, 5, instr_get_src(instr, 0), &rn) && /* Rn */ - opnd_is_immed_int(instr_get_src(instr, 2)) && /* nzcv */ - (uint)(instr_get_predicate(instr) - DR_PRED_EQ) < 16) /* cond */ + encode_opnd_rn(false, 5, instr_get_src(instr, 0), &rn) && /* Rn */ + opnd_is_immed_int(instr_get_src(instr, 2)) && /* nzcv */ + (uint)(instr_get_predicate(instr) - DR_PRED_EQ) < 16) /* cond */ { uint nzcv = opnd_get_immed_int(instr_get_src(instr, 2)); uint cond = instr_get_predicate(instr) - DR_PRED_EQ; - if (opnd_is_immed_int(instr_get_src(instr, 1))) { /* imm5 */ + if (opnd_is_immed_int(instr_get_src(instr, 1))) { /* imm5 */ rm_imm5 = opnd_get_immed_int(instr_get_src(instr, 1)) << 16; imm5_flag = 1; - } - else if (opnd_is_reg(instr_get_src(instr, 1))) { /* Rm */ + } else if (opnd_is_reg(instr_get_src(instr, 1))) { /* Rm */ encode_opnd_rn(false, 16, instr_get_src(instr, 1), &rm_imm5); - } - else + } else return ENCFAIL; return (enc | nzcv | rn | (imm5_flag << 11) | rm_imm5 | (cond << 12)); } diff --git a/suite/tests/api/ir_aarch64.c b/suite/tests/api/ir_aarch64.c index 31ba54fbdf1..c44b2a1e8b9 100644 --- a/suite/tests/api/ir_aarch64.c +++ b/suite/tests/api/ir_aarch64.c @@ -7130,18 +7130,18 @@ test_scvtf_vector_fixed(void *dc) * CCMN , #, #, * CCMN , #, #, */ -#define ccm_r_i(cmptype, reg) \ - nzcv = 0; \ - cond = 0; \ - imm = 0; \ - for (int rsrc = DR_REG_##reg##0; rsrc < DR_REG_##reg##SP; rsrc++) { \ - instr = INSTR_CREATE_ccm##cmptype(dc, opnd_create_reg(rsrc), \ - opnd_create_immed_int(imm++, OPSZ_5b), \ - opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ - test_instr_encoding(dc, OP_ccm##cmptype, instr); \ - imm = imm > 31 ? 0 : imm; \ - nzcv = nzcv > 15 ? 0 : nzcv; \ - cond = cond > 17 ? 0 : cond; \ +#define ccm_r_i(cmptype, reg) \ + nzcv = 0; \ + cond = 0; \ + imm = 0; \ + for (int rsrc = DR_REG_##reg##0; rsrc < DR_REG_##reg##SP; rsrc++) { \ + instr = INSTR_CREATE_ccm##cmptype( \ + dc, opnd_create_reg(rsrc), opnd_create_immed_int(imm++, OPSZ_5b), \ + opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ + test_instr_encoding(dc, OP_ccm##cmptype, instr); \ + imm = imm > 31 ? 0 : imm; \ + nzcv = nzcv > 15 ? 0 : nzcv; \ + cond = cond > 17 ? 0 : cond; \ } /* Macro expansion generates sequence of instruction creation tests for: @@ -7150,17 +7150,17 @@ test_scvtf_vector_fixed(void *dc) * CCMN , , #, * CCMN , , #, */ -#define ccm_r_r(cmptype, reg) \ - nzcv = 0; \ - cond = 0; \ - rsrc1 = DR_REG_##reg##30; \ - for (int rsrc0 = DR_REG_##reg##0; rsrc0 < DR_REG_##reg##SP; rsrc0++) { \ - instr = INSTR_CREATE_ccm##cmptype(dc, opnd_create_reg(rsrc0), \ - opnd_create_reg(rsrc1--), \ - opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ - test_instr_encoding(dc, OP_ccm##cmptype, instr); \ - nzcv = nzcv > 15 ? 0 : nzcv; \ - cond = cond > 17 ? 0 : cond; \ +#define ccm_r_r(cmptype, reg) \ + nzcv = 0; \ + cond = 0; \ + rsrc1 = DR_REG_##reg##30; \ + for (int rsrc0 = DR_REG_##reg##0; rsrc0 < DR_REG_##reg##SP; rsrc0++) { \ + instr = INSTR_CREATE_ccm##cmptype( \ + dc, opnd_create_reg(rsrc0), opnd_create_reg(rsrc1--), \ + opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ + test_instr_encoding(dc, OP_ccm##cmptype, instr); \ + nzcv = nzcv > 15 ? 0 : nzcv; \ + cond = cond > 17 ? 0 : cond; \ } static void @@ -7168,15 +7168,15 @@ test_ccmp_ccmn(void *dc) { instr_t *instr; - dr_pred_type_t conds[] = {DR_PRED_EQ, DR_PRED_NE, DR_PRED_CS, DR_PRED_CC, - DR_PRED_MI, DR_PRED_PL, DR_PRED_VS, DR_PRED_VC, DR_PRED_HI, DR_PRED_LS, - DR_PRED_GE, DR_PRED_LT, DR_PRED_GT, DR_PRED_LE, DR_PRED_AL, DR_PRED_NV, - DR_PRED_HS, DR_PRED_LO}; + dr_pred_type_t conds[] = { DR_PRED_EQ, DR_PRED_NE, DR_PRED_CS, DR_PRED_CC, DR_PRED_MI, + DR_PRED_PL, DR_PRED_VS, DR_PRED_VC, DR_PRED_HI, DR_PRED_LS, + DR_PRED_GE, DR_PRED_LT, DR_PRED_GT, DR_PRED_LE, DR_PRED_AL, + DR_PRED_NV, DR_PRED_HS, DR_PRED_LO }; // CCMP , #, #, GE instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_W28), - opnd_create_immed_int(10, OPSZ_5b), - opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); + opnd_create_immed_int(10, OPSZ_5b), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); test_instr_encoding(dc, OP_ccmp, instr); int imm; @@ -7186,57 +7186,56 @@ test_ccmp_ccmn(void *dc) // CCMP , #, #, EQ instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_X0), - opnd_create_immed_int(10, OPSZ_5b), - opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_EQ); + opnd_create_immed_int(10, OPSZ_5b), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_EQ); test_instr_encoding(dc, OP_ccmp, instr); ccm_r_i(p, X); // CCMP , , #, GE - instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_W28), - opnd_create_reg(DR_REG_W29), - opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); + instr = + INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_W28), opnd_create_reg(DR_REG_W29), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); test_instr_encoding(dc, OP_ccmp, instr); int rsrc1; ccm_r_r(p, W); // CCMP , , #, GE - instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_X28), - opnd_create_reg(DR_REG_X29), - opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); + instr = + INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_X28), opnd_create_reg(DR_REG_X29), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); test_instr_encoding(dc, OP_ccmp, instr); ccm_r_r(p, X); // CCMN , #, #, EQ instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_W0), - opnd_create_immed_int(0x1f, OPSZ_5b), - opnd_create_immed_int(0b0101, OPSZ_4b), DR_PRED_EQ); + opnd_create_immed_int(0x1f, OPSZ_5b), + opnd_create_immed_int(0b0101, OPSZ_4b), DR_PRED_EQ); test_instr_encoding(dc, OP_ccmn, instr); ccm_r_i(n, W); // CCMN , #, #, LT instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X15), - opnd_create_immed_int(0, OPSZ_5b), - opnd_create_immed_int(0b1001, OPSZ_4b), DR_PRED_LT); + opnd_create_immed_int(0, OPSZ_5b), + opnd_create_immed_int(0b1001, OPSZ_4b), DR_PRED_LT); test_instr_encoding(dc, OP_ccmn, instr); ccm_r_i(n, X); // CCMN , , #, VS - instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_W30), - opnd_create_reg(DR_REG_W29), - opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_VS); + instr = + INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_W30), opnd_create_reg(DR_REG_W29), + opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_VS); test_instr_encoding(dc, OP_ccmn, instr); ccm_r_r(n, W); // CCMN , , #, PL - instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X9), - opnd_create_reg(DR_REG_X10), - opnd_create_immed_int(0b1111, OPSZ_4b), DR_PRED_PL); + instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X9), opnd_create_reg(DR_REG_X10), + opnd_create_immed_int(0b1111, OPSZ_4b), DR_PRED_PL); test_instr_encoding(dc, OP_ccmn, instr); ccm_r_r(n, X); From a7b10a3cb4fcb4269cc2bc934c1de55eca64eea9 Mon Sep 17 00:00:00 2001 From: Assad Hashmi Date: Thu, 18 Nov 2021 11:43:36 +0000 Subject: [PATCH 3/4] Improve description of parameters in doxygen header For INSTR_CREATE_ccmp() and INSTR_CREATE_ccmn(). --- core/ir/aarch64/codec.c | 3 +-- core/ir/aarch64/instr_create_api.h | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/core/ir/aarch64/codec.c b/core/ir/aarch64/codec.c index b03c32298ca..dd292940147 100644 --- a/core/ir/aarch64/codec.c +++ b/core/ir/aarch64/codec.c @@ -4381,8 +4381,7 @@ encode_opnds_ccm(byte *pc, instr_t *instr, uint enc, decode_info_t *di) if (instr_num_dsts(instr) == 0 && instr_num_srcs(instr) == 3 && encode_opnd_rn(false, 5, instr_get_src(instr, 0), &rn) && /* Rn */ opnd_is_immed_int(instr_get_src(instr, 2)) && /* nzcv */ - (uint)(instr_get_predicate(instr) - DR_PRED_EQ) < 16) /* cond */ - { + (uint)(instr_get_predicate(instr) - DR_PRED_EQ) < 16) { /* cond */ uint nzcv = opnd_get_immed_int(instr_get_src(instr, 2)); uint cond = instr_get_predicate(instr) - DR_PRED_EQ; if (opnd_is_immed_int(instr_get_src(instr, 1))) { /* imm5 */ diff --git a/core/ir/aarch64/instr_create_api.h b/core/ir/aarch64/instr_create_api.h index 58eb00d5a0c..69e8879d6aa 100644 --- a/core/ir/aarch64/instr_create_api.h +++ b/core/ir/aarch64/instr_create_api.h @@ -575,7 +575,7 @@ enum { * \param Rn The GPR source register. * \param Op Either a 5-bit immediate (use opnd_create_immed_uint(val, OPSZ_5b) * to create the operand) or a GPR source register. - * \param nzcv The 4 bit NZCV flags bit specifier + * \param nzcv The 4 bit NZCV flags value used if the input condition is false. * (use opnd_create_immed_uint(val, OPSZ_4b) to create the operand). * \param cond The comparison condition specified by dr_pred_type_t, e.g. DR_PRED_EQ. * (use opnd_create_cond(val) to create the operand). @@ -593,7 +593,7 @@ enum { * \param Rn The GPR source register. * \param Op Either a 5-bit immediate (use opnd_create_immed_uint(val, OPSZ_5b) * to create the operand) or a GPR source register. - * \param nzcv The 4 bit NZCV flags bit specifier + * \param nzcv The 4 bit NZCV flags value used if the input condition is false. * (use opnd_create_immed_uint(val, OPSZ_4b) to create the operand). * \param cond The comparison condition specified by dr_pred_type_t, e.g. DR_PRED_EQ. * (use opnd_create_cond(val) to create the operand). From 1f093f63d45d24e8a12add9b6cb01cd3f18e78e2 Mon Sep 17 00:00:00 2001 From: Assad Hashmi Date: Tue, 23 Nov 2021 11:29:12 +0000 Subject: [PATCH 4/4] Address review comments about doxygen header and ccm() test macros. --- core/ir/aarch64/instr_create_api.h | 24 +++++----- suite/tests/api/ir_aarch64.c | 70 ++++++++++++++++-------------- 2 files changed, 49 insertions(+), 45 deletions(-) diff --git a/core/ir/aarch64/instr_create_api.h b/core/ir/aarch64/instr_create_api.h index 69e8879d6aa..91e59055f56 100644 --- a/core/ir/aarch64/instr_create_api.h +++ b/core/ir/aarch64/instr_create_api.h @@ -571,14 +571,14 @@ enum { * Creates a CCMP (Conditional Compare) instruction. Sets the NZCV flags to the * result of a comparison of its two source values if the named input condition * is true, or to an immediate value if the input condition is false. - * \param dc The void * dcontext used to allocate memory for the instr_t. + * \param dc The void * dcontext used to allocate memory for the #instr_t. + * \param cond The comparison condition specified by #dr_pred_type_t, e.g. #DR_PRED_EQ. * \param Rn The GPR source register. - * \param Op Either a 5-bit immediate (use opnd_create_immed_uint(val, OPSZ_5b) - * to create the operand) or a GPR source register. + * \param Op Either a 5-bit immediate (use #opnd_create_immed_uint() to create + the operand, e.g. opnd_create_immed_uint(val, #OPSZ_5b)) or a GPR source register. * \param nzcv The 4 bit NZCV flags value used if the input condition is false. - * (use opnd_create_immed_uint(val, OPSZ_4b) to create the operand). - * \param cond The comparison condition specified by dr_pred_type_t, e.g. DR_PRED_EQ. - * (use opnd_create_cond(val) to create the operand). + * (use #opnd_create_immed_uint() to create the operand, e.g. + * opnd_create_immed_uint(val, #OPSZ_4b)). */ #define INSTR_CREATE_ccmp(dc, Rn, Op, nzcv, cond) \ (INSTR_PRED(instr_create_0dst_3src(dc, OP_ccmp, Rn, Op, nzcv), (cond))) @@ -589,14 +589,14 @@ enum { * input condition is true, or to an immediate value if the input condition is * false. The comparison is based on a negated second source value (Op) if an * immediate, inverted if a register. - * \param dc The void * dcontext used to allocate memory for the instr_t. + * \param dc The void * dcontext used to allocate memory for the #instr_t. + * \param cond The comparison condition specified by #dr_pred_type_t, e.g. #DR_PRED_EQ. * \param Rn The GPR source register. - * \param Op Either a 5-bit immediate (use opnd_create_immed_uint(val, OPSZ_5b) - * to create the operand) or a GPR source register. + * \param Op Either a 5-bit immediate (use #opnd_create_immed_uint() to create the + * operand, e.g. opnd_create_immed_uint(val, #OPSZ_5b)) or a GPR source register. * \param nzcv The 4 bit NZCV flags value used if the input condition is false. - * (use opnd_create_immed_uint(val, OPSZ_4b) to create the operand). - * \param cond The comparison condition specified by dr_pred_type_t, e.g. DR_PRED_EQ. - * (use opnd_create_cond(val) to create the operand). + * (use #opnd_create_immed_uint() to create the operand, e.g. + * opnd_create_immed_uint(val, #OPSZ_4b)). */ #define INSTR_CREATE_ccmn(dc, Rn, Op, nzcv, cond) \ (INSTR_PRED(instr_create_0dst_3src(dc, OP_ccmn, Rn, Op, nzcv), (cond))) diff --git a/suite/tests/api/ir_aarch64.c b/suite/tests/api/ir_aarch64.c index c44b2a1e8b9..8c205c1b541 100644 --- a/suite/tests/api/ir_aarch64.c +++ b/suite/tests/api/ir_aarch64.c @@ -7130,19 +7130,21 @@ test_scvtf_vector_fixed(void *dc) * CCMN , #, #, * CCMN , #, #, */ -#define ccm_r_i(cmptype, reg) \ - nzcv = 0; \ - cond = 0; \ - imm = 0; \ - for (int rsrc = DR_REG_##reg##0; rsrc < DR_REG_##reg##SP; rsrc++) { \ - instr = INSTR_CREATE_ccm##cmptype( \ - dc, opnd_create_reg(rsrc), opnd_create_immed_int(imm++, OPSZ_5b), \ - opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ - test_instr_encoding(dc, OP_ccm##cmptype, instr); \ - imm = imm > 31 ? 0 : imm; \ - nzcv = nzcv > 15 ? 0 : nzcv; \ - cond = cond > 17 ? 0 : cond; \ - } +#define CCM_R_I(cmptype, reg) \ + do { \ + nzcv = 0; \ + cond = 0; \ + imm = 0; \ + for (int rsrc = DR_REG_##reg##0; rsrc < DR_REG_##reg##SP; rsrc++) { \ + instr = INSTR_CREATE_ccm##cmptype( \ + dc, opnd_create_reg(rsrc), opnd_create_immed_int(imm++, OPSZ_5b), \ + opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ + test_instr_encoding(dc, OP_ccm##cmptype, instr); \ + imm = imm > 31 ? 0 : imm; \ + nzcv = nzcv > 15 ? 0 : nzcv; \ + cond = cond > 17 ? 0 : cond; \ + } \ + } while (0) /* Macro expansion generates sequence of instruction creation tests for: * CCMP , , #, @@ -7150,18 +7152,20 @@ test_scvtf_vector_fixed(void *dc) * CCMN , , #, * CCMN , , #, */ -#define ccm_r_r(cmptype, reg) \ - nzcv = 0; \ - cond = 0; \ - rsrc1 = DR_REG_##reg##30; \ - for (int rsrc0 = DR_REG_##reg##0; rsrc0 < DR_REG_##reg##SP; rsrc0++) { \ - instr = INSTR_CREATE_ccm##cmptype( \ - dc, opnd_create_reg(rsrc0), opnd_create_reg(rsrc1--), \ - opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ - test_instr_encoding(dc, OP_ccm##cmptype, instr); \ - nzcv = nzcv > 15 ? 0 : nzcv; \ - cond = cond > 17 ? 0 : cond; \ - } +#define CCM_R_R(cmptype, reg) \ + do { \ + nzcv = 0; \ + cond = 0; \ + rsrc1 = DR_REG_##reg##30; \ + for (int rsrc0 = DR_REG_##reg##0; rsrc0 < DR_REG_##reg##SP; rsrc0++) { \ + instr = INSTR_CREATE_ccm##cmptype( \ + dc, opnd_create_reg(rsrc0), opnd_create_reg(rsrc1--), \ + opnd_create_immed_int(nzcv++, OPSZ_4b), conds[cond++]); \ + test_instr_encoding(dc, OP_ccm##cmptype, instr); \ + nzcv = nzcv > 15 ? 0 : nzcv; \ + cond = cond > 17 ? 0 : cond; \ + } \ + } while (0) static void test_ccmp_ccmn(void *dc) @@ -7182,7 +7186,7 @@ test_ccmp_ccmn(void *dc) int imm; int nzcv; int cond; - ccm_r_i(p, W); + CCM_R_I(p, W); // CCMP , #, #, EQ instr = INSTR_CREATE_ccmp(dc, opnd_create_reg(DR_REG_X0), @@ -7190,7 +7194,7 @@ test_ccmp_ccmn(void *dc) opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_EQ); test_instr_encoding(dc, OP_ccmp, instr); - ccm_r_i(p, X); + CCM_R_I(p, X); // CCMP , , #, GE instr = @@ -7199,7 +7203,7 @@ test_ccmp_ccmn(void *dc) test_instr_encoding(dc, OP_ccmp, instr); int rsrc1; - ccm_r_r(p, W); + CCM_R_R(p, W); // CCMP , , #, GE instr = @@ -7207,7 +7211,7 @@ test_ccmp_ccmn(void *dc) opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_GE); test_instr_encoding(dc, OP_ccmp, instr); - ccm_r_r(p, X); + CCM_R_R(p, X); // CCMN , #, #, EQ instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_W0), @@ -7215,7 +7219,7 @@ test_ccmp_ccmn(void *dc) opnd_create_immed_int(0b0101, OPSZ_4b), DR_PRED_EQ); test_instr_encoding(dc, OP_ccmn, instr); - ccm_r_i(n, W); + CCM_R_I(n, W); // CCMN , #, #, LT instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X15), @@ -7223,7 +7227,7 @@ test_ccmp_ccmn(void *dc) opnd_create_immed_int(0b1001, OPSZ_4b), DR_PRED_LT); test_instr_encoding(dc, OP_ccmn, instr); - ccm_r_i(n, X); + CCM_R_I(n, X); // CCMN , , #, VS instr = @@ -7231,14 +7235,14 @@ test_ccmp_ccmn(void *dc) opnd_create_immed_int(0b1010, OPSZ_4b), DR_PRED_VS); test_instr_encoding(dc, OP_ccmn, instr); - ccm_r_r(n, W); + CCM_R_R(n, W); // CCMN , , #, PL instr = INSTR_CREATE_ccmn(dc, opnd_create_reg(DR_REG_X9), opnd_create_reg(DR_REG_X10), opnd_create_immed_int(0b1111, OPSZ_4b), DR_PRED_PL); test_instr_encoding(dc, OP_ccmn, instr); - ccm_r_r(n, X); + CCM_R_R(n, X); } int