diff --git a/library/SubcircuitLibrary/IC_LM339/D.lib b/library/SubcircuitLibrary/IC_LM339/D.lib new file mode 100644 index 00000000..513550fa --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339-cache.lib b/library/SubcircuitLibrary/IC_LM339/IC_LM339-cache.lib new file mode 100644 index 00000000..044607c1 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339-cache.lib @@ -0,0 +1,141 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# dc +# +DEF dc I 0 40 Y Y 1 F N +F0 "I" -200 100 60 H V C CNN +F1 "dc" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +P 2 0 1 0 0 -100 0 -100 N +P 2 0 1 0 0 100 -50 50 N +P 2 0 1 0 0 100 0 -100 N +P 2 0 1 0 0 100 50 50 N +X ~ 1 0 450 300 D 50 50 1 1 P +X ~ 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_GND +# +DEF eSim_GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "eSim_GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339.cir b/library/SubcircuitLibrary/IC_LM339/IC_LM339.cir new file mode 100644 index 00000000..875f65ed --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339.cir @@ -0,0 +1,25 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_LM339\IC_LM339.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 02/22/23 18:41:18 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +Q1 GND Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_PNP +Q2 Net-_Q2-Pad1_ Net-_D1-Pad2_ Net-_D2-Pad1_ eSim_PNP +Q5 Net-_Q4-Pad1_ Net-_D3-Pad2_ Net-_D2-Pad1_ eSim_PNP +Q6 GND Net-_D4-Pad1_ Net-_D3-Pad2_ eSim_PNP +Q3 Net-_Q2-Pad1_ Net-_Q2-Pad1_ Net-_Q3-Pad3_ eSim_NPN +Q4 Net-_Q4-Pad1_ Net-_Q2-Pad1_ Net-_Q3-Pad3_ eSim_NPN +Q7 Net-_I2-Pad1_ Net-_Q4-Pad1_ Net-_Q3-Pad3_ eSim_NPN +Q8 Net-_Q8-Pad1_ Net-_I2-Pad1_ Net-_Q3-Pad3_ eSim_NPN +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode +D2 Net-_D2-Pad1_ Net-_D1-Pad2_ eSim_Diode +D3 Net-_D2-Pad1_ Net-_D3-Pad2_ eSim_Diode +D4 Net-_D4-Pad1_ Net-_D3-Pad2_ eSim_Diode +I1 Net-_D2-Pad1_ Net-_I1-Pad2_ 80u +I2 Net-_I2-Pad1_ Net-_I1-Pad2_ 80u +U1 Net-_D1-Pad1_ Net-_D4-Pad1_ Net-_I1-Pad2_ Net-_Q8-Pad1_ Net-_Q3-Pad3_ PORT + +.end diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339.cir.out b/library/SubcircuitLibrary/IC_LM339/IC_LM339.cir.out new file mode 100644 index 00000000..54c04427 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339.cir.out @@ -0,0 +1,29 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_lm339\ic_lm339.cir + +.include NPN.lib +.include PNP.lib +.include D.lib +q1 gnd net-_d1-pad1_ net-_d1-pad2_ Q2N2907A +q2 net-_q2-pad1_ net-_d1-pad2_ net-_d2-pad1_ Q2N2907A +q5 net-_q4-pad1_ net-_d3-pad2_ net-_d2-pad1_ Q2N2907A +q6 gnd net-_d4-pad1_ net-_d3-pad2_ Q2N2907A +q3 net-_q2-pad1_ net-_q2-pad1_ net-_q3-pad3_ Q2N2222 +q4 net-_q4-pad1_ net-_q2-pad1_ net-_q3-pad3_ Q2N2222 +q7 net-_i2-pad1_ net-_q4-pad1_ net-_q3-pad3_ Q2N2222 +q8 net-_q8-pad1_ net-_i2-pad1_ net-_q3-pad3_ Q2N2222 +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148 +d3 net-_d2-pad1_ net-_d3-pad2_ 1N4148 +d4 net-_d4-pad1_ net-_d3-pad2_ 1N4148 +i1 net-_d2-pad1_ net-_i1-pad2_ 80u +i2 net-_i2-pad1_ net-_i1-pad2_ 80u +* u1 net-_d1-pad1_ net-_d4-pad1_ net-_i1-pad2_ net-_q8-pad1_ net-_q3-pad3_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339.pro b/library/SubcircuitLibrary/IC_LM339/IC_LM339.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339.sch b/library/SubcircuitLibrary/IC_LM339/IC_LM339.sch new file mode 100644 index 00000000..860e66db --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339.sch @@ -0,0 +1,369 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:IC_LM339-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_PNP Q1 +U 1 1 63F31F1D +P 4050 3550 +F 0 "Q1" H 3950 3600 50 0000 R CNN +F 1 "eSim_PNP" H 4000 3700 50 0000 R CNN +F 2 "" H 4250 3650 29 0000 C CNN +F 3 "" H 4050 3550 60 0000 C CNN + 1 4050 3550 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q2 +U 1 1 63F31F57 +P 4850 3050 +F 0 "Q2" H 4750 3100 50 0000 R CNN +F 1 "eSim_PNP" H 4800 3200 50 0000 R CNN +F 2 "" H 5050 3150 29 0000 C CNN +F 3 "" H 4850 3050 60 0000 C CNN + 1 4850 3050 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q5 +U 1 1 63F31F87 +P 5950 3050 +F 0 "Q5" H 5850 3100 50 0000 R CNN +F 1 "eSim_PNP" H 5900 3200 50 0000 R CNN +F 2 "" H 6150 3150 29 0000 C CNN +F 3 "" H 5950 3050 60 0000 C CNN + 1 5950 3050 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q6 +U 1 1 63F31FAE +P 6650 3550 +F 0 "Q6" H 6550 3600 50 0000 R CNN +F 1 "eSim_PNP" H 6600 3700 50 0000 R CNN +F 2 "" H 6850 3650 29 0000 C CNN +F 3 "" H 6650 3550 60 0000 C CNN + 1 6650 3550 + -1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q3 +U 1 1 63F31FDD +P 5050 4300 +F 0 "Q3" H 4950 4350 50 0000 R CNN +F 1 "eSim_NPN" H 5000 4450 50 0000 R CNN +F 2 "" H 5250 4400 29 0000 C CNN +F 3 "" H 5050 4300 60 0000 C CNN + 1 5050 4300 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q4 +U 1 1 63F32010 +P 5750 4300 +F 0 "Q4" H 5650 4350 50 0000 R CNN +F 1 "eSim_NPN" H 5700 4450 50 0000 R CNN +F 2 "" H 5950 4400 29 0000 C CNN +F 3 "" H 5750 4300 60 0000 C CNN + 1 5750 4300 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q7 +U 1 1 63F32095 +P 7400 4000 +F 0 "Q7" H 7300 4050 50 0000 R CNN +F 1 "eSim_NPN" H 7350 4150 50 0000 R CNN +F 2 "" H 7600 4100 29 0000 C CNN +F 3 "" H 7400 4000 60 0000 C CNN + 1 7400 4000 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q8 +U 1 1 63F320C2 +P 7850 3550 +F 0 "Q8" H 7750 3600 50 0000 R CNN +F 1 "eSim_NPN" H 7800 3700 50 0000 R CNN +F 2 "" H 8050 3650 29 0000 C CNN +F 3 "" H 7850 3550 60 0000 C CNN + 1 7850 3550 + 1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D1 +U 1 1 63F320F3 +P 3850 3050 +F 0 "D1" H 3850 3150 50 0000 C CNN +F 1 "eSim_Diode" H 3850 2950 50 0000 C CNN +F 2 "" H 3850 3050 60 0000 C CNN +F 3 "" H 3850 3050 60 0000 C CNN + 1 3850 3050 + 1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D2 +U 1 1 63F3211A +P 4450 2800 +F 0 "D2" H 4450 2900 50 0000 C CNN +F 1 "eSim_Diode" H 4450 2700 50 0000 C CNN +F 2 "" H 4450 2800 60 0000 C CNN +F 3 "" H 4450 2800 60 0000 C CNN + 1 4450 2800 + 0 1 1 0 +$EndComp +$Comp +L eSim_Diode D3 +U 1 1 63F3215E +P 6300 2800 +F 0 "D3" H 6300 2900 50 0000 C CNN +F 1 "eSim_Diode" H 6300 2700 50 0000 C CNN +F 2 "" H 6300 2800 60 0000 C CNN +F 3 "" H 6300 2800 60 0000 C CNN + 1 6300 2800 + 0 1 1 0 +$EndComp +$Comp +L eSim_Diode D4 +U 1 1 63F32191 +P 6850 3050 +F 0 "D4" H 6850 3150 50 0000 C CNN +F 1 "eSim_Diode" H 6850 2950 50 0000 C CNN +F 2 "" H 6850 3050 60 0000 C CNN +F 3 "" H 6850 3050 60 0000 C CNN + 1 6850 3050 + -1 0 0 1 +$EndComp +$Comp +L dc I1 +U 1 1 63F32382 +P 5350 2050 +F 0 "I1" H 5150 2150 60 0000 C CNN +F 1 "80u" H 5150 2000 60 0000 C CNN +F 2 "R1" H 5050 2050 60 0000 C CNN +F 3 "" H 5350 2050 60 0000 C CNN + 1 5350 2050 + -1 0 0 1 +$EndComp +$Comp +L dc I2 +U 1 1 63F323C1 +P 7500 2450 +F 0 "I2" H 7300 2550 60 0000 C CNN +F 1 "80u" H 7300 2400 60 0000 C CNN +F 2 "R1" H 7200 2450 60 0000 C CNN +F 3 "" H 7500 2450 60 0000 C CNN + 1 7500 2450 + -1 0 0 1 +$EndComp +Wire Wire Line + 5850 3250 5850 4100 +Wire Wire Line + 4950 3250 4950 4100 +Wire Wire Line + 4150 3350 4150 3050 +Wire Wire Line + 4000 3050 4650 3050 +Wire Wire Line + 6150 3050 6700 3050 +Wire Wire Line + 6550 3050 6550 3350 +Wire Wire Line + 5250 4300 5550 4300 +Wire Wire Line + 4950 2850 5850 2850 +Wire Wire Line + 4950 3950 5350 3950 +Wire Wire Line + 5350 3950 5350 4300 +Connection ~ 5350 4300 +Connection ~ 4950 3950 +Wire Wire Line + 6300 2950 6300 3050 +Connection ~ 6300 3050 +Connection ~ 4150 3050 +Wire Wire Line + 4450 2950 4450 3050 +Connection ~ 4450 3050 +Connection ~ 6550 3050 +Wire Wire Line + 3700 3050 3700 3550 +Wire Wire Line + 3350 3550 3850 3550 +Wire Wire Line + 7000 3050 7000 3900 +Wire Wire Line + 7000 3550 6850 3550 +Wire Wire Line + 7500 2900 7500 3800 +Wire Wire Line + 7650 3550 7500 3550 +Connection ~ 7500 3550 +Wire Wire Line + 5350 2500 5350 2850 +Connection ~ 5350 2850 +Wire Wire Line + 4450 2650 6300 2650 +Connection ~ 5350 2650 +Wire Wire Line + 5350 1600 7650 1600 +Wire Wire Line + 7500 1600 7500 2000 +Wire Wire Line + 5850 4000 7200 4000 +Wire Wire Line + 4950 4500 4950 4600 +Wire Wire Line + 4950 4600 8100 4600 +Wire Wire Line + 7950 4600 7950 3750 +Wire Wire Line + 5850 4500 5850 4600 +Connection ~ 5850 4600 +Wire Wire Line + 7500 4200 7500 4600 +Connection ~ 7500 4600 +$Comp +L PORT U1 +U 1 1 63F32DB1 +P 3100 3550 +F 0 "U1" H 3150 3650 30 0000 C CNN +F 1 "PORT" H 3100 3550 30 0000 C CNN +F 2 "" H 3100 3550 60 0000 C CNN +F 3 "" H 3100 3550 60 0000 C CNN + 1 3100 3550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 63F32DF5 +P 3100 3900 +F 0 "U1" H 3150 4000 30 0000 C CNN +F 1 "PORT" H 3100 3900 30 0000 C CNN +F 2 "" H 3100 3900 60 0000 C CNN +F 3 "" H 3100 3900 60 0000 C CNN + 2 3100 3900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 63F3302C +P 7900 1600 +F 0 "U1" H 7950 1700 30 0000 C CNN +F 1 "PORT" H 7900 1600 30 0000 C CNN +F 2 "" H 7900 1600 60 0000 C CNN +F 3 "" H 7900 1600 60 0000 C CNN + 3 7900 1600 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 63F33067 +P 8350 3200 +F 0 "U1" H 8400 3300 30 0000 C CNN +F 1 "PORT" H 8350 3200 30 0000 C CNN +F 2 "" H 8350 3200 60 0000 C CNN +F 3 "" H 8350 3200 60 0000 C CNN + 4 8350 3200 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 5 1 63F33416 +P 8350 4600 +F 0 "U1" H 8400 4700 30 0000 C CNN +F 1 "PORT" H 8350 4600 30 0000 C CNN +F 2 "" H 8350 4600 60 0000 C CNN +F 3 "" H 8350 4600 60 0000 C CNN + 5 8350 4600 + -1 0 0 1 +$EndComp +Connection ~ 3700 3550 +Connection ~ 7500 1600 +Wire Wire Line + 8100 3200 7950 3200 +Wire Wire Line + 7950 3200 7950 3350 +$Comp +L eSim_GND #PWR1 +U 1 1 63F344A6 +P 4150 4150 +F 0 "#PWR1" H 4150 3900 50 0001 C CNN +F 1 "eSim_GND" H 4150 4000 50 0000 C CNN +F 2 "" H 4150 4150 50 0001 C CNN +F 3 "" H 4150 4150 50 0001 C CNN + 1 4150 4150 + 1 0 0 -1 +$EndComp +$Comp +L eSim_GND #PWR2 +U 1 1 63F344E0 +P 6550 4150 +F 0 "#PWR2" H 6550 3900 50 0001 C CNN +F 1 "eSim_GND" H 6550 4000 50 0000 C CNN +F 2 "" H 6550 4150 50 0001 C CNN +F 3 "" H 6550 4150 50 0001 C CNN + 1 6550 4150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4150 4150 4150 3750 +Wire Wire Line + 6550 3750 6550 4150 +Connection ~ 5850 4000 +Wire Wire Line + 7000 3900 3350 3900 +Connection ~ 7000 3550 +Connection ~ 7800 4600 +Connection ~ 7950 4600 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339.sub b/library/SubcircuitLibrary/IC_LM339/IC_LM339.sub new file mode 100644 index 00000000..710f49e2 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339.sub @@ -0,0 +1,23 @@ +* Subcircuit IC_LM339 +.subckt IC_LM339 net-_d1-pad1_ net-_d4-pad1_ net-_i1-pad2_ net-_q8-pad1_ net-_q3-pad3_ +* c:\fossee\esim\library\subcircuitlibrary\ic_lm339\ic_lm339.cir +.include NPN.lib +.include PNP.lib +.include D.lib +q1 gnd net-_d1-pad1_ net-_d1-pad2_ Q2N2907A +q2 net-_q2-pad1_ net-_d1-pad2_ net-_d2-pad1_ Q2N2907A +q5 net-_q4-pad1_ net-_d3-pad2_ net-_d2-pad1_ Q2N2907A +q6 gnd net-_d4-pad1_ net-_d3-pad2_ Q2N2907A +q3 net-_q2-pad1_ net-_q2-pad1_ net-_q3-pad3_ Q2N2222 +q4 net-_q4-pad1_ net-_q2-pad1_ net-_q3-pad3_ Q2N2222 +q7 net-_i2-pad1_ net-_q4-pad1_ net-_q3-pad3_ Q2N2222 +q8 net-_q8-pad1_ net-_i2-pad1_ net-_q3-pad3_ Q2N2222 +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148 +d3 net-_d2-pad1_ net-_d3-pad2_ 1N4148 +d4 net-_d4-pad1_ net-_d3-pad2_ 1N4148 +i1 net-_d2-pad1_ net-_i1-pad2_ 80u +i2 net-_i2-pad1_ net-_i1-pad2_ 80u +* Control Statements + +.ends IC_LM339 \ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM339/IC_LM339_Previous_Values.xml b/library/SubcircuitLibrary/IC_LM339/IC_LM339_Previous_Values.xml new file mode 100644 index 00000000..01cdd8fe --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/IC_LM339_Previous_Values.xml @@ -0,0 +1 @@ +80u80uC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM339/NPN.lib b/library/SubcircuitLibrary/IC_LM339/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/IC_LM339/PNP.lib b/library/SubcircuitLibrary/IC_LM339/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/IC_LM339/analysis b/library/SubcircuitLibrary/IC_LM339/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM339/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM833/D.lib b/library/SubcircuitLibrary/IC_LM833/D.lib new file mode 100644 index 00000000..513550fa --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833-cache.lib b/library/SubcircuitLibrary/IC_LM833/IC_LM833-cache.lib new file mode 100644 index 00000000..d90058e5 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833-cache.lib @@ -0,0 +1,190 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_MOS_P +# +DEF eSim_MOS_P M 0 0 Y N 1 F N +F0 "M" -50 50 50 H V R CNN +F1 "eSim_MOS_P" 50 150 50 H V R CNN +F2 "" 250 100 29 H V C CNN +F3 "" 50 0 60 H V C CNN +ALIAS mosfet_p +DRAW +C 100 0 111 0 1 10 N +P 2 0 1 0 80 -70 150 -70 N +P 2 0 1 10 80 -50 80 -90 N +P 2 0 1 0 80 0 150 0 N +P 2 0 1 10 80 20 80 -20 N +P 2 0 1 0 80 70 150 70 N +P 2 0 1 10 80 90 80 50 N +P 2 0 1 0 150 -70 150 -100 N +P 2 0 1 0 150 100 150 70 N +P 3 0 1 10 60 75 60 -75 60 -75 N +P 3 0 1 0 150 0 250 0 250 -50 N +P 4 0 1 0 140 0 100 -15 100 15 140 0 F +X D 1 150 200 100 D 50 50 1 1 P +X G 2 -150 0 210 R 50 50 1 1 P +X S 3 150 -200 100 U 50 50 1 1 P +X B 4 250 -150 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# zener +# +DEF zener U 0 40 Y Y 1 F N +F0 "U" -50 -100 60 H V C CNN +F1 "zener" 0 100 60 H V C CNN +F2 "" 50 0 60 H V C CNN +F3 "" 50 0 60 H V C CNN +DRAW +P 2 0 1 0 100 -50 50 -100 N +P 2 0 1 0 100 50 100 -50 N +P 2 0 1 0 100 50 150 100 N +P 4 0 1 0 0 50 0 -50 100 0 0 50 N +X ~ IN -200 0 200 R 50 43 1 1 I +X ~ OUT 300 0 200 L 50 43 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833.cir b/library/SubcircuitLibrary/IC_LM833/IC_LM833.cir new file mode 100644 index 00000000..acba2e64 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833.cir @@ -0,0 +1,69 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_LM833\IC_LM833.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 03/14/23 13:41:34 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_Q2-Pad2_ Net-_Q5-Pad2_ Net-_D4-Pad1_ Net-_Q14-Pad2_ Net-_Q17-Pad2_ Net-_C1-Pad2_ Net-_D1-Pad1_ Net-_D8-Pad1_ PORT +C3 Net-_C3-Pad1_ Net-_C2-Pad2_ 1n +C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 1n +R3 Net-_D1-Pad1_ Net-_Q3-Pad3_ 5k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 1n +R6 Net-_Q11-Pad3_ Net-_C1-Pad2_ 2k +Q12 Net-_D3-Pad1_ Net-_Q10-Pad3_ Net-_D4-Pad1_ eSim_NPN +R8 Net-_D4-Pad1_ Net-_Q10-Pad3_ 2k +Q11 Net-_D4-Pad1_ Net-_C3-Pad1_ Net-_Q11-Pad3_ eSim_NPN +Q10 Net-_D1-Pad1_ Net-_D3-Pad1_ Net-_Q10-Pad3_ eSim_NPN +R7 Net-_D3-Pad2_ Net-_Q10-Pad3_ 1k +D4 Net-_D4-Pad1_ Net-_D3-Pad2_ eSim_Diode +D3 Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_Diode +Q9 Net-_D3-Pad2_ Net-_C3-Pad1_ Net-_Q11-Pad3_ eSim_NPN +Q8 Net-_D3-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad1_ eSim_PNP +Q6 Net-_C2-Pad1_ Net-_Q11-Pad3_ Net-_C1-Pad2_ eSim_NPN +R5 Net-_C3-Pad1_ Net-_Q11-Pad3_ 2k +R4 Net-_Q4-Pad3_ Net-_C1-Pad2_ 5k +R2 Net-_C1-Pad1_ Net-_C1-Pad2_ 2k +R1 Net-_Q1-Pad3_ Net-_C1-Pad2_ 5k +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode +Q3 Net-_Q2-Pad3_ Net-_D1-Pad2_ Net-_Q3-Pad3_ eSim_PNP +D2 Net-_D2-Pad1_ Net-_C1-Pad1_ eSim_Diode +Q7 Net-_D3-Pad1_ Net-_C2-Pad1_ Net-_C3-Pad1_ eSim_NPN +Q4 Net-_C2-Pad1_ Net-_D2-Pad1_ Net-_Q4-Pad3_ eSim_NPN +Q5 Net-_C2-Pad1_ Net-_Q5-Pad2_ Net-_Q2-Pad3_ eSim_PNP +Q2 Net-_D2-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_PNP +Q1 Net-_D1-Pad2_ Net-_M1-Pad3_ Net-_Q1-Pad3_ eSim_NPN +U1 Net-_C1-Pad2_ Net-_M1-Pad3_ zener +M1 Net-_D1-Pad1_ Net-_C1-Pad2_ Net-_M1-Pad3_ Net-_D1-Pad1_ mosfet_p +C6 Net-_C6-Pad1_ Net-_C5-Pad2_ 1n +C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 1n +R11 Net-_D1-Pad1_ Net-_Q15-Pad3_ 5k +C4 Net-_C4-Pad1_ Net-_C1-Pad2_ 1n +R14 Net-_Q18-Pad2_ Net-_C1-Pad2_ 2k +Q24 Net-_D7-Pad1_ Net-_Q22-Pad3_ Net-_D8-Pad1_ eSim_NPN +R16 Net-_D8-Pad1_ Net-_Q22-Pad3_ 2k +Q23 Net-_D8-Pad1_ Net-_C6-Pad1_ Net-_Q18-Pad2_ eSim_NPN +Q22 Net-_D1-Pad1_ Net-_D7-Pad1_ Net-_Q22-Pad3_ eSim_NPN +R15 Net-_D7-Pad2_ Net-_Q22-Pad3_ 1k +D8 Net-_D8-Pad1_ Net-_D7-Pad2_ eSim_Diode +D7 Net-_D7-Pad1_ Net-_D7-Pad2_ eSim_Diode +Q21 Net-_D7-Pad2_ Net-_C6-Pad1_ Net-_Q18-Pad2_ eSim_NPN +Q20 Net-_D7-Pad1_ Net-_D5-Pad2_ Net-_D1-Pad1_ eSim_PNP +Q18 Net-_C5-Pad1_ Net-_Q18-Pad2_ Net-_C1-Pad2_ eSim_NPN +R13 Net-_C6-Pad1_ Net-_Q18-Pad2_ 2k +R12 Net-_Q16-Pad3_ Net-_C1-Pad2_ 5k +R10 Net-_C4-Pad1_ Net-_C1-Pad2_ 2k +R9 Net-_Q13-Pad3_ Net-_C1-Pad2_ 5k +D5 Net-_D1-Pad1_ Net-_D5-Pad2_ eSim_Diode +Q15 Net-_Q14-Pad3_ Net-_D5-Pad2_ Net-_Q15-Pad3_ eSim_PNP +D6 Net-_D6-Pad1_ Net-_C4-Pad1_ eSim_Diode +Q19 Net-_D7-Pad1_ Net-_C5-Pad1_ Net-_C6-Pad1_ eSim_NPN +Q16 Net-_C5-Pad1_ Net-_D6-Pad1_ Net-_Q16-Pad3_ eSim_NPN +Q17 Net-_C5-Pad1_ Net-_Q17-Pad2_ Net-_Q14-Pad3_ eSim_PNP +Q14 Net-_D6-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_PNP +Q13 Net-_D5-Pad2_ Net-_M2-Pad3_ Net-_Q13-Pad3_ eSim_NPN +U3 Net-_C1-Pad2_ Net-_M2-Pad3_ zener +M2 Net-_D1-Pad1_ Net-_C1-Pad2_ Net-_M2-Pad3_ Net-_D1-Pad1_ mosfet_p + +.end diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833.cir.out b/library/SubcircuitLibrary/IC_LM833/IC_LM833.cir.out new file mode 100644 index 00000000..74e57024 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833.cir.out @@ -0,0 +1,80 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_lm833\ic_lm833.cir + +.include PMOS-180nm.lib +.include D.lib +.include NPN.lib +.include PNP.lib +* u2 net-_q2-pad2_ net-_q5-pad2_ net-_d4-pad1_ net-_q14-pad2_ net-_q17-pad2_ net-_c1-pad2_ net-_d1-pad1_ net-_d8-pad1_ port +c3 net-_c3-pad1_ net-_c2-pad2_ 1n +c2 net-_c2-pad1_ net-_c2-pad2_ 1n +r3 net-_d1-pad1_ net-_q3-pad3_ 5k +c1 net-_c1-pad1_ net-_c1-pad2_ 1n +r6 net-_q11-pad3_ net-_c1-pad2_ 2k +q12 net-_d3-pad1_ net-_q10-pad3_ net-_d4-pad1_ Q2N2222 +r8 net-_d4-pad1_ net-_q10-pad3_ 2k +q11 net-_d4-pad1_ net-_c3-pad1_ net-_q11-pad3_ Q2N2222 +q10 net-_d1-pad1_ net-_d3-pad1_ net-_q10-pad3_ Q2N2222 +r7 net-_d3-pad2_ net-_q10-pad3_ 1k +d4 net-_d4-pad1_ net-_d3-pad2_ 1N4148 +d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148 +q9 net-_d3-pad2_ net-_c3-pad1_ net-_q11-pad3_ Q2N2222 +q8 net-_d3-pad1_ net-_d1-pad2_ net-_d1-pad1_ Q2N2907A +q6 net-_c2-pad1_ net-_q11-pad3_ net-_c1-pad2_ Q2N2222 +r5 net-_c3-pad1_ net-_q11-pad3_ 2k +r4 net-_q4-pad3_ net-_c1-pad2_ 5k +r2 net-_c1-pad1_ net-_c1-pad2_ 2k +r1 net-_q1-pad3_ net-_c1-pad2_ 5k +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q3 net-_q2-pad3_ net-_d1-pad2_ net-_q3-pad3_ Q2N2907A +d2 net-_d2-pad1_ net-_c1-pad1_ 1N4148 +q7 net-_d3-pad1_ net-_c2-pad1_ net-_c3-pad1_ Q2N2222 +q4 net-_c2-pad1_ net-_d2-pad1_ net-_q4-pad3_ Q2N2222 +q5 net-_c2-pad1_ net-_q5-pad2_ net-_q2-pad3_ Q2N2907A +q2 net-_d2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2907A +q1 net-_d1-pad2_ net-_m1-pad3_ net-_q1-pad3_ Q2N2222 +* u1 net-_c1-pad2_ net-_m1-pad3_ zener +m1 net-_d1-pad1_ net-_c1-pad2_ net-_m1-pad3_ net-_d1-pad1_ CMOSP W=100u L=100u M=1 +c6 net-_c6-pad1_ net-_c5-pad2_ 1n +c5 net-_c5-pad1_ net-_c5-pad2_ 1n +r11 net-_d1-pad1_ net-_q15-pad3_ 5k +c4 net-_c4-pad1_ net-_c1-pad2_ 1n +r14 net-_q18-pad2_ net-_c1-pad2_ 2k +q24 net-_d7-pad1_ net-_q22-pad3_ net-_d8-pad1_ Q2N2222 +r16 net-_d8-pad1_ net-_q22-pad3_ 2k +q23 net-_d8-pad1_ net-_c6-pad1_ net-_q18-pad2_ Q2N2222 +q22 net-_d1-pad1_ net-_d7-pad1_ net-_q22-pad3_ Q2N2222 +r15 net-_d7-pad2_ net-_q22-pad3_ 1k +d8 net-_d8-pad1_ net-_d7-pad2_ 1N4148 +d7 net-_d7-pad1_ net-_d7-pad2_ 1N4148 +q21 net-_d7-pad2_ net-_c6-pad1_ net-_q18-pad2_ Q2N2222 +q20 net-_d7-pad1_ net-_d5-pad2_ net-_d1-pad1_ Q2N2907A +q18 net-_c5-pad1_ net-_q18-pad2_ net-_c1-pad2_ Q2N2222 +r13 net-_c6-pad1_ net-_q18-pad2_ 2k +r12 net-_q16-pad3_ net-_c1-pad2_ 5k +r10 net-_c4-pad1_ net-_c1-pad2_ 2k +r9 net-_q13-pad3_ net-_c1-pad2_ 5k +d5 net-_d1-pad1_ net-_d5-pad2_ 1N4148 +q15 net-_q14-pad3_ net-_d5-pad2_ net-_q15-pad3_ Q2N2907A +d6 net-_d6-pad1_ net-_c4-pad1_ 1N4148 +q19 net-_d7-pad1_ net-_c5-pad1_ net-_c6-pad1_ Q2N2222 +q16 net-_c5-pad1_ net-_d6-pad1_ net-_q16-pad3_ Q2N2222 +q17 net-_c5-pad1_ net-_q17-pad2_ net-_q14-pad3_ Q2N2907A +q14 net-_d6-pad1_ net-_q14-pad2_ net-_q14-pad3_ Q2N2907A +q13 net-_d5-pad2_ net-_m2-pad3_ net-_q13-pad3_ Q2N2222 +* u3 net-_c1-pad2_ net-_m2-pad3_ zener +m2 net-_d1-pad1_ net-_c1-pad2_ net-_m2-pad3_ net-_d1-pad1_ CMOSP W=100u L=100u M=1 +a1 net-_c1-pad2_ net-_m1-pad3_ u1 +a2 net-_c1-pad2_ net-_m2-pad3_ u3 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833.pro b/library/SubcircuitLibrary/IC_LM833/IC_LM833.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833.sch b/library/SubcircuitLibrary/IC_LM833/IC_LM833.sch new file mode 100644 index 00000000..e049818e --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833.sch @@ -0,0 +1,1113 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:IC_LM833-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Connection ~ 5150 150 +Connection ~ 3400 4150 +Connection ~ 5700 2350 +Wire Wire Line + 3000 1650 3000 1600 +Wire Wire Line + 2850 1650 3000 1650 +Wire Wire Line + 1350 1650 1600 1650 +Wire Wire Line + 1350 1600 1350 1650 +$Comp +L PORT U2 +U 5 1 63F60B74 +P 6200 2350 +F 0 "U2" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6200 2350 30 0000 C CNN +F 2 "" H 6200 2350 60 0000 C CNN +F 3 "" H 6200 2350 60 0000 C CNN + 5 6200 2350 + -1 0 0 1 +$EndComp +$Comp +L PORT U2 +U 2 1 63F6008D +P 3000 1350 +F 0 "U2" H 3050 1450 30 0000 C CNN +F 1 "PORT" H 3000 1350 30 0000 C CNN +F 2 "" H 3000 1350 60 0000 C CNN +F 3 "" H 3000 1350 60 0000 C CNN + 2 3000 1350 + 0 1 1 0 +$EndComp +$Comp +L PORT U2 +U 1 1 63F60030 +P 1350 1350 +F 0 "U2" H 1400 1450 30 0000 C CNN +F 1 "PORT" H 1350 1350 30 0000 C CNN +F 2 "" H 1350 1350 60 0000 C CNN +F 3 "" H 1350 1350 60 0000 C CNN + 1 1350 1350 + 0 1 1 0 +$EndComp +Connection ~ 4250 3400 +Wire Wire Line + 5150 3400 5150 2900 +Wire Wire Line + 4250 3400 4250 2900 +Wire Wire Line + 5700 2350 5700 2100 +Connection ~ 4850 1200 +Wire Wire Line + 5700 1200 5700 1700 +Connection ~ 4250 1400 +Wire Wire Line + 4550 1400 4550 1200 +Wire Wire Line + 4550 1200 5700 1200 +Connection ~ 4250 150 +Wire Wire Line + 5150 150 5150 1000 +Connection ~ 2250 150 +Wire Wire Line + 4250 150 4250 900 +Wire Wire Line + 3600 2100 2950 2100 +Connection ~ 5150 2350 +Wire Wire Line + 4700 2350 5950 2350 +Connection ~ 4800 2700 +Wire Wire Line + 4800 2400 4800 2700 +Wire Wire Line + 3900 2100 4800 2100 +$Comp +L capacitor C3 +U 1 1 63F5DDA4 +P 4800 2250 +F 0 "C3" H 4825 2350 50 0000 L CNN +F 1 "1n" H 4825 2150 50 0000 L CNN +F 2 "" H 4838 2100 30 0000 C CNN +F 3 "" H 4800 2250 60 0000 C CNN + 1 4800 2250 + -1 0 0 1 +$EndComp +$Comp +L capacitor C2 +U 1 1 63F5DD4D +P 3750 2100 +F 0 "C2" H 3775 2200 50 0000 L CNN +F 1 "1n" H 3775 2000 50 0000 L CNN +F 2 "" H 3788 1950 30 0000 C CNN +F 3 "" H 3750 2100 60 0000 C CNN + 1 3750 2100 + 0 -1 -1 0 +$EndComp +Connection ~ 3950 2700 +Connection ~ 3400 2700 +Wire Wire Line + 3400 2700 4850 2700 +Wire Wire Line + 5150 2500 5150 2300 +Connection ~ 5150 1900 +Wire Wire Line + 5150 1400 5150 2000 +Wire Wire Line + 4650 1900 5400 1900 +Connection ~ 4250 1900 +Wire Wire Line + 4350 1900 4250 1900 +Connection ~ 4250 2350 +Wire Wire Line + 4400 2350 4250 2350 +Wire Wire Line + 4250 2500 4250 1700 +Wire Wire Line + 4250 1400 4250 1300 +Wire Wire Line + 3400 1400 4550 1400 +Wire Wire Line + 3400 2200 3400 1400 +Connection ~ 1950 1000 +Wire Wire Line + 2400 1100 2400 1000 +Wire Wire Line + 3950 1100 2400 1100 +Connection ~ 1200 1000 +Wire Wire Line + 2400 1000 1200 1000 +Connection ~ 1200 150 +Wire Wire Line + 2250 150 2250 400 +Wire Wire Line + 550 150 550 1850 +Wire Wire Line + 550 150 11050 150 +Wire Wire Line + 1200 150 1200 550 +Wire Wire Line + 1200 850 1200 2400 +Connection ~ 2950 2400 +Connection ~ 2550 2400 +Wire Wire Line + 2550 2400 3100 2400 +Wire Wire Line + 2950 2100 2950 3200 +Connection ~ 550 4150 +Wire Wire Line + 250 2050 250 4150 +Wire Wire Line + 650 2200 650 2250 +Connection ~ 1200 4150 +Wire Wire Line + 550 3250 550 4150 +Connection ~ 2950 4150 +Wire Wire Line + 3400 3800 3400 7050 +Connection ~ 3400 3400 +Wire Wire Line + 3400 3100 3400 3500 +Wire Wire Line + 3250 3400 5150 3400 +Connection ~ 2550 4150 +Wire Wire Line + 2950 4150 2950 3600 +Connection ~ 1900 4150 +Wire Wire Line + 2550 4150 2550 3500 +Connection ~ 1550 4150 +Wire Wire Line + 1550 3850 1550 4150 +Wire Wire Line + 1900 4150 1900 3800 +Wire Wire Line + 1200 3400 1200 4150 +Connection ~ 1900 3450 +Wire Wire Line + 1550 3450 1900 3450 +Wire Wire Line + 1550 3550 1550 3450 +Wire Wire Line + 2250 800 2250 700 +$Comp +L resistor R3 +U 1 1 63F5C6E1 +P 2200 500 +F 0 "R3" H 2250 630 50 0000 C CNN +F 1 "5k" H 2250 450 50 0000 C CNN +F 2 "" H 2250 480 30 0000 C CNN +F 3 "" V 2250 550 30 0000 C CNN + 1 2200 500 + 0 1 1 0 +$EndComp +$Comp +L capacitor C1 +U 1 1 63F5BFAE +P 1550 3700 +F 0 "C1" H 1575 3800 50 0000 L CNN +F 1 "1n" H 1575 3600 50 0000 L CNN +F 2 "" H 1588 3550 30 0000 C CNN +F 3 "" H 1550 3700 60 0000 C CNN + 1 1550 3700 + 1 0 0 -1 +$EndComp +$Comp +L resistor R6 +U 1 1 63F5BD3D +P 3350 3600 +F 0 "R6" H 3400 3730 50 0000 C CNN +F 1 "2k" H 3400 3550 50 0000 C CNN +F 2 "" H 3400 3580 30 0000 C CNN +F 3 "" V 3400 3650 30 0000 C CNN + 1 3350 3600 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q12 +U 1 1 63F5BAA0 +P 5600 1900 +F 0 "Q12" H 5500 1950 50 0000 R CNN +F 1 "eSim_NPN" H 5550 2050 50 0000 R CNN +F 2 "" H 5800 2000 29 0000 C CNN +F 3 "" H 5600 1900 60 0000 C CNN + 1 5600 1900 + 1 0 0 -1 +$EndComp +$Comp +L resistor R8 +U 1 1 63F5BA4F +P 5200 2200 +F 0 "R8" H 5250 2330 50 0000 C CNN +F 1 "2k" H 5250 2150 50 0000 C CNN +F 2 "" H 5250 2180 30 0000 C CNN +F 3 "" V 5250 2250 30 0000 C CNN + 1 5200 2200 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_NPN Q11 +U 1 1 63F5B9E6 +P 5050 2700 +F 0 "Q11" H 4950 2750 50 0000 R CNN +F 1 "eSim_NPN" H 5000 2850 50 0000 R CNN +F 2 "" H 5250 2800 29 0000 C CNN +F 3 "" H 5050 2700 60 0000 C CNN + 1 5050 2700 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q10 +U 1 1 63F5B9A5 +P 5050 1200 +F 0 "Q10" H 4950 1250 50 0000 R CNN +F 1 "eSim_NPN" H 5000 1350 50 0000 R CNN +F 2 "" H 5250 1300 29 0000 C CNN +F 3 "" H 5050 1200 60 0000 C CNN + 1 5050 1200 + 1 0 0 -1 +$EndComp +$Comp +L resistor R7 +U 1 1 63F5B6A6 +P 4450 1950 +F 0 "R7" H 4500 2080 50 0000 C CNN +F 1 "1k" H 4500 1900 50 0000 C CNN +F 2 "" H 4500 1930 30 0000 C CNN +F 3 "" V 4500 2000 30 0000 C CNN + 1 4450 1950 + 1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D4 +U 1 1 63F5B610 +P 4550 2350 +F 0 "D4" H 4550 2450 50 0000 C CNN +F 1 "eSim_Diode" H 4550 2250 50 0000 C CNN +F 2 "" H 4550 2350 60 0000 C CNN +F 3 "" H 4550 2350 60 0000 C CNN + 1 4550 2350 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D3 +U 1 1 63F5B5CD +P 4250 1550 +F 0 "D3" H 4250 1650 50 0000 C CNN +F 1 "eSim_Diode" H 4250 1450 50 0000 C CNN +F 2 "" H 4250 1550 60 0000 C CNN +F 3 "" H 4250 1550 60 0000 C CNN + 1 4250 1550 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q9 +U 1 1 63F50780 +P 4150 2700 +F 0 "Q9" H 4050 2750 50 0000 R CNN +F 1 "eSim_NPN" H 4100 2850 50 0000 R CNN +F 2 "" H 4350 2800 29 0000 C CNN +F 3 "" H 4150 2700 60 0000 C CNN + 1 4150 2700 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q8 +U 1 1 63F5073F +P 4150 1100 +F 0 "Q8" H 4050 1150 50 0000 R CNN +F 1 "eSim_PNP" H 4100 1250 50 0000 R CNN +F 2 "" H 4350 1200 29 0000 C CNN +F 3 "" H 4150 1100 60 0000 C CNN + 1 4150 1100 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q6 +U 1 1 63F50579 +P 3050 3400 +F 0 "Q6" H 2950 3450 50 0000 R CNN +F 1 "eSim_NPN" H 3000 3550 50 0000 R CNN +F 2 "" H 3250 3500 29 0000 C CNN +F 3 "" H 3050 3400 60 0000 C CNN + 1 3050 3400 + -1 0 0 -1 +$EndComp +Wire Wire Line + 1900 3500 1900 3300 +Wire Wire Line + 2550 3050 2550 3200 +Wire Wire Line + 3400 2600 3400 2800 +Connection ~ 550 2600 +Wire Wire Line + 550 2250 550 2750 +Wire Wire Line + 900 2600 550 2600 +Wire Wire Line + 1200 3100 1200 2800 +Connection ~ 2250 1400 +Wire Wire Line + 2250 1200 2250 1400 +Wire Wire Line + 2550 1400 2550 1450 +Wire Wire Line + 1900 1400 2550 1400 +Wire Wire Line + 1900 1450 1900 1400 +Wire Wire Line + 2550 1850 2550 2650 +Connection ~ 1900 2850 +Wire Wire Line + 2250 2850 1900 2850 +Wire Wire Line + 1900 1850 1900 3000 +$Comp +L resistor R5 +U 1 1 63F5022D +P 3350 2900 +F 0 "R5" H 3400 3030 50 0000 C CNN +F 1 "2k" H 3400 2850 50 0000 C CNN +F 2 "" H 3400 2880 30 0000 C CNN +F 3 "" V 3400 2950 30 0000 C CNN + 1 3350 2900 + 0 1 1 0 +$EndComp +$Comp +L resistor R4 +U 1 1 63F501FA +P 2500 3300 +F 0 "R4" H 2550 3430 50 0000 C CNN +F 1 "5k" H 2550 3250 50 0000 C CNN +F 2 "" H 2550 3280 30 0000 C CNN +F 3 "" V 2550 3350 30 0000 C CNN + 1 2500 3300 + 0 1 1 0 +$EndComp +$Comp +L resistor R2 +U 1 1 63F501C5 +P 1850 3600 +F 0 "R2" H 1900 3730 50 0000 C CNN +F 1 "2k" H 1900 3550 50 0000 C CNN +F 2 "" H 1900 3580 30 0000 C CNN +F 3 "" V 1900 3650 30 0000 C CNN + 1 1850 3600 + 0 1 1 0 +$EndComp +$Comp +L resistor R1 +U 1 1 63F50194 +P 1150 3200 +F 0 "R1" H 1200 3330 50 0000 C CNN +F 1 "5k" H 1200 3150 50 0000 C CNN +F 2 "" H 1200 3180 30 0000 C CNN +F 3 "" V 1200 3250 30 0000 C CNN + 1 1150 3200 + 0 1 1 0 +$EndComp +$Comp +L eSim_Diode D1 +U 1 1 63F50025 +P 1200 700 +F 0 "D1" H 1200 800 50 0000 C CNN +F 1 "eSim_Diode" H 1200 600 50 0000 C CNN +F 2 "" H 1200 700 60 0000 C CNN +F 3 "" H 1200 700 60 0000 C CNN + 1 1200 700 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q3 +U 1 1 63F4FFFA +P 2150 1000 +F 0 "Q3" H 2050 1050 50 0000 R CNN +F 1 "eSim_PNP" H 2100 1150 50 0000 R CNN +F 2 "" H 2350 1100 29 0000 C CNN +F 3 "" H 2150 1000 60 0000 C CNN + 1 2150 1000 + 1 0 0 1 +$EndComp +$Comp +L eSim_Diode D2 +U 1 1 63F4FF87 +P 1900 3150 +F 0 "D2" H 1900 3250 50 0000 C CNN +F 1 "eSim_Diode" H 1900 3050 50 0000 C CNN +F 2 "" H 1900 3150 60 0000 C CNN +F 3 "" H 1900 3150 60 0000 C CNN + 1 1900 3150 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q7 +U 1 1 63F4FF60 +P 3300 2400 +F 0 "Q7" H 3200 2450 50 0000 R CNN +F 1 "eSim_NPN" H 3250 2550 50 0000 R CNN +F 2 "" H 3500 2500 29 0000 C CNN +F 3 "" H 3300 2400 60 0000 C CNN + 1 3300 2400 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q4 +U 1 1 63F4FF25 +P 2450 2850 +F 0 "Q4" H 2350 2900 50 0000 R CNN +F 1 "eSim_NPN" H 2400 3000 50 0000 R CNN +F 2 "" H 2650 2950 29 0000 C CNN +F 3 "" H 2450 2850 60 0000 C CNN + 1 2450 2850 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q5 +U 1 1 63F4FF02 +P 2650 1650 +F 0 "Q5" H 2550 1700 50 0000 R CNN +F 1 "eSim_PNP" H 2600 1800 50 0000 R CNN +F 2 "" H 2850 1750 29 0000 C CNN +F 3 "" H 2650 1650 60 0000 C CNN + 1 2650 1650 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q2 +U 1 1 63F4FED9 +P 1800 1650 +F 0 "Q2" H 1700 1700 50 0000 R CNN +F 1 "eSim_PNP" H 1750 1800 50 0000 R CNN +F 2 "" H 2000 1750 29 0000 C CNN +F 3 "" H 1800 1650 60 0000 C CNN + 1 1800 1650 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q1 +U 1 1 63F4FEB0 +P 1100 2600 +F 0 "Q1" H 1000 2650 50 0000 R CNN +F 1 "eSim_NPN" H 1050 2750 50 0000 R CNN +F 2 "" H 1300 2700 29 0000 C CNN +F 3 "" H 1100 2600 60 0000 C CNN + 1 1100 2600 + 1 0 0 -1 +$EndComp +$Comp +L zener U1 +U 1 1 63F4FE7D +P 550 3050 +F 0 "U1" H 500 2950 60 0000 C CNN +F 1 "zener" H 550 3150 60 0000 C CNN +F 2 "" H 600 3050 60 0000 C CNN +F 3 "" H 600 3050 60 0000 C CNN + 1 550 3050 + 0 -1 -1 0 +$EndComp +$Comp +L mosfet_p M1 +U 1 1 63F4FE33 +P 400 2050 +F 0 "M1" H 350 2100 50 0000 R CNN +F 1 "mosfet_p" H 450 2200 50 0000 R CNN +F 2 "" H 650 2150 29 0000 C CNN +F 3 "" H 450 2050 60 0000 C CNN + 1 400 2050 + 1 0 0 -1 +$EndComp +Connection ~ 11050 3050 +Connection ~ 9300 7050 +Connection ~ 11600 5250 +Wire Wire Line + 8900 4550 8900 4500 +Wire Wire Line + 8750 4550 8900 4550 +Wire Wire Line + 7250 4550 7500 4550 +Wire Wire Line + 7250 4500 7250 4550 +$Comp +L PORT U2 +U 10 1 63F6B736 +P 12100 5250 +F 0 "U2" H 12150 5350 30 0000 C CNN +F 1 "PORT" H 12100 5250 30 0000 C CNN +F 2 "" H 12100 5250 60 0000 C CNN +F 3 "" H 12100 5250 60 0000 C CNN + 10 12100 5250 + -1 0 0 1 +$EndComp +$Comp +L PORT U2 +U 8 1 63F6B73C +P 9650 7050 +F 0 "U2" H 9700 7150 30 0000 C CNN +F 1 "PORT" H 9650 7050 30 0000 C CNN +F 2 "" H 9650 7050 60 0000 C CNN +F 3 "" H 9650 7050 60 0000 C CNN + 8 9650 7050 + -1 0 0 1 +$EndComp +$Comp +L PORT U2 +U 9 1 63F6B742 +P 11500 3050 +F 0 "U2" H 11550 3150 30 0000 C CNN +F 1 "PORT" H 11500 3050 30 0000 C CNN +F 2 "" H 11500 3050 60 0000 C CNN +F 3 "" H 11500 3050 60 0000 C CNN + 9 11500 3050 + -1 0 0 1 +$EndComp +$Comp +L PORT U2 +U 7 1 63F6B748 +P 8900 4250 +F 0 "U2" H 8950 4350 30 0000 C CNN +F 1 "PORT" H 8900 4250 30 0000 C CNN +F 2 "" H 8900 4250 60 0000 C CNN +F 3 "" H 8900 4250 60 0000 C CNN + 7 8900 4250 + 0 1 1 0 +$EndComp +$Comp +L PORT U2 +U 6 1 63F6B74E +P 7250 4250 +F 0 "U2" H 7300 4350 30 0000 C CNN +F 1 "PORT" H 7250 4250 30 0000 C CNN +F 2 "" H 7250 4250 60 0000 C CNN +F 3 "" H 7250 4250 60 0000 C CNN + 6 7250 4250 + 0 1 1 0 +$EndComp +Connection ~ 10150 6300 +Wire Wire Line + 11050 6300 11050 5800 +Wire Wire Line + 10150 6300 10150 5800 +Wire Wire Line + 11600 5250 11600 5000 +Connection ~ 10750 4100 +Wire Wire Line + 11600 4100 11600 4600 +Connection ~ 10150 4300 +Wire Wire Line + 10450 4300 10450 4100 +Wire Wire Line + 10450 4100 11600 4100 +Connection ~ 10150 3050 +Wire Wire Line + 11050 150 11050 3900 +Connection ~ 8150 3050 +Wire Wire Line + 10150 3050 10150 3800 +Wire Wire Line + 9500 5000 8850 5000 +Connection ~ 11050 5250 +Wire Wire Line + 10600 5250 11850 5250 +Connection ~ 10700 5600 +Wire Wire Line + 10700 5300 10700 5600 +Wire Wire Line + 9800 5000 10700 5000 +$Comp +L capacitor C6 +U 1 1 63F6B767 +P 10700 5150 +F 0 "C6" H 10725 5250 50 0000 L CNN +F 1 "1n" H 10725 5050 50 0000 L CNN +F 2 "" H 10738 5000 30 0000 C CNN +F 3 "" H 10700 5150 60 0000 C CNN + 1 10700 5150 + -1 0 0 1 +$EndComp +$Comp +L capacitor C5 +U 1 1 63F6B76D +P 9650 5000 +F 0 "C5" H 9675 5100 50 0000 L CNN +F 1 "1n" H 9675 4900 50 0000 L CNN +F 2 "" H 9688 4850 30 0000 C CNN +F 3 "" H 9650 5000 60 0000 C CNN + 1 9650 5000 + 0 -1 -1 0 +$EndComp +Connection ~ 9850 5600 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+Connection ~ 6450 7050 +Wire Wire Line + 6150 4950 6150 7050 +Wire Wire Line + 6550 5100 6550 5150 +Connection ~ 7100 7050 +Wire Wire Line + 6450 6150 6450 7050 +Connection ~ 8850 7050 +Wire Wire Line + 9300 7050 9300 6700 +Connection ~ 9300 6300 +Wire Wire Line + 9300 6000 9300 6400 +Wire Wire Line + 9150 6300 11050 6300 +Connection ~ 8450 7050 +Wire Wire Line + 8850 7050 8850 6500 +Connection ~ 7800 7050 +Wire Wire Line + 8450 7050 8450 6400 +Connection ~ 7450 7050 +Wire Wire Line + 7450 6750 7450 7050 +Wire Wire Line + 7800 7050 7800 6700 +Wire Wire Line + 3400 7050 9400 7050 +Wire Wire Line + 7100 6300 7100 7050 +Connection ~ 7800 6350 +Wire Wire Line + 7450 6350 7800 6350 +Wire Wire Line + 7450 6450 7450 6350 +Wire Wire Line + 8150 3700 8150 3600 +$Comp +L resistor R11 +U 1 1 63F6B7A9 +P 8100 3400 +F 0 "R11" H 8150 3530 50 0000 C CNN +F 1 "5k" H 8150 3350 50 0000 C CNN +F 2 "" H 8150 3380 30 0000 C CNN +F 3 "" V 8150 3450 30 0000 C CNN + 1 8100 3400 + 0 1 1 0 +$EndComp +$Comp +L capacitor C4 +U 1 1 63F6B7AF +P 7450 6600 +F 0 "C4" H 7475 6700 50 0000 L CNN +F 1 "1n" H 7475 6500 50 0000 L CNN +F 2 "" H 7488 6450 30 0000 C CNN +F 3 "" H 7450 6600 60 0000 C CNN + 1 7450 6600 + 1 0 0 -1 +$EndComp +$Comp +L resistor R14 +U 1 1 63F6B7B5 +P 9250 6500 +F 0 "R14" H 9300 6630 50 0000 C CNN +F 1 "2k" H 9300 6450 50 0000 C CNN +F 2 "" H 9300 6480 30 0000 C CNN +F 3 "" V 9300 6550 30 0000 C CNN + 1 9250 6500 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q24 +U 1 1 63F6B7BB +P 11500 4800 +F 0 "Q24" H 11400 4850 50 0000 R CNN +F 1 "eSim_NPN" H 11450 4950 50 0000 R CNN +F 2 "" H 11700 4900 29 0000 C CNN +F 3 "" H 11500 4800 60 0000 C CNN + 1 11500 4800 + 1 0 0 -1 +$EndComp +$Comp +L resistor R16 +U 1 1 63F6B7C1 +P 11100 5100 +F 0 "R16" H 11150 5230 50 0000 C CNN +F 1 "2k" H 11150 5050 50 0000 C CNN +F 2 "" H 11150 5080 30 0000 C CNN +F 3 "" V 11150 5150 30 0000 C CNN + 1 11100 5100 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_NPN Q23 +U 1 1 63F6B7C7 +P 10950 5600 +F 0 "Q23" H 10850 5650 50 0000 R CNN +F 1 "eSim_NPN" H 10900 5750 50 0000 R CNN +F 2 "" H 11150 5700 29 0000 C CNN +F 3 "" H 10950 5600 60 0000 C CNN + 1 10950 5600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q22 +U 1 1 63F6B7CD +P 10950 4100 +F 0 "Q22" H 10850 4150 50 0000 R CNN +F 1 "eSim_NPN" H 10900 4250 50 0000 R CNN +F 2 "" H 11150 4200 29 0000 C CNN +F 3 "" H 10950 4100 60 0000 C CNN + 1 10950 4100 + 1 0 0 -1 +$EndComp +$Comp +L resistor R15 +U 1 1 63F6B7D3 +P 10350 4850 +F 0 "R15" H 10400 4980 50 0000 C CNN +F 1 "1k" H 10400 4800 50 0000 C CNN +F 2 "" H 10400 4830 30 0000 C CNN +F 3 "" V 10400 4900 30 0000 C CNN + 1 10350 4850 + 1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D8 +U 1 1 63F6B7D9 +P 10450 5250 +F 0 "D8" H 10450 5350 50 0000 C CNN +F 1 "eSim_Diode" H 10450 5150 50 0000 C CNN +F 2 "" H 10450 5250 60 0000 C CNN +F 3 "" H 10450 5250 60 0000 C CNN + 1 10450 5250 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D7 +U 1 1 63F6B7DF +P 10150 4450 +F 0 "D7" H 10150 4550 50 0000 C CNN +F 1 "eSim_Diode" H 10150 4350 50 0000 C CNN +F 2 "" H 10150 4450 60 0000 C CNN +F 3 "" H 10150 4450 60 0000 C CNN + 1 10150 4450 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q21 +U 1 1 63F6B7E5 +P 10050 5600 +F 0 "Q21" H 9950 5650 50 0000 R CNN +F 1 "eSim_NPN" H 10000 5750 50 0000 R CNN +F 2 "" H 10250 5700 29 0000 C CNN +F 3 "" H 10050 5600 60 0000 C CNN + 1 10050 5600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q20 +U 1 1 63F6B7EB +P 10050 4000 +F 0 "Q20" H 9950 4050 50 0000 R CNN +F 1 "eSim_PNP" H 10000 4150 50 0000 R CNN +F 2 "" H 10250 4100 29 0000 C CNN +F 3 "" H 10050 4000 60 0000 C CNN + 1 10050 4000 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q18 +U 1 1 63F6B7F1 +P 8950 6300 +F 0 "Q18" H 8850 6350 50 0000 R CNN +F 1 "eSim_NPN" H 8900 6450 50 0000 R CNN +F 2 "" H 9150 6400 29 0000 C CNN +F 3 "" H 8950 6300 60 0000 C CNN + 1 8950 6300 + -1 0 0 -1 +$EndComp +Wire Wire Line + 7800 6400 7800 6200 +Wire Wire Line + 8450 5950 8450 6100 +Wire Wire Line + 9300 5500 9300 5700 +Connection ~ 6450 5500 +Wire Wire Line + 6450 5150 6450 5650 +Wire Wire Line + 6800 5500 6450 5500 +Wire Wire Line + 7100 6000 7100 5700 +Connection ~ 8150 4300 +Wire Wire Line + 8150 4100 8150 4300 +Wire Wire Line + 8450 4300 8450 4350 +Wire Wire Line + 7800 4300 8450 4300 +Wire Wire Line + 7800 4350 7800 4300 +Wire Wire Line + 8450 4750 8450 5550 +Connection ~ 7800 5750 +Wire Wire Line + 8150 5750 7800 5750 +Wire Wire Line + 7800 4750 7800 5900 +$Comp +L resistor R13 +U 1 1 63F6B807 +P 9250 5800 +F 0 "R13" H 9300 5930 50 0000 C CNN +F 1 "2k" H 9300 5750 50 0000 C CNN +F 2 "" H 9300 5780 30 0000 C CNN +F 3 "" V 9300 5850 30 0000 C CNN + 1 9250 5800 + 0 1 1 0 +$EndComp +$Comp +L resistor R12 +U 1 1 63F6B80D +P 8400 6200 +F 0 "R12" H 8450 6330 50 0000 C CNN +F 1 "5k" H 8450 6150 50 0000 C CNN +F 2 "" H 8450 6180 30 0000 C CNN +F 3 "" V 8450 6250 30 0000 C CNN + 1 8400 6200 + 0 1 1 0 +$EndComp +$Comp +L resistor R10 +U 1 1 63F6B813 +P 7750 6500 +F 0 "R10" H 7800 6630 50 0000 C CNN +F 1 "2k" H 7800 6450 50 0000 C CNN +F 2 "" H 7800 6480 30 0000 C CNN +F 3 "" V 7800 6550 30 0000 C CNN + 1 7750 6500 + 0 1 1 0 +$EndComp +$Comp +L resistor R9 +U 1 1 63F6B819 +P 7050 6100 +F 0 "R9" H 7100 6230 50 0000 C CNN +F 1 "5k" H 7100 6050 50 0000 C CNN +F 2 "" H 7100 6080 30 0000 C CNN +F 3 "" V 7100 6150 30 0000 C CNN + 1 7050 6100 + 0 1 1 0 +$EndComp +$Comp +L eSim_Diode D5 +U 1 1 63F6B81F +P 7100 3600 +F 0 "D5" H 7100 3700 50 0000 C CNN +F 1 "eSim_Diode" H 7100 3500 50 0000 C CNN +F 2 "" H 7100 3600 60 0000 C CNN +F 3 "" H 7100 3600 60 0000 C CNN + 1 7100 3600 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q15 +U 1 1 63F6B825 +P 8050 3900 +F 0 "Q15" H 7950 3950 50 0000 R CNN +F 1 "eSim_PNP" H 8000 4050 50 0000 R CNN +F 2 "" H 8250 4000 29 0000 C CNN +F 3 "" H 8050 3900 60 0000 C CNN + 1 8050 3900 + 1 0 0 1 +$EndComp +$Comp +L eSim_Diode D6 +U 1 1 63F6B82B +P 7800 6050 +F 0 "D6" H 7800 6150 50 0000 C CNN +F 1 "eSim_Diode" H 7800 5950 50 0000 C CNN +F 2 "" H 7800 6050 60 0000 C CNN +F 3 "" H 7800 6050 60 0000 C CNN + 1 7800 6050 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q19 +U 1 1 63F6B831 +P 9200 5300 +F 0 "Q19" H 9100 5350 50 0000 R CNN +F 1 "eSim_NPN" H 9150 5450 50 0000 R CNN +F 2 "" H 9400 5400 29 0000 C CNN +F 3 "" H 9200 5300 60 0000 C CNN + 1 9200 5300 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q16 +U 1 1 63F6B837 +P 8350 5750 +F 0 "Q16" H 8250 5800 50 0000 R CNN +F 1 "eSim_NPN" H 8300 5900 50 0000 R CNN +F 2 "" H 8550 5850 29 0000 C CNN +F 3 "" H 8350 5750 60 0000 C CNN + 1 8350 5750 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q17 +U 1 1 63F6B83D +P 8550 4550 +F 0 "Q17" H 8450 4600 50 0000 R CNN +F 1 "eSim_PNP" H 8500 4700 50 0000 R CNN +F 2 "" H 8750 4650 29 0000 C CNN +F 3 "" H 8550 4550 60 0000 C CNN + 1 8550 4550 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q14 +U 1 1 63F6B843 +P 7700 4550 +F 0 "Q14" H 7600 4600 50 0000 R CNN +F 1 "eSim_PNP" H 7650 4700 50 0000 R CNN +F 2 "" H 7900 4650 29 0000 C CNN +F 3 "" H 7700 4550 60 0000 C CNN + 1 7700 4550 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q13 +U 1 1 63F6B849 +P 7000 5500 +F 0 "Q13" H 6900 5550 50 0000 R CNN +F 1 "eSim_NPN" H 6950 5650 50 0000 R CNN +F 2 "" H 7200 5600 29 0000 C CNN +F 3 "" H 7000 5500 60 0000 C CNN + 1 7000 5500 + 1 0 0 -1 +$EndComp +$Comp +L zener U3 +U 1 1 63F6B84F +P 6450 5950 +F 0 "U3" H 6400 5850 60 0000 C CNN +F 1 "zener" H 6450 6050 60 0000 C CNN +F 2 "" H 6500 5950 60 0000 C CNN +F 3 "" H 6500 5950 60 0000 C CNN + 1 6450 5950 + 0 -1 -1 0 +$EndComp +$Comp +L mosfet_p M2 +U 1 1 63F6B855 +P 6300 4950 +F 0 "M2" H 6250 5000 50 0000 R CNN +F 1 "mosfet_p" H 6350 5100 50 0000 R CNN +F 2 "" H 6550 5050 29 0000 C CNN +F 3 "" H 6350 4950 60 0000 C CNN + 1 6300 4950 + 1 0 0 -1 +$EndComp +Connection ~ 6150 7050 +Wire Wire Line + 250 4150 3400 4150 +Wire Wire Line + 650 2250 800 2250 +Wire Wire Line + 800 2250 800 1850 +Wire Wire Line + 800 1850 550 1850 +Wire Wire Line + 6550 5150 6700 5150 +Wire Wire Line + 6700 5150 6700 4700 +Wire Wire Line + 6700 4700 6450 4700 +Connection ~ 6450 4700 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833.sub b/library/SubcircuitLibrary/IC_LM833/IC_LM833.sub new file mode 100644 index 00000000..05afca51 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833.sub @@ -0,0 +1,74 @@ +* Subcircuit IC_LM833 +.subckt IC_LM833 net-_q2-pad2_ net-_q5-pad2_ net-_d4-pad1_ net-_q14-pad2_ net-_q17-pad2_ net-_c1-pad2_ net-_d1-pad1_ net-_d8-pad1_ +* c:\fossee\esim\library\subcircuitlibrary\ic_lm833\ic_lm833.cir +.include PMOS-180nm.lib +.include D.lib +.include NPN.lib +.include PNP.lib +c3 net-_c3-pad1_ net-_c2-pad2_ 1n +c2 net-_c2-pad1_ net-_c2-pad2_ 1n +r3 net-_d1-pad1_ net-_q3-pad3_ 5k +c1 net-_c1-pad1_ net-_c1-pad2_ 1n +r6 net-_q11-pad3_ net-_c1-pad2_ 2k +q12 net-_d3-pad1_ net-_q10-pad3_ net-_d4-pad1_ Q2N2222 +r8 net-_d4-pad1_ net-_q10-pad3_ 2k +q11 net-_d4-pad1_ net-_c3-pad1_ net-_q11-pad3_ Q2N2222 +q10 net-_d1-pad1_ net-_d3-pad1_ net-_q10-pad3_ Q2N2222 +r7 net-_d3-pad2_ net-_q10-pad3_ 1k +d4 net-_d4-pad1_ net-_d3-pad2_ 1N4148 +d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148 +q9 net-_d3-pad2_ net-_c3-pad1_ net-_q11-pad3_ Q2N2222 +q8 net-_d3-pad1_ net-_d1-pad2_ net-_d1-pad1_ Q2N2907A +q6 net-_c2-pad1_ net-_q11-pad3_ net-_c1-pad2_ Q2N2222 +r5 net-_c3-pad1_ net-_q11-pad3_ 2k +r4 net-_q4-pad3_ net-_c1-pad2_ 5k +r2 net-_c1-pad1_ net-_c1-pad2_ 2k +r1 net-_q1-pad3_ net-_c1-pad2_ 5k +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q3 net-_q2-pad3_ net-_d1-pad2_ net-_q3-pad3_ Q2N2907A +d2 net-_d2-pad1_ net-_c1-pad1_ 1N4148 +q7 net-_d3-pad1_ net-_c2-pad1_ net-_c3-pad1_ Q2N2222 +q4 net-_c2-pad1_ net-_d2-pad1_ net-_q4-pad3_ Q2N2222 +q5 net-_c2-pad1_ net-_q5-pad2_ net-_q2-pad3_ Q2N2907A +q2 net-_d2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2907A +q1 net-_d1-pad2_ net-_m1-pad3_ net-_q1-pad3_ Q2N2222 +* u1 net-_c1-pad2_ net-_m1-pad3_ zener +m1 net-_d1-pad1_ net-_c1-pad2_ net-_m1-pad3_ net-_d1-pad1_ CMOSP W=100u L=100u M=1 +c6 net-_c6-pad1_ net-_c5-pad2_ 1n +c5 net-_c5-pad1_ net-_c5-pad2_ 1n +r11 net-_d1-pad1_ net-_q15-pad3_ 5k +c4 net-_c4-pad1_ net-_c1-pad2_ 1n +r14 net-_q18-pad2_ net-_c1-pad2_ 2k +q24 net-_d7-pad1_ net-_q22-pad3_ net-_d8-pad1_ Q2N2222 +r16 net-_d8-pad1_ net-_q22-pad3_ 2k +q23 net-_d8-pad1_ net-_c6-pad1_ net-_q18-pad2_ Q2N2222 +q22 net-_d1-pad1_ net-_d7-pad1_ net-_q22-pad3_ Q2N2222 +r15 net-_d7-pad2_ net-_q22-pad3_ 1k +d8 net-_d8-pad1_ net-_d7-pad2_ 1N4148 +d7 net-_d7-pad1_ net-_d7-pad2_ 1N4148 +q21 net-_d7-pad2_ net-_c6-pad1_ net-_q18-pad2_ Q2N2222 +q20 net-_d7-pad1_ net-_d5-pad2_ net-_d1-pad1_ Q2N2907A +q18 net-_c5-pad1_ net-_q18-pad2_ net-_c1-pad2_ Q2N2222 +r13 net-_c6-pad1_ net-_q18-pad2_ 2k +r12 net-_q16-pad3_ net-_c1-pad2_ 5k +r10 net-_c4-pad1_ net-_c1-pad2_ 2k +r9 net-_q13-pad3_ net-_c1-pad2_ 5k +d5 net-_d1-pad1_ net-_d5-pad2_ 1N4148 +q15 net-_q14-pad3_ net-_d5-pad2_ net-_q15-pad3_ Q2N2907A +d6 net-_d6-pad1_ net-_c4-pad1_ 1N4148 +q19 net-_d7-pad1_ net-_c5-pad1_ net-_c6-pad1_ Q2N2222 +q16 net-_c5-pad1_ net-_d6-pad1_ net-_q16-pad3_ Q2N2222 +q17 net-_c5-pad1_ net-_q17-pad2_ net-_q14-pad3_ Q2N2907A +q14 net-_d6-pad1_ net-_q14-pad2_ net-_q14-pad3_ Q2N2907A +q13 net-_d5-pad2_ net-_m2-pad3_ net-_q13-pad3_ Q2N2222 +* u3 net-_c1-pad2_ net-_m2-pad3_ zener +m2 net-_d1-pad1_ net-_c1-pad2_ net-_m2-pad3_ net-_d1-pad1_ CMOSP W=100u L=100u M=1 +a1 net-_c1-pad2_ net-_m1-pad3_ u1 +a2 net-_c1-pad2_ net-_m2-pad3_ u3 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Control Statements + +.ends IC_LM833 \ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM833/IC_LM833_Previous_Values.xml b/library/SubcircuitLibrary/IC_LM833/IC_LM833_Previous_Values.xml new file mode 100644 index 00000000..1697012b --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/IC_LM833_Previous_Values.xml @@ -0,0 +1 @@ +zenerzenerC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM833/NPN.lib b/library/SubcircuitLibrary/IC_LM833/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/IC_LM833/PMOS-180nm.lib b/library/SubcircuitLibrary/IC_LM833/PMOS-180nm.lib new file mode 100644 index 00000000..ac3f036c --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/library/SubcircuitLibrary/IC_LM833/PNP.lib b/library/SubcircuitLibrary/IC_LM833/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/IC_LM833/analysis b/library/SubcircuitLibrary/IC_LM833/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM833/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/NPN.lib b/library/SubcircuitLibrary/UAF42/NPN.lib new file mode 100644 index 00000000..7f2f0319 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p ++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/UAF42/PNP.lib b/library/SubcircuitLibrary/UAF42/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/UAF42/UAF42-cache.lib b/library/SubcircuitLibrary/UAF42/UAF42-cache.lib new file mode 100644 index 00000000..3331a6d1 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42-cache.lib @@ -0,0 +1,115 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_GND +# +DEF eSim_GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "eSim_GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# lm_741 +# +DEF lm_741 X 0 40 Y Y 1 F N +F0 "X" -200 0 60 H V C CNN +F1 "lm_741" -100 -250 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N +X off_null 1 -50 400 200 D 50 38 1 1 I +X inv 2 -550 150 200 R 50 38 1 1 I +X non_inv 3 -550 -100 200 R 50 38 1 1 I +X v_neg 4 -150 -450 200 U 50 38 1 1 I +X off_null 5 50 350 200 D 50 38 1 1 I +X out 6 550 0 200 L 50 38 1 1 O +X v_pos 7 -150 450 200 D 50 38 1 1 I +X NC 8 150 -300 200 U 50 38 1 1 N +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/UAF42/UAF42.cir b/library/SubcircuitLibrary/UAF42/UAF42.cir new file mode 100644 index 00000000..f7de6ff2 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42.cir @@ -0,0 +1,26 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\UAF42\UAF42.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 02/14/23 17:59:09 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 ? Net-_R1-Pad2_ Net-_R2-Pad2_ V- ? Net-_R3-Pad2_ V+ ? lm_741 +X2 ? Net-_C1-Pad2_ GND V- ? Net-_C1-Pad1_ V+ ? lm_741 +X3 ? Net-_C2-Pad2_ GND V- ? Net-_C2-Pad1_ V+ ? lm_741 +R2 GND Net-_R2-Pad2_ 50k +R4 Net-_R2-Pad2_ Net-_C1-Pad1_ 50k +R3 Net-_R1-Pad2_ Net-_R3-Pad2_ 50k +R6 Net-_R1-Pad2_ Net-_C2-Pad1_ 50k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 1n +C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 1n +R5 Net-_R3-Pad2_ Net-_C1-Pad2_ 316k +R7 Net-_C1-Pad1_ Net-_C2-Pad2_ 316k +X4 ? Net-_R8-Pad2_ GND V- ? Net-_R9-Pad2_ V+ ? lm_741 +R8 Net-_C1-Pad1_ Net-_R8-Pad2_ 10k +R9 Net-_R8-Pad2_ Net-_R9-Pad2_ 100k +R1 Net-_R1-Pad1_ Net-_R1-Pad2_ 50k +U1 Net-_R1-Pad1_ Net-_R3-Pad2_ Net-_C1-Pad1_ Net-_C2-Pad1_ Net-_R9-Pad2_ V+ V- PORT + +.end diff --git a/library/SubcircuitLibrary/UAF42/UAF42.cir.out b/library/SubcircuitLibrary/UAF42/UAF42.cir.out new file mode 100644 index 00000000..9b561ec4 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42.cir.out @@ -0,0 +1,28 @@ +* c:\fossee\esim\library\subcircuitlibrary\uaf42\uaf42.cir + +.include lm_741.sub +x1 ? net-_r1-pad2_ net-_r2-pad2_ v- ? net-_r3-pad2_ v+ ? lm_741 +x2 ? net-_c1-pad2_ gnd v- ? net-_c1-pad1_ v+ ? lm_741 +x3 ? net-_c2-pad2_ gnd v- ? net-_c2-pad1_ v+ ? lm_741 +r2 gnd net-_r2-pad2_ 50k +r4 net-_r2-pad2_ net-_c1-pad1_ 50k +r3 net-_r1-pad2_ net-_r3-pad2_ 50k +r6 net-_r1-pad2_ net-_c2-pad1_ 50k +c1 net-_c1-pad1_ net-_c1-pad2_ 1n +c2 net-_c2-pad1_ net-_c2-pad2_ 1n +r5 net-_r3-pad2_ net-_c1-pad2_ 316k +r7 net-_c1-pad1_ net-_c2-pad2_ 316k +x4 ? net-_r8-pad2_ gnd v- ? net-_r9-pad2_ v+ ? lm_741 +r8 net-_c1-pad1_ net-_r8-pad2_ 10k +r9 net-_r8-pad2_ net-_r9-pad2_ 100k +r1 net-_r1-pad1_ net-_r1-pad2_ 50k +* u1 net-_r1-pad1_ net-_r3-pad2_ net-_c1-pad1_ net-_c2-pad1_ net-_r9-pad2_ v+ v- port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/UAF42/UAF42.pro b/library/SubcircuitLibrary/UAF42/UAF42.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/UAF42/UAF42.sch b/library/SubcircuitLibrary/UAF42/UAF42.sch new file mode 100644 index 00000000..591b4704 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42.sch @@ -0,0 +1,471 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:UAF42-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L lm_741 X1 +U 1 1 63E6548C +P 3900 3750 +F 0 "X1" H 3700 3750 60 0000 C CNN +F 1 "lm_741" H 3800 3500 60 0000 C CNN +F 2 "" H 3900 3750 60 0000 C CNN +F 3 "" H 3900 3750 60 0000 C CNN + 1 3900 3750 + 1 0 0 -1 +$EndComp +$Comp +L lm_741 X2 +U 1 1 63E654A3 +P 5300 3750 +F 0 "X2" H 5100 3750 60 0000 C CNN +F 1 "lm_741" H 5200 3500 60 0000 C CNN +F 2 "" H 5300 3750 60 0000 C CNN +F 3 "" H 5300 3750 60 0000 C CNN + 1 5300 3750 + 1 0 0 -1 +$EndComp +$Comp +L lm_741 X3 +U 1 1 63E654BC +P 6800 3750 +F 0 "X3" H 6600 3750 60 0000 C CNN +F 1 "lm_741" H 6700 3500 60 0000 C CNN +F 2 "" H 6800 3750 60 0000 C CNN +F 3 "" H 6800 3750 60 0000 C CNN + 1 6800 3750 + 1 0 0 -1 +$EndComp +$Comp +L resistor R2 +U 1 1 63E654EA +P 3100 4450 +F 0 "R2" H 3150 4580 50 0000 C CNN +F 1 "50k" H 3150 4400 50 0000 C CNN +F 2 "" H 3150 4430 30 0000 C CNN +F 3 "" V 3150 4500 30 0000 C CNN + 1 3100 4450 + 1 0 0 -1 +$EndComp +$Comp +L resistor R4 +U 1 1 63E65511 +P 4200 4450 +F 0 "R4" H 4250 4580 50 0000 C CNN +F 1 "50k" H 4250 4400 50 0000 C CNN +F 2 "" H 4250 4430 30 0000 C CNN +F 3 "" V 4250 4500 30 0000 C CNN + 1 4200 4450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3350 3850 3350 4400 +Wire Wire Line + 3300 4400 4100 4400 +Connection ~ 3350 4400 +Wire Wire Line + 5850 1600 5850 4400 +Wire Wire Line + 5850 4400 4400 4400 +$Comp +L resistor R3 +U 1 1 63E65551 +P 3800 3000 +F 0 "R3" H 3850 3130 50 0000 C CNN +F 1 "50k" H 3850 2950 50 0000 C CNN +F 2 "" H 3850 2980 30 0000 C CNN +F 3 "" V 3850 3050 30 0000 C CNN + 1 3800 3000 + 1 0 0 -1 +$EndComp +$Comp +L resistor R6 +U 1 1 63E655E2 +P 5300 2650 +F 0 "R6" H 5350 2780 50 0000 C CNN +F 1 "50k" H 5350 2600 50 0000 C CNN +F 2 "" H 5350 2630 30 0000 C CNN +F 3 "" V 5350 2700 30 0000 C CNN + 1 5300 2650 + 1 0 0 -1 +$EndComp +$Comp +L capacitor C1 +U 1 1 63E6560F +P 5150 2950 +F 0 "C1" H 5175 3050 50 0000 L CNN +F 1 "1n" H 5175 2850 50 0000 L CNN +F 2 "" H 5188 2800 30 0000 C CNN +F 3 "" H 5150 2950 60 0000 C CNN + 1 5150 2950 + 0 1 1 0 +$EndComp +$Comp +L capacitor C2 +U 1 1 63E6563E +P 6700 2950 +F 0 "C2" H 6725 3050 50 0000 L CNN +F 1 "1n" H 6725 2850 50 0000 L CNN +F 2 "" H 6738 2800 30 0000 C CNN +F 3 "" H 6700 2950 60 0000 C CNN + 1 6700 2950 + 0 1 1 0 +$EndComp +Wire Wire Line + 3700 2950 3350 2950 +Wire Wire Line + 3350 2600 3350 3600 +Wire Wire Line + 3150 2600 5200 2600 +Connection ~ 3350 2950 +Wire Wire Line + 4000 2950 4450 2950 +Connection ~ 4450 2950 +Wire Wire Line + 5000 2950 4750 2950 +Wire Wire Line + 4750 2300 4750 3600 +Wire Wire Line + 4450 1900 4450 3750 +Wire Wire Line + 6850 2950 7350 2950 +Wire Wire Line + 7350 2200 7350 3750 +Connection ~ 7350 2950 +Wire Wire Line + 6550 2950 6250 2950 +Wire Wire Line + 6250 2300 6250 3600 +Wire Wire Line + 5300 2950 5850 2950 +Connection ~ 5850 3750 +Wire Wire Line + 4750 3850 4650 3850 +Wire Wire Line + 4650 3850 4650 4350 +Wire Wire Line + 4650 4350 6250 4350 +Wire Wire Line + 6250 3850 6250 4550 +Wire Wire Line + 5500 2600 7350 2600 +$Comp +L resistor R5 +U 1 1 63E659CB +P 4550 2350 +F 0 "R5" H 4600 2480 50 0000 C CNN +F 1 "316k" H 4600 2300 50 0000 C CNN +F 2 "" H 4600 2330 30 0000 C CNN +F 3 "" V 4600 2400 30 0000 C CNN + 1 4550 2350 + 1 0 0 -1 +$EndComp +$Comp +L resistor R7 +U 1 1 63E659FC +P 5950 2350 +F 0 "R7" H 6000 2480 50 0000 C CNN +F 1 "316k" H 6000 2300 50 0000 C CNN +F 2 "" H 6000 2330 30 0000 C CNN +F 3 "" V 6000 2400 30 0000 C CNN + 1 5950 2350 + 1 0 0 -1 +$EndComp +$Comp +L lm_741 X4 +U 1 1 63E65C46 +P 8150 3750 +F 0 "X4" H 7950 3750 60 0000 C CNN +F 1 "lm_741" H 8050 3500 60 0000 C CNN +F 2 "" H 8150 3750 60 0000 C CNN +F 3 "" H 8150 3750 60 0000 C CNN + 1 8150 3750 + 1 0 0 -1 +$EndComp +$Comp +L resistor R8 +U 1 1 63E65C73 +P 6650 2000 +F 0 "R8" H 6700 2130 50 0000 C CNN +F 1 "10k" H 6700 1950 50 0000 C CNN +F 2 "" H 6700 1980 30 0000 C CNN +F 3 "" V 6700 2050 30 0000 C CNN + 1 6650 2000 + 1 0 0 -1 +$EndComp +$Comp +L resistor R9 +U 1 1 63E65CAA +P 7900 2000 +F 0 "R9" H 7950 2130 50 0000 C CNN +F 1 "100k" H 7950 1950 50 0000 C CNN +F 2 "" H 7950 1980 30 0000 C CNN +F 3 "" V 7950 2050 30 0000 C CNN + 1 7900 2000 + 1 0 0 -1 +$EndComp +Connection ~ 4750 2950 +Connection ~ 5850 2950 +Wire Wire Line + 6150 2300 6250 2300 +Connection ~ 6250 2950 +Wire Wire Line + 6550 1950 5850 1950 +Connection ~ 5850 2300 +$Comp +L resistor R1 +U 1 1 63E663C7 +P 2950 2650 +F 0 "R1" H 3000 2780 50 0000 C CNN +F 1 "50k" H 3000 2600 50 0000 C CNN +F 2 "" H 3000 2630 30 0000 C CNN +F 3 "" V 3000 2700 30 0000 C CNN + 1 2950 2650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6850 1950 7800 1950 +Wire Wire Line + 7600 3600 7600 1950 +Connection ~ 7600 1950 +Wire Wire Line + 8100 1950 8700 1950 +Wire Wire Line + 8700 1950 8700 3750 +Connection ~ 3350 2600 +$Comp +L eSim_GND #PWR01 +U 1 1 63E66A2A +P 6250 4550 +F 0 "#PWR01" H 6250 4300 50 0001 C CNN +F 1 "eSim_GND" H 6250 4400 50 0000 C CNN +F 2 "" H 6250 4550 50 0001 C CNN +F 3 "" H 6250 4550 50 0001 C CNN + 1 6250 4550 + 1 0 0 -1 +$EndComp +$Comp +L eSim_GND #PWR02 +U 1 1 63E66A5C +P 7600 4200 +F 0 "#PWR02" H 7600 3950 50 0001 C CNN +F 1 "eSim_GND" H 7600 4050 50 0000 C CNN +F 2 "" H 7600 4200 50 0001 C CNN +F 3 "" H 7600 4200 50 0001 C CNN + 1 7600 4200 + 1 0 0 -1 +$EndComp +Connection ~ 6250 4350 +Wire Wire Line + 7600 4200 7600 3850 +$Comp +L eSim_GND #PWR03 +U 1 1 63E66C93 +P 2650 4450 +F 0 "#PWR03" H 2650 4200 50 0001 C CNN +F 1 "eSim_GND" H 2650 4300 50 0000 C CNN +F 2 "" H 2650 4450 50 0001 C CNN +F 3 "" H 2650 4450 50 0001 C CNN + 1 2650 4450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2650 4450 2650 4400 +Wire Wire Line + 2650 4400 3000 4400 +$Comp +L PORT U1 +U 1 1 63E670A1 +P 2350 2600 +F 0 "U1" H 2400 2700 30 0000 C CNN +F 1 "PORT" H 2350 2600 30 0000 C CNN +F 2 "" H 2350 2600 60 0000 C CNN +F 3 "" H 2350 2600 60 0000 C CNN + 1 2350 2600 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 63E67100 +P 4800 1900 +F 0 "U1" H 4850 2000 30 0000 C CNN +F 1 "PORT" H 4800 1900 30 0000 C CNN +F 2 "" H 4800 1900 60 0000 C CNN +F 3 "" H 4800 1900 60 0000 C CNN + 2 4800 1900 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 63E673ED +P 6200 1600 +F 0 "U1" H 6250 1700 30 0000 C CNN +F 1 "PORT" H 6200 1600 30 0000 C CNN +F 2 "" H 6200 1600 60 0000 C CNN +F 3 "" H 6200 1600 60 0000 C CNN + 3 6200 1600 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 63E67488 +P 7650 2200 +F 0 "U1" H 7700 2300 30 0000 C CNN +F 1 "PORT" H 7650 2200 30 0000 C CNN +F 2 "" H 7650 2200 60 0000 C CNN +F 3 "" H 7650 2200 60 0000 C CNN + 4 7650 2200 + -1 0 0 1 +$EndComp +Wire Wire Line + 2600 2600 2850 2600 +Wire Wire Line + 4550 1900 4450 1900 +Connection ~ 4450 2300 +Wire Wire Line + 5950 1600 5850 1600 +Connection ~ 5850 1950 +Wire Wire Line + 7400 2200 7350 2200 +Connection ~ 7350 2600 +Text GLabel 7750 4950 2 60 Input ~ 0 +V+ +Text GLabel 7750 5250 2 60 Input ~ 0 +V- +Text GLabel 4100 3150 2 60 Input ~ 0 +V+ +Text GLabel 3950 4250 2 60 Input ~ 0 +V- +$Comp +L PORT U1 +U 5 1 63E694DD +P 9100 3750 +F 0 "U1" H 9150 3850 30 0000 C CNN +F 1 "PORT" H 9100 3750 30 0000 C CNN +F 2 "" H 9100 3750 60 0000 C CNN +F 3 "" H 9100 3750 60 0000 C CNN + 5 9100 3750 + -1 0 0 1 +$EndComp +Wire Wire Line + 8700 3750 8850 3750 +Text GLabel 5400 3100 2 60 Input ~ 0 +V+ +Text GLabel 5350 4250 2 60 Input ~ 0 +V- +Text GLabel 6900 3150 2 60 Input ~ 0 +V+ +Text GLabel 6950 4300 2 60 Input ~ 0 +V- +Text GLabel 8250 3050 2 60 Input ~ 0 +V+ +Text GLabel 8250 4300 2 60 Input ~ 0 +V- +Wire Wire Line + 4100 3150 3750 3150 +Wire Wire Line + 3750 3150 3750 3300 +Wire Wire Line + 3950 4250 3750 4250 +Wire Wire Line + 3750 4250 3750 4200 +Wire Wire Line + 5400 3100 5150 3100 +Wire Wire Line + 5150 3100 5150 3300 +Wire Wire Line + 5350 4250 5150 4250 +Wire Wire Line + 5150 4250 5150 4200 +Wire Wire Line + 6900 3150 6650 3150 +Wire Wire Line + 6650 3150 6650 3300 +Wire Wire Line + 6950 4300 6650 4300 +Wire Wire Line + 6650 4300 6650 4200 +Wire Wire Line + 8250 3050 8000 3050 +Wire Wire Line + 8000 3050 8000 3300 +Wire Wire Line + 8250 4300 8000 4300 +Wire Wire Line + 8000 4300 8000 4200 +$Comp +L PORT U1 +U 6 1 63E67DDE +P 7400 4950 +F 0 "U1" H 7450 5050 30 0000 C CNN +F 1 "PORT" H 7400 4950 30 0000 C CNN +F 2 "" H 7400 4950 60 0000 C CNN +F 3 "" H 7400 4950 60 0000 C CNN + 6 7400 4950 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 7 1 63E67E29 +P 7400 5250 +F 0 "U1" H 7450 5350 30 0000 C CNN +F 1 "PORT" H 7400 5250 30 0000 C CNN +F 2 "" H 7400 5250 60 0000 C CNN +F 3 "" H 7400 5250 60 0000 C CNN + 7 7400 5250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7750 4950 7650 4950 +Wire Wire Line + 7750 5250 7650 5250 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/UAF42/UAF42.sub b/library/SubcircuitLibrary/UAF42/UAF42.sub new file mode 100644 index 00000000..6fa83c56 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42.sub @@ -0,0 +1,22 @@ +* Subcircuit UAF42 +.subckt UAF42 net-_r1-pad1_ net-_r3-pad2_ net-_c1-pad1_ net-_c2-pad1_ net-_r9-pad2_ v+ v- +* c:\fossee\esim\library\subcircuitlibrary\uaf42\uaf42.cir +.include lm_741.sub +x1 ? net-_r1-pad2_ net-_r2-pad2_ v- ? net-_r3-pad2_ v+ ? lm_741 +x2 ? net-_c1-pad2_ gnd v- ? net-_c1-pad1_ v+ ? lm_741 +x3 ? net-_c2-pad2_ gnd v- ? net-_c2-pad1_ v+ ? lm_741 +r2 gnd net-_r2-pad2_ 50k +r4 net-_r2-pad2_ net-_c1-pad1_ 50k +r3 net-_r1-pad2_ net-_r3-pad2_ 50k +r6 net-_r1-pad2_ net-_c2-pad1_ 50k +c1 net-_c1-pad1_ net-_c1-pad2_ 1n +c2 net-_c2-pad1_ net-_c2-pad2_ 1n +r5 net-_r3-pad2_ net-_c1-pad2_ 316k +r7 net-_c1-pad1_ net-_c2-pad2_ 316k +x4 ? net-_r8-pad2_ gnd v- ? net-_r9-pad2_ v+ ? lm_741 +r8 net-_c1-pad1_ net-_r8-pad2_ 10k +r9 net-_r8-pad2_ net-_r9-pad2_ 100k +r1 net-_r1-pad1_ net-_r1-pad2_ 50k +* Control Statements + +.ends UAF42 \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/UAF42_Previous_Values.xml b/library/SubcircuitLibrary/UAF42/UAF42_Previous_Values.xml new file mode 100644 index 00000000..17e3fa94 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/UAF42_Previous_Values.xml @@ -0,0 +1 @@ +66C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/analysis b/library/SubcircuitLibrary/UAF42/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/lm_741-cache.lib b/library/SubcircuitLibrary/UAF42/lm_741-cache.lib new file mode 100644 index 00000000..6e908886 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741-cache.lib @@ -0,0 +1,119 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/UAF42/lm_741-rescue.lib b/library/SubcircuitLibrary/UAF42/lm_741-rescue.lib new file mode 100644 index 00000000..bf8e4bd7 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741-rescue.lib @@ -0,0 +1,42 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# eSim_NPN-RESCUE-lm_741 +# +DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +# eSim_PNP-RESCUE-lm_741 +# +DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/UAF42/lm_741.cir b/library/SubcircuitLibrary/UAF42/lm_741.cir new file mode 100644 index 00000000..b7989199 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741.cir @@ -0,0 +1,43 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN +Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN +Q6 Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP +Q5 Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP +Q3 Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN +Q4 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q9 Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q8 Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN +Q7 Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN +R1 Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k +R2 Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k +R3 Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k +Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN +Q13 Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN +R4 Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k +R11 Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k +Q10 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q11 Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q14 Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN +R8 Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k +R7 Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p +Q16 Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN +Q15 Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN +R5 Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k +R6 Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50 +Q17 Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN +Q18 Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN +Q20 Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN +R9 Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25 +R10 Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50 +Q19 Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP +U1 Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT + +.end diff --git a/library/SubcircuitLibrary/UAF42/lm_741.cir.out b/library/SubcircuitLibrary/UAF42/lm_741.cir.out new file mode 100644 index 00000000..01ede7ab --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741.cir.out @@ -0,0 +1,46 @@ +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir + +.include npn_1.lib +.include pnp_1.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1 +q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1 +q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1 +q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1 +q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1 +q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1 +q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1 +r1 net-_q7-pad3_ net-_q12-pad3_ 1k +r2 net-_q3-pad3_ net-_q12-pad3_ 50k +r3 net-_q8-pad3_ net-_q12-pad3_ 1k +q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1 +q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1 +r4 net-_q13-pad3_ net-_q12-pad3_ 5k +r11 net-_q10-pad1_ net-_q12-pad1_ 39k +q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1 +r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k +r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k +c1 net-_c1-pad1_ net-_c1-pad2_ 30p +q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1 +q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1 +r5 net-_q15-pad2_ net-_q12-pad3_ 50k +r6 net-_q15-pad3_ net-_q12-pad3_ 50 +q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1 +q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1 +q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1 +r9 net-_q18-pad3_ net-_q20-pad3_ 25 +r10 net-_q20-pad3_ net-_q19-pad3_ 50 +q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1 +* u1 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/UAF42/lm_741.pro b/library/SubcircuitLibrary/UAF42/lm_741.pro new file mode 100644 index 00000000..222fb5cb --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741.pro @@ -0,0 +1,45 @@ +update=02/07/23 21:24:54 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=lm_741-rescue +LibName2=power +LibName3=eSim_Analog +LibName4=eSim_Devices +LibName5=eSim_Digital +LibName6=eSim_Hybrid +LibName7=eSim_Miscellaneous +LibName8=eSim_Plot +LibName9=eSim_Power +LibName10=eSim_User +LibName11=eSim_Sources +LibName12=eSim_Subckt diff --git a/library/SubcircuitLibrary/UAF42/lm_741.sch b/library/SubcircuitLibrary/UAF42/lm_741.sch new file mode 100644 index 00000000..6a74cf22 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741.sch @@ -0,0 +1,697 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_PSpice +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:lm_741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_NPN Q1 +U 1 1 5CE90A7B +P 2650 2700 +F 0 "Q1" H 2550 2750 50 0000 R CNN +F 1 "eSim_NPN" H 2600 2850 50 0000 R CNN +F 2 "" H 2850 2800 29 0000 C CNN +F 3 "" H 2650 2700 60 0000 C CNN + 1 2650 2700 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q2 +U 1 1 5CE90A7C +P 4300 2700 +F 0 "Q2" H 4200 2750 50 0000 R CNN +F 1 "eSim_NPN" H 4250 2850 50 0000 R CNN +F 2 "" H 4500 2800 29 0000 C CNN +F 3 "" H 4300 2700 60 0000 C CNN + 1 4300 2700 + -1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q6 +U 1 1 5CE90A7D +P 3000 3200 +F 0 "Q6" H 2900 3250 50 0000 R CNN +F 1 "eSim_PNP" H 2950 3350 50 0000 R CNN +F 2 "" H 3200 3300 29 0000 C CNN +F 3 "" H 3000 3200 60 0000 C CNN + 1 3000 3200 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q5 +U 1 1 5CE90A7E +P 3950 3200 +F 0 "Q5" H 3850 3250 50 0000 R CNN +F 1 "eSim_PNP" H 3900 3350 50 0000 R CNN +F 2 "" H 4150 3300 29 0000 C CNN +F 3 "" H 3950 3200 60 0000 C CNN + 1 3950 3200 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q3 +U 1 1 5CE90A7F +P 3300 4000 +F 0 "Q3" H 3200 4050 50 0000 R CNN +F 1 "eSim_NPN" H 3250 4150 50 0000 R CNN +F 2 "" H 3500 4100 29 0000 C CNN +F 3 "" H 3300 4000 60 0000 C CNN + 1 3300 4000 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q4 +U 1 1 5CE90A80 +P 3850 2000 +F 0 "Q4" H 3750 2050 50 0000 R CNN +F 1 "eSim_PNP" H 3800 2150 50 0000 R CNN +F 2 "" H 4050 2100 29 0000 C CNN +F 3 "" H 3850 2000 60 0000 C CNN + 1 3850 2000 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q9 +U 1 1 5CE90A81 +P 5200 2000 +F 0 "Q9" H 5100 2050 50 0000 R CNN +F 1 "eSim_PNP" H 5150 2150 50 0000 R CNN +F 2 "" H 5400 2100 29 0000 C CNN +F 3 "" H 5200 2000 60 0000 C CNN + 1 5200 2000 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q8 +U 1 1 5CE90A82 +P 3950 4600 +F 0 "Q8" H 3850 4650 50 0000 R CNN +F 1 "eSim_NPN" H 3900 4750 50 0000 R CNN +F 2 "" H 4150 4700 29 0000 C CNN +F 3 "" H 3950 4600 60 0000 C CNN + 1 3950 4600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q7 +U 1 1 5CE90A83 +P 3000 4600 +F 0 "Q7" H 2900 4650 50 0000 R CNN +F 1 "eSim_NPN" H 2950 4750 50 0000 R CNN +F 2 "" H 3200 4700 29 0000 C CNN +F 3 "" H 3000 4600 60 0000 C CNN + 1 3000 4600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_R R1 +U 1 1 5CE90A84 +P 2850 5200 +F 0 "R1" H 2900 5330 50 0000 C CNN +F 1 "1k" H 2900 5250 50 0000 C CNN +F 2 "" H 2900 5180 30 0000 C CNN +F 3 "" V 2900 5250 30 0000 C CNN + 1 2850 5200 + 0 1 1 0 +$EndComp +$Comp +L eSim_R R2 +U 1 1 5CE90A85 +P 3550 5200 +F 0 "R2" H 3600 5330 50 0000 C CNN +F 1 "50k" H 3600 5250 50 0000 C CNN +F 2 "" H 3600 5180 30 0000 C CNN +F 3 "" V 3600 5250 30 0000 C CNN + 1 3550 5200 + 0 1 1 0 +$EndComp +$Comp +L eSim_R R3 +U 1 1 5CE90A86 +P 4000 5200 +F 0 "R3" H 4050 5330 50 0000 C CNN +F 1 "1k" H 4050 5250 50 0000 C CNN +F 2 "" H 4050 5180 30 0000 C CNN +F 3 "" V 4050 5250 30 0000 C CNN + 1 4000 5200 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q12 +U 1 1 5CE90A87 +P 6300 4700 +F 0 "Q12" H 6200 4750 50 0000 R CNN +F 1 "eSim_NPN" H 6250 4850 50 0000 R CNN +F 2 "" H 6500 4800 29 0000 C CNN +F 3 "" H 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CNN + 1 7550 5050 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q17 +U 1 1 5CE90A95 +P 6800 4700 +F 0 "Q17" H 6700 4750 50 0000 R CNN +F 1 "eSim_NPN" H 6750 4850 50 0000 R CNN +F 2 "" H 7000 4800 29 0000 C CNN +F 3 "" H 6800 4700 60 0000 C CNN + 1 6800 4700 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q18 +U 1 1 5CE90A96 +P 8800 2300 +F 0 "Q18" H 8700 2350 50 0000 R CNN +F 1 "eSim_NPN" H 8750 2450 50 0000 R CNN +F 2 "" H 9000 2400 29 0000 C CNN +F 3 "" H 8800 2300 60 0000 C CNN + 1 8800 2300 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q20 +U 1 1 5CE90A97 +P 8400 2750 +F 0 "Q20" H 8300 2800 50 0000 R CNN +F 1 "eSim_NPN" H 8350 2900 50 0000 R CNN +F 2 "" H 8600 2850 29 0000 C CNN +F 3 "" H 8400 2750 60 0000 C CNN + 1 8400 2750 + -1 0 0 -1 +$EndComp +$Comp +L eSim_R R9 +U 1 1 5CE90A98 +P 8850 3000 +F 0 "R9" H 8900 3130 50 0000 C CNN +F 1 "25" H 8900 3050 50 0000 C CNN +F 2 "" H 8900 2980 30 0000 C CNN +F 3 "" V 8900 3050 30 0000 C CNN + 1 8850 3000 + 0 1 1 0 +$EndComp +$Comp +L eSim_R R10 +U 1 1 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+$Comp +L PORT U1 +U 1 1 5CE90AA1 +P 1850 5100 +F 0 "U1" H 1900 5200 30 0000 C CNN +F 1 "PORT" H 1850 5100 30 0000 C CNN +F 2 "" H 1850 5100 60 0000 C CNN +F 3 "" H 1850 5100 60 0000 C CNN + 1 1850 5100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2100 5100 2700 5100 +Wire Wire Line + 2700 5100 2700 5050 +Wire Wire Line + 2700 5050 2900 5050 +Connection ~ 2900 5050 +Wire Wire Line + 2100 4850 2550 4850 +Wire Wire Line + 2550 4850 2550 4900 +Wire Wire Line + 2550 4900 4050 4900 +Connection ~ 4050 4900 +$Comp +L PORT U1 +U 8 1 5CE9368F +P 9600 6050 +F 0 "U1" H 9650 6150 30 0000 C CNN +F 1 "PORT" H 9600 6050 30 0000 C CNN +F 2 "" H 9600 6050 60 0000 C CNN +F 3 "" H 9600 6050 60 0000 C CNN + 8 9600 6050 + -1 0 0 1 +$EndComp +Wire Wire Line + 9350 6050 9100 6050 +NoConn ~ 9100 6050 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/UAF42/lm_741.sub b/library/SubcircuitLibrary/UAF42/lm_741.sub new file mode 100644 index 00000000..4e4feca4 --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741.sub @@ -0,0 +1,40 @@ +* Subcircuit lm_741 +.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir +.include npn_1.lib +.include pnp_1.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1 +q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1 +q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1 +q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1 +q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1 +q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1 +q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1 +r1 net-_q7-pad3_ net-_q12-pad3_ 1k +r2 net-_q3-pad3_ net-_q12-pad3_ 50k +r3 net-_q8-pad3_ net-_q12-pad3_ 1k +q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1 +q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1 +r4 net-_q13-pad3_ net-_q12-pad3_ 5k +r11 net-_q10-pad1_ net-_q12-pad1_ 39k +q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1 +r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k +r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k +c1 net-_c1-pad1_ net-_c1-pad2_ 30p +q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1 +q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1 +r5 net-_q15-pad2_ net-_q12-pad3_ 50k +r6 net-_q15-pad3_ net-_q12-pad3_ 50 +q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1 +q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1 +q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1 +r9 net-_q18-pad3_ net-_q20-pad3_ 25 +r10 net-_q20-pad3_ net-_q19-pad3_ 50 +q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1 +* Control Statements + +.ends lm_741 \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/UAF42/lm_741_Previous_Values.xml new file mode 100644 index 00000000..228572ce --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/lm_741_Previous_Values.xml @@ -0,0 +1 @@ +truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/npn_1.lib b/library/SubcircuitLibrary/UAF42/npn_1.lib new file mode 100644 index 00000000..4a863e3e --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/npn_1.lib @@ -0,0 +1,29 @@ +.model npn_1 NPN( ++ Vtf=1.7 ++ Cjc=0.5p ++ Nc=2 ++ Tr=46.91n ++ Ne=1.307 ++ Cje=0.5p ++ Isc=0 ++ Xtb=1.5 ++ Rb=500 ++ Rc=1 ++ Tf=411.1p ++ Xti=3 ++ Ikr=0 ++ Bf=125 ++ Fc=.5 ++ Ise=14.34f ++ Br=6.092 ++ Ikf=.2847 ++ Mje=.377 ++ Mjc=.3416 ++ Vaf=74.03 ++ Vjc=.75 ++ Vje=.75 ++ Xtf=3 ++ Itf=.6 ++ Is=14.34f ++ Eg=1.11 +) \ No newline at end of file diff --git a/library/SubcircuitLibrary/UAF42/pnp_1.lib b/library/SubcircuitLibrary/UAF42/pnp_1.lib new file mode 100644 index 00000000..c486429f --- /dev/null +++ b/library/SubcircuitLibrary/UAF42/pnp_1.lib @@ -0,0 +1,29 @@ +.model pnp_1 PNP( ++ Vtf=1.7 ++ Cjc=1.5p ++ Nc=2 ++ Tr=46.91n ++ Ne=1.307 ++ Cje=0.3p ++ Isc=0 ++ Xtb=1.5 ++ Rb=250 ++ Rc=1 ++ Tf=411.1p ++ Xti=3 ++ Ikr=0 ++ Bf=25 ++ Fc=.5 ++ Ise=14.34f ++ Br=6.092 ++ Ikf=.2847 ++ Mje=.377 ++ Mjc=.3416 ++ Vaf=74.03 ++ Vjc=.75 ++ Vje=.75 ++ Xtf=3 ++ Itf=.6 ++ Is=14.34f ++ Eg=1.11 +) \ No newline at end of file