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Unsupported expression for cell sg13g2_sdfbbp_1 #80

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dnltz opened this issue Apr 24, 2024 · 14 comments
Open

Unsupported expression for cell sg13g2_sdfbbp_1 #80

dnltz opened this issue Apr 24, 2024 · 14 comments
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wontfix This will not be worked on

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@dnltz
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dnltz commented Apr 24, 2024

I found the following warning in OpenROAD and it looks like the stdcell lib has a type included: https://github.com/IHP-GmbH/IHP-Open-PDK/blob/dceb7e6bd1a877182c3ba32c2e238be08368fa3f/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_typ_1p50V_25C.lib#L27289

Warning: Found unsupported expression 'SCE*SCD+SCE'*D' in pin attribute of cell 'sg13g2_sdfbbp_1' - skipping.

I can send a fix but can someone confirm this is a typo?

@dnltz
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dnltz commented Apr 24, 2024

@KrzysztofHerman

@KrzysztofHerman
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@dnltz thank you for reproducing this as well because we are aware of this warning. The person in charge has it in his pipeline but it you can provide the fix such as typo go ahead and do so so we can check it out using other tools as well.

@KrzysztofHerman KrzysztofHerman added the bug Something isn't working label Apr 25, 2024
@dnltz
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dnltz commented Apr 26, 2024

See #83

@sergeiandreyev
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Hi @dnltz , this is not a typo - this is an inversion, if you remove this symbol the function will not be correct. An option will be to change this symbol to !: (SCE*SCD)+(!SCE*D)
Could you please try to change the function:

ff (IQ,IQN) {
      clear : "!RESET_B";
      clear_preset_var1 : "H";
      clear_preset_var2 : "L";
      clocked_on : "CLK";
      next_state : "(SCE*SCD)+(!SCE*D)";
      preset : "!SET_B";
      }

and give us your feedback whether it passes now.

@dnltz
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dnltz commented May 3, 2024

@sergeiandreyev still the same warning. I wonder if this expression is allowed at all and should be replaced by boolean operations since it defines the next state of a flip-flop.

@sergeiandreyev
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sergeiandreyev commented May 5, 2024

hm, ok.. the * and + boolean operators are valid/allowed if you use commercial tools, we don't see any issues internally.
then how about this one? "(SCE&SCD)|(!SCE&D)" -> changed * to & and + to |
could you please check if the above syntax will work on your side?
btw, this is how in sky130 scan flops the next_state attribute is defined:

ff ("IQ","IQ_N") {
            clear : "!RESET_B";
            clear_preset_var1 : "H";
            clear_preset_var2 : "L";
            clocked_on : "!CLK_N";
            next_state : "(D&!SCE) | (SCD&SCE)";
            preset : "!SET_B";
        }

@dnltz
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dnltz commented May 6, 2024

@sergeiandreyev this statement is also illegal. I figured out only one pin is OK but as soon as you add another one it's bad.

@sergeiandreyev
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Hm, then I don't get how the SkyWater sky130 scan flops are used in OpenROAD..
Does it support scan chains?

@sergeiandreyev
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sergeiandreyev commented May 6, 2024

next_state w/ one pin is for regular flop, or in the test_cell definition
when you have a scan flop, scan signals should be defined in the parameter

@noherbrferurtth
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noherbrferurtth commented May 6, 2024 via email

@sergeiandreyev sergeiandreyev added wontfix This will not be worked on and removed bug Something isn't working labels May 7, 2024
@mmlouerat
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Goodday,

I am writing to you on behalf of Pr Naohiko Shimizu (naohiko.shimizu@lip6.fr) who is currently for one year at Sorbonne Université-LIP6, within the Open Source EDA Coriolis Team.

Pr Shimizu used a scan path insertion tool available in the Alliance tool chain.
It is called "scapin", not so young today.

Alliance sources may be found:
https://github.com/lip6/alliance

here is the man page of scapin:

SCAPIN(1) CAO-VLSI Reference Manual SCAPIN(1)

NAME
scapin - Scan path insertion

ORIGIN
This software belongs to the ALLIANCE CAD SYSTEM developed by the ASIM team at LIP6 laboratory of Université
Pierre et Marie CURIE, in Paris, France.

   Web : http://asim.lip6.fr/recherche/alliance/
   E-mail : [alliance-users@asim.lip6.fr](mailto:alliance-users@asim.lip6.fr)

SYNOPSIS
scapin [-VRB] [-P file] Input_name Path_name Output_name

DESCRIPTION
SCAPIN is an automatic scan path generator for gate level netlists. SCAPIN inserts a scan path in the netlist
Input_name and drives a new netlist Output_name. This scan path contains all registers specified in the file
Path_name.path (see below for the exact syntax). SCAPIN adds also 3 new connectors in the netlist: scan_in,
scan_out and scan_test in order to control the scan path. Eventually SCAPIN adds an output buffer before the
output connector scan_out (option -B).

@mmlouerat
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Hi,
There are also newer test tools that will be presented at FSIC2024:

@noherbrferurtth
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thanks a lot for the link! I was not aware. This is very helpful for the upcoming HSM we are planing.

@sergeiandreyev
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So far there is no implementation of a scan chain with Open Source tools. To my knowledge.

apart from the scapin tool that @mmlouerat mentioned there is an update after FSiC'24: https://github.com/AUCOHL/Fault

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