From a6e647d929ec2cb5d43f64b206aee5a686703a9e Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 6 Nov 2023 12:50:55 +0100
Subject: [PATCH] esptool v3.4.0

---
 esptool.py | 1371 ++++++++++++++++++++++++++++------------------------
 1 file changed, 729 insertions(+), 642 deletions(-)

diff --git a/esptool.py b/esptool.py
index 769350d59..afd7c790d 100755
--- a/esptool.py
+++ b/esptool.py
@@ -57,7 +57,7 @@
         raise
 
 
-__version__ = "3.3.4-dev"
+__version__ = "3.4.0"
 
 MAX_UINT32 = 0xffffffff
 MAX_UINT24 = 0xffffff
@@ -75,7 +75,7 @@
 DEFAULT_CONNECT_ATTEMPTS = 7          # default number of times to try connection
 WRITE_BLOCK_ATTEMPTS = 3              # number of times to try writing a data block
 
-SUPPORTED_CHIPS = ['esp8266', 'esp32', 'esp32s2', 'esp32s3beta2', 'esp32s3', 'esp32c3', 'esp32c6beta', 'esp32h2beta1', 'esp32h2beta2', 'esp32c2']
+SUPPORTED_CHIPS = ['esp8266', 'esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32c2']
 
 
 def timeout_per_mb(seconds_per_mb, size_bytes):
@@ -91,12 +91,10 @@ def _chip_to_rom_loader(chip):
         'esp8266': ESP8266ROM,
         'esp32': ESP32ROM,
         'esp32s2': ESP32S2ROM,
-        'esp32s3beta2': ESP32S3BETA2ROM,
         'esp32s3': ESP32S3ROM,
         'esp32c3': ESP32C3ROM,
-        'esp32c6beta': ESP32C6BETAROM,
-        'esp32h2beta1': ESP32H2BETA1ROM,
-        'esp32h2beta2': ESP32H2BETA2ROM,
+        'esp32c6': ESP32C6ROM,
+        'esp32h2': ESP32H2ROM,
         'esp32c2': ESP32C2ROM,
     }[chip]
 
@@ -395,7 +393,7 @@ def detect_chip(port=DEFAULT_PORT, baud=ESP_ROM_BAUD, connect_mode='default_rese
             res = struct.unpack("<IBBBBBBBBI", res[:16])  # 4b flags, 1b flash_crypt_cnt, 7*1b key_purposes, 4b chip_id
             chip_id = res[9]  # 2/4 status bytes invariant
 
-            for cls in [ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM, ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM]:
+            for cls in [ESP32S3ROM, ESP32C3ROM, ESP32C6ROM, ESP32H2ROM, ESP32C2ROM]:
                 if chip_id == cls.IMAGE_CHIP_ID:
                     inst = cls(detect_port._port, baud, trace_enabled=trace_enabled)
                     inst._post_connect()
@@ -414,8 +412,8 @@ def detect_chip(port=DEFAULT_PORT, baud=ESP_ROM_BAUD, connect_mode='default_rese
                 sys.stdout.flush()
                 chip_magic_value = detect_port.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
 
-                for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM,
-                            ESP32C3ROM, ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM]:
+                for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3ROM,
+                            ESP32C3ROM, ESP32C6ROM, ESP32C2ROM, ESP32H2ROM]:
                     if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
                         inst = cls(detect_port._port, baud, trace_enabled=trace_enabled)
                         inst._post_connect()
@@ -703,8 +701,8 @@ def connect(self, mode='default_reset', attempts=DEFAULT_CONNECT_ATTEMPTS, detec
                 chip_magic_value = self.read_reg(ESPLoader.CHIP_DETECT_MAGIC_REG_ADDR)
                 if chip_magic_value not in self.CHIP_DETECT_MAGIC_VALUE:
                     actually = None
-                    for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM,
-                                ESP32C3ROM, ESP32H2BETA1ROM, ESP32H2BETA2ROM, ESP32C2ROM, ESP32C6BETAROM]:
+                    for cls in [ESP8266ROM, ESP32ROM, ESP32S2ROM, ESP32S3ROM,
+                                ESP32C3ROM, ESP32H2ROM, ESP32C2ROM, ESP32C6ROM]:
                         if chip_magic_value in cls.CHIP_DETECT_MAGIC_VALUE:
                             actually = cls
                             break
@@ -812,8 +810,8 @@ def flash_begin(self, size, offset, begin_rom_encrypted=False):
             timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, size)  # ROM performs the erase up front
 
         params = struct.pack('<IIII', erase_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
-        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM,
-                             ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32S3ROM, ESP32C3ROM,
+                             ESP32C6ROM, ESP32H2ROM, ESP32C2ROM)) and not self.IS_STUB:
             params += struct.pack('<I', 1 if begin_rom_encrypted else 0)
         self.check_command("enter Flash download mode", self.ESP_FLASH_BEGIN,
                            params, timeout=timeout)
@@ -844,7 +842,7 @@ def flash_block(self, data, seq, timeout=DEFAULT_TIMEOUT):
 
     def flash_encrypt_block(self, data, seq, timeout=DEFAULT_TIMEOUT):
         """Encrypt, write block to flash, retry if fail"""
-        if isinstance(self, (ESP32S2ROM, ESP32C3ROM, ESP32S3ROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32C3ROM, ESP32S3ROM, ESP32H2ROM, ESP32C2ROM)) and not self.IS_STUB:
             # ROM support performs the encrypted writes via the normal write command,
             # triggered by flash_begin(begin_rom_encrypted=True)
             return self.flash_block(data, seq, timeout)
@@ -967,8 +965,8 @@ def flash_defl_begin(self, size, compsize, offset):
             timeout = timeout_per_mb(ERASE_REGION_TIMEOUT_PER_MB, write_size)  # ROM performs the erase up front
         print("Compressed %d bytes to %d..." % (size, compsize))
         params = struct.pack('<IIII', write_size, num_blocks, self.FLASH_WRITE_SIZE, offset)
-        if isinstance(self, (ESP32S2ROM, ESP32S3BETA2ROM, ESP32S3ROM, ESP32C3ROM,
-                             ESP32C6BETAROM, ESP32H2BETA1ROM, ESP32C2ROM, ESP32H2BETA2ROM)) and not self.IS_STUB:
+        if isinstance(self, (ESP32S2ROM, ESP32S3ROM, ESP32C3ROM,
+                             ESP32C6ROM, ESP32H2ROM, ESP32C2ROM)) and not self.IS_STUB:
             params += struct.pack('<I', 0)  # extra param is to enter encrypted flash mode via ROM (not supported currently)
         self.check_command("enter compressed flash mode", self.ESP_FLASH_DEFL_BEGIN, params, timeout=timeout)
         if size != 0 and not self.IS_STUB:
@@ -1700,8 +1698,9 @@ def get_chip_description(self):
 
         chip_name = {
             0: "ESP32-S0WDQ6" if single_core else "ESP32-D0WDQ6",
-            1: "ESP32-S0WD" if single_core else "ESP32-D0WD",
-            2: "ESP32-D2WD",
+            1: "ESP32-S0WDQ5" if single_core else "ESP32-D0WDQ5",
+            2: "ESP32-S2WDQ5" if single_core else "ESP32-D2WDQ5",
+            3: "ESP32-S0WD-OEM" if single_core else "ESP32-D0WD-OEM",
             4: "ESP32-U4WDH",
             5: "ESP32-PICO-V3" if rev3 else "ESP32-PICO-D4",
             6: "ESP32-PICO-V3-02",
@@ -1828,31 +1827,31 @@ class ESP32S2ROM(ESP32ROM):
     CHIP_NAME = "ESP32-S2"
     IMAGE_CHIP_ID = 2
 
-    FPGA_SLOW_BOOT = False
-
     IROM_MAP_START = 0x40080000
-    IROM_MAP_END   = 0x40b80000
+    IROM_MAP_END = 0x40B80000
     DROM_MAP_START = 0x3F000000
-    DROM_MAP_END   = 0x3F3F0000
+    DROM_MAP_END = 0x3F3F0000
 
-    CHIP_DETECT_MAGIC_VALUE = [0x000007c6]
+    CHIP_DETECT_MAGIC_VALUE = [0x000007C6]
 
-    SPI_REG_BASE = 0x3f402000
-    SPI_USR_OFFS    = 0x18
-    SPI_USR1_OFFS   = 0x1c
-    SPI_USR2_OFFS   = 0x20
+    SPI_REG_BASE = 0x3F402000
+    SPI_USR_OFFS = 0x18
+    SPI_USR1_OFFS = 0x1C
+    SPI_USR2_OFFS = 0x20
     SPI_MOSI_DLEN_OFFS = 0x24
     SPI_MISO_DLEN_OFFS = 0x28
     SPI_W0_OFFS = 0x58
 
-    MAC_EFUSE_REG = 0x3f41A044  # ESP32-S2 has special block for MAC efuses
+    MAC_EFUSE_REG = 0x3F41A044  # ESP32-S2 has special block for MAC efuses
+
+    UART_CLKDIV_REG = 0x3F400014
 
-    UART_CLKDIV_REG = 0x3f400014
+    SUPPORTS_ENCRYPTED_FLASH = True
 
     FLASH_ENCRYPTED_WRITE_ALIGN = 16
 
     # todo: use espefuse APIs to get this info
-    EFUSE_BASE = 0x3f41A000
+    EFUSE_BASE = 0x3F41A000
     EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030  # BLOCK0 read base address
     EFUSE_BLOCK1_ADDR = EFUSE_BASE + 0x044
     EFUSE_BLOCK2_ADDR = EFUSE_BASE + 0x05C
@@ -1873,36 +1872,45 @@ class ESP32S2ROM(ESP32ROM):
     EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
     EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 19
 
+    EFUSE_SPI_BOOT_CRYPT_CNT_REG = EFUSE_BASE + 0x034
+    EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18
+
+    EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x038
+    EFUSE_SECURE_BOOT_EN_MASK = 1 << 20
+
+    EFUSE_RD_REPEAT_DATA3_REG = EFUSE_BASE + 0x3C
+    EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK = 1 << 9
+
     PURPOSE_VAL_XTS_AES256_KEY_1 = 2
     PURPOSE_VAL_XTS_AES256_KEY_2 = 3
     PURPOSE_VAL_XTS_AES128_KEY = 4
 
-    UARTDEV_BUF_NO = 0x3ffffd14  # Variable in ROM .bss which indicates the port in use
-    UARTDEV_BUF_NO_USB = 2  # Value of the above variable indicating that USB is in use
+    UARTDEV_BUF_NO = 0x3FFFFD14  # Variable in ROM .bss which indicates the port in use
+    UARTDEV_BUF_NO_USB = 2  # Value of the above indicating that USB-OTG is in use
 
-    USB_RAM_BLOCK = 0x800  # Max block size USB CDC is used
+    USB_RAM_BLOCK = 0x800  # Max block size USB-OTG is used
 
-    GPIO_STRAP_REG = 0x3f404038
-    GPIO_STRAP_SPI_BOOT_MASK = 0x8   # Not download mode
-    RTC_CNTL_OPTION1_REG = 0x3f408128
+    GPIO_STRAP_REG = 0x3F404038
+    GPIO_STRAP_SPI_BOOT_MASK = 0x8  # Not download mode
+    RTC_CNTL_OPTION1_REG = 0x3F408128
     RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK = 0x1  # Is download mode forced over USB?
 
-    MEMORY_MAP = [[0x00000000, 0x00010000, "PADDING"],
-                  [0x3F000000, 0x3FF80000, "DROM"],
-                  [0x3F500000, 0x3FF80000, "EXTRAM_DATA"],
-                  [0x3FF9E000, 0x3FFA0000, "RTC_DRAM"],
-                  [0x3FF9E000, 0x40000000, "BYTE_ACCESSIBLE"],
-                  [0x3FF9E000, 0x40072000, "MEM_INTERNAL"],
-                  [0x3FFB0000, 0x40000000, "DRAM"],
-                  [0x40000000, 0x4001A100, "IROM_MASK"],
-                  [0x40020000, 0x40070000, "IRAM"],
-                  [0x40070000, 0x40072000, "RTC_IRAM"],
-                  [0x40080000, 0x40800000, "IROM"],
-                  [0x50000000, 0x50002000, "RTC_DATA"]]
-
-    # Returns old version format (ECO number). Use the new format get_chip_full_revision().
-    def get_chip_revision(self):
-        return self.get_major_chip_version()
+    MEMORY_MAP = [
+        [0x00000000, 0x00010000, "PADDING"],
+        [0x3F000000, 0x3FF80000, "DROM"],
+        [0x3F500000, 0x3FF80000, "EXTRAM_DATA"],
+        [0x3FF9E000, 0x3FFA0000, "RTC_DRAM"],
+        [0x3FF9E000, 0x40000000, "BYTE_ACCESSIBLE"],
+        [0x3FF9E000, 0x40072000, "MEM_INTERNAL"],
+        [0x3FFB0000, 0x40000000, "DRAM"],
+        [0x40000000, 0x4001A100, "IROM_MASK"],
+        [0x40020000, 0x40070000, "IRAM"],
+        [0x40070000, 0x40072000, "RTC_IRAM"],
+        [0x40080000, 0x40800000, "IROM"],
+        [0x50000000, 0x50002000, "RTC_DATA"],
+    ]
+
+    UF2_FAMILY_ID = 0xBFDD4EEE
 
     def get_pkg_version(self):
         num_word = 4
@@ -1923,10 +1931,16 @@ def get_flash_version(self):
         num_word = 3
         return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x0F
 
+    def get_flash_cap(self):
+        return self.get_flash_version()
+
     def get_psram_version(self):
         num_word = 3
         return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 28) & 0x0F
 
+    def get_psram_cap(self):
+        return self.get_psram_version()
+
     def get_block2_version(self):
         # BLK_VERSION_MINOR
         num_word = 4
@@ -1939,11 +1953,13 @@ def get_chip_description(self):
             2: "ESP32-S2FH4",
             102: "ESP32-S2FNR2",
             100: "ESP32-S2R2",
-        }.get(self.get_flash_version() + self.get_psram_version() * 100, "unknown ESP32-S2")
-
+        }.get(
+            self.get_flash_cap() + self.get_psram_cap() * 100,
+            "unknown ESP32-S2",
+        )
         major_rev = self.get_major_chip_version()
         minor_rev = self.get_minor_chip_version()
-        return "%s (revision v%d.%d)" % (chip_name, major_rev, minor_rev)
+        return f"{chip_name} (revision v{major_rev}.{minor_rev})"
 
     def get_chip_features(self):
         features = ["WiFi"]
@@ -1955,14 +1971,14 @@ def get_chip_features(self):
             0: "No Embedded Flash",
             1: "Embedded Flash 2MB",
             2: "Embedded Flash 4MB",
-        }.get(self.get_flash_version(), "Unknown Embedded Flash")
+        }.get(self.get_flash_cap(), "Unknown Embedded Flash")
         features += [flash_version]
 
         psram_version = {
             0: "No Embedded PSRAM",
             1: "Embedded PSRAM 2MB",
             2: "Embedded PSRAM 4MB",
-        }.get(self.get_psram_version(), "Unknown Embedded PSRAM")
+        }.get(self.get_psram_cap(), "Unknown Embedded PSRAM")
         features += [psram_version]
 
         block2_version = {
@@ -1979,30 +1995,48 @@ def get_crystal_freq(self):
         return 40
 
     def override_vddsdio(self, new_voltage):
-        raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-S2")
+        raise NotImplementedInROMError(
+            "VDD_SDIO overrides are not supported for ESP32-S2"
+        )
 
-    def read_mac(self):
+    def read_mac(self, mac_type="BASE_MAC"):
+        """Read MAC from EFUSE region"""
+        if mac_type != "BASE_MAC":
+            return None
         mac0 = self.read_reg(self.MAC_EFUSE_REG)
         mac1 = self.read_reg(self.MAC_EFUSE_REG + 4)  # only bottom 16 bits are MAC
         bitstring = struct.pack(">II", mac1, mac0)[2:]
-        try:
-            return tuple(ord(b) for b in bitstring)
-        except TypeError:  # Python 3, bitstring elements are already bytes
-            return tuple(bitstring)
+        return tuple(bitstring)
+
+    def flash_type(self):
+        return (
+            1
+            if self.read_reg(self.EFUSE_RD_REPEAT_DATA3_REG)
+            & self.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK
+            else 0
+        )
 
     def get_flash_crypt_config(self):
         return None  # doesn't exist on ESP32-S2
 
+    def get_secure_boot_enabled(self):
+        return (
+            self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
+            & self.EFUSE_SECURE_BOOT_EN_MASK
+        )
+
     def get_key_block_purpose(self, key_block):
         if key_block < 0 or key_block > 5:
             raise FatalError("Valid key block numbers must be in range 0-5")
 
-        reg, shift = [(self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT)][key_block]
+        reg, shift = [
+            (self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
+            (self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
+            (self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
+            (self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
+            (self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
+            (self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT),
+        ][key_block]
         return (self.read_reg(reg) >> shift) & 0xF
 
     def is_flash_encryption_key_valid(self):
@@ -2012,8 +2046,9 @@ def is_flash_encryption_key_valid(self):
         if any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes):
             return True
 
-        return any(p == self.PURPOSE_VAL_XTS_AES256_KEY_1 for p in purposes) \
-            and any(p == self.PURPOSE_VAL_XTS_AES256_KEY_2 for p in purposes)
+        return any(p == self.PURPOSE_VAL_XTS_AES256_KEY_1 for p in purposes) and any(
+            p == self.PURPOSE_VAL_XTS_AES256_KEY_2 for p in purposes
+        )
 
     def uses_usb(self, _cache=[]):
         if self.secure_download_mode:
@@ -2033,15 +2068,23 @@ def _check_if_can_reset(self):
         """
         if os.getenv("ESPTOOL_TESTING") is not None:
             print("ESPTOOL_TESTING is set, ignoring strapping mode check")
-            # Esptool tests over USB CDC run with GPIO0 strapped low, don't complain in this case.
+            # Esptool tests over USB-OTG run with GPIO0 strapped low,
+            # don't complain in this case.
             return
         strap_reg = self.read_reg(self.GPIO_STRAP_REG)
         force_dl_reg = self.read_reg(self.RTC_CNTL_OPTION1_REG)
-        if strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0 and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0:
-            print("WARNING: {} chip was placed into download mode using GPIO0.\n"
-                  "esptool.py can not exit the download mode over USB. "
-                  "To run the app, reset the chip manually.\n"
-                  "To suppress this note, set --after option to 'no_reset'.".format(self.get_chip_description()))
+        if (
+            strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0
+            and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0
+        ):
+            print(
+                "WARNING: {} chip was placed into download mode using GPIO0.\n"
+                "esptool.py can not exit the download mode over USB. "
+                "To run the app, reset the chip manually.\n"
+                "To suppress this note, set --after option to 'no_reset'.".format(
+                    self.get_chip_description()
+                )
+            )
             raise SystemExit(1)
 
     def hard_reset(self):
@@ -2281,20 +2324,6 @@ def hard_reset(self):
             self._setRTS(False)
 
 
-class ESP32S3BETA2ROM(ESP32S3ROM):
-    CHIP_NAME = "ESP32-S3(beta2)"
-    IMAGE_CHIP_ID = 4
-
-    CHIP_DETECT_MAGIC_VALUE = [0xeb004136]
-
-    EFUSE_BASE = 0x6001A000  # BLOCK0 read base address
-
-    def get_chip_description(self):
-        major_rev = self.get_major_chip_version()
-        minor_rev = self.get_minor_chip_version()
-        return "%s (revision v%d.%d)" % (self.CHIP_NAME, major_rev, minor_rev)
-
-
 class ESP32C3ROM(ESP32ROM):
     CHIP_NAME = "ESP32-C3"
     IMAGE_CHIP_ID = 5
@@ -2429,32 +2458,35 @@ def is_flash_encryption_key_valid(self):
         return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
 
 
-class ESP32H2BETA1ROM(ESP32ROM):
-    CHIP_NAME = "ESP32-H2(beta1)"
-    IMAGE_CHIP_ID = 10
+class ESP32C6ROM(ESP32C3ROM):
+    CHIP_NAME = "ESP32-C6"
+    IMAGE_CHIP_ID = 13
+
+    FPGA_SLOW_BOOT = False
 
     IROM_MAP_START = 0x42000000
-    IROM_MAP_END   = 0x42800000
-    DROM_MAP_START = 0x3c000000
-    DROM_MAP_END   = 0x3c800000
+    IROM_MAP_END = 0x42800000
+    DROM_MAP_START = 0x42800000
+    DROM_MAP_END = 0x43000000
 
-    SPI_REG_BASE = 0x60002000
-    SPI_USR_OFFS    = 0x18
-    SPI_USR1_OFFS   = 0x1C
-    SPI_USR2_OFFS   = 0x20
+    BOOTLOADER_FLASH_OFFSET = 0x0
+
+    # Magic value for ESP32C6
+    CHIP_DETECT_MAGIC_VALUE = [0x2CE0806F]
+
+    SPI_REG_BASE = 0x60003000
+    SPI_USR_OFFS = 0x18
+    SPI_USR1_OFFS = 0x1C
+    SPI_USR2_OFFS = 0x20
     SPI_MOSI_DLEN_OFFS = 0x24
     SPI_MISO_DLEN_OFFS = 0x28
     SPI_W0_OFFS = 0x58
 
-    BOOTLOADER_FLASH_OFFSET = 0x0
-
-    CHIP_DETECT_MAGIC_VALUE = [0xca26cc22]
-
-    UART_DATE_REG_ADDR = 0x60000000 + 0x7c
+    UART_DATE_REG_ADDR = 0x60000000 + 0x7C
 
-    EFUSE_BASE = 0x6001A000
+    EFUSE_BASE = 0x600B0800
     EFUSE_BLOCK1_ADDR = EFUSE_BASE + 0x044
-    MAC_EFUSE_REG  = EFUSE_BASE + 0x044
+    MAC_EFUSE_REG = EFUSE_BASE + 0x044
 
     EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030  # BLOCK0 read base address
 
@@ -2474,76 +2506,123 @@ class ESP32H2BETA1ROM(ESP32ROM):
     EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
     EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20
 
+    EFUSE_SPI_BOOT_CRYPT_CNT_REG = EFUSE_BASE + 0x034
+    EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18
+
+    EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x038
+    EFUSE_SECURE_BOOT_EN_MASK = 1 << 20
+
     PURPOSE_VAL_XTS_AES128_KEY = 4
 
-    GPIO_STRAP_REG = 0x3f404038
+    SUPPORTS_ENCRYPTED_FLASH = True
 
     FLASH_ENCRYPTED_WRITE_ALIGN = 16
 
-    MEMORY_MAP = []
+    UARTDEV_BUF_NO = 0x4087F580  # Variable in ROM .bss which indicates the port in use
+    UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3  # The above var when USB-JTAG/Serial is used
+
+    DR_REG_LP_WDT_BASE = 0x600B1C00
+    RTC_CNTL_WDTCONFIG0_REG = DR_REG_LP_WDT_BASE + 0x0  # LP_WDT_RWDT_CONFIG0_REG
+    RTC_CNTL_WDTWPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0018  # LP_WDT_RWDT_WPROTECT_REG
+
+    RTC_CNTL_SWD_CONF_REG = DR_REG_LP_WDT_BASE + 0x001C  # LP_WDT_SWD_CONFIG_REG
+    RTC_CNTL_SWD_AUTO_FEED_EN = 1 << 18
+    RTC_CNTL_SWD_WPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0020  # LP_WDT_SWD_WPROTECT_REG
+    RTC_CNTL_SWD_WKEY = 0x50D83AA1  # LP_WDT_SWD_WKEY, same as WDT key in this case
 
     FLASH_FREQUENCY = {
-        '48m': 0xf,
-        '24m': 0x0,
-        '16m': 0x1,
-        '12m': 0x2,
+        "80m": 0x0,  # workaround for wrong mspi HS div value in ROM
+        "40m": 0x0,
+        "20m": 0x2,
     }
 
-    # Returns old version format (ECO number). Use the new format get_chip_full_revision().
-    def get_chip_revision(self):
-        return 0
+    MEMORY_MAP = [
+        [0x00000000, 0x00010000, "PADDING"],
+        [0x42800000, 0x43000000, "DROM"],
+        [0x40800000, 0x40880000, "DRAM"],
+        [0x40800000, 0x40880000, "BYTE_ACCESSIBLE"],
+        [0x4004AC00, 0x40050000, "DROM_MASK"],
+        [0x40000000, 0x4004AC00, "IROM_MASK"],
+        [0x42000000, 0x42800000, "IROM"],
+        [0x40800000, 0x40880000, "IRAM"],
+        [0x50000000, 0x50004000, "RTC_IRAM"],
+        [0x50000000, 0x50004000, "RTC_DRAM"],
+        [0x600FE000, 0x60100000, "MEM_INTERNAL2"],
+    ]
+
+    UF2_FAMILY_ID = 0x540DDF62
 
     def get_pkg_version(self):
-        num_word = 4
-        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x07
+        num_word = 3
+        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x07
 
     def get_minor_chip_version(self):
         num_word = 3
-        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x07
+        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x0F
 
     def get_major_chip_version(self):
         num_word = 3
-        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x03
+        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 22) & 0x03
 
     def get_chip_description(self):
         chip_name = {
-            0: "ESP32-H2",
-        }.get(self.get_pkg_version(), "unknown ESP32-H2")
+            0: "ESP32-C6 (QFN40)",
+            1: "ESP32-C6FH4 (QFN32)",
+        }.get(self.get_pkg_version(), "unknown ESP32-C6")
         major_rev = self.get_major_chip_version()
         minor_rev = self.get_minor_chip_version()
-        return "%s (revision v%d.%d)" % (chip_name, major_rev, minor_rev)
+        return f"{chip_name} (revision v{major_rev}.{minor_rev})"
 
     def get_chip_features(self):
-        return ["BLE/802.15.4"]
+        return ["WiFi 6", "BT 5", "IEEE802.15.4"]
 
     def get_crystal_freq(self):
-        return 32
+        # ESP32C6 XTAL is fixed to 40MHz
+        return 40
 
     def override_vddsdio(self, new_voltage):
-        raise NotImplementedInROMError("VDD_SDIO overrides are not supported for ESP32-H2")
+        raise NotImplementedInROMError(
+            "VDD_SDIO overrides are not supported for ESP32-C6"
+        )
 
-    def read_mac(self):
+    def read_mac(self, mac_type="BASE_MAC"):
+        """Read MAC from EFUSE region"""
         mac0 = self.read_reg(self.MAC_EFUSE_REG)
         mac1 = self.read_reg(self.MAC_EFUSE_REG + 4)  # only bottom 16 bits are MAC
-        bitstring = struct.pack(">II", mac1, mac0)[2:]
-        try:
-            return tuple(ord(b) for b in bitstring)
-        except TypeError:  # Python 3, bitstring elements are already bytes
-            return tuple(bitstring)
+        base_mac = struct.pack(">II", mac1, mac0)[2:]
+        ext_mac = struct.pack(">H", (mac1 >> 16) & 0xFFFF)
+        eui64 = base_mac[0:3] + ext_mac + base_mac[3:6]
+        # BASE MAC: 60:55:f9:f7:2c:a2
+        # EUI64 MAC: 60:55:f9:ff:fe:f7:2c:a2
+        # EXT_MAC: ff:fe
+        macs = {
+            "BASE_MAC": tuple(base_mac),
+            "EUI64": tuple(eui64),
+            "MAC_EXT": tuple(ext_mac),
+        }
+        return macs.get(mac_type, None)
 
     def get_flash_crypt_config(self):
-        return None  # doesn't exist on ESP32-H2
+        return None  # doesn't exist on ESP32-C6
+
+    def get_secure_boot_enabled(self):
+        return (
+            self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
+            & self.EFUSE_SECURE_BOOT_EN_MASK
+        )
 
     def get_key_block_purpose(self, key_block):
         if key_block < 0 or key_block > 5:
             raise FatalError("Valid key block numbers must be in range 0-5")
 
-        reg, shift = [(self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
-                      (self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT)][key_block]
+        reg, shift = [
+            (self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
+            (self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
+            (self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
+            (self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
+            (self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
+            (self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT),
+        ][key_block]
         return (self.read_reg(reg) >> shift) & 0xF
 
     def is_flash_encryption_key_valid(self):
@@ -2553,14 +2632,59 @@ def is_flash_encryption_key_valid(self):
         return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
 
 
-class ESP32H2BETA2ROM(ESP32H2BETA1ROM):
-    CHIP_NAME = "ESP32-H2(beta2)"
-    IMAGE_CHIP_ID = 14
+
+class ESP32H2ROM(ESP32C6ROM):
+    CHIP_NAME = "ESP32-H2"
+    IMAGE_CHIP_ID = 16
+
+    # Magic value for ESP32H2
+    CHIP_DETECT_MAGIC_VALUE = [0xD7B73E80]
+
+    DR_REG_LP_WDT_BASE = 0x600B1C00
+    RTC_CNTL_WDTCONFIG0_REG = DR_REG_LP_WDT_BASE + 0x0  # LP_WDT_RWDT_CONFIG0_REG
+    RTC_CNTL_WDTWPROTECT_REG = DR_REG_LP_WDT_BASE + 0x001C  # LP_WDT_RWDT_WPROTECT_REG
+
+    RTC_CNTL_SWD_CONF_REG = DR_REG_LP_WDT_BASE + 0x0020  # LP_WDT_SWD_CONFIG_REG
+    RTC_CNTL_SWD_AUTO_FEED_EN = 1 << 18
+    RTC_CNTL_SWD_WPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0024  # LP_WDT_SWD_WPROTECT_REG
+    RTC_CNTL_SWD_WKEY = 0x50D83AA1  # LP_WDT_SWD_WKEY, same as WDT key in this case
+
+    FLASH_FREQUENCY = {
+        "48m": 0xF,
+        "24m": 0x0,
+        "16m": 0x1,
+        "12m": 0x2,
+    }
+
+    UF2_FAMILY_ID = 0x332726F6
+
+    def get_pkg_version(self):
+        num_word = 4
+        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x07
+
+    def get_minor_chip_version(self):
+        num_word = 3
+        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x07
+
+    def get_major_chip_version(self):
+        num_word = 3
+        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x03
 
     def get_chip_description(self):
+        chip_name = {
+            0: "ESP32-H2",
+        }.get(self.get_pkg_version(), "unknown ESP32-H2")
         major_rev = self.get_major_chip_version()
         minor_rev = self.get_minor_chip_version()
-        return "%s (revision v%d.%d)" % (self.CHIP_NAME, major_rev, minor_rev)
+        return f"{chip_name} (revision v{major_rev}.{minor_rev})"
+
+    def get_chip_features(self):
+        return ["BLE", "IEEE802.15.4"]
+
+    def get_crystal_freq(self):
+        # ESP32H2 XTAL is fixed to 32MHz
+        return 32
+
 
 
 class ESP32C2ROM(ESP32C3ROM):
@@ -2568,27 +2692,53 @@ class ESP32C2ROM(ESP32C3ROM):
     IMAGE_CHIP_ID = 12
 
     IROM_MAP_START = 0x42000000
-    IROM_MAP_END   = 0x42400000
-    DROM_MAP_START = 0x3c000000
-    DROM_MAP_END   = 0x3c400000
+    IROM_MAP_END = 0x42400000
+    DROM_MAP_START = 0x3C000000
+    DROM_MAP_END = 0x3C400000
 
     # Magic value for ESP32C2 ECO0 and ECO1 respectively
-    CHIP_DETECT_MAGIC_VALUE = [0x6F51306F, 0x7c41a06f]
+    CHIP_DETECT_MAGIC_VALUE = [0x6F51306F, 0x7C41A06F]
 
     EFUSE_BASE = 0x60008800
     EFUSE_BLOCK2_ADDR = EFUSE_BASE + 0x040
-    MAC_EFUSE_REG  = EFUSE_BASE + 0x040
+    MAC_EFUSE_REG = EFUSE_BASE + 0x040
+
+    EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x30
+    EFUSE_SECURE_BOOT_EN_MASK = 1 << 21
+
+    EFUSE_SPI_BOOT_CRYPT_CNT_REG = EFUSE_BASE + 0x30
+    EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18
+
+    EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_BASE + 0x30
+    EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 6
+
+    EFUSE_XTS_KEY_LENGTH_256_REG = EFUSE_BASE + 0x30
+    EFUSE_XTS_KEY_LENGTH_256 = 1 << 10
+
+    EFUSE_BLOCK_KEY0_REG = EFUSE_BASE + 0x60
+
+    EFUSE_RD_DIS_REG = EFUSE_BASE + 0x30
+    EFUSE_RD_DIS = 3
 
     FLASH_FREQUENCY = {
-        '60m': 0xf,
-        '30m': 0x0,
-        '20m': 0x1,
-        '15m': 0x2,
+        "60m": 0xF,
+        "30m": 0x0,
+        "20m": 0x1,
+        "15m": 0x2,
     }
 
-    # Returns old version format (ECO number). Use the new format get_chip_full_revision().
-    def get_chip_revision(self):
-        return self.get_major_chip_version()
+    MEMORY_MAP = [
+        [0x00000000, 0x00010000, "PADDING"],
+        [0x3C000000, 0x3C400000, "DROM"],
+        [0x3FCA0000, 0x3FCE0000, "DRAM"],
+        [0x3FC88000, 0x3FD00000, "BYTE_ACCESSIBLE"],
+        [0x3FF00000, 0x3FF50000, "DROM_MASK"],
+        [0x40000000, 0x40090000, "IROM_MASK"],
+        [0x42000000, 0x42400000, "IROM"],
+        [0x4037C000, 0x403C0000, "IRAM"],
+    ]
+
+    UF2_FAMILY_ID = 0x2B88D29C
 
     def get_pkg_version(self):
         num_word = 1
@@ -2601,7 +2751,7 @@ def get_chip_description(self):
         }.get(self.get_pkg_version(), "unknown ESP32-C2")
         major_rev = self.get_major_chip_version()
         minor_rev = self.get_minor_chip_version()
-        return "%s (revision v%d.%d)" % (chip_name, major_rev, minor_rev)
+        return f"{chip_name} (revision v{major_rev}.{minor_rev})"
 
     def get_minor_chip_version(self):
         num_word = 1
@@ -2611,44 +2761,66 @@ def get_major_chip_version(self):
         num_word = 1
         return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 20) & 0x3
 
+    def get_crystal_freq(self):
+        # The crystal detection algorithm of ESP32/ESP8266 works for ESP32-C2 as well.
+        return ESPLoader.get_crystal_freq(self)
+
+    def change_baud(self, baud):
+        rom_with_26M_XTAL = not self.IS_STUB and self.get_crystal_freq() == 26
+        if rom_with_26M_XTAL:
+            # The code is copied over from ESPLoader.change_baud().
+            # Probably this is just a temporary solution until the next chip revision.
+
+            # The ROM code thinks it uses a 40 MHz XTAL. Recompute the baud rate
+            # in order to trick the ROM code to set the correct baud rate for
+            # a 26 MHz XTAL.
+            false_rom_baud = baud * 40 // 26
+
+            print(f"Changing baud rate to {baud}")
+            self.command(
+                self.ESP_CHANGE_BAUDRATE, struct.pack("<II", false_rom_baud, 0)
+            )
+            print("Changed.")
+            self._set_port_baudrate(baud)
+            time.sleep(0.05)  # get rid of garbage sent during baud rate change
+            self.flush_input()
+        else:
+            ESPLoader.change_baud(self, baud)
+
     def _post_connect(self):
         # ESP32C2 ECO0 is no longer supported by the flasher stub
-        if self.get_chip_revision() == 0:
+        if not self.secure_download_mode and self.get_chip_revision() == 0:
             self.stub_is_disabled = True
             self.IS_STUB = False
 
+    """ Try to read (encryption key) and check if it is valid """
 
-class ESP32C6BETAROM(ESP32C3ROM):
-    CHIP_NAME = "ESP32-C6(beta)"
-    IMAGE_CHIP_ID = 7
-
-    CHIP_DETECT_MAGIC_VALUE = [0x0da1806f]
-
-    UART_DATE_REG_ADDR = 0x00000500
-
-    # Returns old version format (ECO number). Use the new format get_chip_full_revision().
-    def get_chip_revision(self):
-        return 0
-
-    def get_pkg_version(self):
-        num_word = 3
-        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 29) & 0x07
+    def is_flash_encryption_key_valid(self):
+        key_len_256 = (
+            self.read_reg(self.EFUSE_XTS_KEY_LENGTH_256_REG)
+            & self.EFUSE_XTS_KEY_LENGTH_256
+        )
 
-    def get_minor_chip_version(self):
-        num_word = 3
-        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 18) & 0x0F
+        word0 = self.read_reg(self.EFUSE_RD_DIS_REG) & self.EFUSE_RD_DIS
+        rd_disable = word0 == 3 if key_len_256 else word0 == 1
 
-    def get_major_chip_version(self):
-        num_word = 3
-        return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 22) & 0x03
+        # reading of BLOCK3 is NOT ALLOWED so we assume valid key is programmed
+        if rd_disable:
+            return True
+        else:
+            # reading of BLOCK3 is ALLOWED so we will read and verify for non-zero.
+            # When chip has not generated AES/encryption key in BLOCK3,
+            # the contents will be readable and 0.
+            # If the flash encryption is enabled it is expected to have a valid
+            # non-zero key. We break out on first occurance of non-zero value
+            key_word = [0] * 7 if key_len_256 else [0] * 3
+            for i in range(len(key_word)):
+                key_word[i] = self.read_reg(self.EFUSE_BLOCK_KEY0_REG + i * 4)
+                # key is non-zero so break & return
+                if key_word[i] != 0:
+                    return True
+            return False
 
-    def get_chip_description(self):
-        chip_name = {
-            0: "ESP32-C6",
-        }.get(self.get_pkg_version(), "unknown ESP32-C6")
-        major_rev = self.get_major_chip_version()
-        minor_rev = self.get_minor_chip_version()
-        return "%s (revision v%d.%d)" % (chip_name, major_rev, minor_rev)
 
 
 class ESP32StubLoader(ESP32ROM):
@@ -2692,26 +2864,6 @@ def __init__(self, rom_loader):
 ESP32S2ROM.STUB_CLASS = ESP32S2StubLoader
 
 
-class ESP32S3BETA2StubLoader(ESP32S3BETA2ROM):
-    """ Access class for ESP32S3 stub loader, runs on top of ROM.
-
-    (Basically the same as ESP32StubLoader, but different base class.
-    Can possibly be made into a mixin.)
-    """
-    FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
-    STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
-    IS_STUB = True
-
-    def __init__(self, rom_loader):
-        self.secure_download_mode = rom_loader.secure_download_mode
-        self._port = rom_loader._port
-        self._trace_enabled = rom_loader._trace_enabled
-        self.flush_input()  # resets _slip_reader
-
-
-ESP32S3BETA2ROM.STUB_CLASS = ESP32S3BETA2StubLoader
-
-
 class ESP32S3StubLoader(ESP32S3ROM):
     """ Access class for ESP32S3 stub loader, runs on top of ROM.
 
@@ -2756,12 +2908,13 @@ def __init__(self, rom_loader):
 ESP32C3ROM.STUB_CLASS = ESP32C3StubLoader
 
 
-class ESP32H2BETA1StubLoader(ESP32H2BETA1ROM):
-    """ Access class for ESP32H2BETA1 stub loader, runs on top of ROM.
+class ESP32C6StubLoader(ESP32C6ROM):
+    """Access class for ESP32C6 stub loader, runs on top of ROM.
 
     (Basically the same as ESP32StubLoader, but different base class.
     Can possibly be made into a mixin.)
     """
+
     FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
     STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
     IS_STUB = True
@@ -2773,15 +2926,16 @@ def __init__(self, rom_loader):
         self.flush_input()  # resets _slip_reader
 
 
-ESP32H2BETA1ROM.STUB_CLASS = ESP32H2BETA1StubLoader
+ESP32C6ROM.STUB_CLASS = ESP32C6StubLoader
 
 
-class ESP32H2BETA2StubLoader(ESP32H2BETA2ROM):
-    """ Access class for ESP32H2BETA2 stub loader, runs on top of ROM.
+class ESP32H2StubLoader(ESP32H2ROM):
+    """Access class for ESP32H2 stub loader, runs on top of ROM.
 
     (Basically the same as ESP32StubLoader, but different base class.
     Can possibly be made into a mixin.)
     """
+
     FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
     STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
     IS_STUB = True
@@ -2793,15 +2947,16 @@ def __init__(self, rom_loader):
         self.flush_input()  # resets _slip_reader
 
 
-ESP32H2BETA2ROM.STUB_CLASS = ESP32H2BETA2StubLoader
+ESP32H2ROM.STUB_CLASS = ESP32H2StubLoader
 
 
 class ESP32C2StubLoader(ESP32C2ROM):
-    """ Access class for ESP32C2 stub loader, runs on top of ROM.
+    """Access class for ESP32C2 stub loader, runs on top of ROM.
 
     (Basically the same as ESP32StubLoader, but different base class.
     Can possibly be made into a mixin.)
     """
+
     FLASH_WRITE_SIZE = 0x4000  # matches MAX_WRITE_BLOCK in stub_loader.c
     STATUS_BYTES_LENGTH = 2  # same as ESP8266, different to ESP32 ROM
     IS_STUB = True
@@ -2840,18 +2995,14 @@ def LoadFirmwareImage(chip, filename):
             return ESP32FirmwareImage(f)
         elif chip == "esp32s2":
             return ESP32S2FirmwareImage(f)
-        elif chip == "esp32s3beta2":
-            return ESP32S3BETA2FirmwareImage(f)
         elif chip == "esp32s3":
             return ESP32S3FirmwareImage(f)
         elif chip == 'esp32c3':
             return ESP32C3FirmwareImage(f)
-        elif chip == 'esp32c6beta':
-            return ESP32C6BETAFirmwareImage(f)
-        elif chip == 'esp32h2beta1':
-            return ESP32H2BETA1FirmwareImage(f)
-        elif chip == 'esp32h2beta2':
-            return ESP32H2BETA2FirmwareImage(f)
+        elif chip == 'esp32c6':
+            return ESP32C6FirmwareImage(f)
+        elif chip == 'esp32h2':
+            return ESP32H2FirmwareImage(f)
         elif chip == 'esp32c2':
             return ESP32C2FirmwareImage(f)
         else:  # Otherwise, ESP8266 so look at magic to determine the image type
@@ -3582,20 +3733,29 @@ class ESP32S2FirmwareImage(ESP32FirmwareImage):
 ESP32S2ROM.BOOTLOADER_IMAGE = ESP32S2FirmwareImage
 
 
-class ESP32S3BETA2FirmwareImage(ESP32FirmwareImage):
+class ESP32S3FirmwareImage(ESP32FirmwareImage):
     """ ESP32S3 Firmware Image almost exactly the same as ESP32FirmwareImage """
-    ROM_LOADER = ESP32S3BETA2ROM
+    ROM_LOADER = ESP32S3ROM
 
 
-ESP32S3BETA2ROM.BOOTLOADER_IMAGE = ESP32S3BETA2FirmwareImage
+ESP32S3ROM.BOOTLOADER_IMAGE = ESP32S3FirmwareImage
 
 
-class ESP32S3FirmwareImage(ESP32FirmwareImage):
-    """ ESP32S3 Firmware Image almost exactly the same as ESP32FirmwareImage """
-    ROM_LOADER = ESP32S3ROM
+class ESP32C2FirmwareImage(ESP32FirmwareImage):
+    """ESP32C2 Firmware Image almost exactly the same as ESP32FirmwareImage"""
 
+    ROM_LOADER = ESP32C2ROM
+
+    def set_mmu_page_size(self, size):
+        if size not in [16384, 32768, 65536]:
+            raise FatalError(
+                "{} bytes is not a valid ESP32-C2 page size, "
+                "select from 64KB, 32KB, 16KB.".format(size)
+            )
+        self.IROM_ALIGN = size
 
-ESP32S3ROM.BOOTLOADER_IMAGE = ESP32S3FirmwareImage
+
+ESP32C2ROM.BOOTLOADER_IMAGE = ESP32C2FirmwareImage
 
 
 class ESP32C3FirmwareImage(ESP32FirmwareImage):
@@ -3606,28 +3766,30 @@ class ESP32C3FirmwareImage(ESP32FirmwareImage):
 ESP32C3ROM.BOOTLOADER_IMAGE = ESP32C3FirmwareImage
 
 
-class ESP32C6BETAFirmwareImage(ESP32FirmwareImage):
-    """ ESP32C6 Firmware Image almost exactly the same as ESP32FirmwareImage """
-    ROM_LOADER = ESP32C6BETAROM
+class ESP32C6FirmwareImage(ESP32FirmwareImage):
+    """ESP32C6 Firmware Image almost exactly the same as ESP32FirmwareImage"""
 
+    ROM_LOADER = ESP32C6ROM
 
-ESP32C6BETAROM.BOOTLOADER_IMAGE = ESP32C6BETAFirmwareImage
-
+    def set_mmu_page_size(self, size):
+        if size not in [8192, 16384, 32768, 65536]:
+            raise FatalError(
+                "{} bytes is not a valid ESP32-C6 page size, "
+                "select from 64KB, 32KB, 16KB, 8KB.".format(size)
+            )
+        self.IROM_ALIGN = size
 
-class ESP32H2BETA1FirmwareImage(ESP32FirmwareImage):
-    """ ESP32H2 Firmware Image almost exactly the same as ESP32FirmwareImage """
-    ROM_LOADER = ESP32H2BETA1ROM
 
+ESP32C6ROM.BOOTLOADER_IMAGE = ESP32C6FirmwareImage
 
-ESP32H2BETA1ROM.BOOTLOADER_IMAGE = ESP32H2BETA1FirmwareImage
 
+class ESP32H2FirmwareImage(ESP32C6FirmwareImage):
+    """ESP32H2 Firmware Image almost exactly the same as ESP32FirmwareImage"""
 
-class ESP32H2BETA2FirmwareImage(ESP32FirmwareImage):
-    """ ESP32H2 Firmware Image almost exactly the same as ESP32FirmwareImage """
-    ROM_LOADER = ESP32H2BETA2ROM
+    ROM_LOADER = ESP32H2ROM
 
 
-ESP32H2BETA2ROM.BOOTLOADER_IMAGE = ESP32H2BETA2FirmwareImage
+ESP32H2ROM.BOOTLOADER_IMAGE = ESP32H2FirmwareImage
 
 
 class ESP32C2FirmwareImage(ESP32FirmwareImage):
@@ -4369,10 +4531,6 @@ def elf2image(args):
         image = ESP32S2FirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
-    elif args.chip == 'esp32s3beta2':
-        image = ESP32S3BETA2FirmwareImage()
-        if args.secure_pad_v2:
-            image.secure_pad = '2'
     elif args.chip == 'esp32s3':
         image = ESP32S3FirmwareImage()
         if args.secure_pad_v2:
@@ -4381,16 +4539,12 @@ def elf2image(args):
         image = ESP32C3FirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
-    elif args.chip == 'esp32c6beta':
-        image = ESP32C6BETAFirmwareImage()
+    elif args.chip == 'esp32c6':
+        image = ESP32C6FirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
-    elif args.chip == 'esp32h2beta1':
-        image = ESP32H2BETA1FirmwareImage()
-        if args.secure_pad_v2:
-            image.secure_pad = '2'
-    elif args.chip == 'esp32h2beta2':
-        image = ESP32H2BETA2FirmwareImage()
+    elif args.chip == 'esp32h2':
+        image = ESP32H2FirmwareImage()
         if args.secure_pad_v2:
             image.secure_pad = '2'
     elif args.chip == 'esp32c2':
@@ -5239,407 +5393,340 @@ def __call__(self, parser, namespace, values, option_string=None):
 
 # Binary stub code (see flasher_stub dir for source & details)
 ESP8266ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32S2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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-""")))
-ESP32S3BETA2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32S3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32C3ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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-""")))
-ESP32C6BETAROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
-ESP32H2BETA1ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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+ESP32C6ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
-ESP32H2BETA2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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+ESP32H2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))
 ESP32C2ROM.STUB_CODE = eval(zlib.decompress(base64.b64decode(b"""
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 """)))