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hal.h
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hal.h
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/*
* Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
* Copyright (c) 2013 Qualcomm Atheros, Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _HAL_H_
#define _HAL_H_
/*---------------------------------------------------------------------------
API VERSIONING INFORMATION
The RIVA API is versioned as MAJOR.MINOR.VERSION.REVISION
The MAJOR is incremented for major product/architecture changes
(and then MINOR/VERSION/REVISION are zeroed)
The MINOR is incremented for minor product/architecture changes
(and then VERSION/REVISION are zeroed)
The VERSION is incremented if a significant API change occurs
(and then REVISION is zeroed)
The REVISION is incremented if an insignificant API change occurs
or if a new API is added
All values are in the range 0..255 (ie they are 8-bit values)
---------------------------------------------------------------------------*/
#define WCN36XX_HAL_VER_MAJOR 1
#define WCN36XX_HAL_VER_MINOR 4
#define WCN36XX_HAL_VER_VERSION 1
#define WCN36XX_HAL_VER_REVISION 2
/* This is to force compiler to use the maximum of an int ( 4 bytes ) */
#define WCN36XX_HAL_MAX_ENUM_SIZE 0x7FFFFFFF
#define WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
/* Max no. of transmit categories */
#define STACFG_MAX_TC 8
/* The maximum value of access category */
#define WCN36XX_HAL_MAX_AC 4
#define WCN36XX_HAL_IPV4_ADDR_LEN 4
#define WCN36XX_HAL_STA_INVALID_IDX 0xFF
#define WCN36XX_HAL_BSS_INVALID_IDX 0xFF
/* Default Beacon template size. */
#define BEACON_TEMPLATE_SIZE 0x17C
/* Minimum PVM size that the FW expects. See comment in smd.c for details. */
#define TIM_MIN_PVM_SIZE 6
/* Param Change Bitmap sent to HAL */
#define PARAM_BCN_INTERVAL_CHANGED (1 << 0)
#define PARAM_SHORT_PREAMBLE_CHANGED (1 << 1)
#define PARAM_SHORT_SLOT_TIME_CHANGED (1 << 2)
#define PARAM_llACOEXIST_CHANGED (1 << 3)
#define PARAM_llBCOEXIST_CHANGED (1 << 4)
#define PARAM_llGCOEXIST_CHANGED (1 << 5)
#define PARAM_HT20MHZCOEXIST_CHANGED (1<<6)
#define PARAM_NON_GF_DEVICES_PRESENT_CHANGED (1<<7)
#define PARAM_RIFS_MODE_CHANGED (1<<8)
#define PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED (1<<9)
#define PARAM_OBSS_MODE_CHANGED (1<<10)
#define PARAM_BEACON_UPDATE_MASK \
(PARAM_BCN_INTERVAL_CHANGED | \
PARAM_SHORT_PREAMBLE_CHANGED | \
PARAM_SHORT_SLOT_TIME_CHANGED | \
PARAM_llACOEXIST_CHANGED | \
PARAM_llBCOEXIST_CHANGED | \
PARAM_llGCOEXIST_CHANGED | \
PARAM_HT20MHZCOEXIST_CHANGED | \
PARAM_NON_GF_DEVICES_PRESENT_CHANGED | \
PARAM_RIFS_MODE_CHANGED | \
PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED | \
PARAM_OBSS_MODE_CHANGED)
/* dump command response Buffer size */
#define DUMPCMD_RSP_BUFFER 100
/* version string max length (including NULL) */
#define WCN36XX_HAL_VERSION_LENGTH 64
/* message types for messages exchanged between WDI and HAL */
enum wcn36xx_hal_host_msg_type {
/* Init/De-Init */
WCN36XX_HAL_START_REQ = 0,
WCN36XX_HAL_START_RSP = 1,
WCN36XX_HAL_STOP_REQ = 2,
WCN36XX_HAL_STOP_RSP = 3,
/* Scan */
WCN36XX_HAL_INIT_SCAN_REQ = 4,
WCN36XX_HAL_INIT_SCAN_RSP = 5,
WCN36XX_HAL_START_SCAN_REQ = 6,
WCN36XX_HAL_START_SCAN_RSP = 7,
WCN36XX_HAL_END_SCAN_REQ = 8,
WCN36XX_HAL_END_SCAN_RSP = 9,
WCN36XX_HAL_FINISH_SCAN_REQ = 10,
WCN36XX_HAL_FINISH_SCAN_RSP = 11,
/* HW STA configuration/deconfiguration */
WCN36XX_HAL_CONFIG_STA_REQ = 12,
WCN36XX_HAL_CONFIG_STA_RSP = 13,
WCN36XX_HAL_DELETE_STA_REQ = 14,
WCN36XX_HAL_DELETE_STA_RSP = 15,
WCN36XX_HAL_CONFIG_BSS_REQ = 16,
WCN36XX_HAL_CONFIG_BSS_RSP = 17,
WCN36XX_HAL_DELETE_BSS_REQ = 18,
WCN36XX_HAL_DELETE_BSS_RSP = 19,
/* Infra STA asscoiation */
WCN36XX_HAL_JOIN_REQ = 20,
WCN36XX_HAL_JOIN_RSP = 21,
WCN36XX_HAL_POST_ASSOC_REQ = 22,
WCN36XX_HAL_POST_ASSOC_RSP = 23,
/* Security */
WCN36XX_HAL_SET_BSSKEY_REQ = 24,
WCN36XX_HAL_SET_BSSKEY_RSP = 25,
WCN36XX_HAL_SET_STAKEY_REQ = 26,
WCN36XX_HAL_SET_STAKEY_RSP = 27,
WCN36XX_HAL_RMV_BSSKEY_REQ = 28,
WCN36XX_HAL_RMV_BSSKEY_RSP = 29,
WCN36XX_HAL_RMV_STAKEY_REQ = 30,
WCN36XX_HAL_RMV_STAKEY_RSP = 31,
/* Qos Related */
WCN36XX_HAL_ADD_TS_REQ = 32,
WCN36XX_HAL_ADD_TS_RSP = 33,
WCN36XX_HAL_DEL_TS_REQ = 34,
WCN36XX_HAL_DEL_TS_RSP = 35,
WCN36XX_HAL_UPD_EDCA_PARAMS_REQ = 36,
WCN36XX_HAL_UPD_EDCA_PARAMS_RSP = 37,
WCN36XX_HAL_ADD_BA_REQ = 38,
WCN36XX_HAL_ADD_BA_RSP = 39,
WCN36XX_HAL_DEL_BA_REQ = 40,
WCN36XX_HAL_DEL_BA_RSP = 41,
WCN36XX_HAL_CH_SWITCH_REQ = 42,
WCN36XX_HAL_CH_SWITCH_RSP = 43,
WCN36XX_HAL_SET_LINK_ST_REQ = 44,
WCN36XX_HAL_SET_LINK_ST_RSP = 45,
WCN36XX_HAL_GET_STATS_REQ = 46,
WCN36XX_HAL_GET_STATS_RSP = 47,
WCN36XX_HAL_UPDATE_CFG_REQ = 48,
WCN36XX_HAL_UPDATE_CFG_RSP = 49,
WCN36XX_HAL_MISSED_BEACON_IND = 50,
WCN36XX_HAL_UNKNOWN_ADDR2_FRAME_RX_IND = 51,
WCN36XX_HAL_MIC_FAILURE_IND = 52,
WCN36XX_HAL_FATAL_ERROR_IND = 53,
WCN36XX_HAL_SET_KEYDONE_MSG = 54,
/* NV Interface */
WCN36XX_HAL_DOWNLOAD_NV_REQ = 55,
WCN36XX_HAL_DOWNLOAD_NV_RSP = 56,
WCN36XX_HAL_ADD_BA_SESSION_REQ = 57,
WCN36XX_HAL_ADD_BA_SESSION_RSP = 58,
WCN36XX_HAL_TRIGGER_BA_REQ = 59,
WCN36XX_HAL_TRIGGER_BA_RSP = 60,
WCN36XX_HAL_UPDATE_BEACON_REQ = 61,
WCN36XX_HAL_UPDATE_BEACON_RSP = 62,
WCN36XX_HAL_SEND_BEACON_REQ = 63,
WCN36XX_HAL_SEND_BEACON_RSP = 64,
WCN36XX_HAL_SET_BCASTKEY_REQ = 65,
WCN36XX_HAL_SET_BCASTKEY_RSP = 66,
WCN36XX_HAL_DELETE_STA_CONTEXT_IND = 67,
WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_REQ = 68,
WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_RSP = 69,
/* PTT interface support */
WCN36XX_HAL_PROCESS_PTT_REQ = 70,
WCN36XX_HAL_PROCESS_PTT_RSP = 71,
/* BTAMP related events */
WCN36XX_HAL_SIGNAL_BTAMP_EVENT_REQ = 72,
WCN36XX_HAL_SIGNAL_BTAMP_EVENT_RSP = 73,
WCN36XX_HAL_TL_HAL_FLUSH_AC_REQ = 74,
WCN36XX_HAL_TL_HAL_FLUSH_AC_RSP = 75,
WCN36XX_HAL_ENTER_IMPS_REQ = 76,
WCN36XX_HAL_EXIT_IMPS_REQ = 77,
WCN36XX_HAL_ENTER_BMPS_REQ = 78,
WCN36XX_HAL_EXIT_BMPS_REQ = 79,
WCN36XX_HAL_ENTER_UAPSD_REQ = 80,
WCN36XX_HAL_EXIT_UAPSD_REQ = 81,
WCN36XX_HAL_UPDATE_UAPSD_PARAM_REQ = 82,
WCN36XX_HAL_CONFIGURE_RXP_FILTER_REQ = 83,
WCN36XX_HAL_ADD_BCN_FILTER_REQ = 84,
WCN36XX_HAL_REM_BCN_FILTER_REQ = 85,
WCN36XX_HAL_ADD_WOWL_BCAST_PTRN = 86,
WCN36XX_HAL_DEL_WOWL_BCAST_PTRN = 87,
WCN36XX_HAL_ENTER_WOWL_REQ = 88,
WCN36XX_HAL_EXIT_WOWL_REQ = 89,
WCN36XX_HAL_HOST_OFFLOAD_REQ = 90,
WCN36XX_HAL_SET_RSSI_THRESH_REQ = 91,
WCN36XX_HAL_GET_RSSI_REQ = 92,
WCN36XX_HAL_SET_UAPSD_AC_PARAMS_REQ = 93,
WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_REQ = 94,
WCN36XX_HAL_ENTER_IMPS_RSP = 95,
WCN36XX_HAL_EXIT_IMPS_RSP = 96,
WCN36XX_HAL_ENTER_BMPS_RSP = 97,
WCN36XX_HAL_EXIT_BMPS_RSP = 98,
WCN36XX_HAL_ENTER_UAPSD_RSP = 99,
WCN36XX_HAL_EXIT_UAPSD_RSP = 100,
WCN36XX_HAL_SET_UAPSD_AC_PARAMS_RSP = 101,
WCN36XX_HAL_UPDATE_UAPSD_PARAM_RSP = 102,
WCN36XX_HAL_CONFIGURE_RXP_FILTER_RSP = 103,
WCN36XX_HAL_ADD_BCN_FILTER_RSP = 104,
WCN36XX_HAL_REM_BCN_FILTER_RSP = 105,
WCN36XX_HAL_SET_RSSI_THRESH_RSP = 106,
WCN36XX_HAL_HOST_OFFLOAD_RSP = 107,
WCN36XX_HAL_ADD_WOWL_BCAST_PTRN_RSP = 108,
WCN36XX_HAL_DEL_WOWL_BCAST_PTRN_RSP = 109,
WCN36XX_HAL_ENTER_WOWL_RSP = 110,
WCN36XX_HAL_EXIT_WOWL_RSP = 111,
WCN36XX_HAL_RSSI_NOTIFICATION_IND = 112,
WCN36XX_HAL_GET_RSSI_RSP = 113,
WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_RSP = 114,
/* 11k related events */
WCN36XX_HAL_SET_MAX_TX_POWER_REQ = 115,
WCN36XX_HAL_SET_MAX_TX_POWER_RSP = 116,
/* 11R related msgs */
WCN36XX_HAL_AGGR_ADD_TS_REQ = 117,
WCN36XX_HAL_AGGR_ADD_TS_RSP = 118,
/* P2P WLAN_FEATURE_P2P */
WCN36XX_HAL_SET_P2P_GONOA_REQ = 119,
WCN36XX_HAL_SET_P2P_GONOA_RSP = 120,
/* WLAN Dump commands */
WCN36XX_HAL_DUMP_COMMAND_REQ = 121,
WCN36XX_HAL_DUMP_COMMAND_RSP = 122,
/* OEM_DATA FEATURE SUPPORT */
WCN36XX_HAL_START_OEM_DATA_REQ = 123,
WCN36XX_HAL_START_OEM_DATA_RSP = 124,
/* ADD SELF STA REQ and RSP */
WCN36XX_HAL_ADD_STA_SELF_REQ = 125,
WCN36XX_HAL_ADD_STA_SELF_RSP = 126,
/* DEL SELF STA SUPPORT */
WCN36XX_HAL_DEL_STA_SELF_REQ = 127,
WCN36XX_HAL_DEL_STA_SELF_RSP = 128,
/* Coex Indication */
WCN36XX_HAL_COEX_IND = 129,
/* Tx Complete Indication */
WCN36XX_HAL_OTA_TX_COMPL_IND = 130,
/* Host Suspend/resume messages */
WCN36XX_HAL_HOST_SUSPEND_IND = 131,
WCN36XX_HAL_HOST_RESUME_REQ = 132,
WCN36XX_HAL_HOST_RESUME_RSP = 133,
WCN36XX_HAL_SET_TX_POWER_REQ = 134,
WCN36XX_HAL_SET_TX_POWER_RSP = 135,
WCN36XX_HAL_GET_TX_POWER_REQ = 136,
WCN36XX_HAL_GET_TX_POWER_RSP = 137,
WCN36XX_HAL_P2P_NOA_ATTR_IND = 138,
WCN36XX_HAL_ENABLE_RADAR_DETECT_REQ = 139,
WCN36XX_HAL_ENABLE_RADAR_DETECT_RSP = 140,
WCN36XX_HAL_GET_TPC_REPORT_REQ = 141,
WCN36XX_HAL_GET_TPC_REPORT_RSP = 142,
WCN36XX_HAL_RADAR_DETECT_IND = 143,
WCN36XX_HAL_RADAR_DETECT_INTR_IND = 144,
WCN36XX_HAL_KEEP_ALIVE_REQ = 145,
WCN36XX_HAL_KEEP_ALIVE_RSP = 146,
/* PNO messages */
WCN36XX_HAL_SET_PREF_NETWORK_REQ = 147,
WCN36XX_HAL_SET_PREF_NETWORK_RSP = 148,
WCN36XX_HAL_SET_RSSI_FILTER_REQ = 149,
WCN36XX_HAL_SET_RSSI_FILTER_RSP = 150,
WCN36XX_HAL_UPDATE_SCAN_PARAM_REQ = 151,
WCN36XX_HAL_UPDATE_SCAN_PARAM_RSP = 152,
WCN36XX_HAL_PREF_NETW_FOUND_IND = 153,
WCN36XX_HAL_SET_TX_PER_TRACKING_REQ = 154,
WCN36XX_HAL_SET_TX_PER_TRACKING_RSP = 155,
WCN36XX_HAL_TX_PER_HIT_IND = 156,
WCN36XX_HAL_8023_MULTICAST_LIST_REQ = 157,
WCN36XX_HAL_8023_MULTICAST_LIST_RSP = 158,
WCN36XX_HAL_SET_PACKET_FILTER_REQ = 159,
WCN36XX_HAL_SET_PACKET_FILTER_RSP = 160,
WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_REQ = 161,
WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_RSP = 162,
WCN36XX_HAL_CLEAR_PACKET_FILTER_REQ = 163,
WCN36XX_HAL_CLEAR_PACKET_FILTER_RSP = 164,
/*
* This is temp fix. Should be removed once Host and Riva code is
* in sync.
*/
WCN36XX_HAL_INIT_SCAN_CON_REQ = 165,
WCN36XX_HAL_SET_POWER_PARAMS_REQ = 166,
WCN36XX_HAL_SET_POWER_PARAMS_RSP = 167,
WCN36XX_HAL_TSM_STATS_REQ = 168,
WCN36XX_HAL_TSM_STATS_RSP = 169,
/* wake reason indication (WOW) */
WCN36XX_HAL_WAKE_REASON_IND = 170,
/* GTK offload support */
WCN36XX_HAL_GTK_OFFLOAD_REQ = 171,
WCN36XX_HAL_GTK_OFFLOAD_RSP = 172,
WCN36XX_HAL_GTK_OFFLOAD_GETINFO_REQ = 173,
WCN36XX_HAL_GTK_OFFLOAD_GETINFO_RSP = 174,
WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_REQ = 175,
WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_RSP = 176,
WCN36XX_HAL_EXCLUDE_UNENCRYPTED_IND = 177,
WCN36XX_HAL_SET_THERMAL_MITIGATION_REQ = 178,
WCN36XX_HAL_SET_THERMAL_MITIGATION_RSP = 179,
WCN36XX_HAL_UPDATE_VHT_OP_MODE_REQ = 182,
WCN36XX_HAL_UPDATE_VHT_OP_MODE_RSP = 183,
WCN36XX_HAL_P2P_NOA_START_IND = 184,
WCN36XX_HAL_GET_ROAM_RSSI_REQ = 185,
WCN36XX_HAL_GET_ROAM_RSSI_RSP = 186,
WCN36XX_HAL_CLASS_B_STATS_IND = 187,
WCN36XX_HAL_DEL_BA_IND = 188,
WCN36XX_HAL_DHCP_START_IND = 189,
WCN36XX_HAL_DHCP_STOP_IND = 190,
WCN36XX_HAL_MSG_MAX = WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE
};
/* Enumeration for Version */
enum wcn36xx_hal_host_msg_version {
WCN36XX_HAL_MSG_VERSION0 = 0,
WCN36XX_HAL_MSG_VERSION1 = 1,
/* define as 2 bytes data */
WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF,
WCN36XX_HAL_MSG_VERSION_MAX_FIELD = WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION
};
enum driver_type {
DRIVER_TYPE_PRODUCTION = 0,
DRIVER_TYPE_MFG = 1,
DRIVER_TYPE_DVT = 2,
DRIVER_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum wcn36xx_hal_stop_type {
HAL_STOP_TYPE_SYS_RESET,
HAL_STOP_TYPE_SYS_DEEP_SLEEP,
HAL_STOP_TYPE_RF_KILL,
HAL_STOP_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum wcn36xx_hal_sys_mode {
HAL_SYS_MODE_NORMAL,
HAL_SYS_MODE_LEARN,
HAL_SYS_MODE_SCAN,
HAL_SYS_MODE_PROMISC,
HAL_SYS_MODE_SUSPEND_LINK,
HAL_SYS_MODE_ROAM_SCAN,
HAL_SYS_MODE_ROAM_SUSPEND_LINK,
HAL_SYS_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum phy_chan_bond_state {
/* 20MHz IF bandwidth centered on IF carrier */
PHY_SINGLE_CHANNEL_CENTERED = 0,
/* 40MHz IF bandwidth with lower 20MHz supporting the primary channel */
PHY_DOUBLE_CHANNEL_LOW_PRIMARY = 1,
/* 40MHz IF bandwidth centered on IF carrier */
PHY_DOUBLE_CHANNEL_CENTERED = 2,
/* 40MHz IF bandwidth with higher 20MHz supporting the primary ch */
PHY_DOUBLE_CHANNEL_HIGH_PRIMARY = 3,
/* 20/40MHZ offset LOW 40/80MHZ offset CENTERED */
PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_CENTERED = 4,
/* 20/40MHZ offset CENTERED 40/80MHZ offset CENTERED */
PHY_QUADRUPLE_CHANNEL_20MHZ_CENTERED_40MHZ_CENTERED = 5,
/* 20/40MHZ offset HIGH 40/80MHZ offset CENTERED */
PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_CENTERED = 6,
/* 20/40MHZ offset LOW 40/80MHZ offset LOW */
PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW = 7,
/* 20/40MHZ offset HIGH 40/80MHZ offset LOW */
PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW = 8,
/* 20/40MHZ offset LOW 40/80MHZ offset HIGH */
PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH = 9,
/* 20/40MHZ offset-HIGH 40/80MHZ offset HIGH */
PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH = 10,
PHY_CHANNEL_BONDING_STATE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
/* Spatial Multiplexing(SM) Power Save mode */
enum wcn36xx_hal_ht_mimo_state {
/* Static SM Power Save mode */
WCN36XX_HAL_HT_MIMO_PS_STATIC = 0,
/* Dynamic SM Power Save mode */
WCN36XX_HAL_HT_MIMO_PS_DYNAMIC = 1,
/* reserved */
WCN36XX_HAL_HT_MIMO_PS_NA = 2,
/* SM Power Save disabled */
WCN36XX_HAL_HT_MIMO_PS_NO_LIMIT = 3,
WCN36XX_HAL_HT_MIMO_PS_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
/* each station added has a rate mode which specifies the sta attributes */
enum sta_rate_mode {
STA_TAURUS = 0,
STA_TITAN,
STA_POLARIS,
STA_11b,
STA_11bg,
STA_11a,
STA_11n,
STA_11ac,
STA_INVALID_RATE_MODE = WCN36XX_HAL_MAX_ENUM_SIZE
};
/* 1,2,5.5,11 */
#define WCN36XX_HAL_NUM_DSSS_RATES 4
/* 6,9,12,18,24,36,48,54 */
#define WCN36XX_HAL_NUM_OFDM_RATES 8
/* 72,96,108 */
#define WCN36XX_HAL_NUM_POLARIS_RATES 3
#define WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET 16
enum wcn36xx_hal_bss_type {
WCN36XX_HAL_INFRASTRUCTURE_MODE,
/* Added for softAP support */
WCN36XX_HAL_INFRA_AP_MODE,
WCN36XX_HAL_IBSS_MODE,
/* Added for BT-AMP support */
WCN36XX_HAL_BTAMP_STA_MODE,
/* Added for BT-AMP support */
WCN36XX_HAL_BTAMP_AP_MODE,
WCN36XX_HAL_AUTO_MODE,
WCN36XX_HAL_DONOT_USE_BSS_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum wcn36xx_hal_nw_type {
WCN36XX_HAL_11A_NW_TYPE,
WCN36XX_HAL_11B_NW_TYPE,
WCN36XX_HAL_11G_NW_TYPE,
WCN36XX_HAL_11N_NW_TYPE,
WCN36XX_HAL_DONOT_USE_NW_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
};
#define WCN36XX_HAL_MAC_RATESET_EID_MAX 12
enum wcn36xx_hal_ht_operating_mode {
/* No Protection */
WCN36XX_HAL_HT_OP_MODE_PURE,
/* Overlap Legacy device present, protection is optional */
WCN36XX_HAL_HT_OP_MODE_OVERLAP_LEGACY,
/* No legacy device, but 20 MHz HT present */
WCN36XX_HAL_HT_OP_MODE_NO_LEGACY_20MHZ_HT,
/* Protection is required */
WCN36XX_HAL_HT_OP_MODE_MIXED,
WCN36XX_HAL_HT_OP_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
/* Encryption type enum used with peer */
enum ani_ed_type {
WCN36XX_HAL_ED_NONE,
WCN36XX_HAL_ED_WEP40,
WCN36XX_HAL_ED_WEP104,
WCN36XX_HAL_ED_TKIP,
WCN36XX_HAL_ED_CCMP,
WCN36XX_HAL_ED_WPI,
WCN36XX_HAL_ED_AES_128_CMAC,
WCN36XX_HAL_ED_NOT_IMPLEMENTED = WCN36XX_HAL_MAX_ENUM_SIZE
};
#define WLAN_MAX_KEY_RSC_LEN 16
#define WLAN_WAPI_KEY_RSC_LEN 16
/* MAX key length when ULA is used */
#define WCN36XX_HAL_MAC_MAX_KEY_LENGTH 32
#define WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS 4
/*
* Enum to specify whether key is used for TX only, RX only or both.
*/
enum ani_key_direction {
WCN36XX_HAL_TX_ONLY,
WCN36XX_HAL_RX_ONLY,
WCN36XX_HAL_TX_RX,
WCN36XX_HAL_TX_DEFAULT,
WCN36XX_HAL_DONOT_USE_KEY_DIRECTION = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum ani_wep_type {
WCN36XX_HAL_WEP_STATIC,
WCN36XX_HAL_WEP_DYNAMIC,
WCN36XX_HAL_WEP_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum wcn36xx_hal_link_state {
WCN36XX_HAL_LINK_IDLE_STATE = 0,
WCN36XX_HAL_LINK_PREASSOC_STATE = 1,
WCN36XX_HAL_LINK_POSTASSOC_STATE = 2,
WCN36XX_HAL_LINK_AP_STATE = 3,
WCN36XX_HAL_LINK_IBSS_STATE = 4,
/* BT-AMP Case */
WCN36XX_HAL_LINK_BTAMP_PREASSOC_STATE = 5,
WCN36XX_HAL_LINK_BTAMP_POSTASSOC_STATE = 6,
WCN36XX_HAL_LINK_BTAMP_AP_STATE = 7,
WCN36XX_HAL_LINK_BTAMP_STA_STATE = 8,
/* Reserved for HAL Internal Use */
WCN36XX_HAL_LINK_LEARN_STATE = 9,
WCN36XX_HAL_LINK_SCAN_STATE = 10,
WCN36XX_HAL_LINK_FINISH_SCAN_STATE = 11,
WCN36XX_HAL_LINK_INIT_CAL_STATE = 12,
WCN36XX_HAL_LINK_FINISH_CAL_STATE = 13,
WCN36XX_HAL_LINK_LISTEN_STATE = 14,
WCN36XX_HAL_LINK_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
enum wcn36xx_hal_stats_mask {
HAL_SUMMARY_STATS_INFO = 0x00000001,
HAL_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
HAL_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
HAL_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
HAL_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
HAL_PER_STA_STATS_INFO = 0x00000020
};
/* BT-AMP events type */
enum bt_amp_event_type {
BTAMP_EVENT_CONNECTION_START,
BTAMP_EVENT_CONNECTION_STOP,
BTAMP_EVENT_CONNECTION_TERMINATED,
/* This and beyond are invalid values */
BTAMP_EVENT_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
};
/* PE Statistics */
enum pe_stats_mask {
PE_SUMMARY_STATS_INFO = 0x00000001,
PE_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
PE_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
PE_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
PE_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
PE_PER_STA_STATS_INFO = 0x00000020,
/* This and beyond are invalid values */
PE_STATS_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
};
/*
* Configuration Parameter IDs
*/
#define WCN36XX_HAL_CFG_STA_ID 0
#define WCN36XX_HAL_CFG_CURRENT_TX_ANTENNA 1
#define WCN36XX_HAL_CFG_CURRENT_RX_ANTENNA 2
#define WCN36XX_HAL_CFG_LOW_GAIN_OVERRIDE 3
#define WCN36XX_HAL_CFG_POWER_STATE_PER_CHAIN 4
#define WCN36XX_HAL_CFG_CAL_PERIOD 5
#define WCN36XX_HAL_CFG_CAL_CONTROL 6
#define WCN36XX_HAL_CFG_PROXIMITY 7
#define WCN36XX_HAL_CFG_NETWORK_DENSITY 8
#define WCN36XX_HAL_CFG_MAX_MEDIUM_TIME 9
#define WCN36XX_HAL_CFG_MAX_MPDUS_IN_AMPDU 10
#define WCN36XX_HAL_CFG_RTS_THRESHOLD 11
#define WCN36XX_HAL_CFG_SHORT_RETRY_LIMIT 12
#define WCN36XX_HAL_CFG_LONG_RETRY_LIMIT 13
#define WCN36XX_HAL_CFG_FRAGMENTATION_THRESHOLD 14
#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ZERO 15
#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ONE 16
#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_TWO 17
#define WCN36XX_HAL_CFG_FIXED_RATE 18
#define WCN36XX_HAL_CFG_RETRYRATE_POLICY 19
#define WCN36XX_HAL_CFG_RETRYRATE_SECONDARY 20
#define WCN36XX_HAL_CFG_RETRYRATE_TERTIARY 21
#define WCN36XX_HAL_CFG_FORCE_POLICY_PROTECTION 22
#define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_24GHZ 23
#define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_5GHZ 24
#define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_24GHZ 25
#define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_5GHZ 26
#define WCN36XX_HAL_CFG_MAX_BA_SESSIONS 27
#define WCN36XX_HAL_CFG_PS_DATA_INACTIVITY_TIMEOUT 28
#define WCN36XX_HAL_CFG_PS_ENABLE_BCN_FILTER 29
#define WCN36XX_HAL_CFG_PS_ENABLE_RSSI_MONITOR 30
#define WCN36XX_HAL_CFG_NUM_BEACON_PER_RSSI_AVERAGE 31
#define WCN36XX_HAL_CFG_STATS_PERIOD 32
#define WCN36XX_HAL_CFG_CFP_MAX_DURATION 33
#define WCN36XX_HAL_CFG_FRAME_TRANS_ENABLED 34
#define WCN36XX_HAL_CFG_DTIM_PERIOD 35
#define WCN36XX_HAL_CFG_EDCA_WMM_ACBK 36
#define WCN36XX_HAL_CFG_EDCA_WMM_ACBE 37
#define WCN36XX_HAL_CFG_EDCA_WMM_ACVO 38
#define WCN36XX_HAL_CFG_EDCA_WMM_ACVI 39
#define WCN36XX_HAL_CFG_BA_THRESHOLD_HIGH 40
#define WCN36XX_HAL_CFG_MAX_BA_BUFFERS 41
#define WCN36XX_HAL_CFG_RPE_POLLING_THRESHOLD 42
#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG 43
#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG 44
#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG 45
#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG 46
#define WCN36XX_HAL_CFG_NO_OF_ONCHIP_REORDER_SESSIONS 47
#define WCN36XX_HAL_CFG_PS_LISTEN_INTERVAL 48
#define WCN36XX_HAL_CFG_PS_HEART_BEAT_THRESHOLD 49
#define WCN36XX_HAL_CFG_PS_NTH_BEACON_FILTER 50
#define WCN36XX_HAL_CFG_PS_MAX_PS_POLL 51
#define WCN36XX_HAL_CFG_PS_MIN_RSSI_THRESHOLD 52
#define WCN36XX_HAL_CFG_PS_RSSI_FILTER_PERIOD 53
#define WCN36XX_HAL_CFG_PS_BROADCAST_FRAME_FILTER_ENABLE 54
#define WCN36XX_HAL_CFG_PS_IGNORE_DTIM 55
#define WCN36XX_HAL_CFG_PS_ENABLE_BCN_EARLY_TERM 56
#define WCN36XX_HAL_CFG_DYNAMIC_PS_POLL_VALUE 57
#define WCN36XX_HAL_CFG_PS_NULLDATA_AP_RESP_TIMEOUT 58
#define WCN36XX_HAL_CFG_TELE_BCN_WAKEUP_EN 59
#define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI 60
#define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS 61
#define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI 62
#define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI_IDLE_BCNS 63
#define WCN36XX_HAL_CFG_TX_PWR_CTRL_ENABLE 64
#define WCN36XX_HAL_CFG_VALID_RADAR_CHANNEL_LIST 65
#define WCN36XX_HAL_CFG_TX_POWER_24_20 66
#define WCN36XX_HAL_CFG_TX_POWER_24_40 67
#define WCN36XX_HAL_CFG_TX_POWER_50_20 68
#define WCN36XX_HAL_CFG_TX_POWER_50_40 69
#define WCN36XX_HAL_CFG_MCAST_BCAST_FILTER_SETTING 70
#define WCN36XX_HAL_CFG_BCN_EARLY_TERM_WAKEUP_INTERVAL 71
#define WCN36XX_HAL_CFG_MAX_TX_POWER_2_4 72
#define WCN36XX_HAL_CFG_MAX_TX_POWER_5 73
#define WCN36XX_HAL_CFG_INFRA_STA_KEEP_ALIVE_PERIOD 74
#define WCN36XX_HAL_CFG_ENABLE_CLOSE_LOOP 75
#define WCN36XX_HAL_CFG_BTC_EXECUTION_MODE 76
#define WCN36XX_HAL_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK 77
#define WCN36XX_HAL_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS 78
#define WCN36XX_HAL_CFG_PS_TX_INACTIVITY_TIMEOUT 79
#define WCN36XX_HAL_CFG_WCNSS_API_VERSION 80
#define WCN36XX_HAL_CFG_AP_KEEPALIVE_TIMEOUT 81
#define WCN36XX_HAL_CFG_GO_KEEPALIVE_TIMEOUT 82
#define WCN36XX_HAL_CFG_ENABLE_MC_ADDR_LIST 83
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_BT 84
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_BT 85
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_BT 86
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_BT 87
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_WLAN 88
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_WLAN 89
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_WLAN 90
#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_WLAN 91
#define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_BT 92
#define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_WLAN 93
#define WCN36XX_HAL_CFG_BTC_MAX_SCO_BLOCK_PERC 94
#define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_A2DP 95
#define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_SCO 96
#define WCN36XX_HAL_CFG_ENABLE_UNICAST_FILTER 97
#define WCN36XX_HAL_CFG_MAX_ASSOC_LIMIT 98
#define WCN36XX_HAL_CFG_ENABLE_LPWR_IMG_TRANSITION 99
#define WCN36XX_HAL_CFG_ENABLE_MCC_ADAPTIVE_SCHEDULER 100
#define WCN36XX_HAL_CFG_ENABLE_DETECT_PS_SUPPORT 101
#define WCN36XX_HAL_CFG_AP_LINK_MONITOR_TIMEOUT 102
#define WCN36XX_HAL_CFG_BTC_DWELL_TIME_MULTIPLIER 103
#define WCN36XX_HAL_CFG_ENABLE_TDLS_OXYGEN_MODE 104
#define WCN36XX_HAL_CFG_MAX_PARAMS 105
/* Message definitons - All the messages below need to be packed */
/* Definition for HAL API Version. */
struct wcnss_wlan_version {
u8 revision;
u8 version;
u8 minor;
u8 major;
} __packed;
/* Definition for Encryption Keys */
struct wcn36xx_hal_keys {
u8 id;
/* 0 for multicast */
u8 unicast;
enum ani_key_direction direction;
/* Usage is unknown */
u8 rsc[WLAN_MAX_KEY_RSC_LEN];
/* =1 for authenticator,=0 for supplicant */
u8 pae_role;
u16 length;
u8 key[WCN36XX_HAL_MAC_MAX_KEY_LENGTH];
} __packed;
/*
* set_sta_key_params Moving here since it is shared by
* configbss/setstakey msgs
*/
struct wcn36xx_hal_set_sta_key_params {
/* STA Index */
u16 sta_index;
/* Encryption Type used with peer */
enum ani_ed_type enc_type;
/* STATIC/DYNAMIC - valid only for WEP */
enum ani_wep_type wep_type;
/* Default WEP key, valid only for static WEP, must between 0 and 3. */
u8 def_wep_idx;
/* valid only for non-static WEP encyrptions */
struct wcn36xx_hal_keys key[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
/*
* Control for Replay Count, 1= Single TID based replay count on Tx
* 0 = Per TID based replay count on TX
*/
u8 single_tid_rc;
} __packed;
/* 4-byte control message header used by HAL*/
struct wcn36xx_hal_msg_header {
enum wcn36xx_hal_host_msg_type msg_type:16;
enum wcn36xx_hal_host_msg_version msg_version:16;
u32 len;
} __packed;
/* Config format required by HAL for each CFG item*/
struct wcn36xx_hal_cfg {
/* Cfg Id. The Id required by HAL is exported by HAL
* in shared header file between UMAC and HAL.*/
u16 id;
/* Length of the Cfg. This parameter is used to go to next cfg
* in the TLV format.*/
u16 len;
/* Padding bytes for unaligned address's */
u16 pad_bytes;
/* Reserve bytes for making cfgVal to align address */
u16 reserve;
/* Following the uCfgLen field there should be a 'uCfgLen' bytes
* containing the uCfgValue ; u8 uCfgValue[uCfgLen] */
} __packed;
struct wcn36xx_hal_mac_start_parameters {
/* Drive Type - Production or FTM etc */
enum driver_type type;
/* Length of the config buffer */
u32 len;
/* Following this there is a TLV formatted buffer of length
* "len" bytes containing all config values.
* The TLV is expected to be formatted like this:
* 0 15 31 31+CFG_LEN-1 length-1
* | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
*/
} __packed;
struct wcn36xx_hal_mac_start_req_msg {
/* config buffer must start in TLV format just here */
struct wcn36xx_hal_msg_header header;
struct wcn36xx_hal_mac_start_parameters params;
} __packed;
struct wcn36xx_hal_mac_start_rsp_params {
/* success or failure */
u16 status;
/* Max number of STA supported by the device */
u8 stations;
/* Max number of BSS supported by the device */
u8 bssids;
/* API Version */
struct wcnss_wlan_version version;
/* CRM build information */
u8 crm_version[WCN36XX_HAL_VERSION_LENGTH];
/* hardware/chipset/misc version information */
u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH];
} __packed;
struct wcn36xx_hal_mac_start_rsp_msg {
struct wcn36xx_hal_msg_header header;
struct wcn36xx_hal_mac_start_rsp_params start_rsp_params;
} __packed;
struct wcn36xx_hal_mac_stop_req_params {
/* The reason for which the device is being stopped */
enum wcn36xx_hal_stop_type reason;
} __packed;
struct wcn36xx_hal_mac_stop_req_msg {
struct wcn36xx_hal_msg_header header;
struct wcn36xx_hal_mac_stop_req_params stop_req_params;
} __packed;
struct wcn36xx_hal_mac_stop_rsp_msg {
struct wcn36xx_hal_msg_header header;
/* success or failure */
u32 status;
} __packed;
struct wcn36xx_hal_update_cfg_req_msg {
/*
* Note: The length specified in tHalUpdateCfgReqMsg messages should be
* header.msgLen = sizeof(tHalUpdateCfgReqMsg) + uConfigBufferLen
*/
struct wcn36xx_hal_msg_header header;
/* Length of the config buffer. Allows UMAC to update multiple CFGs */
u32 len;
/*
* Following this there is a TLV formatted buffer of length
* "uConfigBufferLen" bytes containing all config values.
* The TLV is expected to be formatted like this:
* 0 15 31 31+CFG_LEN-1 length-1
* | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
*/
} __packed;
struct wcn36xx_hal_update_cfg_rsp_msg {
struct wcn36xx_hal_msg_header header;
/* success or failure */
u32 status;
} __packed;
/* Frame control field format (2 bytes) */
struct wcn36xx_hal_mac_frame_ctl {
#ifndef ANI_LITTLE_BIT_ENDIAN
u8 subType:4;
u8 type:2;
u8 protVer:2;
u8 order:1;
u8 wep:1;
u8 moreData:1;
u8 powerMgmt:1;
u8 retry:1;
u8 moreFrag:1;
u8 fromDS:1;
u8 toDS:1;
#else
u8 protVer:2;
u8 type:2;
u8 subType:4;
u8 toDS:1;
u8 fromDS:1;
u8 moreFrag:1;
u8 retry:1;
u8 powerMgmt:1;
u8 moreData:1;
u8 wep:1;
u8 order:1;
#endif
};
/* Sequence control field */
struct wcn36xx_hal_mac_seq_ctl {
u8 fragNum:4;
u8 seqNumLo:4;
u8 seqNumHi:8;
};
/* Management header format */
struct wcn36xx_hal_mac_mgmt_hdr {
struct wcn36xx_hal_mac_frame_ctl fc;
u8 durationLo;
u8 durationHi;
u8 da[6];
u8 sa[6];
u8 bssId[6];
struct wcn36xx_hal_mac_seq_ctl seqControl;
};
/* FIXME: pronto v1 apparently has 4 */
#define WCN36XX_HAL_NUM_BSSID 2
/* Scan Entry to hold active BSS idx's */
struct wcn36xx_hal_scan_entry {
u8 bss_index[WCN36XX_HAL_NUM_BSSID];
u8 active_bss_count;
};
struct wcn36xx_hal_init_scan_req_msg {
struct wcn36xx_hal_msg_header header;
/* LEARN - AP Role
SCAN - STA Role */
enum wcn36xx_hal_sys_mode mode;
/* BSSID of the BSS */
u8 bssid[ETH_ALEN];
/* Whether BSS needs to be notified */
u8 notify;
/* Kind of frame to be used for notifying the BSS (Data Null, QoS
* Null, or CTS to Self). Must always be a valid frame type. */
u8 frame_type;
/* UMAC has the option of passing the MAC frame to be used for
* notifying the BSS. If non-zero, HAL will use the MAC frame
* buffer pointed to by macMgmtHdr. If zero, HAL will generate the
* appropriate MAC frame based on frameType. */
u8 frame_len;
/* Following the framelength there is a MAC frame buffer if
* frameLength is non-zero. */
struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
/* Entry to hold number of active BSS idx's */
struct wcn36xx_hal_scan_entry scan_entry;
};
struct wcn36xx_hal_init_scan_con_req_msg {
struct wcn36xx_hal_msg_header header;
/* LEARN - AP Role
SCAN - STA Role */
enum wcn36xx_hal_sys_mode mode;
/* BSSID of the BSS */
u8 bssid[ETH_ALEN];
/* Whether BSS needs to be notified */
u8 notify;
/* Kind of frame to be used for notifying the BSS (Data Null, QoS