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introduction.tex
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\chapter{Introduction}
Embedded systems are the real driving force of today's society and almost every aspect of our life is becoming more and more dependant on them. They appear in every industrial sector as edge devices engineered to operate safety-critical and mission-critical environments with minimal human intervention. They play crucial role in functioning of cars, home appliances, medical devices and many other equipments that are the heart of today's digital, connected and automated world we live in.\\
The key benefits of such devices is their capability to perform in real time, with no or little delay, even sophisticated tasks and guaranteeing at same time low power consumption and low manufacturing cost.
On one hand, having a low power device is crucial in order to keep the cost down, also because power consumption is critical when the device is battery-powered. On the other hand, this implies a couple of consequences in terms of security:
\begin{enumerate}
\item Usually, built-in device security is minimal. An IoT system must be lightweight, and it is very difficult to have a system that is cheap but at the same time secure, low-power, and real-time reliable;
\item Limited resources cannot support a fully featured operating system with all common robust security features. For instance, it is not unusual to see IoT devices running software in bare-metal with few KB of on-chip memory.
\end{enumerate}
For these reasons, a technology with these limits is by nature weak, and exposed to possible malicious attacks. Furthermore, because of the surging usage of such devices in mission-critical and safety-critical applications, their security is a growing concern.\\
In literature, there exist a wide number of solutions aimed to secure embedded systems, many of which rely on software techniques, like binary instrumentation, aimed at protecting the system at application level. Other solutions, on the other hand, are based on direct interventions on the hardware aimed at introducing additional modules capable of protecting the system from attacks that exploit vulnerabilities of other components of the system itself. While software-based techniques can be easily tested outside the operating environment, with a proper toolchain, hardware-based techniques need to be evaluated in a realistic environment, meaning that once designed they must be synthesized and tested, e.g., on a FPGA. For the reasons mentioned above, in order to make research at hardware level, it is crucial to have the availability of an open-source architecture, modular and customizable without incurring any fees.\\
Among all the known open-source designs, the most widely used is the RISC-V platform, not only for academic purposes but also in industry. Among the reasons that made RISC-V such a success in the embedded systems research community, the following for sure should be mentioned:
\begin{itemize}
\item It is provided under open source licenses that do not require fees to use: thanks to this, derivative designs are allowed to be published, reused and modified;
\item Instruction set is now supported by commonly available language compilers, e.g, RISC-V GNU GCC;
\item It features a small base instruction set architecture engineered for extensibility: RISC-V ISA can be addressed to many possible uses, from performances to low-power real-world applications;
\item Unlike legacy ISAs that are decades old, RISC-V is a modern, clean state-of-the-art architecture designed to handle the latest computer load.
\end{itemize}
The work behind the present thesis consisted in the design of MC2101, which is a simple, modular, and synthesizable embedded system entirely described in VHDL language, meant to be used as a reliable platform on which is possible to run real applications, as well as integrate and evaluate security solutions for IoT in a realistic environment. Furthermore, the platform can be used for training activities in the cybersecurity domain, e.g., for modeling specific hardware security issues in Capture-the-Flag exercises, where vulnerabilities are intentionally inserted with the aim of being exploited and/or mitigated.
MC2101 microcontroller integrates a RISC-V core with a proper set of peripherals necessary to provide all basic I/O functionalities for running software. In particular, the peripherals selected are a GPIO module for handling input and output digital signals and a UART module used to allow serial communication between a computer and the microcontroller itself. The relative simplicity and modularity of the system makes it suitable, in the future, to be also used as a platform for teaching microcontrollers architecture at master students involved in embedded systems curriculum.
The development of the microcontroller included also a software design part. In particular, all system libraries used for driving and configuring the peripherals were written, and also interrupt service routines have been included in the processor's bootloaders. The pre-existing software toolchain for automatic compilation and RTL simulation, based on CMake and ModelSim commands and derived from the PULPino project \cite{pulpino}, has been extended with new test programs aimed at verify MC2101 activity on a board and at RTL level. Synthesis automation features have been included with the purpose of running Quartus Prime commands in a proper shell environment, in order to allow automatic synthesis and memory update for a fast deployment on FPGA.
To conclude the work, MC2101 synthesis results have been compared with the PULPino microcontroller, used as reference in many projects for both RISC-V hardware and software design, to understand what are the differences in terms of complexity and resource usage in a FPGA.
The remainder of the document is organized as follows. Chapter 2 contains a brief description of the RISC-V ISA, with particular attention to the subset of instructions executable by our core. It is underlined also the importance of the RISC-V ISA today. Also, are analyzed some of the most relevant scientific works in SoCs design present in literature, and all the motivations that led us to choose a new design from scratch. Some details on our RISC-V core are also provided, focusing on the most important features implemented. Chapter 3 presents a high-level description of the MC2101 microcontroller. In particular, the architecture features, hardware/software co-design choices and testing framework are presented. In Chapter 4, synthesis results are evaluated and compared with our reference architecture PULPino. Finally, Chapter 5 concludes the thesis, providing ideas for future improvements of the system.