From 593ad890cd81c61edd6d5618b8730dfd51317494 Mon Sep 17 00:00:00 2001 From: Michael Miller Date: Sun, 12 Jun 2022 13:19:40 -0700 Subject: [PATCH] S3 ifdefs --- src/internal/DotStarEsp32DmaSpiMethod.h | 19 +++++++++--------- src/internal/Esp32_i2s.c | 26 +++++++++++++++---------- src/internal/Esp32_i2s.h | 4 ++-- src/internal/NeoBusChannel.h | 5 +++-- src/internal/NeoEsp32I2sMethod.h | 13 +++++++------ src/internal/NeoEsp32RmtMethod.h | 16 +++++++-------- 6 files changed, 46 insertions(+), 37 deletions(-) diff --git a/src/internal/DotStarEsp32DmaSpiMethod.h b/src/internal/DotStarEsp32DmaSpiMethod.h index 67950116..f4c63aaa 100644 --- a/src/internal/DotStarEsp32DmaSpiMethod.h +++ b/src/internal/DotStarEsp32DmaSpiMethod.h @@ -29,12 +29,13 @@ License along with NeoPixel. If not, see #include "driver/spi_master.h" -#if defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(HSPI_HOST) -// HSPI_HOST depreciated in C3 +#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3)) && !defined(HSPI_HOST) +// HSPI_HOST depreciated in C3 & S3 #define HSPI_HOST SPI2_HOST #endif -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) + +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) class Esp32VspiBus { public: @@ -52,7 +53,7 @@ class Esp32HspiBus const static int ParallelBits = 1; }; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) class Esp32Vspi2BitBus { public: @@ -70,7 +71,7 @@ class Esp32Hspi2BitBus const static int ParallelBits = 2; }; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) class Esp32Vspi4BitBus { public: @@ -174,7 +175,7 @@ template class DotStarEsp32DmaSpiMethod // If pins aren't specified, initialize bus with just the default SCK and MOSI pins for the SPI peripheral (no SS, no >1-bit pins) void Initialize() { -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) if (T_SPIBUS::SpiHostDevice == VSPI_HOST) { Initialize(SCK, -1, MOSI, -1, -1, -1); @@ -277,7 +278,7 @@ template class DotStarEsp32DmaSpiMethod int8_t _ssPin; }; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // Clock Speed and Default Definitions for DotStarEsp32DmaVspi typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaVspi40MhzMethod; typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaVspi20MhzMethod; @@ -303,7 +304,7 @@ typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaHspiHz typedef DotStarEsp32DmaHspi10MhzMethod DotStarEsp32DmaHspiMethod; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // Clock Speed and Default Definitions for DotStarEsp32DmaVspi2Bit typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaVspi2Bit40MhzMethod; typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaVspi2Bit20MhzMethod; @@ -329,7 +330,7 @@ typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaHsp typedef DotStarEsp32DmaHspi2Bit10MhzMethod DotStarEsp32DmaHspi2BitMethod; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // Clock Speed and Default Definitions for DotStarEsp32DmaVspi4Bit typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaVspi4Bit40MhzMethod; typedef DotStarEsp32DmaSpiMethod DotStarEsp32DmaVspi4Bit20MhzMethod; diff --git a/src/internal/Esp32_i2s.c b/src/internal/Esp32_i2s.c index d21c821d..d5e92f2a 100644 --- a/src/internal/Esp32_i2s.c +++ b/src/internal/Esp32_i2s.c @@ -19,8 +19,10 @@ #include "sdkconfig.h" // this sets useful config symbols, like CONFIG_IDF_TARGET_ESP32C3 -// ESP32C3/S3 I2S is not supported yet due to significant changes to interface -#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) +// ESP32 C3 & S3 I2S is not supported yet due to significant changes to interface +#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) + + #include #include @@ -50,7 +52,11 @@ #include "soc/sens_reg.h" #include "driver/gpio.h" #include "driver/i2s.h" + +#if !defined(CONFIG_IDF_TARGET_ESP32S3) #include "driver/dac.h" +#endif + #include "Esp32_i2s.h" #include "esp32-hal.h" @@ -112,7 +118,7 @@ typedef struct { static uint8_t i2s_silence_buf[I2S_DMA_SILENCE_SIZE] = { 0 }; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // (I2S_NUM_MAX == 2) static i2s_bus_t I2S[I2S_NUM_MAX] = { {&I2S0, -1, -1, -1, -1, 0, NULL, NULL, i2s_silence_buf, I2S_DMA_SILENCE_SIZE, NULL, I2S_DMA_BLOCK_COUNT_DEFAULT, 0, 0, I2s_Is_Idle}, @@ -203,7 +209,7 @@ esp_err_t i2sSetClock(uint8_t bus_num, uint8_t div_num, uint8_t div_b, uint8_t d typeof(i2s->clkm_conf) clkm_conf; clkm_conf.val = 0; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) clkm_conf.clka_en = 0; #else clkm_conf.clk_sel = 2; @@ -247,7 +253,7 @@ void i2sSetPins(uint8_t bus_num, int8_t out, bool invert) pinMode(out, OUTPUT); int i2sSignal; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // (I2S_NUM_MAX == 2) if (bus_num == 1) { @@ -289,7 +295,7 @@ void i2sInit(uint8_t bus_num, return; } -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // (I2S_NUM_MAX == 2) if (bus_num) { periph_module_enable(PERIPH_I2S1_MODULE); @@ -331,7 +337,7 @@ void i2sInit(uint8_t bus_num, lc_conf.out_eof_mode = 1; i2s->lc_conf.val = lc_conf.val; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) i2s->pdm_conf.pcm2pdm_conv_en = 0; i2s->pdm_conf.pdm2pcm_conv_en = 0; #endif @@ -362,7 +368,7 @@ void i2sInit(uint8_t bus_num, i2s->fifo_conf.tx_fifo_mod_force_en = 1; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) i2s->pdm_conf.rx_pdm_en = 0; i2s->pdm_conf.tx_pdm_en = 0; #endif @@ -372,7 +378,7 @@ void i2sInit(uint8_t bus_num, // enable intr in cpu // int i2sIntSource; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // (I2S_NUM_MAX == 2) if (bus_num == 1) { i2sIntSource = ETS_I2S1_INTR_SOURCE; @@ -520,6 +526,6 @@ size_t i2sWrite(uint8_t bus_num, uint8_t* data, size_t len, bool copy, bool free return len; } -#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) +#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) #endif // defined(ARDUINO_ARCH_ESP32) diff --git a/src/internal/Esp32_i2s.h b/src/internal/Esp32_i2s.h index 6907bcfa..498813fd 100644 --- a/src/internal/Esp32_i2s.h +++ b/src/internal/Esp32_i2s.h @@ -1,7 +1,7 @@ #pragma once -// ESP32C3 I2S is not supported yet due to significant changes to interface -#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3) +// ESP32C3/S3 I2S is not supported yet due to significant changes to interface +#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) #ifdef __cplusplus extern "C" { diff --git a/src/internal/NeoBusChannel.h b/src/internal/NeoBusChannel.h index 6f4b3c66..ea3ef515 100644 --- a/src/internal/NeoBusChannel.h +++ b/src/internal/NeoBusChannel.h @@ -5,6 +5,7 @@ // ESP32 - 8 TX channels // ESP32S2 - 4 TX channels // ESP32C3 - 2 TX channels +// ESP32S3 - 4 TX channels // NRF52840 - 3 or 4 channels (some variants only have 3) enum NeoBusChannel @@ -28,12 +29,12 @@ enum NeoBusChannel NeoBusChannel_3, -#if !defined(CONFIG_IDF_TARGET_ESP32S2) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) NeoBusChannel_4, NeoBusChannel_5, NeoBusChannel_6, NeoBusChannel_7, -#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) +#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) #endif // !defined(CONFIG_IDF_TARGET_ESP32C3) diff --git a/src/internal/NeoEsp32I2sMethod.h b/src/internal/NeoEsp32I2sMethod.h index bd0cc162..a3b77ed8 100644 --- a/src/internal/NeoEsp32I2sMethod.h +++ b/src/internal/NeoEsp32I2sMethod.h @@ -26,8 +26,9 @@ License along with NeoPixel. If not, see #pragma once -// ESP32C3 I2S is not supported yet due to significant changes to interface -#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3) +// ESP32 C3 & S3 I2S is not supported yet due to significant changes to interface +#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) + extern "C" { @@ -300,7 +301,7 @@ typedef NeoEsp32I2sMethodBase NeoEsp32I2s0400KbpsInvertedMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s0Apa106InvertedMethod; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) // (I2S_NUM_MAX == 2) typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Ws2812xMethod; @@ -342,10 +343,10 @@ typedef NeoEsp32I2sMethodBase NeoEs typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3800KbpsMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3400KbpsMethod; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2811Method; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2812xMethod; @@ -725,7 +725,7 @@ typedef NeoEsp32RmtMethodBase NeoEs typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7800KbpsMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7400KbpsMethod; -#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) +#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) #endif // !defined(CONFIG_IDF_TARGET_ESP32C3) // inverted @@ -786,7 +786,7 @@ typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3800KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3400KbpsInvertedMethod; -#if !defined(CONFIG_IDF_TARGET_ESP32S2) +#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2811InvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2812xInvertedMethod; @@ -832,17 +832,17 @@ typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7800KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7400KbpsInvertedMethod; -#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) +#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32S3) #endif // !defined(CONFIG_IDF_TARGET_ESP32C3) -#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) +#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) // Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT // will switch to use RMT as the default method // The ESP32S2 & ESP32C3 will always defualt to RMT -#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) +#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) // RMT channel 1 method is the default method for Esp32S2 & Esp32C3 typedef NeoEsp32Rmt1Ws2812xMethod NeoWs2813Method; @@ -875,7 +875,7 @@ typedef NeoEsp32Rmt1Tx1812InvertedMethod NeoTx1812InvertedMethod; typedef NeoEsp32Rmt1Ws2812xInvertedMethod Neo800KbpsInvertedMethod; typedef NeoEsp32Rmt1400KbpsInvertedMethod Neo400KbpsInvertedMethod; -#else // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) +#else // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) // RMT channel 6 method is the default method for Esp32 typedef NeoEsp32Rmt6Ws2812xMethod NeoWs2813Method;