-
Notifications
You must be signed in to change notification settings - Fork 38
/
hal_ll_rtc.c
284 lines (256 loc) · 9.44 KB
/
hal_ll_rtc.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
/****************************************************************************
**
** Copyright (C) ${COPYRIGHT_YEAR} MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** This file is part of the mikroSDK package
**
** Commercial License Usage
**
** Licensees holding valid commercial NECTO compilers AI licenses may use this
** file in accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and The MikroElektronika Company.
** For licensing terms and conditions see
** https://www.mikroe.com/legal/software-license-agreement.
** For further information use the contact form at
** https://www.mikroe.com/contact.
**
**
** GNU Lesser General Public License Usage
**
** Alternatively, this file may be used for
** non-commercial projects under the terms of the GNU Lesser
** General Public License version 3 as published by the Free Software
** Foundation: https://www.gnu.org/licenses/lgpl-3.0.html.
**
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** OF MERCHANTABILITY, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
** TO THE WARRANTIES FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
** OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**
****************************************************************************/
/*!
* @file hal_ll_rtc.c
* @brief RTC HAL LOW LEVEL layer implementation.
*/
#include "hal_ll_rtc.h"
#include "delays.h"
// ---------------------------------------------------------------- PRIVATE MACROS
#define HOUR_TENS_MASK 0x00300000
#define HOUR_UNITS_MASK 0x000F0000
#define MIN_TENS_MASK 0x00007000
#define MIN_UNITS_MASK 0x00000F00
#define SEC_TENS_MASK 0x00000070
#define SEC_UNITS_MASK 0x0000000F
#define RTCAPBEN_BIT 16
#define DBP_BIT 8
#define RTCSEL_BIT 9
#define LSION_BIT 0
#define LSIRDY_BIT 1
#define INITF_BIT 6
#define INIT_BIT 7
#define FMT_BIT 6
#define RTCEN_BIT 15
#define SOFTWARE_RESET_KEY 0xCCCC
#define CLEAR 0x00
#define FIRST_KEY 0xCA
#define SECOND_KEY 0x53
#define unlock_write_protection set_reg_bit( registers.pwr_cr1, DBP_BIT );\
while ( read_reg_bits( registers.pwr_cr1, DBP_BIT ) );\
write_reg( registers.rtc_wpr, CLEAR );\
write_reg( registers.rtc_wpr, FIRST_KEY );\
write_reg( registers.rtc_wpr, SECOND_KEY )
#define enter_init_mode set_reg_bit( registers.rtc_isr, INIT_BIT );\
while ( !check_reg_bit( registers.rtc_isr, INITF_BIT ) );
#define leave_init_mode clear_reg_bit( registers.rtc_isr, INIT_BIT );\
while ( check_reg_bit( registers.rtc_isr, INITF_BIT ) )
#define SET_TIME (((uint32_t)time->hour / 10) << 20) | (((uint32_t)time->hour % 10) << 16) | (((uint32_t)time->minute / 10) << 12) | (((uint32_t)time->minute % 10) << 8) | (((uint32_t)time->second / 10) << 4) | (uint32_t)time->second % 10
#define GET_HOUR (uint8_t)(((value & HOUR_TENS_MASK) >> 20) * 10 + ((value & HOUR_UNITS_MASK) >> 16))
#define GET_MINUTE (uint8_t)(((value & MIN_TENS_MASK) >> 12) * 10 + ((value & MIN_UNITS_MASK) >> 8))
#define GET_SECOND (uint8_t)(((value & SEC_TENS_MASK) >> 4) * 10 + (value & SEC_UNITS_MASK))
/**
* @brief Writes specified value to
* specified register.
*
* @param[in] reg - register address.
* @param[in] _val - Value to be written.
*/
#define write_reg(reg,_val) (selected_reg(reg) = (_val))
/**
* @brief Returns value stored
* in a register.
*
* @param[in] reg - register address.
*
* @return Register(reg) value.
*/
#define read_reg(reg) (selected_reg(reg))
/**
* @brief Returns value of specified bit
* mask from a register.
*
* @param[in] reg - register address
* @param[in] bit_mask - bit mask.
*
* @return Register(reg) bits value.
*/
#define read_reg_bits(reg,bit_mask) (selected_reg(reg) & (bit_mask))
// ----------------------------------------------------------------- PRIVATE TYPES
/*!< @brief RTC register structure. */
/**
* Return values
*/
typedef enum
{
HAL_LL_RTC_SUCCESS = 0,
HAL_LL_RTC_ERROR = (-1)
} hal_ll_rtc_err_t;
typedef struct
{
hal_ll_base_addr_t* rtc_wpr;
hal_ll_base_addr_t* rtc_isr;
hal_ll_base_addr_t* rtc_prer;
hal_ll_base_addr_t* rtc_tr;
hal_ll_base_addr_t* rtc_dr;
hal_ll_base_addr_t* rtc_cr;
hal_ll_base_addr_t* rtc_bkp0r;
hal_ll_base_addr_t* rcc_bdcr;
hal_ll_base_addr_t* pwr_cr1;
hal_ll_base_addr_t* wwdg_cr;
hal_ll_base_addr_t* rcc_csr;
hal_ll_base_addr_t* rcc_apb4enr;
hal_ll_base_addr_t* iwdg_kr;
} reg_t;
// -------------------------------------------------------------------- VARIABLES
/*!< @brief RTC registers info */
reg_t registers = { RTC_WPR_REG_ADDRESS, RTC_ISR_REG_ADDRESS, RTC_PRER_REG_ADDRESS, RTC_TR_REG_ADDRESS, RTC_DR_REG_ADDRESS, RTC_CR_REG_ADDRESS, RTC_BKP0R_REG_ADDRESS, RCC_BDCR_REG_ADDRESS, PWR_CR1_REG_ADDRESS, WWDG_CR_REG_ADDRESS, RCC_CSR_REG_ADDRESS, RCC_APB4ENR_REG_ADDRESS, IWDG_KR_REG_ADDRESS };
#ifdef __GNUC__
/**
* @brief Initialize the RTC counter.
* @details Set the date to 01/01/2000 at 00:00:00.
* @b Example
* @code
* // Initialize RTC.
* hal_ll_rtc_init();
* @endcode
*/
void __attribute__ ((weak)) hal_ll_rtc_init();
/**
* @brief Start the RTC module.
* @details Continue the RTC module count from the stored value in the counter register.
* @param None.
* @return The function can return one of the values defined by
* hal_ll_rtc_err_t structure, which is size dependant on the architecture.
*/
err_t __attribute__ ((weak)) hal_ll_rtc_start();
/**
* @brief Stop the RTC module.
* @details Stop the RTC module count.
* @param None.
* @return The function can return one of the values defined by
* hal_ll_rtc_err_t structure, which is size dependant on the architecture.
*/
err_t __attribute__ ((weak)) hal_ll_rtc_stop();
/**
* @brief Reset the RTC module.
* @details Reset the RTC counter to the default values of 0h:0m:0s.
* @param None.
* @return The function can return one of the values defined by
* hal_ll_rtc_err_t structure, which is size dependant on the architecture.
*/
err_t __attribute__ ((weak)) hal_ll_rtc_reset();
/**
* @brief Configure time of RTC module.
* @details Configure time registers with the values from hal_ll_rtc_time_t structure.
* @param time hal_ll_rtc_time_t structure.
* @return The function can return one of the values defined by
* hal_ll_rtc_err_t structure, which is size dependant on the architecture.
*/
err_t __attribute__ ((weak)) hal_ll_rtc_set_time( hal_ll_rtc_time_t *time );
/**
* @brief Get time and date.
* @details Configure hal_ll_rtc_time_t structure with the values from time registers.
* @param time hal_ll_rtc_time_t structure.
* @return The function can return one of the values defined by
* hal_ll_rtc_err_t structure, which is size dependant on the architecture.
*/
err_t __attribute__((weak)) hal_ll_rtc_get_time( hal_ll_rtc_time_t *rtc );
/**
* @brief Preforms system reset.
* @details Resets the core and all on-chip peripherals except the Debug
* interface.
* @param None.
* @warning System reset affects core and periferals,
* depending on the architecture you will need to reconfigure opened modules.
*/
void __attribute__ ((weak)) hal_ll_rtc_system_reset();
#endif
//------------------------------------------------ PUBLIC FUNCTION DEFINITIONS
void hal_ll_rtc_init() {
set_reg_bit( registers.rcc_apb4enr, RTCAPBEN_BIT);
unlock_write_protection;
set_reg_bit( registers.rcc_bdcr, RTCSEL_BIT );
set_reg_bit( registers.rcc_csr, LSION_BIT );
while ( !check_reg_bit( registers.rcc_csr, LSIRDY_BIT ) );
hal_ll_rtc_start();
enter_init_mode;
clear_reg_bit( registers.rtc_cr, FMT_BIT );
leave_init_mode;
hal_ll_rtc_stop();
}
err_t hal_ll_rtc_start() {
unlock_write_protection;
set_reg_bit( registers.rcc_bdcr, RTCEN_BIT );
if ( !check_reg_bit( registers.rcc_bdcr, RTCEN_BIT ) ) {
return HAL_LL_RTC_ERROR;
}
return HAL_LL_RTC_SUCCESS;
}
err_t hal_ll_rtc_stop() {
unlock_write_protection;
clear_reg_bit( registers.rcc_bdcr, RTCEN_BIT );
if ( check_reg_bit( registers.rcc_bdcr, RTCEN_BIT ) ) {
return HAL_LL_RTC_ERROR;
}
return HAL_LL_RTC_SUCCESS;
}
err_t hal_ll_rtc_reset() {
unlock_write_protection;
enter_init_mode;
Delay_100ms();
write_reg( registers.rtc_tr, 0);
Delay_100ms();
leave_init_mode;
return HAL_LL_RTC_SUCCESS;
}
err_t hal_ll_rtc_set_time( hal_ll_rtc_time_t *time ) {
uint32_t value;
hal_ll_rtc_start();
unlock_write_protection;
enter_init_mode;
value = SET_TIME;
Delay_100ms();
write_reg(registers.rtc_tr,value);
Delay_100ms();
leave_init_mode;
return HAL_LL_RTC_SUCCESS;
}
err_t hal_ll_rtc_get_time( hal_ll_rtc_time_t *time ) {
uint32_t value = read_reg( registers.rtc_tr );
time->second = GET_SECOND;
time->minute = GET_MINUTE;
time->hour = GET_HOUR;
return HAL_LL_RTC_SUCCESS;
}
void hal_ll_rtc_system_reset() {
unlock_write_protection;
write_reg( registers.iwdg_kr, SOFTWARE_RESET_KEY );
Delay_ms(1000);
}