Adapt 8051 language to better fit Silicon Labs CIP51

[gtackett]

I'm looking for help to extend Ghidra's support for the Intel MCS-51 (8051) processor family, to accommodate the Silicon Labs CIP51.

I'm hoping for some help because I'm just getting acquainted with both of these devices. I'm also not very strong on fiddling with Ghidra's processor language files.

Silicon Labs manufactures quite a number of microprocessors that use its CIP51 core. The CIP51 is instruction set-compatible with the original Intel MCS-51, while adding a lot of new functionality for memory and I/O.

Ghidra already provides the basic Intel 8051 and some derivatives of it.

But the CIP51 goes beyond Ghidra's already extant support for MCS-51 based processors:

• Larger (multiple banks of) program memory and data memory
• Additional peripherals and supporting SFRs (special function registers)
• Banked SFRs, lowest 16 bytes of each bank also bit-addressable
• Automatic interrupt-based SFR bank switching
• SFR Page Stack

Some similar features are already present, though the details differ, in Ghidra's existing support for MCS-51 processors.

Because of the identical ISA, Ghidra can of course do simple disassembly of CIP51 code.

This is also material for creating an issue asking for new functionality, but I will be better able to create one after I'm more familiar with the MCS-51/CIP51.