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lab8.map.smsg
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lab8.map.smsg
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Warning (10268): Verilog HDL information at player2.sv(123): always construct contains both blocking and non-blocking assignments File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/player2.sv Line: 123
Warning (10268): Verilog HDL information at player1.sv(68): always construct contains both blocking and non-blocking assignments File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/player1.sv Line: 68
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router_003.sv(48): object "DEFAULT_WR_CHANNEL" differs only in case from object "default_wr_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router_003.sv Line: 48
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router_003.sv(49): object "DEFAULT_RD_CHANNEL" differs only in case from object "default_rd_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router_003.sv Line: 49
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router_002.sv(48): object "DEFAULT_WR_CHANNEL" differs only in case from object "default_wr_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router_002.sv Line: 48
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router_002.sv(49): object "DEFAULT_RD_CHANNEL" differs only in case from object "default_rd_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router_002.sv Line: 49
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router_001.sv(48): object "DEFAULT_WR_CHANNEL" differs only in case from object "default_wr_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router_001.sv Line: 48
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router_001.sv(49): object "DEFAULT_RD_CHANNEL" differs only in case from object "default_rd_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router_001.sv Line: 49
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router.sv(48): object "DEFAULT_WR_CHANNEL" differs only in case from object "default_wr_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router.sv Line: 48
Info (10281): Verilog HDL Declaration information at nios_system_mm_interconnect_0_router.sv(49): object "DEFAULT_RD_CHANNEL" differs only in case from object "default_rd_channel" in the same scope File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/nios_system/synthesis/submodules/nios_system_mm_interconnect_0_router.sv Line: 49
Warning (10273): Verilog HDL warning at HexDriver.sv(23): extended using "x" or "z" File: C:/Users/noahb/Desktop/ECE385/ECE385DiveKick/HexDriver.sv Line: 23