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opensbi boot traped with a lot of sbi_trap_error #7

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fanghuaqi opened this issue Nov 2, 2022 · 0 comments
Open

opensbi boot traped with a lot of sbi_trap_error #7

fanghuaqi opened this issue Nov 2, 2022 · 0 comments
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documentation Improvements or additions to documentation

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Issue Description and Solution

As image below described:

099f64a0-5dc2-4bfc-b43b-518eed8c9f73

You can see mcause = 0x7, mtval = 0x08000000

mcause check riscv privilege manual is Store/AMO access fault,
image

mtval means whether the store access fault happened, which is 0x08000000, it is the previous Nuclei DemoSoC using cpu without iregion feature(iregion feature reallocate plic/timer base address).

  • nuclei cpu in demosoc without iregion: plic0: interrupt-controller@8000000
  • nuclei cpu in evalsoc with iregion: plic0: interrupt-controller@1c000000

See https://github.com/Nuclei-Software/nuclei-linux-sdk#modify-build-configuration about evalsoc/demosoc.

So the answer is change the SOC from demosoc to evalsoc.

For example, you want to test ux900fd, then build with the following command.

make SOC=evalsoc CORE=ux900fd freeloader
make SOC=evalsoc CORE=ux900fd bootimages

Known issues

currently evalsoc can't run in qemu, if you really want to run in qemu, please change the evalsoc dts you are using like this.

Caused by plic/timer base address changed.

If you changed this, opensbi will not run on your hardware, please remember change it back.

index b04d0a2..947d56c 100644
--- a/conf/evalsoc/nuclei_rv64imafdc.dts
+++ b/conf/evalsoc/nuclei_rv64imafdc.dts
@@ -171,7 +171,7 @@
     clock-output-names = "hfclk";
   };

-  plic0: interrupt-controller@1c000000 {
+  plic0: interrupt-controller@8000000 {
     #interrupt-cells = <1>;
     compatible = "riscv,plic0";
     interrupt-controller;
@@ -185,13 +185,13 @@
            &cpu5_intc 11 &cpu5_intc 9
            &cpu6_intc 11 &cpu6_intc 9
            &cpu7_intc 11 &cpu7_intc 9>;
-    reg = <0x0 0x1c000000 0x0 0x4000000>;
+    reg = <0x0 0x8000000 0x0 0x4000000>;
   };

-  clint0: clint@18031000 {
+  clint0: clint@2001000 {
     #interrupt-cells = <1>;
     compatible = "riscv,clint0";
-    reg = <0x0 0x18031000 0x0 0xC000>;
+    reg = <0x0 0x2001000 0x0 0xC000>;
     interrupts-extended =
           <&cpu0_intc 3 &cpu0_intc 7
            &cpu1_intc 3 &cpu1_intc 7
@fanghuaqi fanghuaqi added the documentation Improvements or additions to documentation label Nov 2, 2022
@fanghuaqi fanghuaqi self-assigned this Nov 2, 2022
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