openocd_gd32vf103.cfg

adapter speed     5000
reset_config    srst_only
adapter srst pulse_width 100

adapter driver ftdi
ftdi vid_pid 0x0403 0x6010

## bindto 0.0.0.0 can be used to cover all available interfaces.
## Uncomment bindto line to enable remote machine debug
# bindto 0.0.0.0

## If ftdi device_desc not specified, the device description is ignored during device selection.
## So if you want to specify a dedicated FTDI device, you can select following device description:
## "Dual RS232-HS" is for Nuclei HummingBird Debugger V1
## "USB <-> JTAG-DEBUGGER" is for Nuclei HummingBird Debugger V2
## Uncomment one which match your device description
# ftdi device_desc "Dual RS232-HS"
# ftdi device_desc "USB <-> JTAG-DEBUGGER"
# you can also specify adapter serial to select a ftdi chip
# adapter serial "FT6S9RD6"

# Bind JTAG with specified serial number passed by JTAGSN
if { [ info exists JTAGSN ] } {
    puts "Bind JTAG with serial number $JTAGSN"
    adapter serial $JTAGSN
}

ftdi layout_init 0x0008 0x001b
ftdi layout_signal nSRST -oe 0x0020 -data 0x0020
# These signals are used for cJTAG escape sequence on initialization only
ftdi layout_signal TCK -data 0x0001
ftdi layout_signal TDI -data 0x0002
ftdi layout_signal TDO -input 0x0004
ftdi layout_signal TMS -data 0x0008
ftdi layout_signal JTAG_SEL -data 0x0100 -oe 0x0100
transport select jtag

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5

# Work-area is a space in RAM used for flash programming
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x5000
}

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

set _FLASHNAME $_CHIPNAME.flash

# DEPRECATED: The gd32vf103 flash target will be removed in June of 2023, please use stm32f1x instead
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME

# Expose Nuclei self-defined CSRS range
# See https://github.com/riscv/riscv-gnu-toolchain/issues/319#issuecomment-358397306
# Then user can view the csr register value in gdb using: info reg csr775 for CSR MTVT(0x307)
# no need to expose since Nuclei OpenOCD 2022
#riscv expose_csrs 770-800,835-850,1984-2032,2064-2070

riscv set_reset_timeout_sec 1

init

halt

flash protect 0 0 last off

arm semihosting enable