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Rk322x adds PSCI version, features and system suspend #1720

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merged 4 commits into from
Aug 21, 2017

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TonyXie06
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RK322X adds PSCI version, features and system suspend implementations.
PSCI version and features must be implemented, because Linux Kernel will check whether optee supports PSCI system suspend or not by getting status from PSCI version and features.

Signed-off-by: Joseph Chen chenjh@rock-chips.com

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Please find some minor comments on the "system suspend" patch. The other ones LGTM.
@etienne-lms any comment?

* you needs set the write-mask bits at the same time, the write-mask bits is
* in high 16-bits.
* The fllowing macro definition helps access write-mask bits reg efficient.
******************************************************************************/
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  • No ********* please (open comment block with /* and close with */)
  • Spelling

#define BITS_SHIFT(bits, shift) SHIFT_U32(bits, shift)
#define BITS_WMSK(msk, shift) SHIFT_U32(msk, (shift) + REG_MSK_SHIFT)
#define BITS_WITH_WMASK(bits, msk, shift)\
(BITS_SHIFT(bits, shift) | BITS_SHIFT(msk, ((shift) + REG_MSK_SHIFT)))
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This can be rewritten in a simpler way:

#define BITS_WMSK(msk, shift) SHIFT_U32(msk, (shift) + 16)
#define BITS_WITH_WMASK(bits, msk, shift) \
	(SHIFT_U32(bits, shift) | BITS_WMSK(msk, shift))

0x000f,
};

static void clks_gating(void)
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It's usually preferred to use a verb for functions that perform some action, what about clks_disable(void)?

@MrVan
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MrVan commented Jul 28, 2017

@TonyXie06 I just have a common question. rx322x is armv7 based soc, and you enabled CONFIG_ARM_PSCI_FW and suspend/low power idle are all moved to psci firmware, then in linux side, only need to smc trap to psci firmware and no touch clock and cpu_pm_cluster_entry/exit and else, right?

@TonyXie06
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@MrVan On armv7 based soc, we don't move cpuidle to psci firmware, only cpu on/off and system supend are moved. Cpuidle is still left in linux side, it will not trap into secure world by cpu_suspend().

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MrVan commented Jul 31, 2017

@TonyXie06 ok, then you platform do not support cpu off when low power cpu idle.

@TonyXie06
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Hi, @jforissier any comments ?

@jforissier
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Hi @TonyXie06,

Thanks for the updates. You may add my:

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

...to all patches, and I think we're good to have this merged.

@TonyXie06 TonyXie06 force-pushed the rk322x-system-suspend branch 2 times, most recently from 1cae9c0 to 4820eba Compare August 9, 2017 13:21
@TonyXie06
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tags applied

@etienne-lms
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Look fine to me regarding the generic psci layer.
Crosscheck comment about timeout handling in platform specifc code.
Sorry for such late comments.

@jforissier
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@etienne-lms did you post a comment? I can't see it...

loop++;
}

assert(read32(va_base + CRU_PLL_CON1(pll)) & PLL_LOCK);
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assert or panic ?

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You prefer panic ? Approved, because assert doesn't work if NDEBUG is defined.

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Sorry, here it is. It was still pending upon an opened review.

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Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
with minor comments addressed or not.

* Some register has write-mask bits, it means if you want to set the bits,
* you need set the write-mask bits at the same time, the write-mask bits is
* in high 16-bits. The following macro definition helps you access register
* efficient.
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minor: enficiently ?


int psci_features(uint32_t psci_fid)
{
if ((psci_fid == PSCI_PSCI_FEATURES) ||
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very minor: a switch(psci_fid) looks better.

Add __weak property for the function, developers
could have their own implementation.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Improve PSCI version to PSCI_VERSION_1_0.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Add currently implemented PSCI functions.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
@TonyXie06
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  1. update with etienne-lms' minor comments addressed.
  2. fixup commits;
  3. apply tags for all commits: Acked-by: Etienne Carriere etienne.carriere@linaro.org

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some late re-review

#define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT)
#define BIT_WITH_WMSK(nr) (BIT(nr) | WMSK_BIT(nr))
#define BITS_WMSK(msk, shift) SHIFT_U32(msk, (shift) + REG_MSK_SHIFT)
#define BITS_WITH_WMASK(bits, msk, shift)\
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minor: a space or tab before the \.


static struct dram_data dram_d;

static uint32_t clks_gating_table[CRU_CLKGATE_CON_CNT] = {
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const

Support gating clks and power down PLLs.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
@TonyXie06
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fix 2 minors that you commented.

@TonyXie06
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Any comments?

@jforissier
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@TonyXie06 sorry, somehow I was thinking we were waiting for @etienne-lms's Ack but I realize all is good. So I'm merging this PR. Thanks!

@jforissier jforissier merged commit 110da4b into OP-TEE:master Aug 21, 2017
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5 participants