From 5ade8282cb2486bbc8b3a1a8b3fb20fa187345c7 Mon Sep 17 00:00:00 2001 From: Bill Mills Date: Tue, 24 Oct 2023 12:10:33 -0400 Subject: [PATCH] zephyr: fixup kv260_r5 DT memory until it can be fixed in Zephyr We are currently using Zephyr v3.5.0. The memory definitions for kv260_r5 are inappropriate for general usage and for ours. (This is partially our doing so not throwing stones.) The current flash definition refers to the QSPI XIP area of the zynqmp. This is unlikely to be appropriate to use in the general case. The current usage also assumes use at offset 0 in the QSPI which is even less likely to be appropriate. It is OK zynqmp_r5 to define this (perhaps with the name of qspi-xip) but it should not be selected as the default for flash. Let people that needs this opt into it. For now we disable the zephyr,flash choice. This does not eliminate the memory report line but it at least shows a region size of 0. Likewise for the definition of RAM. Zynqmp_r5 defines 64MB of RAM starting at offset 0. This would be a mix of TCM and DDR depending on the R5 mode split vs lockstep mode. In lockstep, DDR would be used for anything >=256K. For split mode, DDR would be used for 64K to 128K-1 and for >=192K. Using DDR like this is dangerous if another OS is running on the A53s. Linux for example does not reserve this early DDR memory for use by the the R5(s). For now assume lockstep (only mode supported by Zephyr v3.5.0) and provide a new memory definition for combined TCM and use it for RAM. Put all these overrides in an include file so they are easy to undo when Zephyr upstream is fixed. We are using qemu_cortex_r5 as stand-in for zcu102_r5 for right now so do the same for that board. However once we have zcu102_r5 we should leave qemu_cortex_r5 alone as its purpose is a generic R5 target not a full zynqmp system. Signed-off-by: Bill Mills --- .../boards/kv260_r5.overlay | 2 ++ .../boards/qemu_cortex_r5.overlay | 2 ++ .../boards/zynqmp_r5_override.dtsi | 26 +++++++++++++++++++ 3 files changed, 30 insertions(+) create mode 100644 examples/zephyr/rpmsg_multi_services/boards/zynqmp_r5_override.dtsi diff --git a/examples/zephyr/rpmsg_multi_services/boards/kv260_r5.overlay b/examples/zephyr/rpmsg_multi_services/boards/kv260_r5.overlay index 0766a73..fee78c0 100644 --- a/examples/zephyr/rpmsg_multi_services/boards/kv260_r5.overlay +++ b/examples/zephyr/rpmsg_multi_services/boards/kv260_r5.overlay @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include "zynqmp_r5_override.dtsi" + / { model = "KV260 Cortex-R5"; compatible = "xlnx,zynqmp-r5"; diff --git a/examples/zephyr/rpmsg_multi_services/boards/qemu_cortex_r5.overlay b/examples/zephyr/rpmsg_multi_services/boards/qemu_cortex_r5.overlay index 3ec2acb..4707041 100644 --- a/examples/zephyr/rpmsg_multi_services/boards/qemu_cortex_r5.overlay +++ b/examples/zephyr/rpmsg_multi_services/boards/qemu_cortex_r5.overlay @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include "zynqmp_r5_override.dtsi" + / { model = "QEMU Cortex-R5"; compatible = "xlnx,zynqmp-qemu"; diff --git a/examples/zephyr/rpmsg_multi_services/boards/zynqmp_r5_override.dtsi b/examples/zephyr/rpmsg_multi_services/boards/zynqmp_r5_override.dtsi new file mode 100644 index 0000000..b1b5a92 --- /dev/null +++ b/examples/zephyr/rpmsg_multi_services/boards/zynqmp_r5_override.dtsi @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2023 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* This file should do away once Zephyr has been adjusted for better memory + * configuration for zynqmp_r5 + */ + +/ { + chosen { + /* override zephyr for now until definitions can be fixed upstream */ + zephyr,sram = &tcm_lockstep; + + /* flash0 is QSPI XIP at offset 0 and is unlikely to be appropriate */ + /delete-property/ zephyr,flash; + }; + + soc { + tcm_lockstep: memory@0 { + compatible = "mmio-sram"; + reg = <0 DT_SIZE_K(256)>; + }; + }; +};