QASM exporter error with CSwapGate and DCXGate: Cannot find gate definition for 'unitary...'

[MattePalte]

Environment

• Qiskit Terra version: 0.19.1
• Python version: 3.8
• Operating system: Ubuntu 18.04.6 LTS

What is happening?

The QASM exporter fails to export a valid qasm missing to include a unitary, probably due to an inverse addition.

How can we reproduce the issue?

Run:

from qiskit import QuantumCircuit, ClassicalRegister, QuantumRegister
from qiskit.circuit.library.standard_gates import *
from qiskit import transpile
qr = QuantumRegister(3, name='qr')
cr = ClassicalRegister(3, name='cr')
qc = QuantumCircuit(qr, cr, name='qc')
subcircuit = QuantumCircuit(qr, name='subcircuit')
subcircuit.append(CSwapGate(), qargs=[qr[1], qr[0], qr[2]])
subcircuit.append(DCXGate(), qargs=[qr[0], qr[1]])
qc.append(subcircuit, qargs=qr)
qc.append(subcircuit.inverse(), qargs=qr)
qc.measure(qr, cr)
qc = transpile(qc, optimization_level=3)
qc.qasm(formatted=True)

Output:

OPENQASM 2.0;
include "qelib1.inc";
gate unitary140323758184192 p0,p1 {
	u3(pi/2,pi/2,-pi/2) p0;
	u3(pi/2,0,3*pi/4) p1;
	cx p0,p1;
	u3(pi/2,-pi/2,pi/2) p0;
	u3(pi/4,pi/4,-pi/2) p1;
}
gate dcx q0,q1 { cx q0,q1; cx q1,q0; }
gate dcx_dg q0,q1 { cx q1,q0; cx q0,q1; }
qreg qr[3];
creg cr[3];
unitary140323758184192 qr[0],qr[2];
cx qr[1],qr[2];
t qr[2];
cx qr[0],qr[2];
t qr[0];
tdg qr[2];
cx qr[1],qr[2];
cx qr[1],qr[0];
tdg qr[0];
t qr[1];
cx qr[1],qr[0];
t qr[2];
h qr[2];
cx qr[2],qr[0];
dcx qr[0],qr[1];
dcx_dg qr[0],qr[1];
unitary140323758240288 qr[0],qr[2];
cx qr[1],qr[2];
t qr[2];
cx qr[0],qr[2];
t qr[0];
tdg qr[2];
cx qr[1],qr[2];
cx qr[1],qr[0];
tdg qr[0];
t qr[1];
cx qr[1],qr[0];
t qr[2];
h qr[2];
cx qr[2],qr[0];
measure qr[0] -> cr[0];
measure qr[1] -> cr[1];
measure qr[2] -> cr[2];

Read the qasm back:

qc = QuantumCircuit.from_qasm_str(qc.qasm())

Output error:

"Cannot find gate definition for 'unitary140133520280496', line 30 file "

What should happen?

The exported qasm should be valid without undefined unitaries.

Any suggestions?

An interesting fact is that all these features of the program concur to the error, because removing any of them result in a valid program:

• optimization level 3
• the CSwapGate
• the DCXGate
• the addition of the subcircuit
• the addition of its inverse

Looking forward to listening to your feedback. Thanks in advance

[deeksha-singh030]

I would like to work on this issue. Can you please assign me this issue?