forked from llvm-mirror/llvm
-
Notifications
You must be signed in to change notification settings - Fork 0
Home
zzmatu edited this page Mar 14, 2017
·
26 revisions
- ctors/dtors (or initializers specified by attributes) do not work.
- C++ exceptions do not work. The patch disables generation of CFI (Call Frame Information), because the assembler (of FX10) does not accept pseudo-instructions of CFI.
- Floating-point comparisons by FCMP (generating a result in registers) do not properly generate results on orderedness.
- Make all LNT tests pass (except for ctors/dtors and exceptions).
- Code cost model.
- Code reciprocals.
- Code 4-SIMD instructions.
- Code masked stores (STFR, STDFR).
- Code element swap of SIMD FMA.
- Code integer SIMD instructions.
- Make the original SPARC V9 work by removing conflicts with the modifications.
report.simple.txt as of 2017-03-09. The text is very wide. "*" means failures with "CC" column is for compilation, "Exec" column is for execution.
Fujitsu HPC Platform Documents (English pages are missing):
Specification Documents of Fujitsu SPARC64 HPC-ACE Extensions
- SPARC64 VIIIfx Extensions (HPC-ACE used in K Computer)
- SPARC64 IVfx Extensions (HPC-ACE used in FX10)
- SPARC64 XIfx Extensions (in Japanese) (HPC-ACE2 used in FX100)