diff --git a/cpu/stm32_common/can/candev_stm32.c b/cpu/stm32_common/can/candev_stm32.c index b1f9564debdd..01c67b1bc009 100644 --- a/cpu/stm32_common/can/candev_stm32.c +++ b/cpu/stm32_common/can/candev_stm32.c @@ -171,6 +171,9 @@ int candev_stm32_init(candev_stm32_t *dev, const candev_stm32_conf_t *conf) memcpy(&dev->candev.bittiming, &timing, sizeof(timing)); dev->conf = conf; + dev->rx_pin = GPIO_UNDEF; + dev->tx_pin = GPIO_UNDEF; + return 0; } @@ -224,6 +227,26 @@ static inline void unset_filter(CAN_TypeDef *can, uint8_t filter) can->FA1R &= ~(1 << filter); } +void candev_stm32_set_pins(candev_stm32_t *dev, gpio_t tx_pin, gpio_t rx_pin, + gpio_af_t af) +{ + if (dev->tx_pin != GPIO_UNDEF) { + gpio_init(dev->tx_pin, GPIO_OUT); + } + if (dev->rx_pin != GPIO_UNDEF) { + gpio_init(dev->rx_pin, GPIO_OUT); + } + dev->tx_pin = tx_pin; + dev->rx_pin = rx_pin; + dev->af = af; + /* configure pins */ + gpio_init(rx_pin, GPIO_IN); + gpio_init(tx_pin, GPIO_OUT); + /* TODO: fix gpio init on STM32F3 */ + gpio_init_af(rx_pin, af); + gpio_init_af(tx_pin, af); +} + static int _init(candev_t *candev) { candev_stm32_t *dev = (candev_stm32_t *)candev; @@ -245,11 +268,7 @@ static int _init(candev_t *candev) RCC->APB1ENR |= dev->conf->rcc_mask; /* configure pins */ - gpio_init(dev->conf->rx_pin, GPIO_IN); - gpio_init(dev->conf->tx_pin, GPIO_OUT); - /* TODO: fix gpio init on STM32F3 */ - gpio_init_af(dev->conf->rx_pin, dev->conf->af); - gpio_init_af(dev->conf->tx_pin, dev->conf->af); + candev_stm32_set_pins(dev, dev->conf->tx_pin, dev->conf->rx_pin, dev->conf->af); set_mode(dev->conf->can, MODE_INIT); diff --git a/cpu/stm32_common/include/candev_stm32.h b/cpu/stm32_common/include/candev_stm32.h index 424ee6c87421..a1b27de572da 100644 --- a/cpu/stm32_common/include/candev_stm32.h +++ b/cpu/stm32_common/include/candev_stm32.h @@ -134,6 +134,9 @@ typedef struct candev_stm32_isr { struct candev_stm32 { candev_t candev; /**< Common candev struct */ const candev_stm32_conf_t *conf; /**< Configuration */ + gpio_t rx_pin; /**< RX pin */ + gpio_t tx_pin; /**< TX pin */ + gpio_af_t af; /**< Alternate pin function to use */ /** Tx mailboxes */ const struct can_frame *tx_mailbox[CAN_STM32_TX_MAILBOXES]; candev_stm32_rx_fifo_t rx_fifo; /**< Rx FIFOs */ @@ -150,6 +153,18 @@ struct candev_stm32 { */ int candev_stm32_init(candev_stm32_t *dev, const candev_stm32_conf_t *conf); +/** + * @brief Set the pins of an stm32 CAN device + * + * @param[in] dev + * @param[in] tx_pin + * @param[in] rx_pin + * @param[in] tx_af + * @param[in] rx_af + */ +void candev_stm32_set_pins(candev_stm32_t *dev, gpio_t tx_pin, gpio_t rx_pin, + gpio_af_t af); + #ifdef __cplusplus } #endif