with ReLMLoader( *release, dump=True, loader=False, release_loader=False ):
- *release
Folder path to create the memory image files (code??.txt, data??.txt).
__file__: Create it in the same folder as the Python code. - dump=Tree
False: Suppress dump output. - loader=False
SVF file path: Configure FPGA by SVF file and send program code to the FPGA via JTAG.
True: Send program code to the FPGA via JTAG.
False: Create the memory image files. - release_loader=False
True: Include the program loader in the memory image.
- definition block
Define[ body ] - thread block
Thread[ body ] - loader block
Loader[ body ] - block object
block := Block[ body ]
- signed integer definition
var := Int()
var := Int( expr ) - unsigned integer definition
var := UInt()
var := UInt( expr ) - assignment
var( expr )
- if-then
If( cond )[ body ] - if-then-else
If( cond )[ body ].Else[ body ]
- loop
Do()[ body ] - do-while
Do()[ body ].While( cond ) - while
While( cond )[ body ] - continue
Continue() - break
Break()
- function returns value
func := Function(p1 := Int(), p2 := Int(), ...)[ body ].Return( expr ) - void function
func := Function(p1 := Int(), p2 := Int(), ...)[ body ] - return value
Return( expr ) - return
Return() - function call
func(p1, p2, ...) -> expr
- definition
table := Table( size ) - register case
table.Case( index, ... ) - register default
table.Default() - return from case
table.Return() - switch to case
table.Switch( expr, acc ) -> expr
- allocation
fifo := FIFO.Alloc( size=0 ) - empty check
fifo.IsEmpty() -> cond - pop
fifo.Pop() -> expr - push
fifo.Push( expr, ... ) - lock (no empty check after this)
fifo.Lock()
- definition
array := Array( *data, op="PUSH" ) - read
array[ expr ] -> expr - write
array[ expr ]( expr )
- allocation
sub := sram.Alloc( size ) - read
sram[ expr ] -> expr - write
sram[ expr ]( expr, ... )
Array
- Allocated on code memory
- Consume code memory
- Thread safe
- Random access reading is slow
- Can be used for burst I/O transfer
SRAM
- I/O accessible memory device
- Not consume code memory
- Not thread safe
- Random access reading is fast
- Sequential writing is available
- Can be used for initialization
- But consume code memory
- get accumulator
Acc
AccU - set accumulator
Acc( expr )
AccU( expr ) - get register B
RegB
RegBU - set register B
RegB( expr, acc=0 )
RegBU( expr, acc=0 )