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config.yml
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config.yml
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CordicHDL:
url: https://github.com/qarlosalberto/cordicHDL.git
folder: cordicHDL/src
vhdl_symbol: "!"
verilog_symbol: "!"
oh:
url: https://github.com/aolofsson/oh.git
folder: oh
vhdl_symbol: ""
verilog_symbol: ""
verilog-axi:
url: https://github.com/alexforencich/verilog-axi.git
folder: verilog-axi/rtl
vhdl_symbol: ""
verilog_symbol: ""
SURF:
url: https://github.com/slaclab/surf
folder: surf/
vhdl_symbol: ""
verilog_symbol: ""
OscillatorIMP:
url: https://github.com/oscimp/fpga_ip.git
folder: fpga_ip/
vhdl_symbol: ""
verilog_symbol: ""
SERV:
url: https://github.com/olofk/serv
folder: serv/rtl/
vhdl_symbol: ""
verilog_symbol: ""
analig-devices-hdl:
url: https://github.com/analogdevicesinc/hdl.git
folder: hdl/library/
vhdl_symbol: ""
verilog_symbol: ""
zx128-MiSTer:
url: https://github.com/Kyp069/zx128-MiSTer.git
folder: zx128-MiSTer/rtl/
vhdl_symbol: ""
verilog_symbol: ""
OpenWifi:
url: https://github.com/open-sdr/openwifi-hw.git
folder: openwifi-hw/ip
vhdl_symbol: ""
verilog_symbol: ""
NEORV32:
url: https://github.com/stnolting/neorv32.git
folder: neorv32/rtl
vhdl_symbol: ""
verilog_symbol: ""
Verilog-ethernet:
url: https://github.com/alexforencich/verilog-ethernet.git
folder: verilog-ethernet/rtl
vhdl_symbol: ""
verilog_symbol: ""
VUnit:
url: https://github.com/VUnit/vunit.git
folder: vunit/
vhdl_symbol: ""
verilog_symbol: ""
opentitan:
url: https://github.com/lowRISC/opentitan.git
folder: opentitan/hw/ip
vhdl_symbol: ""
verilog_symbol: ""
Microwatt:
url: https://github.com/antonblanchard/microwatt.git
folder: microwatt/fpga
vhdl_symbol: ""
verilog_symbol: ""
PULP:
url: https://github.com/pulp-platform/pulp.git
folder: pulp/rtl/pulp
vhdl_symbol: ""
verilog_symbol: ""
PoC-Library:
url: https://github.com/VLSI-EDA/PoC.git
folder: PoC/src
vhdl_symbol: ""
verilog_symbol: ""
UVVM:
url: https://github.com/UVVM/UVVM.git
folder: UVVM/
vhdl_symbol: ""
verilog_symbol: ""
OSVVM:
url: https://github.com/OSVVM/OSVVM.git
folder: OSVVM/
vhdl_symbol: ""
verilog_symbol: ""
htfft:
url: https://github.com/benreynwar/htfft.git
folder: htfft/htfft
vhdl_symbol: ""
verilog_symbol: ""