09_02_06_00

New in this Release

Description	Notes
Support for new device J722S/AM67A
Support for vision transformer models (Deit, Swin, DETR) Added/optimized new operators : Matmul, broadcasted (matmul, eltwise), 2D softmax, Layernorm, Patch embedding, Patch Merging, GeLU, SiLU	TDA4VM has limited validation, refer TIDL-3867
Support for ConvNext and YoloV8 model architecture Added/optimized new operators : Object detection layer for YoloV8	TDA4VM has limited validation for matmul with variable input, refer TIDL-3867
Improved robustness for low latency inference mode (advanced_options:inference_mode = TIDL_infereneModeLowLatency)	Only applicable for AM69A/J784S4
Support for non-linear activation functions ( Tanh, Sigmoid, Softmax, GELU, ELU, SiLU ) for AM62A and J722S	Other devices already have in previous release(s)
Optimization of scatterND sum operator
Migration TFLite-RT version 2.12

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Fixed in this Release

ID	Description	Affected Platforms
TIDL-2950	7x7 Depthwise separable convolution with number of groups greater than panelWidth / kernel rows , results in wrong output on EVM/Target	All except AM62, TDA4VM
TIDL-3873	Transpose behavior for different combinations is not stable	All except AM62
TIDL-3874	Matmul operator has issues with (A) With variable/activations as inputs (B) different dimensions	All except AM62
TIDL-3833	Model inference gets stuck in conv layer on target/EVM, works on host emulation with below warning during init stage of inference : WARNING: srcJoint freq greater than mapping buffer space. Might cause overflow!	All except TDA4VM, AM62
TIDL-3831	Max Pool with asymmetric stride on target/EVM has functional mismatch with host emulation, target behavior is incorrect	All except AM62
TIDL-3812	TVM_DLR : Models with two dimensional softmax have functional issue	All except AM62
TIDL-3773	Layers with multiple consumers running in asymmetric quantization gives wrong output if any of the consumers do not support assyemtric quantization	All except AM62, TDA4VM
TIDL-3747	Resize layer with "coordinate_transformation_mode": "align_corners" not supported in TIDL	All except AM62
TIDL-3714	Protobuf version is not in sync with what is required for model compilation	All except AM62
TIDL-3679	Model compilation fails with quantization_scale_type:4 and tensor_bits:16-bit	All except AM62
TIDL-3659	Concat Layer Along Height/Width giving wrong output on target when number of input channels is one	All except AM62
TIDL-3648	Concat layer gives wrong output on target/evm with following message : "WorkloadUnit_XfrLinkInit: Error: Out of channel:"	All except AM62
TIDL-3641	Low latency inference mode (inference mode = 2) has undergone limited functional validation	AM69A ( J784S4)
TIDL-3010	Data convert layer that does the layout change (from NHWC to NCHW) hangs on the target/EVM when the shape of the input tensor to the data convert is of the form 1x1x1xN	All except AM62
TIDL-2878	Object detection post processing results in crash if all convolution heads are not part of same subgraph	All except AM62
TIDL-2821	Non depthwise separable convolution layers with input pad = 0 and running in 16-bit hangs on EVM	All except AM62
TIDL-1878	Custom layer with float output is resulting into error during compilation	All except AM62

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Known Issues

ID	Description	Affected Platforms	Occurrence	Workaround in this release
TIDL-3863	Networks with 7x7 depth wise separable layers and very large number of layers results in compilation failure. Refer error message “Memory limit exceeded for Workload Creation. Max number of Workload Limit per core is” during compilation stage	All except AM62	Very Rare	Modify the network to avoid 7x7 DWS layers
TIDL-3866	Vision transformers with layerNorm operator with 16-bit data type can have bit mismatch b/w “Host emulation” vs “target/EVM”. This bit mismatch (1-bit delta) is harmless in correct functional behavior and can be ignored	All except AM62	Frequent	None
TIDL-3867	Vision Transformer and Matmul with variable input feature has undergone limited validation on TDA4VM/J721E	TDA4VM/J721E	Frequent	None...

09_01_07_00

This pre-release addresses the following issues:

1. [TIDL-3829] Clip operator sets incorrect output data types when merged into previous layers
2. [TIDL-3831] Pooling with asymmetric stride might result in functional issues on EVM

09_01_06_00

This pre-release addresses the following issues:

1. [TIDL-3756] Model compilation of ONNX-QDQ format has incorrect parsing of zero points and incorrect handling of the Mul operator
2. [TIDL-3811] Model compilation of ONNX-opset18 has incorrect parsing of layer attributes and inputs for resize operator
3. [TIDL-3781] Model compilation of ONNX-opset18 has incorrect parsing of layer attributes and inputs for slice operator
4. [TIDL-3823] Model Compilation results in a crash when output names are larger than 256 characters
5. [TIDL-3821] Model inference on target misbehaves with models having deconvolution layer of property output pad != upscale_factor * input pad
6. [TIDL-3822] Model inference on target misbehaves when inputs of Concat operator have different pad in column (vertical) direction
7. [TIDL-3824] Model compilation with TIDL_TOOLS_TYPE=GPU has issues for batchnorm and pad operators
8. [TIDL-3825] Model compilation/inference has incorrect behavior of MatMul layer producing tensors with only one dimension being higher than 1
9. [TIDL-3908] Model compilation of Reshape-Transpose-Reshape combinations might get accidentally fused to a flatten layer

09_01_04_00

[OpenAcc] Added support for tools built with OpenACC Acceleration

09_01_03_00

[TOOLS] Updated to point to the latest set of tidl-tools (09.01.03.00) with bug fixes for model compilation

09_01_01_01

[TOOLS] Updated to point to the latest set of tidl-tools (09.01.01.01) with bug fixes

09_01_00_05

Added a vision transformer example

09_01_00_02

[Documentation] Updated documentation for transformers

09_01_00_01

[VERSION TABLE]Updated version compatiblity table for SDK 9.1

09_01_00_00: dockers: targetfs_load: Update OSRT links for 9.1

Signed-off-by: Abhay Chirania <a-chirania@ti.com>