-
Notifications
You must be signed in to change notification settings - Fork 9
/
acpi.h
1305 lines (1156 loc) · 36.4 KB
/
acpi.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#pragma once
#include <uacpi/platform/compiler.h>
#include <uacpi/helpers.h>
#include <uacpi/types.h>
/*
* -----------------------------------------------------
* Common structures provided by the ACPI specification
* -----------------------------------------------------
*/
#define ACPI_RSDP_SIGNATURE "RSD PTR "
#define ACPI_RSDT_SIGNATURE "RSDT"
#define ACPI_XSDT_SIGNATURE "XSDT"
#define ACPI_MADT_SIGNATURE "APIC"
#define ACPI_FADT_SIGNATURE "FACP"
#define ACPI_FACS_SIGNATURE "FACS"
#define ACPI_MCFG_SIGNATURE "MCFG"
#define ACPI_HPET_SIGNATURE "HPET"
#define ACPI_SRAT_SIGNATURE "SRAT"
#define ACPI_SLIT_SIGNATURE "SLIT"
#define ACPI_DSDT_SIGNATURE "DSDT"
#define ACPI_SSDT_SIGNATURE "SSDT"
#define ACPI_PSDT_SIGNATURE "PSDT"
#define ACPI_ECDT_SIGNATURE "ECDT"
#define ACPI_AS_ID_SYS_MEM 0x00
#define ACPI_AS_ID_SYS_IO 0x01
#define ACPI_AS_ID_PCI_CFG_SPACE 0x02
#define ACPI_AS_ID_EC 0x03
#define ACPI_AS_ID_SMBUS 0x04
#define ACPI_AS_ID_SYS_CMOS 0x05
#define ACPI_AS_ID_PCI_BAR_TGT 0x06
#define ACPI_AS_ID_IPMI 0x07
#define ACPI_AS_ID_GP_IO 0x08
#define ACPI_AS_ID_GENERIC_SBUS 0x09
#define ACPI_AS_ID_PCC 0x0A
#define ACPI_AS_ID_FFH 0x7F
#define ACPI_AS_ID_OEM_BASE 0xC0
#define ACPI_AS_ID_OEM_END 0xFF
#define ACPI_ACCESS_UD 0
#define ACPI_ACCESS_BYTE 1
#define ACPI_ACCESS_WORD 2
#define ACPI_ACCESS_DWORD 3
#define ACPI_ACCESS_QWORD 4
UACPI_PACKED(struct acpi_gas {
uacpi_u8 address_space_id;
uacpi_u8 register_bit_width;
uacpi_u8 register_bit_offset;
uacpi_u8 access_size;
uacpi_u64 address;
})
UACPI_EXPECT_SIZEOF(struct acpi_gas, 12);
UACPI_PACKED(struct acpi_rsdp {
uacpi_char signature[8];
uacpi_u8 checksum;
uacpi_char oemid[6];
uacpi_u8 revision;
uacpi_u32 rsdt_addr;
// vvvv available if .revision >= 2.0 only
uacpi_u32 length;
uacpi_u64 xsdt_addr;
uacpi_u8 extended_checksum;
uacpi_u8 rsvd[3];
})
UACPI_EXPECT_SIZEOF(struct acpi_rsdp, 36);
UACPI_PACKED(struct acpi_sdt_hdr {
uacpi_char signature[4];
uacpi_u32 length;
uacpi_u8 revision;
uacpi_u8 checksum;
uacpi_char oemid[6];
uacpi_char oem_table_id[8];
uacpi_u32 oem_revision;
uacpi_u32 creator_id;
uacpi_u32 creator_revision;
})
UACPI_EXPECT_SIZEOF(struct acpi_sdt_hdr, 36);
UACPI_PACKED(struct acpi_rsdt {
struct acpi_sdt_hdr hdr;
uacpi_u32 entries[];
})
UACPI_PACKED(struct acpi_xsdt {
struct acpi_sdt_hdr hdr;
uacpi_u64 entries[];
})
UACPI_PACKED(struct acpi_entry_hdr {
/*
* - acpi_madt_entry_type for the APIC table
* - acpi_srat_entry_type for the SRAT table
*/
uacpi_u8 type;
uacpi_u8 length;
})
// acpi_madt->flags
#define ACPI_PCAT_COMPAT (1 << 0)
enum acpi_madt_entry_type {
ACPI_MADT_ENTRY_TYPE_LAPIC = 0,
ACPI_MADT_ENTRY_TYPE_IOAPIC = 1,
ACPI_MADT_ENTRY_TYPE_INTERRUPT_SOURCE_OVERRIDE = 2,
ACPI_MADT_ENTRY_TYPE_NMI_SOURCE = 3,
ACPI_MADT_ENTRY_TYPE_LAPIC_NMI = 4,
ACPI_MADT_ENTRY_TYPE_LAPIC_ADDRESS_OVERRIDE = 5,
ACPI_MADT_ENTRY_TYPE_IOSAPIC = 6,
ACPI_MADT_ENTRY_TYPE_LSAPIC = 7,
ACPI_MADT_ENTRY_TYPE_PLATFORM_INTERRUPT_SOURCES = 8,
ACPI_MADT_ENTRY_TYPE_LOCAL_X2APIC = 9,
ACPI_MADT_ENTRY_TYPE_LOCAL_X2APIC_NMI = 0xA,
ACPI_MADT_ENTRY_TYPE_GICC = 0xB,
ACPI_MADT_ENTRY_TYPE_GICD = 0xC,
ACPI_MADT_ENTRY_TYPE_GIC_MSI_FRAME = 0xD,
ACPI_MADT_ENTRY_TYPE_GICR = 0xE,
ACPI_MADT_ENTRY_TYPE_GIC_ITS = 0xF,
ACPI_MADT_ENTRY_TYPE_MULTIPROCESSOR_WAKEUP = 0x10,
ACPI_MADT_ENTRY_TYPE_CORE_PIC = 0x11,
ACPI_MADT_ENTRY_TYPE_LIO_PIC = 0x12,
ACPI_MADT_ENTRY_TYPE_HT_PIC = 0x13,
ACPI_MADT_ENTRY_TYPE_EIO_PIC = 0x14,
ACPI_MADT_ENTRY_TYPE_MSI_PIC = 0x15,
ACPI_MADT_ENTRY_TYPE_BIO_PIC = 0x16,
ACPI_MADT_ENTRY_TYPE_LPC_PIC = 0x17,
ACPI_MADT_ENTRY_TYPE_RESERVED = 0x18, // 0x18..0x7F
ACPI_MADT_ENTRY_TYPE_OEM = 0x80, // 0x80..0xFF
};
UACPI_PACKED(struct acpi_madt {
struct acpi_sdt_hdr hdr;
uacpi_u32 local_interrupt_controller_address;
uacpi_u32 flags;
struct acpi_entry_hdr entries[];
})
UACPI_EXPECT_SIZEOF(struct acpi_madt, 44);
/*
* - acpi_madt_lapic->flags
* - acpi_madt_lsapic->flags
* - acpi_madt_x2apic->flags
*/
#define ACPI_PIC_ENABLED (1 << 0)
#define ACPI_PIC_ONLINE_CAPABLE (1 << 1)
UACPI_PACKED(struct acpi_madt_lapic {
struct acpi_entry_hdr hdr;
uacpi_u8 uid;
uacpi_u8 id;
uacpi_u32 flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_lapic, 8);
UACPI_PACKED(struct acpi_madt_ioapic {
struct acpi_entry_hdr hdr;
uacpi_u8 id;
uacpi_u8 rsvd;
uacpi_u32 address;
uacpi_u32 gsi_base;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_ioapic, 12);
/*
* - acpi_madt_interrupt_source_override->flags
* - acpi_madt_nmi_source->flags
* - acpi_madt_lapic_nmi->flags
* - acpi_madt_platform_interrupt_source->flags
* - acpi_madt_x2apic_nmi->flags
*/
#define ACPI_MADT_POLARITY_MASK 0b11
#define ACPI_MADT_POLARITY_CONFORMING 0b00
#define ACPI_MADT_POLARITY_ACTIVE_HIGH 0b01
#define ACPI_MADT_POLARITY_ACTIVE_LOW 0b11
#define ACPI_MADT_TRIGGERING_MASK 0b1100
#define ACPI_MADT_TRIGGERING_CONFORMING 0b0000
#define ACPI_MADT_TRIGGERING_EDGE 0b0100
#define ACPI_MADT_TRIGGERING_LEVEL 0b1100
UACPI_PACKED(struct acpi_madt_interrupt_source_override {
struct acpi_entry_hdr hdr;
uacpi_u8 bus;
uacpi_u8 source;
uacpi_u32 gsi;
uacpi_u16 flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_interrupt_source_override, 10);
UACPI_PACKED(struct acpi_madt_nmi_source {
struct acpi_entry_hdr hdr;
uacpi_u16 flags;
uacpi_u32 gsi;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_nmi_source, 8);
UACPI_PACKED(struct acpi_madt_lapic_nmi {
struct acpi_entry_hdr hdr;
uacpi_u8 uid;
uacpi_u16 flags;
uacpi_u8 lint;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_lapic_nmi, 6);
UACPI_PACKED(struct acpi_madt_lapic_address_override {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd;
uacpi_u64 address;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_lapic_address_override, 12);
UACPI_PACKED(struct acpi_madt_iosapic {
struct acpi_entry_hdr hdr;
uacpi_u8 id;
uacpi_u8 rsvd;
uacpi_u32 gsi_base;
uacpi_u64 address;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_iosapic, 16);
UACPI_PACKED(struct acpi_madt_lsapic {
struct acpi_entry_hdr hdr;
uacpi_u8 acpi_id;
uacpi_u8 id;
uacpi_u8 eid;
uacpi_u8 reserved[3];
uacpi_u32 flags;
uacpi_u32 uid;
uacpi_char uid_string[];
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_lsapic, 16);
// acpi_madt_platform_interrupt_source->platform_flags
#define ACPI_CPEI_PROCESSOR_OVERRIDE (1 << 0)
UACPI_PACKED(struct acpi_madt_platform_interrupt_source {
struct acpi_entry_hdr hdr;
uacpi_u16 flags;
uacpi_u8 type;
uacpi_u8 processor_id;
uacpi_u8 processor_eid;
uacpi_u8 iosapic_vector;
uacpi_u32 gsi;
uacpi_u32 platform_flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_platform_interrupt_source, 16);
UACPI_PACKED(struct acpi_madt_x2apic {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd;
uacpi_u32 id;
uacpi_u32 flags;
uacpi_u32 uid;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_x2apic, 16);
UACPI_PACKED(struct acpi_madt_x2apic_nmi {
struct acpi_entry_hdr hdr;
uacpi_u16 flags;
uacpi_u32 uid;
uacpi_u8 lint;
uacpi_u8 reserved[3];
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_x2apic_nmi, 12);
// acpi_madt_gicc->flags
#define ACPI_GICC_ENABLED (1 << 0)
#define ACPI_GICC_PERF_INTERRUPT_MODE (1 << 1)
#define ACPI_GICC_VGIC_MAINTENANCE_INTERRUPT_MODE (1 << 2)
#define ACPI_GICC_ONLINE_CAPABLE (1 << 3)
// ACPI_GICC_*_INTERRUPT_MODE
#define ACPI_GICC_TRIGGERING_EDGE 1
#define ACPI_GICC_TRIGGERING_LEVEL 0
UACPI_PACKED(struct acpi_madt_gicc {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd0;
uacpi_u32 interface_number;
uacpi_u32 acpi_id;
uacpi_u32 flags;
uacpi_u32 parking_protocol_version;
uacpi_u32 perf_interrupt_gsiv;
uacpi_u64 parked_address;
uacpi_u64 address;
uacpi_u64 gicv;
uacpi_u64 gich;
uacpi_u32 vgic_maitenante_interrupt;
uacpi_u64 gicr_base_address;
uacpi_u64 mpidr;
uacpi_u8 power_efficiency_class;
uacpi_u8 rsvd1;
uacpi_u16 spe_overflow_interrupt;
uacpi_u16 trbe_interrupt;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_gicc, 82);
UACPI_PACKED(struct acpi_madt_gicd {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd0;
uacpi_u32 id;
uacpi_u64 address;
uacpi_u32 system_vector_base;
uacpi_u8 gic_version;
uacpi_u8 reserved1[3];
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_gicd, 24);
// acpi_madt_gic_msi_frame->flags
#define ACPI_SPI_SELECT (1 << 0)
UACPI_PACKED(struct acpi_madt_gic_msi_frame {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd;
uacpi_u32 id;
uacpi_u64 address;
uacpi_u32 flags;
uacpi_u16 spi_count;
uacpi_u16 spi_base;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_gic_msi_frame, 24);
UACPI_PACKED(struct acpi_madt_gicr {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd;
uacpi_u64 address;
uacpi_u32 length;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_gicr, 16);
UACPI_PACKED(struct acpi_madt_gic_its {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd0;
uacpi_u32 id;
uacpi_u64 address;
uacpi_u32 rsvd1;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_gic_its, 20);
UACPI_PACKED(struct acpi_madt_multiprocessor_wakeup {
struct acpi_entry_hdr hdr;
uacpi_u16 mailbox_version;
uacpi_u32 rsvd;
uacpi_u64 mailbox_address;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_multiprocessor_wakeup, 16);
#define ACPI_CORE_PIC_ENABLED (1 << 0)
UACPI_PACKED(struct acpi_madt_core_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u32 acpi_id;
uacpi_u32 id;
uacpi_u32 flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_core_pic, 15);
UACPI_PACKED(struct acpi_madt_lio_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u64 address;
uacpi_u16 size;
uacpi_u16 cascade_vector;
uacpi_u64 cascade_vector_mapping;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_lio_pic, 23);
UACPI_PACKED(struct acpi_madt_ht_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u64 address;
uacpi_u16 size;
uacpi_u64 cascade_vector;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_ht_pic, 21);
UACPI_PACKED(struct acpi_madt_eio_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u8 cascade_vector;
uacpi_u8 node;
uacpi_u64 node_map;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_eio_pic, 13);
UACPI_PACKED(struct acpi_madt_msi_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u64 address;
uacpi_u32 start;
uacpi_u32 count;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_msi_pic, 19);
UACPI_PACKED(struct acpi_madt_bio_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u64 address;
uacpi_u16 size;
uacpi_u16 hardware_id;
uacpi_u16 gsi_base;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_bio_pic, 17);
UACPI_PACKED(struct acpi_madt_lpc_pic {
struct acpi_entry_hdr hdr;
uacpi_u8 version;
uacpi_u64 address;
uacpi_u16 size;
uacpi_u16 cascade_vector;
})
UACPI_EXPECT_SIZEOF(struct acpi_madt_lpc_pic, 15);
enum acpi_srat_entry_type {
ACPI_SRAT_ENTRY_TYPE_PROCESSOR_AFFINITY = 0,
ACPI_SRAT_ENTRY_TYPE_MEMORY_AFFINITY = 1,
ACPI_SRAT_ENTRY_TYPE_X2APIC_AFFINITY = 2,
ACPI_SRAT_ENTRY_TYPE_GICC_AFFINITY = 3,
ACPI_SRAT_ENTRY_TYPE_GIC_ITS_AFFINITY = 4,
ACPI_SRAT_ENTRY_TYPE_GENERIC_INITIATOR_AFFINITY = 5,
ACPI_SRAT_ENTRY_TYPE_GENERIC_PORT_AFFINITY = 6,
ACPI_SRAT_ENTRY_TYPE_RINTC_AFFINITY = 7,
};
UACPI_PACKED(struct acpi_srat {
struct acpi_sdt_hdr hdr;
uacpi_u32 rsvd0;
uacpi_u64 rsvd1;
struct acpi_entry_hdr entries[];
})
UACPI_EXPECT_SIZEOF(struct acpi_srat, 48);
/*
* acpi_srat_processor_affinity->flags
* acpi_srat_x2apic_affinity->flags
*/
#define ACPI_SRAT_PROCESSOR_ENABLED (1 << 0)
UACPI_PACKED(struct acpi_srat_processor_affinity {
struct acpi_entry_hdr hdr;
uacpi_u8 proximity_domain_low;
uacpi_u8 id;
uacpi_u32 flags;
uacpi_u8 eid;
uacpi_u8 proximity_domain_high[3];
uacpi_u32 clock_domain;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_processor_affinity, 16);
// acpi_srat_memory_affinity->flags
#define ACPI_SRAT_MEMORY_ENABLED (1 << 0)
#define ACPI_SRAT_MEMORY_HOTPLUGGABLE (1 << 1)
#define ACPI_SRAT_MEMORY_NON_VOLATILE (1 << 2)
UACPI_PACKED(struct acpi_srat_memory_affinity {
struct acpi_entry_hdr hdr;
uacpi_u32 proximity_domain;
uacpi_u16 rsvd0;
uacpi_u64 address;
uacpi_u64 length;
uacpi_u32 rsvd1;
uacpi_u32 flags;
uacpi_u64 rsdv2;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_memory_affinity, 40);
UACPI_PACKED(struct acpi_srat_x2apic_affinity {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd0;
uacpi_u32 proximity_domain;
uacpi_u32 id;
uacpi_u32 flags;
uacpi_u32 clock_domain;
uacpi_u32 rsvd1;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_x2apic_affinity, 24);
// acpi_srat_gicc_affinity->flags
#define ACPI_SRAT_GICC_ENABLED (1 << 0)
UACPI_PACKED(struct acpi_srat_gicc_affinity {
struct acpi_entry_hdr hdr;
uacpi_u32 proximity_domain;
uacpi_u32 uid;
uacpi_u32 flags;
uacpi_u32 clock_domain;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_gicc_affinity, 18);
UACPI_PACKED(struct acpi_srat_gic_its_affinity {
struct acpi_entry_hdr hdr;
uacpi_u32 proximity_domain;
uacpi_u16 rsvd;
uacpi_u32 id;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_gic_its_affinity, 12);
// acpi_srat_generic_affinity->flags
#define ACPI_GENERIC_AFFINITY_ENABLED (1 << 0)
#define ACPI_GENERIC_AFFINITY_ARCH_TRANSACTIONS (1 << 1)
UACPI_PACKED(struct acpi_srat_generic_affinity {
struct acpi_entry_hdr hdr;
uacpi_u8 rsvd0;
uacpi_u8 handle_type;
uacpi_u32 proximity_domain;
uacpi_u8 handle[16];
uacpi_u32 flags;
uacpi_u32 rsvd1;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_generic_affinity, 32);
// acpi_srat_rintc_affinity->flags
#define ACPI_SRAT_RINTC_AFFINITY_ENABLED (1 << 0)
UACPI_PACKED(struct acpi_srat_rintc_affinity {
struct acpi_entry_hdr hdr;
uacpi_u16 rsvd;
uacpi_u32 proximity_domain;
uacpi_u32 uid;
uacpi_u32 flags;
uacpi_u32 clock_domain;
})
UACPI_EXPECT_SIZEOF(struct acpi_srat_rintc_affinity, 20);
UACPI_PACKED(struct acpi_slit {
struct acpi_sdt_hdr hdr;
uacpi_u64 num_localities;
uacpi_u8 matrix[];
})
UACPI_EXPECT_SIZEOF(struct acpi_slit, 44);
/*
* acpi_gtdt->el*_flags
* acpi_gtdt_timer_entry->physical_flags
* acpi_gtdt_timer_entry->virtual_flags
* acpi_gtdt_watchdog->flags
*/
#define ACPI_GTDT_TRIGGERING (1 << 0)
#define ACPI_GTDT_TRIGGERING_EDGE 1
#define ACPI_GTDT_TRIGGERING_LEVEL 0
/*
* acpi_gtdt->el*_flags
* acpi_gtdt_timer_entry->physical_flags
* acpi_gtdt_timer_entry->virtual_flags
* acpi_gtdt_watchdog->flags
*/
#define ACPI_GTDT_POLARITY (1 << 1)
#define ACPI_GTDT_POLARITY_ACTIVE_LOW 1
#define ACPI_GTDT_POLARITY_ACTIVE_HIGH 0
// acpi_gtdt->el*_flags
#define ACPI_GTDT_ALWAYS_ON_CAPABLE (1 << 2)
UACPI_PACKED(struct acpi_gtdt {
struct acpi_sdt_hdr hdr;
uacpi_u64 cnt_control_base;
uacpi_u32 rsvd;
uacpi_u32 el1_secure_gsiv;
uacpi_u32 el1_secure_flags;
uacpi_u32 el1_non_secure_gsiv;
uacpi_u32 el1_non_secure_flags;
uacpi_u32 el1_virtual_gsiv;
uacpi_u32 el1_virtual_flags;
uacpi_u32 el2_gsiv;
uacpi_u32 el2_flags;
uacpi_u64 cnt_read_base;
uacpi_u32 platform_timer_count;
uacpi_u32 platform_timer_offset;
// revision >= 3
uacpi_u32 el2_virtual_gsiv;
uacpi_u32 el2_virtual_flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_gtdt, 104);
enum acpi_gtdt_entry_type {
ACPI_GTDT_ENTRY_TYPE_TIMER = 0,
ACPI_GTDT_ENTRY_TYPE_WATCHDOG = 1,
};
UACPI_PACKED(struct acpi_gtdt_entry_hdr {
uacpi_u8 type;
uacpi_u16 length;
})
UACPI_PACKED(struct acpi_gtdt_timer {
struct acpi_gtdt_entry_hdr hdr;
uacpi_u8 rsvd;
uacpi_u64 cnt_ctl_base;
uacpi_u32 timer_count;
uacpi_u32 timer_offset;
})
UACPI_EXPECT_SIZEOF(struct acpi_gtdt_timer, 20);
// acpi_gtdt_timer_entry->common_flags
#define ACPI_GTDT_TIMER_ENTRY_SECURE (1 << 0)
#define ACPI_GTDT_TIMER_ENTRY_ALWAYS_ON_CAPABLE (1 << 1)
UACPI_PACKED(struct acpi_gtdt_timer_entry {
uacpi_u8 frame_number;
uacpi_u8 rsvd[3];
uacpi_u64 cnt_base;
uacpi_u64 el0_cnt_base;
uacpi_u32 physical_gsiv;
uacpi_u32 physical_flags;
uacpi_u32 virtual_gsiv;
uacpi_u32 virtual_flags;
uacpi_u32 common_flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_gtdt_timer_entry, 40);
// acpi_gtdt_watchdog->flags
#define ACPI_GTDT_WATCHDOG_SECURE (1 << 2)
UACPI_PACKED(struct acpi_gtdt_watchdog {
struct acpi_gtdt_entry_hdr hdr;
uacpi_u8 rsvd;
uacpi_u64 refresh_frame;
uacpi_u64 control_frame;
uacpi_u32 gsiv;
uacpi_u32 flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_gtdt_watchdog, 28);
// acpi_fdt->iapc_flags
#define ACPI_IA_PC_LEGACY_DEVS (1 << 0)
#define ACPI_IA_PC_8042 (1 << 1)
#define ACPI_IA_PC_NO_VGA (1 << 2)
#define ACPI_IA_PC_NO_MSI (1 << 3)
#define ACPI_IA_PC_NO_PCIE_ASPM (1 << 4)
#define ACPI_IA_PC_NO_CMOS_RTC (1 << 5)
// acpi_fdt->flags
#define ACPI_WBINVD (1 << 0)
#define ACPI_WBINVD_FLUSH (1 << 1)
#define ACPI_PROC_C1 (1 << 2)
#define ACPI_P_LVL2_UP (1 << 3)
#define ACPI_PWR_BUTTON (1 << 4)
#define ACPI_SLP_BUTTON (1 << 5)
#define ACPI_FIX_RTC (1 << 6)
#define ACPI_RTC_S4 (1 << 7)
#define ACPI_TMR_VAL_EXT (1 << 8)
#define ACPI_DCK_CAP (1 << 9)
#define ACPI_RESET_REG_SUP (1 << 10)
#define ACPI_SEALED_CASE (1 << 11)
#define ACPI_HEADLESS (1 << 12)
#define ACPI_CPU_SW_SLP (1 << 13)
#define ACPI_PCI_EXP_WAK (1 << 14)
#define ACPI_USE_PLATFORM_CLOCK (1 << 15)
#define ACPI_S4_RTC_STS_VALID (1 << 16)
#define ACPI_REMOTE_POWER_ON_CAPABLE (1 << 17)
#define ACPI_FORCE_APIC_CLUSTER_MODEL (1 << 18)
#define ACPI_FORCE_APIC_PHYS_DEST_MODE (1 << 19)
#define ACPI_HW_REDUCED_ACPI (1 << 20)
#define ACPI_LOW_POWER_S0_IDLE_CAPABLE (1 << 21)
// acpi_fdt->arm_flags
#define ACPI_ARM_PSCI_COMPLIANT (1 << 0)
#define ACPI_ARM_PSCI_USE_HVC (1 << 1)
UACPI_PACKED(struct acpi_fadt {
struct acpi_sdt_hdr hdr;
uacpi_u32 firmware_ctrl;
uacpi_u32 dsdt;
uacpi_u8 int_model;
uacpi_u8 preferred_pm_profile;
uacpi_u16 sci_int;
uacpi_u32 smi_cmd;
uacpi_u8 acpi_enable;
uacpi_u8 acpi_disable;
uacpi_u8 s4bios_req;
uacpi_u8 pstate_cnt;
uacpi_u32 pm1a_evt_blk;
uacpi_u32 pm1b_evt_blk;
uacpi_u32 pm1a_cnt_blk;
uacpi_u32 pm1b_cnt_blk;
uacpi_u32 pm2_cnt_blk;
uacpi_u32 pm_tmr_blk;
uacpi_u32 gpe0_blk;
uacpi_u32 gpe1_blk;
uacpi_u8 pm1_evt_len;
uacpi_u8 pm1_cnt_len;
uacpi_u8 pm2_cnt_len;
uacpi_u8 pm_tmr_len;
uacpi_u8 gpe0_blk_len;
uacpi_u8 gpe1_blk_len;
uacpi_u8 gpe1_base;
uacpi_u8 cst_cnt;
uacpi_u16 p_lvl2_lat;
uacpi_u16 p_lvl3_lat;
uacpi_u16 flush_size;
uacpi_u16 flush_stride;
uacpi_u8 duty_offset;
uacpi_u8 duty_width;
uacpi_u8 day_alrm;
uacpi_u8 mon_alrm;
uacpi_u8 century;
uacpi_u16 iapc_boot_arch;
uacpi_u8 rsvd;
uacpi_u32 flags;
struct acpi_gas reset_reg;
uacpi_u8 reset_value;
uacpi_u16 arm_boot_arch;
uacpi_u8 fadt_minor_verison;
uacpi_u64 x_firmware_ctrl;
uacpi_u64 x_dsdt;
struct acpi_gas x_pm1a_evt_blk;
struct acpi_gas x_pm1b_evt_blk;
struct acpi_gas x_pm1a_cnt_blk;
struct acpi_gas x_pm1b_cnt_blk;
struct acpi_gas x_pm2_cnt_blk;
struct acpi_gas x_pm_tmr_blk;
struct acpi_gas x_gpe0_blk;
struct acpi_gas x_gpe1_blk;
struct acpi_gas sleep_control_reg;
struct acpi_gas sleep_status_reg;
uacpi_u64 hypervisor_vendor_identity;
})
UACPI_EXPECT_SIZEOF(struct acpi_fadt, 276);
// acpi_facs->flags
#define ACPI_S4BIOS_F (1 << 0)
#define ACPI_64BIT_WAKE_SUPPORTED_F (1 << 1)
// acpi_facs->ospm_flags
#define ACPI_64BIT_WAKE_F (1 << 0)
struct acpi_facs {
uacpi_char signature[4];
uacpi_u32 length;
uacpi_u32 hardware_signature;
uacpi_u32 firmware_waking_vector;
uacpi_u32 global_lock;
uacpi_u32 flags;
uacpi_u64 x_firmware_waking_vector;
uacpi_u8 version;
uacpi_char rsvd0[3];
uacpi_u32 ospm_flags;
uacpi_char rsvd1[24];
};
UACPI_EXPECT_SIZEOF(struct acpi_facs, 64);
UACPI_PACKED(struct acpi_mcfg_allocation {
uacpi_u64 address;
uacpi_u16 segment;
uacpi_u8 start_bus;
uacpi_u8 end_bus;
uacpi_u32 rsvd;
})
UACPI_EXPECT_SIZEOF(struct acpi_mcfg_allocation, 16);
UACPI_PACKED(struct acpi_mcfg {
struct acpi_sdt_hdr hdr;
uacpi_u64 rsvd;
struct acpi_mcfg_allocation entries[];
})
UACPI_EXPECT_SIZEOF(struct acpi_mcfg, 44);
// acpi_hpet->block_id
#define ACPI_HPET_PCI_VENDOR_ID_SHIFT 16
#define ACPI_HPET_LEGACY_REPLACEMENT_IRQ_ROUTING_CAPABLE (1 << 15)
#define ACPI_HPET_COUNT_SIZE_CAP (1 << 13)
#define ACPI_HPET_NUMBER_OF_COMPARATORS_SHIFT 8
#define ACPI_HPET_NUMBER_OF_COMPARATORS_MASK 0b11111
#define ACPI_HPET_HARDWARE_REV_ID_MASK 0b11111111
// acpi_hpet->flags
#define ACPI_HPET_PAGE_PROTECTION_MASK 0b11
#define ACPI_HPET_PAGE_NO_PROTECTION 0
#define ACPI_HPET_PAGE_4K_PROTECTED 1
#define ACPI_HPET_PAGE_64K_PROTECTED 2
UACPI_PACKED(struct acpi_hpet {
struct acpi_sdt_hdr hdr;
uacpi_u32 block_id;
struct acpi_gas address;
uacpi_u8 number;
uacpi_u16 min_clock_tick;
uacpi_u8 flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_hpet, 56);
// PM1{a,b}_STS
#define ACPI_PM1_STS_TMR_STS_IDX 0
#define ACPI_PM1_STS_BM_STS_IDX 4
#define ACPI_PM1_STS_GBL_STS_IDX 5
#define ACPI_PM1_STS_PWRBTN_STS_IDX 8
#define ACPI_PM1_STS_SLPBTN_STS_IDX 9
#define ACPI_PM1_STS_RTC_STS_IDX 10
#define ACPI_PM1_STS_IGN0_IDX 11
#define ACPI_PM1_STS_PCIEXP_WAKE_STS_IDX 14
#define ACPI_PM1_STS_WAKE_STS_IDX 15
#define ACPI_PM1_STS_TMR_STS_MASK (1 << ACPI_PM1_STS_TMR_STS_IDX)
#define ACPI_PM1_STS_BM_STS_MASK (1 << ACPI_PM1_STS_BM_STS_IDX)
#define ACPI_PM1_STS_GBL_STS_MASK (1 << ACPI_PM1_STS_GBL_STS_IDX)
#define ACPI_PM1_STS_PWRBTN_STS_MASK (1 << ACPI_PM1_STS_PWRBTN_STS_IDX)
#define ACPI_PM1_STS_SLPBTN_STS_MASK (1 << ACPI_PM1_STS_SLPBTN_STS_IDX)
#define ACPI_PM1_STS_RTC_STS_MASK (1 << ACPI_PM1_STS_RTC_STS_IDX)
#define ACPI_PM1_STS_IGN0_MASK (1 << ACPI_PM1_STS_IGN0_IDX)
#define ACPI_PM1_STS_PCIEXP_WAKE_STS_MASK (1 << ACPI_PM1_STS_PCIEXP_WAKE_STS_IDX)
#define ACPI_PM1_STS_WAKE_STS_MASK (1 << ACPI_PM1_STS_WAKE_STS_IDX)
#define ACPI_PM1_STS_CLEAR 1
// PM1{a,b}_EN
#define ACPI_PM1_EN_TMR_EN_IDX 0
#define ACPI_PM1_EN_GBL_EN_IDX 5
#define ACPI_PM1_EN_PWRBTN_EN_IDX 8
#define ACPI_PM1_EN_SLPBTN_EN_IDX 9
#define ACPI_PM1_EN_RTC_EN_IDX 10
#define ACPI_PM1_EN_PCIEXP_WAKE_DIS_IDX 14
#define ACPI_PM1_EN_TMR_EN_MASK (1 << ACPI_PM1_EN_TMR_EN_IDX)
#define ACPI_PM1_EN_GBL_EN_MASK (1 << ACPI_PM1_EN_GBL_EN_IDX)
#define ACPI_PM1_EN_PWRBTN_EN_MASK (1 << ACPI_PM1_EN_PWRBTN_EN_IDX)
#define ACPI_PM1_EN_SLPBTN_EN_MASK (1 << ACPI_PM1_EN_SLPBTN_EN_IDX)
#define ACPI_PM1_EN_RTC_EN_MASK (1 << ACPI_PM1_EN_RTC_EN_IDX)
#define ACPI_PM1_EN_PCIEXP_WAKE_DIS_MASK (1 << ACPI_PM1_EN_PCIEXP_WAKE_DIS_IDX)
// PM1{a,b}_CNT_BLK
#define ACPI_PM1_CNT_SCI_EN_IDX 0
#define ACPI_PM1_CNT_BM_RLD_IDX 1
#define ACPI_PM1_CNT_GBL_RLS_IDX 2
#define ACPI_PM1_CNT_RSVD0_IDX 3
#define ACPI_PM1_CNT_RSVD1_IDX 4
#define ACPI_PM1_CNT_RSVD2_IDX 5
#define ACPI_PM1_CNT_RSVD3_IDX 6
#define ACPI_PM1_CNT_RSVD4_IDX 7
#define ACPI_PM1_CNT_RSVD5_IDX 8
#define ACPI_PM1_CNT_IGN0_IDX 9
#define ACPI_PM1_CNT_SLP_TYP_IDX 10
#define ACPI_PM1_CNT_SLP_EN_IDX 13
#define ACPI_PM1_CNT_RSVD6_IDX 14
#define ACPI_PM1_CNT_RSVD7_IDX 15
#define ACPI_SLP_TYP_MAX 0b111
#define ACPI_PM1_CNT_SCI_EN_MASK (1 << ACPI_PM1_CNT_SCI_EN_IDX)
#define ACPI_PM1_CNT_BM_RLD_MASK (1 << ACPI_PM1_CNT_BM_RLD_IDX)
#define ACPI_PM1_CNT_GBL_RLS_MASK (1 << ACPI_PM1_CNT_GBL_RLS_IDX)
#define ACPI_PM1_CNT_SLP_TYP_MASK (ACPI_SLP_TYP_MAX << ACPI_PM1_CNT_SLP_TYP_IDX)
#define ACPI_PM1_CNT_SLP_EN_MASK (1 << ACPI_PM1_CNT_SLP_EN_IDX)
/*
* SCI_EN is not in this mask even though the spec says it must be preserved.
* This is because it's known to be bugged on some hardware that relies on
* software writing 1 to it after resume (as indicated by a similar comment in
* ACPICA)
*/
#define ACPI_PM1_CNT_PRESERVE_MASK ( \
(1 << ACPI_PM1_CNT_RSVD0_IDX) | \
(1 << ACPI_PM1_CNT_RSVD1_IDX) | \
(1 << ACPI_PM1_CNT_RSVD2_IDX) | \
(1 << ACPI_PM1_CNT_RSVD3_IDX) | \
(1 << ACPI_PM1_CNT_RSVD4_IDX) | \
(1 << ACPI_PM1_CNT_RSVD5_IDX) | \
(1 << ACPI_PM1_CNT_IGN0_IDX ) | \
(1 << ACPI_PM1_CNT_RSVD6_IDX) | \
(1 << ACPI_PM1_CNT_RSVD7_IDX) \
)
// PM2_CNT
#define ACPI_PM2_CNT_ARB_DIS_IDX 0
#define ACPI_PM2_CNT_ARB_DIS_MASK (1 << ACPI_PM2_CNT_ARB_DIS_IDX)
// All bits are reserved but this first one
#define ACPI_PM2_CNT_PRESERVE_MASK (~((uacpi_u64)ACPI_PM2_CNT_ARB_DIS_MASK))
// SLEEP_CONTROL_REG
#define ACPI_SLP_CNT_RSVD0_IDX 0
#define ACPI_SLP_CNT_IGN0_IDX 1
#define ACPI_SLP_CNT_SLP_TYP_IDX 2
#define ACPI_SLP_CNT_SLP_EN_IDX 5
#define ACPI_SLP_CNT_RSVD1_IDX 6
#define ACPI_SLP_CNT_RSVD2_IDX 7
#define ACPI_SLP_CNT_SLP_TYP_MASK (ACPI_SLP_TYP_MAX << ACPI_SLP_CNT_SLP_TYP_IDX)
#define ACPI_SLP_CNT_SLP_EN_MASK (1 << ACPI_SLP_CNT_SLP_EN_IDX)
#define ACPI_SLP_CNT_PRESERVE_MASK ( \
(1 << ACPI_SLP_CNT_RSVD0_IDX) | \
(1 << ACPI_SLP_CNT_IGN0_IDX) | \
(1 << ACPI_SLP_CNT_RSVD1_IDX) | \
(1 << ACPI_SLP_CNT_RSVD2_IDX) \
)
// SLEEP_STATUS_REG
#define ACPI_SLP_STS_WAK_STS_IDX 7
#define ACPI_SLP_STS_WAK_STS_MASK (1 << ACPI_SLP_STS_WAK_STS_IDX)
// All bits are reserved but this last one
#define ACPI_SLP_STS_PRESERVE_MASK (~((uacpi_u64)ACPI_SLP_STS_WAK_STS_MASK))
#define ACPI_SLP_STS_CLEAR 1
UACPI_PACKED(struct acpi_dsdt {
struct acpi_sdt_hdr hdr;
uacpi_u8 definition_block[];
})
UACPI_PACKED(struct acpi_ssdt {
struct acpi_sdt_hdr hdr;
uacpi_u8 definition_block[];
})
/*
* ACPI 6.5 specification:
* Bit [0] - Set if the device is present.
* Bit [1] - Set if the device is enabled and decoding its resources.
* Bit [2] - Set if the device should be shown in the UI.
* Bit [3] - Set if the device is functioning properly (cleared if device
* failed its diagnostics).
* Bit [4] - Set if the battery is present.
*/
#define ACPI_STA_RESULT_DEVICE_PRESENT (1 << 0)
#define ACPI_STA_RESULT_DEVICE_ENABLED (1 << 1)
#define ACPI_STA_RESULT_DEVICE_SHOWN_IN_UI (1 << 2)
#define ACPI_STA_RESULT_DEVICE_FUNCTIONING (1 << 3)
#define ACPI_STA_RESULT_DEVICE_BATTERY_PRESENT (1 << 4)
#define ACPI_REG_DISCONNECT 0
#define ACPI_REG_CONNECT 1
UACPI_PACKED(struct acpi_ecdt {
struct acpi_sdt_hdr hdr;
struct acpi_gas ec_control;
struct acpi_gas ec_data;
uacpi_u32 uid;
uacpi_u8 gpe_bit;
uacpi_char ec_id[];
})
UACPI_EXPECT_SIZEOF(struct acpi_ecdt, 65);
#define ACPI_LARGE_ITEM (1 << 7)
#define ACPI_SMALL_ITEM_NAME_IDX 3
#define ACPI_SMALL_ITEM_NAME_MASK 0b1111
#define ACPI_SMALL_ITEM_LENGTH_MASK 0b111
#define ACPI_LARGE_ITEM_NAME_MASK 0b1111111
// Small items
#define ACPI_RESOURCE_IRQ 0x04
#define ACPI_RESOURCE_DMA 0x05
#define ACPI_RESOURCE_START_DEPENDENT 0x06
#define ACPI_RESOURCE_END_DEPENDENT 0x07
#define ACPI_RESOURCE_IO 0x08
#define ACPI_RESOURCE_FIXED_IO 0x09
#define ACPI_RESOURCE_FIXED_DMA 0x0A
#define ACPI_RESOURCE_VENDOR_TYPE0 0x0E
#define ACPI_RESOURCE_END_TAG 0x0F
// Large items
#define ACPI_RESOURCE_MEMORY24 0x01
#define ACPI_RESOURCE_GENERIC_REGISTER 0x02
#define ACPI_RESOURCE_VENDOR_TYPE1 0x04
#define ACPI_RESOURCE_MEMORY32 0x05
#define ACPI_RESOURCE_FIXED_MEMORY32 0x06
#define ACPI_RESOURCE_ADDRESS32 0x07
#define ACPI_RESOURCE_ADDRESS16 0x08
#define ACPI_RESOURCE_EXTENDED_IRQ 0x09
#define ACPI_RESOURCE_ADDRESS64 0x0A
#define ACPI_RESOURCE_ADDRESS64_EXTENDED 0x0B
#define ACPI_RESOURCE_GPIO_CONNECTION 0x0C
#define ACPI_RESOURCE_PIN_FUNCTION 0x0D
#define ACPI_RESOURCE_SERIAL_CONNECTION 0x0E
#define ACPI_RESOURCE_PIN_CONFIGURATION 0x0F
#define ACPI_RESOURCE_PIN_GROUP 0x10
#define ACPI_RESOURCE_PIN_GROUP_FUNCTION 0x11
#define ACPI_RESOURCE_PIN_GROUP_CONFIGURATION 0x12
#define ACPI_RESOURCE_CLOCK_INPUT 0x13
/*
* Resources as encoded by the raw AML byte stream.
* For decode API & human usable structures refer to uacpi/resources.h
*/
UACPI_PACKED(struct acpi_small_item {
uacpi_u8 type_and_length;
})
UACPI_EXPECT_SIZEOF(struct acpi_small_item, 1);
UACPI_PACKED(struct acpi_resource_irq {
struct acpi_small_item common;
uacpi_u16 irq_mask;
uacpi_u8 flags;
})
UACPI_EXPECT_SIZEOF(struct acpi_resource_irq, 4);
UACPI_PACKED(struct acpi_resource_dma {