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When checking if RTC configuration was applied correctly, I am checking the squarewave frequency output with ds1307_get_squarewave_freq and comparing it against DS1307_32768HZ.
That check returns false and the returned value is 176 or 0b1011000.
Checking against the datasheet, this is the supposed content of the control register with the rate select bits RS0/RS1 masked out.
In line 191 of ds1307.c the returned register is &-ed with SQWEF_MASK, when it should be the inverse of that mask.
#defineSQWEF_MASK 0xfc
Changing the line to the following fixes the issue for me:
*sqw_freq=val& ~SQWEF_MASK;
Another sidenote: when using this API, I am expecting to receive true from ds1307_is_running when ... well, the clock is running. However, what I am getting is the contents of the CH bit which stands for "clock halt". So a value of 0 actually indicates that the clock is running, which is confusing ..
The text was updated successfully, but these errors were encountered:
Device type
Framework version
Describe the bug
When checking if RTC configuration was applied correctly, I am checking the squarewave frequency output with
ds1307_get_squarewave_freq
and comparing it againstDS1307_32768HZ
.That check returns
false
and the returned value is176
or0b1011000
.Checking against the datasheet, this is the supposed content of the control register with the rate select bits RS0/RS1 masked out.
In line 191 of ds1307.c the returned register is
&
-ed withSQWEF_MASK
, when it should be the inverse of that mask.Changing the line to the following fixes the issue for me:
Another sidenote: when using this API, I am expecting to receive
true
fromds1307_is_running
when ... well, the clock is running. However, what I am getting is the contents of theCH
bit which stands for "clock halt". So a value of0
actually indicates that the clock is running, which is confusing ..The text was updated successfully, but these errors were encountered: