| Category | Difficulty |
|---|---|
| Labs | 6 |
| Exams | 7 |
The course provides an in-depth coverage of modern out-of-order superscalar system with a special focus on System-on-Chips for mobile and edge computing devices.
You get to work on projects that cover a vast range to concepts from modelling CPU architectures to analyzing performance and power tradeoffs of different compute applications like graphics, neural networks on near state-of-the-art SoC platforms like those from Qualcomm, Mediatek etc.
The course consists of around 6 labs (may vary across years) and the topics in these labs follow the contents that were covered in the lectures and follow a more hands-on approach.
This class is traditionally offered in Fall and is usually taken after the undergraduate course of 18447 (Spring).
The course covers a wide range of topics. The first half of the course is extremely (can not emphasise enough) crucial for students who want to further their career in computer architecture (CPU, Memory, Performance) both in industry and in research. These topics are legacy topics which form the baseline of all modern computing systems and the lectures go in-depth into understanding each one of them.
The second half of the course covers broader topics that are seen in latest state-of-the-art computing systems and cover more research oriented topics.
A broad overview of topics covered are:
- Processing subsystem: superscalar out-of-order cores, multicore processors (branch prediction, dynamic scheduling), asymmetric and heterogeneous cores.
- Memory subsystem: main memory/DRAM, multi-core cache hierarchy and shared memory management (coherence and consistency models).
- Interconnect subsystem: Network-on-Chip (NoC), 3D die-stacking and chiplets
- Newer research topics like AI accelarators, neuromorphic computing, other industry trends and competitive dynamics.
The course also has a recitation which discusses problem solving of examples based on concepts taught in class.
The labs are performed usually in groups of 2. They are divided to cover topics like Branch Predictors, Superscalar out-of-order scheduling, Memory subsystem, Performance profiling, Use of heterogeneous cores like GPU and AI accelerators.
The tools used vary across labs.
- For simulation, the course has been using Gem5 simulator. You do not need to have a prior knowledge of this tool as the lab tutorial and checkpoints provided in the course is more than sufficient to get used to the tool. Knowledge of C++ and the use of Standard Template Libraries (STL) can be useful.
- For the second lab, you will need to design using Verilog (or you may choose to use any framework that can ultimately generate verilog). Hardware design knowledge from undergraduate courses will be helpful.
- Most of the other labs require you to have knowledge of C (or preferably C++). Taking 18213/613 might be a good choice.
The mid-term and end-term exams are not designed to be very challenging but will require a good understanding of concepts taught in the lectures. The exams have a few MCQs followed by written problems and are currently (as of Fall 2022) open-notes.
The written problems focus more on the concepts you have understood from the lectures and also include some design problems and numerical questions on calculating design parameters like sizing of components, number of runtime cycles in multi-threaded systems, design tradeoffs, etc.
The exams most certainly cover questions from Lab exercises and are mostly never seen in the lecture slides and can only be answered if you have done your lab well.
- Pay extra importance to the lectures in the first half of the course. They will not only help you with the course but with interviews with future employers or for further studies.
- The projects can be hard at times (or sometimes time consuming even if not hard). The milestones will help keep you on track for submissions.
- Brush up on your C/C++ skills if you have lost touch of it.
- For exam preparation, definitely solve past year question paper released by the course staff to get an idea of design-oriented questions.