diff --git a/src/xeda/design.py b/src/xeda/design.py
index 1d43a78..4bcb0b0 100644
--- a/src/xeda/design.py
+++ b/src/xeda/design.py
@@ -71,7 +71,7 @@ def __init__(
         file: Optional[str] = None,
     ) -> None:
         super().__init__(*args)
-        self.errors = errors  # location, msg, type/context
+        self.errors = errors  # (location, message, context, type)
         self.data = data
         self.design_root = design_root
         self.design_name = design_name
diff --git a/src/xeda/flows/vivado/vivado_sim.py b/src/xeda/flows/vivado/vivado_sim.py
index 2886274..dc08a8e 100644
--- a/src/xeda/flows/vivado/vivado_sim.py
+++ b/src/xeda/flows/vivado/vivado_sim.py
@@ -2,6 +2,7 @@
 from typing import List, Optional
 
 from ...dataclass import Field
+from ...design import DesignValidationError
 from ...utils import SDF
 from ...flow import SimFlow
 from ..vivado import Vivado
@@ -45,8 +46,30 @@ def run(self) -> None:
         if elab_debug:
             ss.elab_flags.append(f"-debug {elab_debug}")
 
-        assert self.design.tb
-        # assert self.design.sim_tops, "tb.top was not specified"
+        if not self.design.tb:
+            raise DesignValidationError(
+                [
+                    (
+                        None,
+                        "No testbench ('tb') is specified in the design",
+                        None,
+                        None,
+                    )
+                ],
+                self.design.dict(),
+            )
+        if not self.design.sim_tops:
+            raise DesignValidationError(
+                [
+                    (
+                        None,
+                        "VivadoSim requires simulation top but 'tb.top' was not specified in the design",
+                        None,
+                        None,
+                    )
+                ],
+                self.design.dict(),
+            )
         if ss.vcd:
             log.info("Dumping VCD to %s", self.run_path / ss.vcd)
         sdf_root = ss.sdf.root