From 4b18a10323b09a9ee9b5fd2cb18d66c8a17d9208 Mon Sep 17 00:00:00 2001 From: banaks6g Date: Mon, 9 Sep 2024 23:14:26 -0700 Subject: [PATCH] Unification of CDC RDC Lint and Autocheck scripts --- tclapp/siemens/pkgIndex.tcl | 2 +- tclapp/siemens/questa_cdc/README | 3 - .../setup_qresetcheck_vivado_button.csh | 58 - .../test/questa_cdc_tclapp_test.tcl | 13 - .../write_questa_autocheck_script.tcl | 1330 -------- .../questa_cdc/write_questa_cdc_script.tcl | 1308 -------- .../questa_cdc/write_questa_lint_script.tcl | 1314 -------- .../questa_cdc/write_questa_rdc_script.tcl | 1357 -------- .../write_questa_resetcheck_script.tcl | 1293 -------- tclapp/siemens/questa_ds/README | 2 + .../siemens/{questa_cdc => questa_ds}/app.xml | 2 +- .../{questa_cdc => questa_ds}/doc/legal.txt | 4 +- .../doc/write_questa_autocheck_script | 0 .../doc/write_questa_cdc_script | 0 .../doc/write_questa_lint_script | 0 .../doc/write_questa_rdc_script | 0 .../doc/write_questa_resetcheck_script | 0 .../{questa_cdc => questa_ds}/pkgIndex.tcl | 2 +- .../questa_autocheck_logo.PNG | Bin .../questa_cdc_logo.PNG | Bin .../questa_ds.tcl} | 4 +- .../questa_ds/questa_ds_vivado_script.tcl | 2841 +++++++++++++++++ .../questa_lint_logo.PNG | Bin .../questa_rdc_logo.PNG | Bin .../questa_resetcheck_logo.PNG | Bin .../revision_history.txt | 1 + .../setup_qautocheck_vivado_button.csh | 14 +- .../setup_qcdc_vivado_button.csh | 16 +- .../setup_qlint_vivado_button.csh | 16 +- .../setup_qrdc_vivado_button.csh | 16 +- .../{questa_cdc => questa_ds}/tclIndex | 0 .../{questa_cdc => questa_ds}/test/README | 0 .../questa_ds/test/questa_cdc_tclapp_test.tcl | 13 + .../test/questa_cdc_tclapp_test_1.tcl | 6 +- .../{questa_cdc => questa_ds}/test/test.tcl | 0 35 files changed, 2898 insertions(+), 6717 deletions(-) delete mode 100755 tclapp/siemens/questa_cdc/README delete mode 100755 tclapp/siemens/questa_cdc/setup_qresetcheck_vivado_button.csh delete mode 100755 tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test.tcl delete mode 100755 tclapp/siemens/questa_cdc/write_questa_autocheck_script.tcl delete mode 100755 tclapp/siemens/questa_cdc/write_questa_cdc_script.tcl delete mode 100755 tclapp/siemens/questa_cdc/write_questa_lint_script.tcl delete mode 100755 tclapp/siemens/questa_cdc/write_questa_rdc_script.tcl delete mode 100755 tclapp/siemens/questa_cdc/write_questa_resetcheck_script.tcl create mode 100755 tclapp/siemens/questa_ds/README rename tclapp/siemens/{questa_cdc => questa_ds}/app.xml (95%) rename tclapp/siemens/{questa_cdc => questa_ds}/doc/legal.txt (96%) rename tclapp/siemens/{questa_cdc => questa_ds}/doc/write_questa_autocheck_script (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/doc/write_questa_cdc_script (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/doc/write_questa_lint_script (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/doc/write_questa_rdc_script (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/doc/write_questa_resetcheck_script (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/pkgIndex.tcl (82%) rename tclapp/siemens/{questa_cdc => questa_ds}/questa_autocheck_logo.PNG (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/questa_cdc_logo.PNG (100%) rename tclapp/siemens/{questa_cdc/questa_cdc.tcl => questa_ds/questa_ds.tcl} (80%) create mode 100644 tclapp/siemens/questa_ds/questa_ds_vivado_script.tcl rename tclapp/siemens/{questa_cdc => questa_ds}/questa_lint_logo.PNG (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/questa_rdc_logo.PNG (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/questa_resetcheck_logo.PNG (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/revision_history.txt (92%) rename tclapp/siemens/{questa_cdc => questa_ds}/setup_qautocheck_vivado_button.csh (76%) rename tclapp/siemens/{questa_cdc => questa_ds}/setup_qcdc_vivado_button.csh (78%) rename tclapp/siemens/{questa_cdc => questa_ds}/setup_qlint_vivado_button.csh (76%) rename tclapp/siemens/{questa_cdc => questa_ds}/setup_qrdc_vivado_button.csh (78%) rename tclapp/siemens/{questa_cdc => questa_ds}/tclIndex (100%) rename tclapp/siemens/{questa_cdc => questa_ds}/test/README (100%) create mode 100755 tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test.tcl rename tclapp/siemens/{questa_cdc => questa_ds}/test/questa_cdc_tclapp_test_1.tcl (57%) rename tclapp/siemens/{questa_cdc => questa_ds}/test/test.tcl (100%) diff --git a/tclapp/siemens/pkgIndex.tcl b/tclapp/siemens/pkgIndex.tcl index 70c4d3f21..3ef8e44eb 100755 --- a/tclapp/siemens/pkgIndex.tcl +++ b/tclapp/siemens/pkgIndex.tcl @@ -1,4 +1,4 @@ -# Extend the auto_path to make mentor apps available +# Extend the auto_path to make siemens apps available if {[lsearch -exact $::auto_path $dir] == -1} { lappend ::auto_path $dir } diff --git a/tclapp/siemens/questa_cdc/README b/tclapp/siemens/questa_cdc/README deleted file mode 100755 index 96f84764e..000000000 --- a/tclapp/siemens/questa_cdc/README +++ /dev/null @@ -1,3 +0,0 @@ -Tcl App for Siemens Questa Design Solutions - -Generate script files to run CDC,RDC,LINT and Autocheck tools with Siemens Questa Design Solutions diff --git a/tclapp/siemens/questa_cdc/setup_qresetcheck_vivado_button.csh b/tclapp/siemens/questa_cdc/setup_qresetcheck_vivado_button.csh deleted file mode 100755 index 735edb1ac..000000000 --- a/tclapp/siemens/questa_cdc/setup_qresetcheck_vivado_button.csh +++ /dev/null @@ -1,58 +0,0 @@ -#! /bin/csh -f - -## Description: -## ------------ -## This script can be used to setup the Vivado GUI button for Questa RESETCHECK. It should be located at the same directory of 'write_questa_resetcheck_script.tcl' script. -## -## Examples: -## --------- -## /data/XilinxTclStore/tclapp/mentor/questa_resetcheck/setup_qresetcheck_vivado_button.csh -## /share/fpga_libs/Xilinx/setup_qresetcheck_vivado_button.csh -## -## Script created on 08/09/2017 by Islam Ahmed (Mentor Graphics Inc) - -set remove = 0 -set usage = "Usage : setup_qresetcheck_vivado_button.csh [-remove]" -if ( $#argv > 1 ) then - echo "** Error : Extra number of arguments used" - echo "$usage" - exit 1 -else if ( $#argv == 1 ) then - if ( "$argv[1]" == "-remove" ) then - set remove = 1 - else - echo "** Error : Invalid argument specified, usage:" - echo "$usage" - exit 1 - endif -endif - -set setup_file = "QUESTA_RESETCHECK_VIVADO_SETUP_FILE.tcl" -rm -f $setup_file - -set rootdir = `dirname $0` # may be relative path -set rootdir = `cd $rootdir && pwd` # ensure absolute path - -if ( ! -e "$rootdir/write_questa_resetcheck_script.tcl" ) then - echo "** Error : Can't find '$rootdir/write_questa_resetcheck_script.tcl' sript." - echo " : The 'setup_qresetcheck_vivado_button.csh' should be located in the same directory of 'write_questa_resetcheck_script.tcl' script." - exit 1 -endif - -## Check if it is sourced from Vivado installation or Questa RESETCHECK installation -## If it is a Vivado installation, then we need to source questa_cdc.tcl: -## Because it has the environment variable definition for QUESTA_RESETCHECK_TCL_SCRIPT_PATH, which is used to add the logo of Questa RESETCHECK to the button in Vivado UI. -if ( -e "$rootdir/questa_cdc.tcl" ) then - echo "source $rootdir/questa_cdc.tcl" >> $setup_file -endif - -echo "source $rootdir/write_questa_resetcheck_script.tcl" >> $setup_file -if ( $remove == 0 ) then - echo "write_questa_resetcheck_script -add_button" >> $setup_file -else - echo "write_questa_resetcheck_script -remove_button" >> $setup_file -endif -echo "exit" >> $setup_file - -vivado -mode tcl -source $setup_file -rm -f $setup_file diff --git a/tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test.tcl b/tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test.tcl deleted file mode 100755 index 6272ab02b..000000000 --- a/tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test.tcl +++ /dev/null @@ -1,13 +0,0 @@ -create_project project_1 ./project_1 -part xc7k70tfbg676-1 -force -set_property target_language VHDL [current_project] - -instantiate_example_design -template xilinx.com:design:wave_gen:1.0 - -update_compile_order -fileset sources_1 -update_compile_order -fileset sim_1 - -source $test_dir/../write_questa_cdc_script.tcl - -set design_top [find_top] -puts "::tclapp::siemens::questa_cdc::write_questa_cdc_script $design_top -output_directory $test_dir/test1_out -use_existing_xdc" -::tclapp::siemens::questa_cdc::write_questa_cdc_script $design_top -output_directory $test_dir/test1_out -use_existing_xdc diff --git a/tclapp/siemens/questa_cdc/write_questa_autocheck_script.tcl b/tclapp/siemens/questa_cdc/write_questa_autocheck_script.tcl deleted file mode 100755 index 07c8bb4b6..000000000 --- a/tclapp/siemens/questa_cdc/write_questa_autocheck_script.tcl +++ /dev/null @@ -1,1330 +0,0 @@ -# Usage: write_questa_autocheck_script [-output_directory ] [-use_existing_xdc|-generate_sdc] -############################################################################### -# -# write_questa_autocheck_script.tcl (Routine for Mentor Graphics Questa AutoCheck Application) -# -# Script created on 12/20/2016 by Islam Ahmed (Mentor Graphics Inc) & -# Ravi Kurlagunda -# Script last Modified on 05/29/2023 -# Vivado v2022.1 -############################################################################### - -namespace eval ::tclapp::siemens::questa_cdc { - # Export procs that should be allowed to import into other namespaces - namespace export write_questa_autocheck_script -} - -proc ::tclapp::siemens::questa_cdc::matches_default_libs {lib} { - - # Summary: internally used routine to check if default libs used - - # Argument Usage: - # lib: name of lib to check if default lib - - # Return Value: - # 1 is returned when the passed library matches on of the names of the default libraries - - # Categories: xilinxtclstore, siemens, questa_autocheck - - regsub ":.*" $lib {} lib - if {[string match -nocase $lib "xil_defaultlib"]} { - return 1 - } elseif {[string match -nocase $lib "work"]} { - return 1 - } else { - return 0 - } -} - -proc ::tclapp::siemens::questa_cdc::uniquify_lib {lib lang num} { - - # Summary: internally used routine to uniquify libs - - # Argument Usage: - # lib : lib name to uniquify - # lang : HDL language - # num : uniquified lib name - - # Return Value: - # The name of the uniquified library is returned - - # Categories: xilinxtclstore, siemens, questa_autocheck - - - set new_lib "" - if {[matches_default_libs $lib]} { - set new_lib [concat $lib:$lang:$num] - } else { - set new_lib [concat $lib:$lang] - } - return $new_lib -} -proc ::tclapp::siemens::questa_cdc::sv_vhdl_keyword_table {keyword_table} { - - # Summary: internally used routine to create a table containing verilog and VHDL keywords - - # Argument Usage: - # keyword_table : table to store the keywords - - # Return Value: - # The table accumulated with verilog and VHDL keywords is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - set keywords {library module entity package ENTITY PACKAGE `protect all define function task localparam interface `timescale} - foreach keyword $keywords { - dict incr keyword_table $keyword - } - return $keyword_table -} -proc ::tclapp::siemens::questa_cdc::is_sv_vhdl_keyword {keyword_table word} { - - # Summary: internally used routine to check if given word is a verilog or vhdl keyword - - # Argument Usage: - # keyword_table : Table containing vhdl and verilog keywords - # word : input word - - # Return Value: - # Boolean value representing if input word is a keyword or not is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - return [dict exists $keyword_table $word] -} - -proc ::tclapp::siemens::questa_cdc::write_questa_autocheck_script {args} { - - # Summary : This proc generates the Questa AutoCheck script file - - # Argument Usage: - # top_module : Provide the design top name - # [-output_directory ]: Specify the output directory to generate the scripts in - # [-use_existing_xdc]: Ignore running write_xdc command to generate the SDC file of the synthesized design, and use the input constraints file instead - # [-generate_sdc]: To generate the SDC file of the synthesized design - # [-autocheck_constraints]:Directives in the form of tcl File - # [-run ]: Run Questa AutoCheck and invoke the UI of Questa AutoCheck debug after generating the running scripts, default behavior is to stop after the generation of the scripts - # [-verify_timeout ]: Specify the timeout for Questa AutoCheck Verify run. By default the value specified is in seconds, use 'm' or 'h' suffix to interpret the value as minutes or hours - # [-add_button]: Add a button to run Questa AutoCheck in Vivado UI. - # [-remove_button]: Remove the Questa AutoCheck button from Vivado UI. - - # Return Value: Returns '0' on successful completion - - # Categories: xilinxtclstore, siemens, questa_autocheck - - # Keep an environment variable with the path of the script - set env(QUESTA_AUTOCHECK_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] - set args [subst [regsub -all \{ $args ""]] - set args [subst [regsub -all \} $args ""]] - - - - set userOD "." - set top_module "" - set use_existing_xdc 0 - set generate_sdc 0 - set autocheck_constraints "" - set run_questa_autocheck "autocheck compile" - set autocheck_verify_timeout "10m" - set autocheck_constraints "" - set add_button 0 - set remove_button 0 - set usage_msg "Usage : write_questa_autocheck_script \[-output_directory \] \[-use_existing_xdc|-generate_sdc\] \[-run \] \[-verify_timeout \] \[-autocheck_constraints \] \[-add_button\] \[-remove_button\]" - # Parse the arguments - if { [llength $args] > 10 } { - puts "** ERROR : Extra arguments passed to the proc." - puts $usage_msg - return 1 - } - # Generate help message - if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { - puts $usage_msg - return 0 - } - for {set i 0} {$i < [llength $args]} {incr i} { - if { [lindex $args $i] == "-output_directory" } { - incr i - set userOD "[lindex $args $i]" - if { $userOD == "" } { - puts "** ERROR : Specified output directory can't be null." - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-use_existing_xdc" } { - set use_existing_xdc 1 - } elseif { [lindex $args $i] == "-generate_sdc" } { - set generate_sdc 1 - } elseif { [lindex $args $i] == "-autocheck_constraints" } { - incr i - set autocheck_constraints "[lindex $args $i]" - if { ($autocheck_constraints == "") } { - puts "** ERROR : Missing argument value for -autocheck_constraints" - puts $usage_msg - return 1 - } - set autocheck_constraints [file normalize $autocheck_constraints] - } elseif { [lindex $args $i] == "-run" } { - incr i - set run_questa_autocheck "[lindex $args $i]" - if { ($run_questa_autocheck != "autocheck_compile") && ($run_questa_autocheck != "autocheck_verify") } { - puts "** ERROR : Invalid argument value for -run '$run_questa_autocheck'" - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-verify_timeout" } { - incr i - set autocheck_verify_timeout "[lindex $args $i]" - if { ($autocheck_verify_timeout == "") } { - puts "** ERROR : Missing argument value for -verify_timeout" - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-autocheck_constraints" } { - incr i - set autocheck_constraints "[lindex $args $i]" - if { ($autocheck_constraints == "") } { - puts "** ERROR : Missing argument value for -autocheck_constraints" - puts $usage_msg - return 1 - } - set autocheck_constraints [file normalize $autocheck_constraints] - } elseif { [lindex $args $i] == "-add_button" } { - set add_button 1 - } elseif { [lindex $args $i] == "-remove_button" } { - set remove_button 1 - } else { - set top_module [lindex $args $i] - } - } - - ## Set return code to 0 - set rc 0 - - # Getting the current vivado version and remove 'v' from the version string - set vivado_version [lindex [version] 1] - regsub {v} $vivado_version {} vivado_version - set major [lindex [split $vivado_version .] 0] - set minor [lindex [split $vivado_version .] 1] - set vivado_version "$major\.$minor" - - - ## -add_button and -remove_button can't be specified together - if { ($remove_button == 1) && ($add_button == 1) } { - puts "** ERROR : '-add_button' and '-remove_button' can't be specified together." - return 1 - } - - ## Add Vivado GUI button for Questa AutoCheck - if { $add_button == 1 } { - ## Example for code of the Vivado GUI button - ## ----------------------------------------- - ## 0=Run%20Questa%20AutoCheck tclapp::siemens::questa_cdc::write_questa_autocheck_script "" /home/iahmed/questa_autocheck_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20AutoCheck%20Run "" -run true - ## ----------------------------------------- - - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - #set status [catch {exec grep write_questa_autocheck_script $commands_file} result] - #if { $status == 0 } { - # puts "INFO : Vivado GUI button for running Questa AutoCheck is already installed in $commands_file. Exiting ..." - # return $rc - #} - set questa_autocheck_logo "$::env(QUESTA_AUTOCHECK_TCL_SCRIPT_PATH)/questa_autocheck_logo.PNG" - if { ! [file exists $questa_autocheck_logo] } { - set questa_autocheck_logo "\"$questa_autocheck_logo\"" - puts "INFO: Can't find the Questa AutoCheck logo at $questa_autocheck_logo" - if { [file exists "$::env(QHOME)/share/fpga_libs/Xilinx/questa_autocheck_logo.PNG"] } { - set questa_autocheck_logo "\$::env(QHOME)/share/fpga_libs/Xilinx/questa_autocheck_logo.PNG" - puts "INFO: Found the Questa AutoCheck logo at $questa_autocheck_logo" - } - } - if { [catch {open $commands_file a} result] } { - puts stderr "ERROR: Could not open commands.xml to add the Questa AutoCheck button, path '$commands_file'\n$result" - set rc 9 - return $rc - } else { - set commands_fh $result - puts "INFO: Adding Vivado GUI button for running Questa AutoCheck in $commands_file" - } - set questa_autocheck_command_index 0 - set vivado_cmds_version "1.0" - set encoding_cmds_version "UTF-8" - set major_cmds_version "1" - set minor_cmds_version "0" - set name_cmds_version "USER" - if { [file size $commands_file] } { - set file1 [open $commands_file r] - set file2 [read $file1] - set commands_file_line [split $file2 "\n"] - set last_command [lindex $commands_file_line end-1] - - foreach line $commands_file_line { - if {[regexp {write_questa_autocheck_script} $line]} { - puts "INFO : Vivado GUI button for running Questa AutoCheck is already installed in $commands_file. Exiting ..." - close $commands_fh - close $file1 - return $rc - } - } - - if { $last_command == ""} { - set questa_autocheck_command_index 0 - - } else { - set numbers 0 - foreach line $commands_file_line { - if {[regexp {([0-9]+)} $line m1 m2]} { - set numbers $m2 - } - } - set last_command_index $numbers - set questa_autocheck_command_index [incr last_command_index] - - } - close $file1 - } else { - puts $commands_fh "" - puts $commands_fh "" - set questa_autocheck_command_index 0 - } - puts $commands_fh " " - puts $commands_fh " $questa_autocheck_command_index" - puts $commands_fh " Run_Questa_AutoCheck" - puts $commands_fh " Run Questa AutoCheck" - puts $commands_fh " source $::env(QHOME)/share/fpga_libs/Xilinx/write_questa_autocheck_script.tcl; tclapp::siemens::questa_cdc::write_questa_autocheck_script" - puts $commands_fh " $questa_autocheck_logo" - puts $commands_fh " true" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Top_Module" - puts $commands_fh " \[lindex \[find_top\] 0\]" - puts $commands_fh " false" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Output_Directory" - puts $commands_fh " -output_directory Questa_AutoCheck" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Use_Existing_XDC" - puts $commands_fh " -use_existing_xdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Generate_SDC" - puts $commands_fh " -generate_sdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Invoke_Questa_AutoCheck_Run" - puts $commands_fh " -run autocheck_verify" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " AutoCheck_Verify_Timeout" - puts $commands_fh " -verify_timeout 10m" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " AutoCheck_Constraints_File" - puts $commands_fh " " - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh "" -# obselet generating .paini file -# set button_code "$questa_autocheck_command_index=Run%20Questa%20AutoCheck" -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_autocheck_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_autocheck_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_autocheck_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_autocheck_script" -# set button_code "$button_code \"\" $questa_autocheck_logo \"\" \"\" true ^@ \"\" true 6" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QAUTOCHECK true" -# set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20AutoCheck%20Run \"\" -run%20autocheck_verify true" -# set button_code "$button_code AutoCheck%20Verify%20Timeout \"\" -verify_timeout%2010m true" -# set button_code "$button_code AutoCheck%20Constraints%20File \"\" \"\" true" -# puts $commands_fh $button_code - - close $commands_fh - ################################################################################################## - ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if {[lindex $ip_lines $i] == ""} { - continue - } elseif {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - puts $op_file "" - close $ip_file - close $op_file - - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - ################################################################################################## - return $rc - } - - ## Remove Vivado GUI button for Questa AutoCheck - if { $remove_button == 1 } { - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - if { [file exist $commands_file] } { - ## Temp file to write the modified file - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - set questa_autocheck_command_found 0 - set questa_autocheck_command_found_flag 0 - set position 0 - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if { $questa_autocheck_command_found_flag == 0 } { - if { [regexp {\s\s\} [lindex $ip_lines $i]] && [regexp {\s\s\s\Run_Questa_AutoCheck\} [lindex $ip_lines [expr $i + 2]]] } { - regexp {([0-9]+)\} [lindex $ip_lines [expr $i + 1]] m1 m2 - set position $m2 - set questa_autocheck_command_found 1 - set questa_autocheck_command_found_flag 1 - continue - } - } else { - if { ! [regexp {\s\s\} [lindex $ip_lines $i]] } { - continue - } else { - set questa_autocheck_command_found_flag 0 - continue - } - } - - if {$questa_autocheck_command_found_flag == 0 && $questa_autocheck_command_found == 1 && [regexp {([0-9]+)\} [lindex $ip_lines $i]]} { - puts $op_file " $position\" - incr position - } else { - if {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - } - close $ip_file - close $op_file - - ## Now, remove the old commands file and replace it with the new one - #exec rm -f - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - if { $questa_autocheck_command_found == 1 } { - puts "INFO: Vivado GUI button for running Questa AutoCheck is removed from $commands_file" - } else { - puts "INFO: Vivado GUI button for running Questa AutoCheck wasn't found in $commands_file." - puts " : File has not been changed." - } - } else { - puts "INFO: File $::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml not exist, cannot remove from unexisting file" - } - return $rc - } - - if { $top_module == "" } { - puts "** ERROR : No top_module specified to the proc." - puts $usage_msg - return 1 - } - if { $userOD == "." } { - puts "INFO: Output files will be generated at [file join [pwd] $userOD]" - } else { - puts "INFO: Output files will be generated at $userOD" - file mkdir $userOD - } - - set qautocheck_ctrl "qautocheck_ctrl.tcl" - set qautocheck_compile_tcl "qautocheck_compile.tcl" - set run_makefile "Makefile.qautocheck" - set run_batfile "run_qac.bat" - set run_sdcfile "qautocheck_sdc.tcl" - set run_script "qautocheck_run.sh" - set encrypted_lib "dummmmmy_lib" - - ## Vivado install dir - set vivado_dir $::env(XILINX_VIVADO) - puts "INFO: Using Vivado install directory $vivado_dir" - - ## If set to 1, will strictly respect file order - if lib files appear non-consecutively this order is maintained - ## otherwise will respect only library order - if lib files appear non-consecutively they will still be merged into one compile command - set resp_file_order 1 - ##creating Verilog and VHDL keywords table - set keyword_table [dict create] - set keyword_table [sv_vhdl_keyword_table $keyword_table] - - ## Does VHDL file for default lib exist - set vhdl_default_lib_exists 0 - ## Does Verilog file for default lib exist - set vlog_default_lib_exists 0 - - set vhdl_std "-93" - set timescale "1ps" - - # Settings - set top_lib_dir "qft" - set autocheck_out_dir "AUTOCHECK_RESULTS" - set modelsimini "modelsim.ini" - - # Open output files to write - if { [catch {open $userOD/$run_batfile w} result] } { - puts stderr "ERROR: Could not open $run_batfile for writing\n$result" - set rc 2 - return $rc - } else { - set qautocheck_run_batfile_fh $result - puts "INFO: Writing Questa autocheck run batfile to file $userOD/$run_batfile" - } - if { [catch {open $userOD/$run_sdcfile w} result] } { - puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" - set rc 2 - return $rc - } else { - set qautocheck_run_sdcfile_fh $result - puts "INFO: Writing Questa autocheck run batfile to file $userOD/$run_sdcfile" - } - if { [catch {open $userOD/$run_script w} result] } { - puts stderr "ERROR: Could not open $run_script for writing\n$result" - set rc 2 - return $rc - } else { - set qautocheck_run_fh $result - puts "INFO: Writing Questa autocheck run script to file $userOD/$run_script" - } - if { [catch {open $userOD/$run_makefile w} result] } { - puts stderr "ERROR: Could not open $run_makefile for writing\n$result" - set rc 2 - return $rc - } else { - set qautocheck_run_makefile_fh $result - puts "INFO: Writing Questa AutoCheck run Makefile to file $userOD/$run_makefile" - } - - if { [catch {open $userOD/$qautocheck_ctrl w} result] } { - puts stderr "ERROR: Could not open $qautocheck_ctrl for writing\n$result" - set rc 3 - return $rc - } else { - set qautocheck_ctrl_fh $result - puts "INFO: Writing Questa AutoCheck control directives script to file $userOD/$qautocheck_ctrl" - } - - if { [catch {open $userOD/$qautocheck_compile_tcl w} result] } { - puts stderr "ERROR: Could not open $qautocheck_compile_tcl for writing\n$result" - set rc 4 - return $rc - } else { - set qautocheck_compile_tcl_fh $result - puts "INFO: Writing Questa AutoCheck Tcl script to file $userOD/$qautocheck_compile_tcl" - } - - - set found_top 0 - foreach t [find_top] { - if {[string match $t $top_module]} { - set found_top 1 - } - } - if {$found_top == 0} { - puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" - set rc 5 - return $rc - } - - # Get the PART and the ARCHITECTURE of the target device - set arch_name [get_property ARCHITECTURE [get_parts [get_property PART [current_project]]]] - # Identify synthesis fileset - #set synth_fileset [lindex [get_filesets * -filter {FILESET_TYPE == "DesignSrcs"}] 0] - set synth_fileset [current_fileset] - if { [string match $synth_fileset ""] } { - puts stderr "ERROR: Could not find any synthesis fileset" - set rc 6 - return $rc - } else { - puts "INFO: Found synthesis fileset $synth_fileset" - } - update_compile_order -fileset $synth_fileset - - ######CDC-25493- Extraction of +define options######## - set verilog_define_options [ get_property verilog_define [current_fileset] ] - if { [string match $verilog_define_options ""] } { - } else { - set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] - set prefix_verilog_define_options "+define+" - set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" - } - - - - - ## Blackbox unisims -# link_design -part [get_parts [get_property PART [current_project]]] -# puts "set_option stop {\\" -# set num_c 0 -# foreach c [get_lib_cells] { -# incr num_c -# puts -nonewline "$c " -# if {[expr $num_c%10] == 0} { -# puts "\\" -# } -# } -# puts "}\n" - - #set proj_name [get_property NAME [current_project]] - ## Get list of IPs being used - set ips [get_ips *] - set num_ip [llength $ips] - puts "INFO: Found $num_ip IPs in design" - - ## Keep track of libraries to avoid duplicat compilation - array set compiled_lib_list {} - array set lib_incdirs_list {} - array set black_box_libs {} - set compile_lines [list ] - set black_box_lines [list ] - set line "" - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are part of the IP - foreach ip $ips { - set ip_ref [get_property IPDEF $ip] - regsub {xilinx.com:ip:} $ip_ref {} ip_name - regsub {:} $ip_name {_v} ip_name - regsub {\.} $ip_name {_} ip_name - if {[regexp {xilinx.com:ip:blk_mem_gen:} $ip_ref]} { - set line "netlist blackbox ${ip_name}_synth" - lappend black_box_lines $line - set black_box_libs($ip_name) 1 - } - } - - set num_files 0 - set global_incdirs [list ] - - ## Get filelist for each IP - for {set i 0} {$i <= $num_ip} {incr i} { - if {$i < $num_ip} { - set ip [lindex $ips $i] - if {[catch { set ip_container [get_property IP_CORE_CONTAINER $ip] } errmsg]} { - puts "ErrorMsg: $errmsg" - set ip_container "dummy" - } - - -#support for CDC-25506 - "write_questa_cdc_script" needs to be enhanced to automatically extract source code for compressed Xilinx IP Containers (.xcix files). - if {[regexp {xcix} $ip_container all value] && [file exists $ip_container]} { - set is_xcix "1" - set ip_name [get_property NAME $ip] - set xcix_ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - set extracted_files [extract_files -base_dir $userOD/ip [get_files $ip_name.xcix]] - set wrong_files [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set files "" - foreach wrong_file $wrong_files { - set hdl_file [file tail $wrong_file] - foreach extract_file $extracted_files { - if {[regexp $hdl_file $extract_file]} { - if {[regexp {vho} $extract_file all value] || [regexp {veo} $extract_file all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value]} { - } else { - lappend files $extract_file - } - } - } - } - } else { - set is_xcix "0" - set ip [lindex $ips $i] - set ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - puts "INFO: Collecting files for IP $ip_ref ($ip_name)" - set files "" - set files_tmp [get_files -compile_order sources -used_in synthesis -of_objects $ip] - foreach file_tmp $files_tmp { - if {[file exists $file_tmp]} { - lappend files $file_tmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { -# if { [lsearch -exact $files $include_file] == "-1" } { - if {[file exists $include_file]} { - lappend files $include_file - } -# } - } - } - } else { - set is_xcix "0" - set ip $top_module - set ip_name $top_module - set ip_ref $top_module - set files "" - set files_tmp [get_files -norecurse -compile_order sources -used_in synthesis] - foreach ftmp $files_tmp { - if {[file exists $ftmp]} { - lappend files $ftmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { - if { [lsearch -exact $files $include_file] == "-1" && [file exists $include_file] } { - lappend files $include_file - } - } - puts "INFO: Collecting files for Top level" - } - - - - - - puts "DEBUG: Files for (IP: $ip) are: $files" - - set lib_file_order [] - array set lib_file_array {} - - set prev_lib "" - set prev_hdl_lang "" - set num_lib 0 - ## Find all files for the IP or Top level - foreach f $files { - #set f1 [lindex [get_files -of [get_filesets $synth_fileset] $f] 0] - incr num_files - if {$is_xcix == "1"} { - set fn $f - set lib $xcix_ip_name - set wrong_files2 [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set hdl_file2 [file tail $f] - foreach wrong_file2 $wrong_files2 { - if {[regexp $hdl_file2 $wrong_file2]} { - if {[regexp {vho} $wrong_file2 all value] || [regexp {veo} $wrong_file2 all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { - } else { - set f_original $wrong_file2 - } - } - } -# set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - if { [catch {set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]]} result] } { - set lib $xcix_ip_name - } else { - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - } - if ([regexp {vhd} $f all value]) { - set ft "VHDL" - } else { - set ft "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set fn [get_property NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - } else { - set fn [get_property NAME [lindex [get_files -all $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all $f] 0]] - } - } - - puts "\nINFO: File= $fn Library= $lib File_type= $ft " - ## Create a new compile unit if library or language changes between the previous and current files - if {$prev_lib == ""} { - set num_lib 0 - } elseif {![string match -nocase $lib $prev_lib]} { - incr num_lib - } - if {$resp_file_order == 1} { - set lib [uniquify_lib $lib $ft $num_lib] - } - - ## Create a list of files for each library - if {[string match $ft "Verilog"] || [string match $ft "Verilog Header"] || [string match $ft "SystemVerilog"] || [string match $ft "VHDL"] || [string match $ft "VHDL 2008"]} { - if {[info exists lib_file_array($lib)]} { - - - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - foreach word [split $line] { - if { [ is_sv_vhdl_keyword $keyword_table $word ] } { - set found_encrypted 0 - break - } - } - - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - - } - close $file_h - if {$found_encrypted == "1"} { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - } - - } else { - - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - foreach word [split $line] { - if { [ is_sv_vhdl_keyword $keyword_table $word ] } { - set found_encrypted 0 - break - } - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - } - close $file_h - if {$found_encrypted == "1" } { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) $fn - if { ![regexp {mem_gen_v\d+_\d+} $lib] && ![regexp {fifo_generator_v\d+_\d+} $lib] } { - lappend lib_file_order $lib - } else { - set lib_file_order_tmp $lib_file_order - set lib_file_order $lib - foreach lib_tmp $lib_file_order_tmp { - lappend lib_file_order $lib_tmp - } - } - - } - - - - puts "\nINFO: Adding Library= $lib to list of libraries" - } - } - - set lib_file_lang($lib) $ft - regsub ":.*" $lib {} prev_lib - - ## Header files don't count and will not cause new compile unit to be created - if {![string match -nocase $ft "Verilog Header"]} { - set prev_hdl_lang $ft - } - - if {([string match $ft "Verilog"] || [string match $ft "SystemVerilog"]) && [matches_default_libs $lib]} { - set vlog_default_lib_exists 1 - } - if {[string match $ft "VHDL"] && [matches_default_libs $lib]} { - set vhdl_default_lib_exists 1 - } - } - - ## Check that the header files of a specific IP really exists in all the libraries' lists for this IP - foreach f $files { -# set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] -# set fn [get_property NAME [lindex [get_files -all $f] 0]] - if {[string match $ft "Verilog Header"]} { - foreach lib $lib_file_order { - set lang $lib_file_lang($lib) - if { ([regexp {Verilog} $lang]) && ([lsearch -exact $lib_file_array($lib) $fn] == "-1") } { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - puts $lib_file_array($lib) - } - } - } - } - - puts "DEBUG: IP= $ip_ref IPINST = $ip_name has following libraries $lib_file_order" - - # For each library, list the files - foreach lib $lib_file_order { -# if {![info exists compiled_lib_list($lib)] || [matches_default_libs $lib]} { - regsub ":.*" $lib {} lib_no_num - puts "INFO: Obtaining list of files for design= $ip_ref, library= $lib" - set lang $lib_file_lang($lib) - set incdirs [list ] - array unset incdir_ar - ## Create list of include files - if {[regexp {Verilog} $lang]} { - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - set is_include "0" - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {$is_include == 1 || [string match $f_type "Verilog Header"]} { - set file_dir [file dirname $f] - if {![info exists incdir_ar($file_dir)]} { - lappend incdirs [concat +incdir+$file_dir] - lappend global_incdirs [concat +incdir+$file_dir] - puts "INFO: Found include file $f" - set incdir_ar($file_dir) 1 - set lib_incdirs_list($lib_no_num) $incdirs - } - } - } - } - ## Print files to compile script - set debug_num [llength lib_file_array($lib)] - puts "DEBUG: Found $debug_num of files in library= $lib, IP= $ip_ref IPINST= $ip_name" - if {[string match $lang "VHDL"]} { - set line "vcom -allowProtectedBeforeBody $vhdl_std -work $lib_no_num \\" - lappend compile_lines $line - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "VHDL"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f is $f_type, library= $lib $lib_no_num fileset= $synth_fileset and does not match VHDL" - } - } - set line "\n" - lappend compile_lines $line - } elseif {[string match $lang "Verilog"] || [string match $lang "SystemVerilog"]} { - if {[string match $lang "SystemVerilog"]} { - set sv_switch "-sv" - } else { - set sv_switch "" - } - - set line "vlog -suppress 13389 $verilog_define_options $sv_switch -incr -work $lib_no_num \\" - lappend compile_lines $line - if { [info exists lib_incdirs_list($lib_no_num)] && $lib_incdirs_list($lib_no_num) != ""} { -# foreach idir $lib_incdirs_list($lib_no_num) { -# set line " $idir \\" - set line " $global_incdirs \\" - lappend compile_lines $line -# } - } - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "Verilog"] || [string match $f_type "SystemVerilog"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f, fileset= $synth_fileset do not match Verilog or SystemVerilog" - } - } - set line "\n" - lappend compile_lines $line - } -# } else { -# puts "INFO: Library $lib has already been compiled. Skipping it." -# } - } - - ## Bookkeeping on which libraries are already compiled - foreach lib $lib_file_order { - regsub ":.*" $lib {} lib - set compiled_lib_list($lib) 1 - } - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are sub-cores - foreach subcore $lib_file_order { - if {![info exists black_box_libs($subcore)]} { - if {[regexp {^blk_mem_gen_v\d+_\d+} $subcore]} { - # set line "netlist blackbox ${subcore}_synth" - lappend black_box_lines $line - set black_box_libs($subcore) 1 - } - } - } - - ## Delete all information related to this IP - set lib_file_order [] - array unset lib_file_array * - array unset lib_file_lang * - } - - if {$num_files == 0} { - puts stderr "ERROR: Could not find any files in synthesis fileset" - set rc 7 - return $rc - } - - puts $qautocheck_compile_tcl_fh "\n#" - puts $qautocheck_compile_tcl_fh "# Create work library" - puts $qautocheck_compile_tcl_fh "#" - puts $qautocheck_compile_tcl_fh "vlib $top_lib_dir" - puts $qautocheck_compile_tcl_fh "vlib $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qautocheck_compile_tcl_fh "vlib $top_lib_dir/$key" - } - - puts $qautocheck_compile_tcl_fh "\n#" - puts $qautocheck_compile_tcl_fh "# Map libraries" - puts $qautocheck_compile_tcl_fh "#" - puts $qautocheck_compile_tcl_fh "vmap work $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qautocheck_compile_tcl_fh "vmap $key $top_lib_dir/$key" - } - - puts $qautocheck_compile_tcl_fh "\n#" - puts $qautocheck_compile_tcl_fh "# Compile files section" - puts $qautocheck_compile_tcl_fh "#" - - - set first_pack "1" - foreach l $compile_lines { - if {[regexp {\_pack\.vhd} $l all value] } { - if {$first_pack == "1"} { - puts $qautocheck_compile_tcl_fh "\n$vcom_line\n $l" - set first_pack "0" - } else { - puts $qautocheck_compile_tcl_fh "$l" - set first_pack "0" - - } - } - if {[regexp {allowProtectedBeforeBody} $l all value] } { - set vcom_line $l - set first_pack "1" - } - - - - } - - - puts $qautocheck_compile_tcl_fh "\n" - - - - - foreach l $compile_lines { - puts $qautocheck_compile_tcl_fh $l - } - - puts $qautocheck_compile_tcl_fh "\n#" - puts $qautocheck_compile_tcl_fh "# Add global set/reset" - puts $qautocheck_compile_tcl_fh "#" - puts $qautocheck_compile_tcl_fh "vlog -suppress 13389 $verilog_define_options -work xil_defaultlib $vivado_dir/data/verilog/src/glbl.v" - - close $qautocheck_compile_tcl_fh - - ## Print compile information - puts $qautocheck_ctrl_fh "netlist fpga -vendor xilinx -version $vivado_version -library vivado" - - if {$black_box_lines != ""} { - puts $qautocheck_ctrl_fh "\n#" - puts $qautocheck_ctrl_fh "# Black box blk_mem_gen" - puts $qautocheck_ctrl_fh "#" - foreach l $black_box_lines { - puts $qautocheck_ctrl_fh $l - } - } - close $qautocheck_ctrl_fh - - ## Get the library names and append a '-L' to the library name - array set qft_libs {} - foreach lib [array names compiled_lib_list] { - set qft_libs($lib) 1 - } - set lib_args "" - foreach lib [array names qft_libs] { - set lib_args [concat $lib_args -L $lib] - } - - ## Dump the run Makefile - puts $qautocheck_run_makefile_fh "DUT=$top_module" - puts $qautocheck_run_makefile_fh "TIMEOUT=$autocheck_verify_timeout" - puts $qautocheck_run_makefile_fh "" - puts $qautocheck_run_makefile_fh "clean:" - puts $qautocheck_run_makefile_fh "\trm -rf $top_lib_dir $autocheck_out_dir" - puts $qautocheck_run_makefile_fh "" - puts $qautocheck_run_makefile_fh "autocheck_compile:" - puts $qautocheck_run_makefile_fh "\t\$(QHOME)/bin/qverify -c -licq -l qautocheck_${top_module}.log -od $autocheck_out_dir -do \"\\" - puts $qautocheck_run_makefile_fh "\tonerror {exit 1}; \\" - set autocheck_constraints_do "" - if {$autocheck_constraints != ""} { - set autocheck_constraints_do "do $autocheck_constraints;" - } - puts $qautocheck_run_makefile_fh "\t$autocheck_constraints_do; \\" - puts $qautocheck_run_makefile_fh "\tdo $qautocheck_ctrl; \\" - puts $qautocheck_run_makefile_fh "\tdo $qautocheck_compile_tcl; \\" - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qautocheck_run_makefile_fh "\tnetlist create -d $top_module $lib_args -tool autocheck; \\" - puts $qautocheck_run_makefile_fh "\tsdc load $file; \\" - } - } - } elseif { $generate_sdc == 1 } { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qautocheck_run_makefile_fh "\tnetlist create -d $top_module $lib_args -tool autocheck; \\" - puts $qautocheck_run_makefile_fh "\tsdc load $sdc_out_file; \\" - } - } - puts $qautocheck_run_makefile_fh "\tautocheck disable -type ARITH*; \\" - puts $qautocheck_run_makefile_fh "\tautocheck compile -d \$(DUT) $lib_args; \\" - puts $qautocheck_run_makefile_fh "\texit 0\"" - - ## Dump commands for the verify run in the run Makefile - puts $qautocheck_run_makefile_fh "" - puts $qautocheck_run_makefile_fh "autocheck_verify:" - puts $qautocheck_run_makefile_fh "\t\$(QHOME)/bin/qverify -c -licq -od $autocheck_out_dir -do \"\\" - puts $qautocheck_run_makefile_fh "\tonerror {exit 1}; \\" - puts $qautocheck_run_makefile_fh "\tautocheck load db $autocheck_out_dir/autocheck_compile.db; \\" - puts $qautocheck_run_makefile_fh "\tautocheck verify -j 4 -rtl_init_values -timeout \$(TIMEOUT); \\" - puts $qautocheck_run_makefile_fh "\texit 0\"" - - close $qautocheck_run_makefile_fh - puts $qautocheck_run_batfile_fh "@ECHO OFF" - puts $qautocheck_run_batfile_fh "" - puts $qautocheck_run_batfile_fh "SET DUT=$top_module" - puts $qautocheck_run_batfile_fh "SET TIMEOUT=$autocheck_verify_timeout" - puts $qautocheck_run_batfile_fh "" - puts $qautocheck_run_batfile_fh "IF \[%1\]==\[\] goto :usage" - puts $qautocheck_run_batfile_fh "IF %1==clean (" - puts $qautocheck_run_batfile_fh " call :clean" - puts $qautocheck_run_batfile_fh ") ELSE IF %1==compile (" - puts $qautocheck_run_batfile_fh " call :compile" - puts $qautocheck_run_batfile_fh ") ELSE IF %1==autocheck (" - puts $qautocheck_run_batfile_fh " call :autocheck" - puts $qautocheck_run_batfile_fh ") ELSE IF %1==debug_autocheck (" - puts $qautocheck_run_batfile_fh " call :debug_autocheck" - puts $qautocheck_run_batfile_fh ") ELSE IF %1==all (" - puts $qautocheck_run_batfile_fh " call :clean" - puts $qautocheck_run_batfile_fh " call :compile" - puts $qautocheck_run_batfile_fh " call :autocheck" - puts $qautocheck_run_batfile_fh " call :debug_autocheck" - puts $qautocheck_run_batfile_fh ") ELSE (" - puts $qautocheck_run_batfile_fh " call :usage" - puts $qautocheck_run_batfile_fh ")" - puts $qautocheck_run_batfile_fh "exit /b" - puts $qautocheck_run_batfile_fh "" - puts $qautocheck_run_batfile_fh ":clean" - puts $qautocheck_run_batfile_fh "\tIF EXIST $top_lib_dir RMDIR /S /Q $top_lib_dir" - puts $qautocheck_run_batfile_fh "\tIF EXIST $autocheck_out_dir RMDIR /S /Q $autocheck_out_dir" - puts $qautocheck_run_batfile_fh "\texit /b" - puts $qautocheck_run_batfile_fh "" - puts $qautocheck_run_batfile_fh ":compile" - - puts $qautocheck_run_batfile_fh "\tqverify -c -licq -l qautocheck_${top_module}.log -od $autocheck_out_dir -do ^\"$autocheck_constraints_do do $qautocheck_ctrl;do $qautocheck_compile_tcl;do $run_sdcfile^\"" - - - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qautocheck_run_sdcfile_fh "netlist create -d $top_module $lib_args -tool autocheck" - puts $qautocheck_run_sdcfile_fh "sdc load $file" - } - } - } elseif { $generate_sdc == 1 } { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qautocheck_run_sdcfile_fh "netlist create -d $top_module $lib_args -tool autocheck" - puts $qautocheck_run_sdcfile_fh "sdc load $sdc_out_file;" - } - } - puts $qautocheck_run_batfile_fh "\texit /b" - puts $qautocheck_run_batfile_fh "" - - puts $qautocheck_run_batfile_fh ":autocheck" - puts $qautocheck_run_batfile_fh "\tqverify -c -licq -l qautocheck_${top_module}.log -od $autocheck_out_dir -do ^\"$autocheck_constraints_do do $qautocheck_ctrl; autocheck compile -d %DUT% $lib_args;autocheck verify -j 4 -rtl_init_values -timeout %TIMEOUT%; ^\"" - puts $qautocheck_run_batfile_fh "\texit /b" - puts $qautocheck_run_batfile_fh "" - puts $qautocheck_run_batfile_fh ":debug_autocheck" - puts $qautocheck_run_batfile_fh "\tqverify $autocheck_out_dir\/autocheck\.db " - puts $qautocheck_run_batfile_fh "\texit /b" - puts $qautocheck_run_batfile_fh "" - puts $qautocheck_run_batfile_fh ":usage" - puts $qautocheck_run_batfile_fh "\tECHO \#\#\# run_qac clean \.\.\.\.\.\.\.\.\.\.\.\. Clean all results from directory" - puts $qautocheck_run_batfile_fh "\tECHO \#\#\# run_qac compile \.\.\.\.\.\.\.\.\.\. Compile source code" - puts $qautocheck_run_batfile_fh "\tECHO \#\#\# run_qac autocheck \.\.\.\.\.\.\.\. Run autocheck" - puts $qautocheck_run_batfile_fh "\tECHO \#\#\# run_qac debug_autocheck \.\. Debug autocheck Run" - puts $qautocheck_run_batfile_fh "\tECHO \#\#\# run_qac all \.\.\.\.\.\.\.\.\.\.\.\.\.\. Run all autocheck Steps on Souce Code and Launch Debug" - puts $qautocheck_run_batfile_fh "\texit /b" - - - close $qautocheck_run_batfile_fh - ## Dump the run file - puts $qautocheck_run_fh "#! /bin/sh" - puts $qautocheck_run_fh "" - puts $qautocheck_run_fh "rm -rf $top_lib_dir $autocheck_out_dir" - puts $qautocheck_run_fh "qverify -c -licq -l qautocheck_${top_module}.log -od $autocheck_out_dir -do \"$autocheck_constraints_do; do $qautocheck_ctrl; do $qautocheck_compile_tcl; do $run_sdcfile;autocheck disable -type ARITH*;autocheck compile -d ${top_module} $lib_args;autocheck verify -j 4 -rtl_init_values -timeout ${autocheck_verify_timeout}; \"" - close $qautocheck_run_fh - - - puts "INFO : Generation of running scripts for Questa AutoCheck is done at [pwd]/$userOD" - - if { $run_questa_autocheck == "autocheck_compile" } { - puts "INFO : Running Questa AutoCheck (Command: autocheck compile), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/AUTOCHECK_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; make autocheck_compile -f $run_makefile" - } - puts "INFO : Questa AutoCheck run is finished" - puts "INFO : Invoking Questa AutoCheck UI for debugging." - exec qverify $userOD/AUTOCHECK_RESULTS/autocheck.db & - } elseif { $run_questa_autocheck == "autocheck_verify" } { - puts "INFO : Running Questa AutoCheck (Command: autocheck verify), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/AUTOCHECK_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; make autocheck_compile autocheck_verify -f $run_makefile" - } - puts "INFO : Questa AutoCheck run is finished" - puts "INFO : Invoking Questa AutoCheck UI for debugging." - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; qverify -l qverify_ui.log AUTOCHECK_RESULTS/autocheck.db" & - } - } - return $rc -} - - -## Auto-import the procs of the Questa AutoCheck script -namespace import tclapp::siemens::questa_cdc::* diff --git a/tclapp/siemens/questa_cdc/write_questa_cdc_script.tcl b/tclapp/siemens/questa_cdc/write_questa_cdc_script.tcl deleted file mode 100755 index 1d0caaa52..000000000 --- a/tclapp/siemens/questa_cdc/write_questa_cdc_script.tcl +++ /dev/null @@ -1,1308 +0,0 @@ -# Usage: write_questa_cdc_script [-output_directory ] [-use_existing_xdc] -############################################################################### -# -# write_questa_cdc_script.tcl (Routine for Mentor Graphics Questa CDC Application) -# -# Script created on 12/20/2016 by Islam Ahmed (Mentor Graphics Inc) & -# Ravi Kurlagunda -# -# Script last Modified on 05/29/2023 -# Vivado v2022.1 -############################################################################### - -namespace eval ::tclapp::siemens::questa_cdc { - # Export procs that should be allowed to import into other namespaces - namespace export write_questa_cdc_script -} - -proc ::tclapp::siemens::questa_cdc::matches_default_libs {lib} { - - # Summary: internally used routine to check if default libs used - - # Argument Usage: - # lib: name of lib to check if default lib - - # Return Value: - # 1 is returned when the passed library matches on of the names of the default libraries - - # Categories: xilinxtclstore, siemens, questa_cdc - - regsub ":.*" $lib {} lib - if {[string match -nocase $lib "xil_defaultlib"]} { - return 1 - } elseif {[string match -nocase $lib "work"]} { - return 1 - } else { - return 0 - } -} - -proc ::tclapp::siemens::questa_cdc::uniquify_lib {lib lang num} { - - # Summary: internally used routine to uniquify libs - - # Argument Usage: - # lib : lib name to uniquify - # lang : HDL language - # num : uniquified lib name - - # Return Value: - # The name of the uniquified library is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - - set new_lib "" - if {[matches_default_libs $lib]} { - set new_lib [concat $lib:$lang:$num] - } else { - set new_lib [concat $lib:$lang] - } - return $new_lib -} - - -proc ::tclapp::siemens::questa_cdc::sv_vhdl_keyword_table {keyword_table} { - - - # Summary: internally used routine to create a table containing verilog and VHDL keywords - - # Argument Usage: - # keyword_table : table to store the keywords - - # Return Value: - # The table accumulated with verilog and VHDL keywords is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - set keywords {library module entity package ENTITY PACKAGE `protect all define function task localparam interface `timescale } - foreach keyword $keywords { - dict incr keyword_table $keyword - } - return $keyword_table -} -proc ::tclapp::siemens::questa_cdc::is_sv_vhdl_keyword {keyword_table word} { - - # Summary: internally used routine to check if given word is a verilog or vhdl keyword - - # Argument Usage: - # keyword_table : Table containing vhdl and verilog keywords - # word : input word - - # Return Value: - # Boolean value representing if input word is a keyword or not is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - return [dict exists $keyword_table $word] -} -proc ::tclapp::siemens::questa_cdc::write_questa_cdc_script {args} { - - # Summary : This proc generates the Questa CDC script file - - # Argument Usage: - # top_module : Provide the design top name - # [-output_directory ]: Specify the output directory to generate the scripts in - # [-use_existing_xdc]: To use the input constraints file instead of generating SDC file - # [-generate_sdc]: To generate the SDC file of the synthesized design - # [-run ]: Run Questa CDC and invoke the UI of Questa CDC debug after generating the running scripts, default behavior is to sto p after the generation of the scripts - # [-cdc_constraints]:Directives in the form of tcl File - # [-add_button]: Add a button to run Questa CDC in Vivado UI. - # [-remove_button]: Remove the Questa CDC button from Vivado UI. - - # Return Value: Returns '0' on successful completion - - # Categories: xilinxtclstore, siemens, questa_cdc - - # Keep an environment variable with the path of the script - set env(QUESTA_CDC_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] - - set args [subst [regsub -all \{ $args ""]] - set args [subst [regsub -all \} $args ""]] - set userOD "." - set top_module "" - set use_existing_xdc 0 - set generate_sdc 0 - set run_questa_cdc "cdc run" - set cdc_constraints "" - set add_button 0 - set remove_button 0 - set usage_msg "Usage : write_questa_cdc_script \[-output_directory \] \[-use_existing_xdc|-generate_sdc\] \[-cdc_constraints \] \[-run cdc_setup|cdc_run>\] \[-add_button\] \[-remove_button\]" - # Parse the arguments - if { [llength $args] > 8 } { - puts "** ERROR : Extra arguments passed to the proc." - puts $usage_msg - return 1 - } - # Generate help message - if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { - puts $usage_msg - return 0 - } - for {set i 0} {$i < [llength $args]} {incr i} { - if { [lindex $args $i] == "-output_directory" } { - incr i - set userOD "[lindex $args $i]" - if { $userOD == "" } { - puts "** ERROR : Specified output directory can't be null." - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-use_existing_xdc" } { - set use_existing_xdc 1 - } elseif { [lindex $args $i] == "-generate_sdc" } { - set generate_sdc 1 - } elseif { [lindex $args $i] == "-run" } { - incr i - set run_questa_cdc "[lindex $args $i]" - if { ($run_questa_cdc != "cdc_run") && ($run_questa_cdc != "cdc_setup") } { - puts "** ERROR : Invalid argument value for -run '$run_questa_cdc'" - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-cdc_constraints" } { - incr i - set cdc_constraints "[lindex $args $i]" - if { ($cdc_constraints == "") } { - puts "** ERROR : Missing argument value for -cdc_constraints" - puts $usage_msg - return 1 - } - set cdc_constraints [file normalize $cdc_constraints] - } elseif { [lindex $args $i] == "-add_button" } { - set add_button 1 - } elseif { [lindex $args $i] == "-remove_button" } { - set remove_button 1 - } else { - set top_module [lindex $args $i] - } - } - - ## Set return code to 0 - set rc 0 - - # Getting the current vivado version and remove 'v' from the version string - set vivado_version [lindex [version] 1] - regsub {v} $vivado_version {} vivado_version - set major [lindex [split $vivado_version .] 0] - set minor [lindex [split $vivado_version .] 1] - set vivado_version "$major\.$minor" - - ## -add_button and -remove_button can't be specified together - if { ($remove_button == 1) && ($add_button == 1) } { - puts "** ERROR : '-add_button' and '-remove_button' can't be specified together." - return 1 - } - - ## Add Vivado GUI button for Questa CDC - if { $add_button == 1 } { - ## Example for code of the Vivado GUI button - ## ----------------------------------------- - ## 0=Run%20Questa%20CDC tclapp::siemens::questa_cdc::write_questa_cdc_script "" /home/iahmed/questa_cdc_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20CDC%20Run "" -run true - ## ----------------------------------------- - - - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - # set status [catch {exec grep write_questa_cdc_script $commands_file} result] - # if { $status == 0 } { - # puts "INFO : Vivado GUI button for running Questa CDC is already installed in $commands_file. Exiting ..." - # return $rc - # } - set questa_cdc_logo "$::env(QUESTA_CDC_TCL_SCRIPT_PATH)/questa_cdc_logo.PNG" - if { ! [file exists $questa_cdc_logo] } { - set questa_cdc_logo "\"$questa_cdc_logo\"" - puts "INFO: Can't find the Questa CDC logo at $questa_cdc_logo" - if { [file exists "$::env(QHOME)/share/fpga_libs/Xilinx/questa_cdc_logo.PNG"] } { - set questa_cdc_logo "\$::env(QHOME)/share/fpga_libs/Xilinx/questa_cdc_logo.PNG" - puts "INFO: Found the Questa CDC logo at $questa_cdc_logo" - } - } - if { [catch {open $commands_file a} result] } { - puts stderr "ERROR: Could not open commands.xml to add the Questa CDC button, path '$commands_file'\n$result" - set rc 9 - return $rc - } else { - set commands_fh $result - puts "INFO: Adding Vivado GUI button for running Questa CDC in $commands_file" - } - set questa_cdc_command_index 0 - set vivado_cmds_version "1.0" - set encoding_cmds_version "UTF-8" - set major_cmds_version "1" - set minor_cmds_version "0" - set name_cmds_version "USER" - if { [file size $commands_file] } { - set file1 [open $commands_file r] - set file2 [read $file1] - set commands_file_line [split $file2 "\n"] - set last_command [lindex $commands_file_line end-1] - - foreach line $commands_file_line { - if {[regexp {write_questa_cdc_script} $line]} { - puts "INFO : Vivado GUI button for running Questa CDC is already installed in $commands_file. Exiting ..." - close $commands_fh - close $file1 - return $rc - } - } - - if { $last_command == ""} { - set questa_cdc_command_index 0 - } else { - set numbers 0 - foreach line $commands_file_line { - if {[regexp {([0-9]+)} $line m1 m2]} { - set numbers $m2 - } - } - set last_command_index $numbers - set questa_cdc_command_index [incr last_command_index] - } - close $file1 - } else { - puts $commands_fh "" - puts $commands_fh "" - set questa_cdc_command_index 0 - } - puts $commands_fh " " - puts $commands_fh " $questa_cdc_command_index" - puts $commands_fh " Run_Questa_CDC" - puts $commands_fh " Run Questa CDC" - puts $commands_fh " source \$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_cdc_script.tcl; tclapp::siemens::questa_cdc::write_questa_cdc_script" - puts $commands_fh " $questa_cdc_logo" - puts $commands_fh " true" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Top_Module" - puts $commands_fh " \[lindex \[find_top\] 0\]" - puts $commands_fh " false" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Output_Directory" - puts $commands_fh " -output_directory Questa_CDC" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Use_Existing_XDC" - puts $commands_fh " -use_existing_xdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " CDC_Constraints_File" - puts $commands_fh " " - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Generate_SDC" - puts $commands_fh " -generate_sdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Invoke_Questa_CDC_Run" - puts $commands_fh " -run cdc_setup" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh "" - - close $commands_fh - ################################################################################################## - ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if {[lindex $ip_lines $i] == ""} { - continue - } elseif {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - puts $op_file "" - close $ip_file - close $op_file - - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - ################################################################################################## - return $rc - } - - ## Remove Vivado GUI button for Questa CDC - if { $remove_button == 1 } { - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - if { [file exist $commands_file] } { - ## Temp file to write the modified file - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - set questa_cdc_command_found 0 - set questa_cdc_command_found_flag 0 - set position 0 - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if { $questa_cdc_command_found_flag == 0 } { - if { [regexp {\s\s\} [lindex $ip_lines $i]] && [regexp {\s\s\s\Run_Questa_CDC\} [lindex $ip_lines [expr $i + 2]]] } { - regexp {([0-9]+)\} [lindex $ip_lines [expr $i + 1]] m1 m2 - set position $m2 - set questa_cdc_command_found 1 - set questa_cdc_command_found_flag 1 - continue - } - } else { - if { ! [regexp {\s\s\} [lindex $ip_lines $i]] } { - continue - } else { - set questa_cdc_command_found_flag 0 - continue - } - } - - if {$questa_cdc_command_found_flag == 0 && $questa_cdc_command_found == 1 && [regexp {([0-9]+)\} [lindex $ip_lines $i]]} { - puts $op_file " $position\" - incr position - } else { - if {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - } - close $ip_file - close $op_file - - ## Now, remove the old commands file and replace it with the new one - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - if { $questa_cdc_command_found == 1 } { - puts "INFO: Vivado GUI button for running Questa CDC is removed from $commands_file" - } else { - puts "INFO: Vivado GUI button for running Questa CDC wasn't found in $commands_file." - puts " : File has not been changed." - } - } else { - puts "INFO: File $::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml not exist, cannot remove from unexisting file" - } - return $rc - } - - if { $top_module == "" } { - puts "** ERROR : No top_module specified to the proc." - puts $usage_msg - return 1 - } - if { $userOD == "." } { - puts "INFO: Output files will be generated at [file join [pwd] $userOD]" - } else { - puts "INFO: Output files will be generated at $userOD" - file mkdir $userOD - } - - set qcdc_ctrl "qcdc_ctrl.tcl" - set run_makefile "Makefile.qcdc" - set run_batfile "run_qcdc.bat" - set run_sdcfile "qcdc_sdc.tcl" - set qcdc_compile_tcl "qcdc_compile.tcl" - set run_script "qcdc_run.sh" - set tcl_script "qcdc_run.tcl" - set encrypted_lib "dummmmmy_lib" - - ## Vivado install dir - set vivado_dir $::env(XILINX_VIVADO) - puts "INFO: Using Vivado install directory $vivado_dir" - - ## If set to 1, will strictly respect file order - if lib files appear non-consecutively this order is maintained - ## otherwise will respect only library order - if lib files appear non-consecutively they will still be merged into one compile command - set resp_file_order 1 - ##creating Verilog and VHDL keywords table - set keyword_table [dict create] - set keyword_table [sv_vhdl_keyword_table $keyword_table] - - ## Does VHDL file for default lib exist - set vhdl_default_lib_exists 0 - ## Does Verilog file for default lib exist - set vlog_default_lib_exists 0 - - set vhdl_std "-93" - set timescale "1ps" - - # Settings - set top_lib_dir "qft" - set cdc_out_dir "CDC_RESULTS" - set modelsimini "modelsim.ini" - - # Open output files to write - if { [catch {open $userOD/$run_makefile w} result] } { - puts stderr "ERROR: Could not open $run_makefile for writing\n$result" - set rc 2 - return $rc - } else { - set qcdc_run_makefile_fh $result - puts "INFO: Writing Questa CDC run Makefile to file $userOD/$run_makefile" - } - if { [catch {open $userOD/$run_batfile w} result] } { - puts stderr "ERROR: Could not open $run_batfile for writing\n$result" - set rc 2 - return $rc - } else { - set qcdc_run_batfile_fh $result - puts "INFO: Writing Questa CDC run batfile to file $userOD/$run_batfile" - } - if { [catch {open $userOD/$run_sdcfile w} result] } { - puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" - set rc 2 - return $rc - } else { - set qcdc_run_sdcfile_fh $result - puts "INFO: Writing Questa CDC run batfile to file $userOD/$run_sdcfile" - } - if { [catch {open $userOD/$run_script w} result] } { - puts stderr "ERROR: Could not open $run_script for writing\n$result" - set rc 2 - return $rc - } else { - set qcdc_run_fh $result - puts "INFO: Writing Questa CDC run script to file $userOD/$run_script" - } - - if { [catch {open $userOD/$tcl_script w} result] } { - puts stderr "ERROR: Could not open $tcl_script for writing\n$result" - set rc 10 - return $rc - } else { - set qcdc_tcl_fh $result - puts "INFO: Writing Questa CDC tcl script to file $userOD/$tcl_script" - } - - if { [catch {open $userOD/$qcdc_ctrl w} result] } { - puts stderr "ERROR: Could not open $qcdc_ctrl for writing\n$result" - set rc 3 - return $rc - } else { - set qcdc_ctrl_fh $result - puts "INFO: Writing Questa CDC control directives script to file $userOD/$qcdc_ctrl" - } - - if { [catch {open $userOD/$qcdc_compile_tcl w} result] } { - puts stderr "ERROR: Could not open $qcdc_compile_tcl for writing\n$result" - set rc 4 - return $rc - } else { - set qcdc_compile_tcl_fh $result - puts "INFO: Writing Questa CDC Tcl script to file $userOD/$qcdc_compile_tcl" - } - - - set found_top 0 - foreach t [find_top] { - if {[string match $t $top_module]} { - set found_top 1 - } - } - if {$found_top == 0} { - puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" - set rc 5 - return $rc - } - - # Get the PART and the ARCHITECTURE of the target device - set arch_name [get_property ARCHITECTURE [get_parts [get_property PART [current_project]]]] - # Identify synthesis fileset - #set synth_fileset [lindex [get_filesets * -filter {FILESET_TYPE == "DesignSrcs"}] 0] - set synth_fileset [current_fileset] - if { [string match $synth_fileset ""] } { - puts stderr "ERROR: Could not find any synthesis fileset" - set rc 6 - return $rc - } else { - puts "INFO: Found synthesis fileset $synth_fileset" - } - update_compile_order -fileset $synth_fileset -######CDC-25493- Extraction of +define options######## - set verilog_define_options [ get_property verilog_define [current_fileset] ] - if { [string match $verilog_define_options ""] } { - } else { - set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] - set prefix_verilog_define_options "+define+" - set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" - } - - - - #set proj_name [get_property NAME [current_project]] - ## Get list of IPs being used - set ips [get_ips *] - set num_ip [llength $ips] - puts "INFO: Found $num_ip IPs in design" - - ## Keep track of libraries to avoid duplicat compilation - array set compiled_lib_list {} - array set lib_incdirs_list {} - array set black_box_libs {} - set compile_lines [list ] - set black_box_lines [list ] - set line "" - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are part of the IP - foreach ip $ips { - set ip_ref [get_property IPDEF $ip] - regsub {xilinx.com:ip:} $ip_ref {} ip_name - regsub {:} $ip_name {_v} ip_name - regsub {\.} $ip_name {_} ip_name - if {[regexp {xilinx.com:ip:blk_mem_gen:} $ip_ref]} { - set line "netlist blackbox ${ip_name}_synth" - lappend black_box_lines $line - set black_box_libs($ip_name) 1 - } - } - - set num_files 0 - set global_incdirs [list ] - - - #Get filelist for each IP - for {set i 0} {$i <= $num_ip} {incr i} { - if {$i < $num_ip} { - set ip [lindex $ips $i] - if {[catch { set ip_container [get_property IP_CORE_CONTAINER $ip] } errmsg]} { - puts "ErrorMsg: $errmsg" - set ip_container "dummy" - } - -#support for CDC-25506 - "write_questa_cdc_script" needs to be enhanced to automatically extract source code for compressed Xilinx IP Containers (.xcix files). - if {[regexp {xcix} $ip_container all value] && [file exists $ip_container]} { - set is_xcix "1" - set ip_name [get_property NAME $ip] - set xcix_ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - set extracted_files [list] - set wrong_files [list] - if {[file exists $ip_name.xcix]} { - set extracted_files [extract_files -base_dir $userOD/ip [get_files $ip_name.xcix]] - set wrong_files [get_files -compile_order sources -used_in synthesis -of_objects $ip] - } - set files "" - foreach wrong_file $wrong_files { - set hdl_file [file tail $wrong_file] - foreach extract_file $extracted_files { - if {[regexp $hdl_file $extract_file]} { - if {[regexp {vho} $extract_file all value] || [regexp {veo} $extract_file all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { - } else { - lappend files $extract_file - } - } - } - } - } else { - set is_xcix "0" - set ip [lindex $ips $i] - set ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - puts "INFO: Collecting files for IP $ip_ref ($ip_name)" - set files "" - set files_tmp [get_files -compile_order sources -used_in synthesis -of_objects $ip] - foreach file_tmp $files_tmp { - if {[file exists $file_tmp]} { - lappend files $file_tmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { - if {[file exists $include_file]} { - lappend files $include_file - } - } - } - } else { - set is_xcix "0" - set ip $top_module - set ip_name $top_module - set ip_ref $top_module - set files "" - set files_tmp [get_files -filter {USED_IN_SYNTHESIS}] - foreach ftmp $files_tmp { - if {[file exists $ftmp]} { - lappend files $ftmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { - if { [lsearch -exact $files $include_file] == "-1" && [file exists $include_file] } { - lappend files $include_file - } - } - puts "INFO: Collecting files for Top level" - } - puts "DEBUG: Files for (IP: $ip) are: $files" - - set lib_file_order [] - array set lib_file_array {} - - - set prev_lib "" - set prev_hdl_lang "" - set num_lib 0 - ## Find all files for the IP or Top level - foreach f $files { - incr num_files - if {$is_xcix == "1"} { - set fn $f - set lib $xcix_ip_name - set wrong_files2 [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set hdl_file2 [file tail $f] - foreach wrong_file2 $wrong_files2 { - if {[regexp $hdl_file2 $wrong_file2]} { - if {[regexp {vho} $wrong_file2 all value] || [regexp {veo} $wrong_file2 all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { - } else { - set f_original $wrong_file2 - } - } - } - if { [catch {set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]]} result] } { - set lib $xcix_ip_name - } else { - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - } - - if ([regexp {vhd} $f all value]) { - set ft "VHDL" - } else { - set ft "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set fn [get_property NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - } else { - set fn [get_property NAME [lindex [get_files -all $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all $f] 0]] - } - } - puts "\nINFO: File= $fn Library= $lib File_type= $ft" - ## Create a new compile unit if library or language changes between the previous and current files - if {$prev_lib == ""} { - set num_lib 0 - } elseif {![string match -nocase $lib $prev_lib]} { - incr num_lib - } - if {$resp_file_order == 1} { - set lib [uniquify_lib $lib $ft $num_lib] - } - ## Create a list of files for each library - if {[string match $ft "Verilog"] || [string match $ft "Verilog Header"] || [string match $ft "SystemVerilog"] || [string match $ft "VHDL"] || [string match $ft "VHDL 2008"]} { - if {[info exists lib_file_array($lib)]} { - set file_h [open $fn] - - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - - foreach word [split $line] { - if {[ is_sv_vhdl_keyword $keyword_table $word ]} { - set found_encrypted 0 - break - } - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - - } - close $file_h - if {$found_encrypted == "1"} { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - } - } else { - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - - foreach word [split $line] { - if {[ is_sv_vhdl_keyword $keyword_table $word ]} { - set found_encrypted 0 - break - } - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - } - close $file_h - if {$found_encrypted == "1" } { - regsub ":.*" $lib {} encrypted_lib - } else { - - set lib_file_array($lib) $fn - if { ![regexp {mem_gen_v\d+_\d+} $lib] && ![regexp {fifo_generator_v\d+_\d+} $lib] } { - lappend lib_file_order $lib - } else { - set lib_file_order_tmp $lib_file_order - set lib_file_order $lib - foreach lib_tmp $lib_file_order_tmp { - lappend lib_file_order $lib_tmp - } - } - - } - puts "\nINFO: Adding Library= $lib to list of libraries" - } - } - - set lib_file_lang($lib) $ft - regsub ":.*" $lib {} prev_lib - - ## Header files don't count and will not cause new compile unit to be created - if {![string match -nocase $ft "Verilog Header"]} { - set prev_hdl_lang $ft - } - - if {([string match $ft "Verilog"] || [string match $ft "SystemVerilog"]) && [matches_default_libs $lib]} { - set vlog_default_lib_exists 1 - } - if {[string match $ft "VHDL"] && [matches_default_libs $lib]} { - set vhdl_default_lib_exists 1 - } - } - - ## Check that the header files of a specific IP really exists in all the libraries' lists for this IP - foreach f $files { -# set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] -# set fn [get_property NAME [lindex [get_files -all $f] 0]] - if {[string match $ft "Verilog Header"]} { - foreach lib $lib_file_order { - set lang $lib_file_lang($lib) - if { ([regexp {Verilog} $lang]) && ([lsearch -exact $lib_file_array($lib) $fn] == "-1") } { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - puts $lib_file_array($lib) - } - } - } - } - - puts "DEBUG: IP= $ip_ref IPINST = $ip_name has following libraries $lib_file_order" - - # For each library, list the files - foreach lib $lib_file_order { - regsub ":.*" $lib {} lib_no_num - puts "INFO: Obtaining list of files for design= $ip_ref, library= $lib" - set lang $lib_file_lang($lib) - set incdirs [list ] - array unset incdir_ar - ## Create list of include files - if {[regexp {Verilog} $lang]} { - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - set is_include "0" - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {$is_include == 1 || [string match $f_type "Verilog Header"]} { - set file_dir [file dirname $f] - if {![info exists incdir_ar($file_dir)]} { - lappend incdirs [concat +incdir+$file_dir] - lappend global_incdirs [concat +incdir+$file_dir] - puts "INFO: Found include file $f" - set incdir_ar($file_dir) 1 - set lib_incdirs_list($lib_no_num) $incdirs - } - } - } - } - ## Print files to compile script - set debug_num [llength lib_file_array($lib)] - puts "DEBUG: Found $debug_num of files in library= $lib, IP= $ip_ref IPINST= $ip_name" - - if {[string match $lang "VHDL"]} { - set line "vcom -allowProtectedBeforeBody $vhdl_std -work $lib_no_num \\" - lappend compile_lines $line - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "VHDL"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f is $f_type, library= $lib $lib_no_num fileset= $synth_fileset and does not match VHDL" - } - } - set line "\n" - lappend compile_lines $line - } elseif {[string match $lang "Verilog"] || [string match $lang "SystemVerilog"]} { - if {[string match $lang "SystemVerilog"]} { - set sv_switch "-sv" - } else { - set sv_switch "" - } - - set line "vlog -suppress 13389 $verilog_define_options $sv_switch -incr -work $lib_no_num \\" - lappend compile_lines $line - if { [info exists lib_incdirs_list($lib_no_num)] && $lib_incdirs_list($lib_no_num) != ""} { - set line " $global_incdirs \\" - lappend compile_lines $line - } - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - } - } - if {[string match $f_type "Verilog"] || [string match $f_type "SystemVerilog"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f, fileset= $synth_fileset do not match Verilog or SystemVerilog" - } - } - set line "\n" - lappend compile_lines $line - } - } - - ## Bookkeeping on which libraries are already compiled - foreach lib $lib_file_order { - regsub ":.*" $lib {} lib - set compiled_lib_list($lib) 1 - } - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are sub-cores - foreach subcore $lib_file_order { - if {![info exists black_box_libs($subcore)]} { - if {[regexp {^blk_mem_gen_v\d+_\d+} $subcore]} { - lappend black_box_lines $line - set black_box_libs($subcore) 1 - } - } - } - - ## Delete all information related to this IP - set lib_file_order [] - array unset lib_file_array * - array unset lib_file_lang * - } - - if {$num_files == 0} { - puts stderr "ERROR: Could not find any files in synthesis fileset" - set rc 7 - return $rc - } - - puts $qcdc_compile_tcl_fh "\n#" - puts $qcdc_compile_tcl_fh "# Create work library" - puts $qcdc_compile_tcl_fh "#" - puts $qcdc_compile_tcl_fh "vlib $top_lib_dir" - puts $qcdc_compile_tcl_fh "vlib $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qcdc_compile_tcl_fh "vlib $top_lib_dir/$key" - } - - puts $qcdc_compile_tcl_fh "\n#" - puts $qcdc_compile_tcl_fh "# Map libraries" - puts $qcdc_compile_tcl_fh "#" - puts $qcdc_compile_tcl_fh "vmap work $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qcdc_compile_tcl_fh "vmap $key $top_lib_dir/$key" - } - - puts $qcdc_compile_tcl_fh "\n#" - puts $qcdc_compile_tcl_fh "# Compile files section" - puts $qcdc_compile_tcl_fh "#" - - set first_pack "1" - foreach l $compile_lines { - if {[regexp {\_pack\.vhd} $l all value] } { - if {$first_pack == "1"} { - puts $qcdc_compile_tcl_fh "\n$vcom_line\n $l" - set first_pack "0" - } else { - puts $qcdc_compile_tcl_fh "$l" - set first_pack "0" - } - } - if {[regexp {allowProtectedBeforeBody} $l all value] } { - set vcom_line $l - set first_pack "1" - } - - - - } - - - puts $qcdc_compile_tcl_fh "\n" - foreach l $compile_lines { - puts $qcdc_compile_tcl_fh $l - } - - puts $qcdc_compile_tcl_fh "\n#" - puts $qcdc_compile_tcl_fh "# Add global set/reset" - puts $qcdc_compile_tcl_fh "#" - puts $qcdc_compile_tcl_fh "vlog -suppress 13389 $verilog_define_options -work xil_defaultlib $vivado_dir/data/verilog/src/glbl.v" - - close $qcdc_compile_tcl_fh - - ## Print compile information - puts $qcdc_ctrl_fh "cdc preference -internal_sync_resets_on -print_port_domain_template" - puts $qcdc_ctrl_fh "netlist fpga -vendor xilinx -version $vivado_version -library vivado" - - if {$black_box_lines != ""} { - puts $qcdc_ctrl_fh "\n#" - puts $qcdc_ctrl_fh "# Black box blk_mem_gen" - puts $qcdc_ctrl_fh "#" - foreach l $black_box_lines { - puts $qcdc_ctrl_fh $l - } - } - close $qcdc_ctrl_fh - - ## Get the library names and append a '-L' to the library name - array set qft_libs {} - foreach lib [array names compiled_lib_list] { - set qft_libs($lib) 1 - } - set lib_args "" - foreach lib [array names qft_libs] { - set lib_args [concat $lib_args -L $lib] - } - -## Dump the run Makefile - puts $qcdc_run_makefile_fh "DUT=$top_module" - puts $qcdc_run_makefile_fh "" - puts $qcdc_run_makefile_fh "clean:" - puts $qcdc_run_makefile_fh "\trm -rf $top_lib_dir $cdc_out_dir" - puts $qcdc_run_makefile_fh "" - puts $qcdc_run_makefile_fh "cdc_run:" - puts $qcdc_run_makefile_fh "\t\$(QHOME)/bin/qverify -c -licq -l qcdc_${top_module}.log -od $cdc_out_dir -do \"\\" - puts $qcdc_run_makefile_fh "\tonerror {exit 1}; \\" - if { $cdc_constraints != "" } { - puts $qcdc_run_makefile_fh "\tdo $cdc_constraints; \\" - } - puts $qcdc_run_makefile_fh "\tdo $qcdc_ctrl; \\" - puts $qcdc_run_makefile_fh "\tdo $qcdc_compile_tcl; \\" - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qcdc_run_makefile_fh "\tnetlist create -d $top_module $lib_args -tool cdc; \\" - puts $qcdc_run_makefile_fh "\tsdc load $file; \\" - } - } - } - if { $generate_sdc == 1 } { - - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qcdc_run_makefile_fh "\tnetlist create -d $top_module $lib_args -tool cdc; \\" - puts $qcdc_run_makefile_fh "\tsdc load $sdc_out_file; \\" - } - } - puts $qcdc_run_makefile_fh "\tcdc run -d \$(DUT) $lib_args; \\" - puts $qcdc_run_makefile_fh "\texit 0\"" - - close $qcdc_run_makefile_fh - - puts $qcdc_run_batfile_fh "@ECHO OFF" - puts $qcdc_run_batfile_fh "" - puts $qcdc_run_batfile_fh "SET DUT=$top_module" - puts $qcdc_run_batfile_fh "" - puts $qcdc_run_batfile_fh "IF \[%1\]==\[\] goto :usage" - puts $qcdc_run_batfile_fh "IF %1==clean (" - puts $qcdc_run_batfile_fh " call :clean" - puts $qcdc_run_batfile_fh ") ELSE IF %1==compile (" - puts $qcdc_run_batfile_fh " call :compile" - puts $qcdc_run_batfile_fh ") ELSE IF %1==cdc (" - puts $qcdc_run_batfile_fh " call :cdc" - puts $qcdc_run_batfile_fh ") ELSE IF %1==debug_cdc (" - puts $qcdc_run_batfile_fh " call :debug_cdc" - puts $qcdc_run_batfile_fh ") ELSE IF %1==all (" - puts $qcdc_run_batfile_fh " call :clean" - puts $qcdc_run_batfile_fh " call :compile" - puts $qcdc_run_batfile_fh " call :cdc" - puts $qcdc_run_batfile_fh " call :debug_cdc" - puts $qcdc_run_batfile_fh ") ELSE (" - puts $qcdc_run_batfile_fh " call :usage" - puts $qcdc_run_batfile_fh ")" - puts $qcdc_run_batfile_fh "exit /b" - puts $qcdc_run_batfile_fh "" - puts $qcdc_run_batfile_fh ":clean" - puts $qcdc_run_batfile_fh "\tIF EXIST $top_lib_dir RMDIR /S /Q $top_lib_dir" - puts $qcdc_run_batfile_fh "\tIF EXIST $cdc_out_dir RMDIR /S /Q $cdc_out_dir" - puts $qcdc_run_batfile_fh "\texit /b" - puts $qcdc_run_batfile_fh "" - puts $qcdc_run_batfile_fh ":compile" - set cdc_constraints_do "" - if {$cdc_constraints != ""} { - set cdc_constraints_do "do $cdc_constraints;" - } - puts $qcdc_run_batfile_fh "\tqverify -c -licq -l qcdc_${top_module}.log -od $cdc_out_dir -do ^\"$cdc_constraints_do do $qcdc_ctrl;do $qcdc_compile_tcl;do $run_sdcfile^\"" - - - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qcdc_run_sdcfile_fh "netlist create -d $top_module $lib_args -tool cdc" - puts $qcdc_run_sdcfile_fh "sdc load $file" - } - } - } - if { $generate_sdc == 1 } { - - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qcdc_run_sdcfile_fh "netlist create -d $top_module $lib_args -tool cdc" - puts $qcdc_run_sdcfile_fh "sdc load $sdc_out_file;" - } - } - puts $qcdc_run_batfile_fh "\texit /b" - puts $qcdc_run_batfile_fh "" - - puts $qcdc_run_batfile_fh ":cdc" - puts $qcdc_run_batfile_fh "\tqverify -c -licq -l qcdc_${top_module}.log -od $cdc_out_dir -do ^\"do $qcdc_ctrl;cdc run -d %DUT% $lib_args; ^\"" - puts $qcdc_run_batfile_fh "\texit /b" - puts $qcdc_run_batfile_fh "" - puts $qcdc_run_batfile_fh ":debug_cdc" - puts $qcdc_run_batfile_fh "\tqverify $cdc_out_dir\/cdc\.db " - puts $qcdc_run_batfile_fh "\texit /b" - puts $qcdc_run_batfile_fh "" - puts $qcdc_run_batfile_fh ":usage" - puts $qcdc_run_batfile_fh "\tECHO \#\#\# run_qcdc clean \.\.\.\.\.\. Clean all results from directory" - puts $qcdc_run_batfile_fh "\tECHO \#\#\# run_qcdc compile \.\.\.\. Compile source code" - puts $qcdc_run_batfile_fh "\tECHO \#\#\# run_qcdc cdc \.\.\.\.\.\.\.\. Run CDC" - puts $qcdc_run_batfile_fh "\tECHO \#\#\# run_qcdc debug_cdc \.\. Debug CDC Run" - puts $qcdc_run_batfile_fh "\tECHO \#\#\# run_qcdc all \.\.\.\.\.\.\.\. Run all CDC Steps on Souce Code and Launch Debug" - puts $qcdc_run_batfile_fh "\texit /b" - - - close $qcdc_run_batfile_fh - ## Dump the run file - puts $qcdc_run_fh "#! /bin/sh" - puts $qcdc_run_fh "" - puts $qcdc_run_fh "rm -rf $top_lib_dir $cdc_out_dir" - puts $qcdc_run_fh "\$QHOME/bin/qverify -c -licq -l qcdc_${top_module}.log -od $cdc_out_dir -do ${tcl_script}" - close $qcdc_run_fh - - puts $qcdc_tcl_fh "onerror {exit 1}" - puts $qcdc_tcl_fh "do $qcdc_ctrl" - puts $qcdc_tcl_fh $cdc_constraints_do - - - puts $qcdc_tcl_fh "do $qcdc_compile_tcl" - - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qcdc_tcl_fh "netlist create -d $top_module $lib_args -tool cdc; \\" - puts $qcdc_tcl_fh "sdc load $file" - } - } - } - if { $generate_sdc == 1 } { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qcdc_tcl_fh "netlist create -d $top_module $lib_args -tool cdc; \\" - puts $qcdc_tcl_fh "sdc load $sdc_out_file" - } - } - if { $run_questa_cdc == "cdc_setup" } { - puts $qcdc_tcl_fh "cdc setup -d $top_module" - } else { - puts $qcdc_tcl_fh "cdc run -d $top_module $lib_args" - puts $qcdc_tcl_fh "cdc generate report ${top_module}_detailed.rpt" - } - puts $qcdc_tcl_fh "exit 0" - -# puts $qcdc_tcl_fh "sdc load $top_module.sdc" -# puts $qcdc_tcl_fh "do $qcdc_ctrl" - - close $qcdc_tcl_fh - puts "INFO : Generation of running scripts for Questa CDC is done at [pwd]/$userOD" - - ## Change permissions of the generated running script - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec chmod u+x $userOD/$run_script - } - if { $run_questa_cdc == "cdc_run" } { - puts "INFO : Running Questa CDC (Command: cdc run), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/CDC_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh qcdc_run.sh" - } - puts "INFO : Questa CDC run is finished" - puts "INFO : Invoking Questa CDC UI for debugging." - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec qverify $userOD/CDC_RESULTS/cdc.db & - } else { - cd $userOD - cmd /c run_qcdc all - } - } elseif { $run_questa_cdc == "cdc_setup" } { - puts "INFO : Running Questa CDC (Command: cdc setup), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/CDC_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh qcdc_run.sh" - } - puts "INFO : Questa CDC run is finished" - puts "INFO : Invoking Questa CDC UI for debugging." - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; qverify -l qverify_ui.log CDC_RESULTS/cdc.db" & - } - } - return $rc -} - - -## Auto-import the procs of the Questa CDC script -namespace import tclapp::siemens::questa_cdc::* diff --git a/tclapp/siemens/questa_cdc/write_questa_lint_script.tcl b/tclapp/siemens/questa_cdc/write_questa_lint_script.tcl deleted file mode 100755 index 7712095be..000000000 --- a/tclapp/siemens/questa_cdc/write_questa_lint_script.tcl +++ /dev/null @@ -1,1314 +0,0 @@ -# Usage: write_questa_lint_script [-output_directory ] -############################################################################### -# -# write_questa_lint_script.tcl (Routine for Mentor Graphics Questa Lint Application) -# -# Script created on 12/20/2016 by Islam Ahmed (Mentor Graphics Inc) & -# Ravi Kurlagunda -# Script last Modified on 05/29/2023 -# Vivado v2022.1 -############################################################################### - -namespace eval ::tclapp::siemens::questa_cdc { - # Export procs that should be allowed to import into other namespaces - namespace export write_questa_lint_script -} - -proc ::tclapp::siemens::questa_cdc::matches_default_libs {lib} { - - # Summary: internally used routine to check if default libs used - - # Argument Usage: - # lib: name of lib to check if default lib - - # Return Value: - # 1 is returned when the passed library matches on of the names of the default libraries - - # Categories: xilinxtclstore, siemens, questa_lint - - regsub ":.*" $lib {} lib - if {[string match -nocase $lib "xil_defaultlib"]} { - return 1 - } elseif {[string match -nocase $lib "work"]} { - return 1 - } else { - return 0 - } -} - -proc ::tclapp::siemens::questa_cdc::uniquify_lib {lib lang num} { - - # Summary: internally used routine to uniquify libs - - # Argument Usage: - # lib : lib name to uniquify - # lang : HDL language - # num : uniquified lib name - - # Return Value: - # The name of the uniquified library is returned - - # Categories: xilinxtclstore, siemens, questa_lint - - - set new_lib "" - if {[matches_default_libs $lib]} { - set new_lib [concat $lib:$lang:$num] - } else { - set new_lib [concat $lib:$lang] - } - return $new_lib -} -proc ::tclapp::siemens::questa_cdc::sv_vhdl_keyword_table {keyword_table} { - - # Summary: internally used routine to create a table containing verilog and VHDL keywords - - # Argument Usage: - # keyword_table : table to store the keywords - - # Return Value: - # The table accumulated with verilog and VHDL keywords is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - set keywords {library module entity package ENTITY PACKAGE `protect all define function task localparam interface `timescale} - foreach keyword $keywords { - dict incr keyword_table $keyword - } - return $keyword_table -} -proc ::tclapp::siemens::questa_cdc::is_sv_vhdl_keyword {keyword_table word} { - - # Summary: internally used routine to check if given word is a verilog or vhdl keyword - - # Argument Usage: - # keyword_table : Table containing vhdl and verilog keywords - # word : input word - - # Return Value: - # Boolean value representing if input word is a keyword or not is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - return [dict exists $keyword_table $word] -} - -proc ::tclapp::siemens::questa_cdc::write_questa_lint_script {args} { - - # Summary : This proc generates the Questa Lint script file - - # Argument Usage: - # top_module : Provide the design top name - # [-output_directory ]: Specify the output directory to generate the scripts in - # [-run ]: Run Questa Lint and invoke the UI of Questa Lint debug after generating the running scripts, default behavior is to stop after the generation of the scripts - # [-lint_constraints]:Directives in the form of tcl File - # [-add_button]: Add a button to run Questa Lint in Vivado UI. - # [-remove_button]: Remove the Questa Lint button from Vivado UI. - - # Return Value: Returns '0' on successful completion - - # Categories: xilinxtclstore, siemens, questa_lint - - # Keep an environment variable with the path of the script - set env(QUESTA_Lint_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] - set args [subst [regsub -all \{ $args ""]] - set args [subst [regsub -all \} $args ""]] - - - set userOD "." - set top_module "" - set no_sdc 0 - set lint_constraints "" - set run_questa_lint "" - set add_button 0 - set remove_button 0 - set usage_msg "Usage : write_questa_lint_script \[-output_directory \] \[-lint_constraints \] \[-run \] \[-add_button\] \[-remove_button\]" - # Parse the arguments - if { [llength $args] > 8 } { - puts "** ERROR : Extra arguments passed to the proc." - puts $usage_msg - return 1 - } - # Generate help message - if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { - puts $usage_msg - return 0 - } - for {set i 0} {$i < [llength $args]} {incr i} { - if { [lindex $args $i] == "-output_directory" } { - incr i - set userOD "[lindex $args $i]" - if { $userOD == "" } { - puts "** ERROR : Specified output directory can't be null." - puts $usage_msg - return 1 - } - ## } elseif { [lindex $args $i] == "-use_existing_xdc" } { - ## set use_existing_xdc 1 - } elseif { [lindex $args $i] == "-no_sdc" } { - set no_sdc 1 - } elseif { [lindex $args $i] == "-run" } { - incr i - set run_questa_lint "[lindex $args $i]" - if { ($run_questa_lint != "lint_run") } { - puts "** ERROR : Invalid argument value for -run '$run_questa_lint'" - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-lint_constraints" } { - incr i - set lint_constraints "[lindex $args $i]" - if { ($lint_constraints == "") } { - puts "** ERROR : Missing argument value for -lint_constraints" - puts $usage_msg - return 1 - } - set lint_constraints [file normalize $lint_constraints] - } elseif { [lindex $args $i] == "-add_button" } { - set add_button 1 - } elseif { [lindex $args $i] == "-remove_button" } { - set remove_button 1 - } else { - set top_module [lindex $args $i] - } - } - - ## Set return code to 0 - set rc 0 - - # Getting the current vivado version and remove 'v' from the version string - set vivado_version [lindex [version] 1] - regsub {v} $vivado_version {} vivado_version - set major [lindex [split $vivado_version .] 0] - set minor [lindex [split $vivado_version .] 1] - set vivado_version "$major\.$minor" - ## -add_button and -remove_button can't be specified together - if { ($remove_button == 1) && ($add_button == 1) } { - puts "** ERROR : '-add_button' and '-remove_button' can't be specified together." - return 1 - } - - ## Add Vivado GUI button for Questa Lint - if { $add_button == 1 } { - ## Example for code of the Vivado GUI button - ## ----------------------------------------- - ## 0=Run%20Questa%20Lint tclapp::siemens::questa_cdc::write_questa_lint_script "" /home/iahmed/questa_lint_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20Lint%20Run "" -run true - ## ----------------------------------------- - - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - #set status [catch {exec grep write_questa_lint_script $commands_file} result] - #if { $status == 0 } { - # puts "INFO : Vivado GUI button for running Questa Lint is already installed in $commands_file. Exiting ..." - # return $rc - #} - set questa_lint_logo "$::env(QUESTA_Lint_TCL_SCRIPT_PATH)/questa_lint_logo.PNG" - if { ! [file exists $questa_lint_logo] } { - set questa_lint_logo "\"$questa_lint_logo\"" - puts "INFO: Can't find the Questa Lint logo at $questa_lint_logo" - if { [file exists "\$::env(QHOME)/share/fpga_libs/Xilinx/questa_lint_logo.PNG"] } { - set questa_lint_logo "$::env(QHOME)/share/fpga_libs/Xilinx/questa_lint_logo.PNG" - puts "INFO: Found the Questa Lint logo at $questa_lint_logo" - } - } - - if { [catch {open $commands_file a} result] } { - puts stderr "ERROR: Could not open commands.xml to add the Questa Lint button, path '$commands_file'\n$result" - set rc 9 - return $rc - } else { - set commands_fh $result - puts "INFO: Adding Vivado GUI button for running Questa Lint in $commands_file" - } - set questa_lint_command_index 0 - set vivado_cmds_version "1.0" - set encoding_cmds_version "UTF-8" - set major_cmds_version "1" - set minor_cmds_version "0" - set name_cmds_version "USER" - if { [file size $commands_file] } { - set file1 [open $commands_file r] - set file2 [read $file1] - set commands_file_line [split $file2 "\n"] - set last_command [lindex $commands_file_line end-1] - - foreach line $commands_file_line { - if {[regexp {write_questa_lint_script} $line]} { - puts "INFO : Vivado GUI button for running Questa Lint is already installed in $commands_file. Exiting ..." - close $commands_fh - close $file1 - return $rc - } - } - - if { $last_command == ""} { - set questa_lint_command_index 0 - - } else { - set numbers 0 - foreach line $commands_file_line { - if {[regexp {([0-9]+)} $line m1 m2]} { - set numbers $m2 - } - } - set last_command_index $numbers - set questa_lint_command_index [incr last_command_index] - - } - close $file1 - } else { - puts $commands_fh "" - puts $commands_fh "" - set questa_lint_command_index 0 - } - puts $commands_fh " " - puts $commands_fh " $questa_lint_command_index" - puts $commands_fh " Run_Questa_Lint" - puts $commands_fh " Run Questa Lint" - puts $commands_fh " source \$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_lint_script.tcl; tclapp::siemens::questa_cdc::write_questa_lint_script" - puts $commands_fh " $questa_lint_logo" - puts $commands_fh " true" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Top_Module" - puts $commands_fh " \[lindex \[find_top\] 0\]" - puts $commands_fh " false" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Output_Directory" - puts $commands_fh " -output_directory Questa_Lint" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Lint_Constraints" - puts $commands_fh " " - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Invoke_Questa_Lint_Run" - puts $commands_fh " -run lint_run" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh "" -# obselet generating .paini file -# set button_code "" -# if { $vivado_cmds_version == 1 } { -# set button_code "$questa_lint_command_index=Run%20Questa%20Lint" -# -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_lint_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_lint_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_lint_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_lint_script" -# set button_code "$button_code \"\" $questa_lint_logo \"\" \"\" true ^@ \"\" true 4" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QLint true" - ## set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20Lint%20Run \"\" -run%20lint_run true" -# } else { -# set button_code "$questa_lint_command_index=$questa_lint_command_index Run%20Questa%20Lint Run%20Questa%20Lint" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_lint_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_lint_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_lint_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_lint_script" -# set button_code "$button_code \"\" $questa_lint_logo \"\" \"\" true ^ \"\" true 4" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QLint true" - ## set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20Lint%20Run \"\" -run%20lint_run true" -# } -# puts $commands_fh $button_code -# set OS [lindex $::tcl_platform(os) 0] -# if { $OS == "Linux" } { -# file delete -force "$::env(QHOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" -# } else { -# file delete -force "$::env(QHOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" -# } - close $commands_fh - ################################################################################################## - ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if {[lindex $ip_lines $i] == ""} { - continue - } elseif {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - puts $op_file "" - close $ip_file - close $op_file - - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - ################################################################################################## - return $rc - } - - ## Remove Vivado GUI button for Questa Lint - if { $remove_button == 1 } { - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - if { [file exist $commands_file] } { - ## Temp file to write the modified file - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - set questa_lint_command_found 0 - set questa_lint_command_found_flag 0 - set position 0 - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if { $questa_lint_command_found_flag == 0 } { - if { [regexp {\s\s\} [lindex $ip_lines $i]] && [regexp {\s\s\s\Run_Questa_Lint\} [lindex $ip_lines [expr $i + 2]]] } { - regexp {([0-9]+)\} [lindex $ip_lines [expr $i + 1]] m1 m2 - set position $m2 - set questa_lint_command_found 1 - set questa_lint_command_found_flag 1 - continue - } - } else { - if { ! [regexp {\s\s\} [lindex $ip_lines $i]] } { - continue - } else { - set questa_lint_command_found_flag 0 - continue - } - } - - if {$questa_lint_command_found_flag == 0 && $questa_lint_command_found == 1 && [regexp {([0-9]+)\} [lindex $ip_lines $i]]} { - puts $op_file " $position\" - incr position - } else { - if {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - } - close $ip_file - close $op_file - - ## Now, remove the old commands file and replace it with the new one - #exec rm -f - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - if { $questa_lint_command_found == 1 } { - puts "INFO: Vivado GUI button for running Questa Lint is removed from $commands_file" - } else { - puts "INFO: Vivado GUI button for running Questa Lint wasn't found in $commands_file." - puts " : File has not been changed." - } - } else { - puts "INFO: File $::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml not exist, cannot remove from unexisting file" - } - return $rc - } - - if { $top_module == "" } { - puts "** ERROR : No top_module specified to the proc." - puts $usage_msg - return 1 - } - if { $userOD == "." } { - puts "INFO: Output files will be generated at [file join [pwd] $userOD]" - } else { - puts "INFO: Output files will be generated at $userOD" - file mkdir $userOD - } - - set qlintlint_ctrl "questa_lint_ctrl.tcl" - set run_makefile "Makefile.questa_lint" - set run_batfile "run_questa_lint.bat" - set qlint_ctrl "questa_lint_ctrl.tcl" - set qlint_compile_tcl "questa_lint_compile.tcl" - set run_script "questa_lint_run.sh" - set tcl_script "questa_lint_run.tcl" - set encrypted_lib "dummmmmy_lib" - - ## Vivado install dir - set vivado_dir $::env(XILINX_VIVADO) - puts "INFO: Using Vivado install directory $vivado_dir" - - ## If set to 1, will strictly respect file order - if lib files appear non-consecutively this order is maintained - ## otherwise will respect only library order - if lib files appear non-consecutively they will still be merged into one compile command - set resp_file_order 1 -##creating Verilog and VHDL keywords table - set keyword_table [dict create] - set keyword_table [sv_vhdl_keyword_table $keyword_table] - ## Does VHDL file for default lib exist - set vhdl_default_lib_exists 0 - ## Does Verilog file for default lib exist - set vlog_default_lib_exists 0 - - set vhdl_std "-93" - set timescale "1ps" - - # Settings - set top_lib_dir "qft" - set lint_out_dir "Lint_RESULTS" - set modelsimini "modelsim.ini" - - # Open output files to write - if { [catch {open $userOD/$run_makefile w} result] } { - puts stderr "ERROR: Could not open $run_makefile for writing\n$result" - set rc 2 - return $rc - } else { - set qlint_run_makefile_fh $result - puts "INFO: Writing Questa lint run Makefile to file $userOD/$run_makefile" - } - if { [catch {open $userOD/$run_batfile w} result] } { - puts stderr "ERROR: Could not open $run_batfile for writing\n$result" - set rc 2 - return $rc - } else { - set qlint_run_batfile_fh $result - puts "INFO: Writing Questa lint run batfile to file $userOD/$run_batfile" - } - if { [catch {open $userOD/$run_script w} result] } { - puts stderr "ERROR: Could not open $run_script for writing\n$result" - set rc 2 - return $rc - } else { - set qlint_run_fh $result - puts "INFO: Writing Questa Lint run script to file $run_script" - } - - if { [catch {open $userOD/$tcl_script w} result] } { - puts stderr "ERROR: Could not open $tcl_script for writing\n$result" - set rc 10 - return $rc - } else { - set qlint_tcl_fh $result - puts "INFO: Writing Questa Lint tcl script to file $tcl_script" - } - - if { [catch {open $userOD/$qlint_ctrl w} result] } { - puts stderr "ERROR: Could not open $qlint_ctrl for writing\n$result" - set rc 3 - return $rc - } else { - set qlint_ctrl_fh $result - puts "INFO: Writing Questa Lint control directives script to file $qlint_ctrl" - } - - if { [catch {open $userOD/$qlint_compile_tcl w} result] } { - puts stderr "ERROR: Could not open $qlint_compile_tcl for writing\n$result" - set rc 4 - return $rc - } else { - set qlint_compile_tcl_fh $result - puts "INFO: Writing Questa Lint Tcl script to file $qlint_compile_tcl" - } - - - set found_top 0 - foreach t [find_top] { - if {[string match $t $top_module]} { - set found_top 1 - } - } - if {$found_top == 0} { - puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" - set rc 5 - return $rc - } - - # Get the PART and the ARCHITECTURE of the target device - set arch_name [get_property ARCHITECTURE [get_parts [get_property PART [current_project]]]] - # Identify synthesis fileset - #set synth_fileset [lindex [get_filesets * -filter {FILESET_TYPE == "DesignSrcs"}] 0] - set synth_fileset [current_fileset] - if { [string match $synth_fileset ""] } { - puts stderr "ERROR: Could not find any synthesis fileset" - set rc 6 - return $rc - } else { - puts "INFO: Found synthesis fileset $synth_fileset" - } - update_compile_order -fileset $synth_fileset - -######Lint-25493- Extraction of +define options######## - set verilog_define_options [ get_property verilog_define [current_fileset] ] - if { [string match $verilog_define_options ""] } { - } else { - set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] - set prefix_verilog_define_options "+define+" - set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" - } - - ## Blackbox unisims -# link_design -part [get_parts [get_property PART [current_project]]] -# puts "set_option stop {\\" -# set num_c 0 -# foreach c [get_lib_cells] { -# incr num_c -# puts -nonewline "$c " -# if {[expr $num_c%10] == 0} { -# puts "\\" -# } -# } -# puts "}\n" - - #set proj_name [get_property NAME [current_project]] - ## Get list of IPs being used - set ips [get_ips *] - set num_ip [llength $ips] - puts "INFO: Found $num_ip IPs in design" - - ## Keep track of libraries to avoid duplicat compilation - array set compiled_lib_list {} - array set lib_incdirs_list {} - array set black_box_libs {} - set compile_lines [list ] - set black_box_lines [list ] - set line "" - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are part of the IP - foreach ip $ips { - set ip_ref [get_property IPDEF $ip] - regsub {xilinx.com:ip:} $ip_ref {} ip_name - regsub {:} $ip_name {_v} ip_name - regsub {\.} $ip_name {_} ip_name - if {[regexp {xilinx.com:ip:blk_mem_gen:} $ip_ref]} { - set line "netlist blackbox ${ip_name}_synth" - lappend black_box_lines $line - set black_box_libs($ip_name) 1 - } - } - - set num_files 0 - set global_incdirs [list ] - - - - - #Get filelist for each IP - for {set i 0} {$i <= $num_ip} {incr i} { - if {$i < $num_ip} { - set ip [lindex $ips $i] - if {[catch { set ip_container [get_property IP_CORE_CONTAINER $ip] } errmsg]} { - puts "ErrorMsg: $errmsg" - set ip_container "dummy" - } - -#support for Lint-25506 - "write_questa_lint_script" needs to be enhanced to automatically extract source code for compressed Xilinx IP Containers (.xcix files). - if {[regexp {xcix} $ip_container all value] && [file exists $ip_container]} { - set is_xcix "1" - set ip_name [get_property NAME $ip] - set xcix_ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - set extracted_files [extract_files -base_dir $userOD/ip [get_files $ip_name.xcix]] - set wrong_files [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set files "" - foreach wrong_file $wrong_files { - set hdl_file [file tail $wrong_file] - foreach extract_file $extracted_files { - if {[regexp $hdl_file $extract_file]} { - if {[regexp {vho} $extract_file all value] || [regexp {veo} $extract_file all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value]} { - } else { - lappend files $extract_file - } - } - } - } - } else { - set is_xcix "0" - set ip [lindex $ips $i] - set ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - puts "INFO: Collecting files for IP $ip_ref ($ip_name)" - set files "" - set files_tmp [get_files -compile_order sources -used_in synthesis -of_objects $ip] - foreach file_tmp $files_tmp { - if {[file exists $file_tmp]} { - lappend files $file_tmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { -# if { [lsearch -exact $files $include_file] == "-1" } { - if {[file exists $include_file]} { - lappend files $include_file - } -# } - } - } - } else { - set is_xcix "0" - set ip $top_module - set ip_name $top_module - set ip_ref $top_module - set files "" - set files_tmp [get_files -norecurse -compile_order sources -used_in synthesis] - foreach ftmp $files_tmp { - if {[file exists $ftmp]} { - lappend files $ftmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { - if { [lsearch -exact $files $include_file] == "-1" && [file exists $include_file] } { - lappend files $include_file - } - } - puts "INFO: Collecting files for Top level" - } - puts "DEBUG: Files for (IP: $ip) are: $files" - - set lib_file_order [] - array set lib_file_array {} - - - set prev_lib "" - set prev_hdl_lang "" - set num_lib 0 - ## Find all files for the IP or Top level - foreach f $files { - #set f1 [lindex [get_files -of [get_filesets $synth_fileset] $f] 0] - incr num_files - if {$is_xcix == "1"} { - set fn $f - set lib $xcix_ip_name - set wrong_files2 [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set hdl_file2 [file tail $f] - foreach wrong_file2 $wrong_files2 { - if {[regexp $hdl_file2 $wrong_file2]} { - if {[regexp {vho} $wrong_file2 all value] || [regexp {veo} $wrong_file2 all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { - } else { - set f_original $wrong_file2 - } - } - } -# set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - if { [catch {set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]]} result] } { - set lib $xcix_ip_name - } else { - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - } - if ([regexp {vhd} $f all value]) { - set ft "VHDL" - } else { - set ft "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set fn [get_property NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - } else { - set fn [get_property NAME [lindex [get_files -all $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all $f] 0]] - } - } - puts "\nINFO: File= $fn Library= $lib File_type= $ft" - ## Create a new compile unit if library or language changes between the previous and current files - if {$prev_lib == ""} { - set num_lib 0 - } elseif {![string match -nocase $lib $prev_lib]} { - incr num_lib - } - if {$resp_file_order == 1} { - set lib [uniquify_lib $lib $ft $num_lib] - } - ## Create a list of files for each library - if {[string match $ft "Verilog"] || [string match $ft "Verilog Header"] || [string match $ft "SystemVerilog"] || [string match $ft "VHDL"] || [string match $ft "VHDL 2008"]} { - if {[info exists lib_file_array($lib)]} { - - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - foreach word [split $line] { - if { [ is_sv_vhdl_keyword $keyword_table $word ] } { - set found_encrypted 0 - break - } - } - - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - - } - close $file_h - if {$found_encrypted == "1"} { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - } - } else { - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - - foreach word [split $line] { - if { [ is_sv_vhdl_keyword $keyword_table $word ] } { - set found_encrypted 0 - break - } - } - - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - } - close $file_h - if {$found_encrypted == "1" } { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) $fn - if { ![regexp {mem_gen_v\d+_\d+} $lib] && ![regexp {fifo_generator_v\d+_\d+} $lib] } { - lappend lib_file_order $lib - } else { - set lib_file_order_tmp $lib_file_order - set lib_file_order $lib - foreach lib_tmp $lib_file_order_tmp { - lappend lib_file_order $lib_tmp - } - } - - } - - - puts "\nINFO: Adding Library= $lib to list of libraries" - } - } - - set lib_file_lang($lib) $ft - regsub ":.*" $lib {} prev_lib - - ## Header files don't count and will not cause new compile unit to be created - if {![string match -nocase $ft "Verilog Header"]} { - set prev_hdl_lang $ft - } - - if {([string match $ft "Verilog"] || [string match $ft "SystemVerilog"]) && [matches_default_libs $lib]} { - set vlog_default_lib_exists 1 - } - if {[string match $ft "VHDL"] && [matches_default_libs $lib]} { - set vhdl_default_lib_exists 1 - } - } - - ## Check that the header files of a specific IP really exists in all the libraries' lists for this IP - foreach f $files { -# set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] -# set fn [get_property NAME [lindex [get_files -all $f] 0]] - if {[string match $ft "Verilog Header"]} { - foreach lib $lib_file_order { - set lang $lib_file_lang($lib) - if { ([regexp {Verilog} $lang]) && ([lsearch -exact $lib_file_array($lib) $fn] == "-1") } { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - puts $lib_file_array($lib) - } - } - } - } - - puts "DEBUG: IP= $ip_ref IPINST = $ip_name has following libraries $lib_file_order" - - # For each library, list the files - foreach lib $lib_file_order { -# if {![info exists compiled_lib_list($lib)] || [matches_default_libs $lib]} { - regsub ":.*" $lib {} lib_no_num - puts "INFO: Obtaining list of files for design= $ip_ref, library= $lib" - set lang $lib_file_lang($lib) - set incdirs [list ] - array unset incdir_ar - ## Create list of include files - if {[regexp {Verilog} $lang]} { - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - set is_include "0" - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {$is_include == 1 || [string match $f_type "Verilog Header"]} { - set file_dir [file dirname $f] - if {![info exists incdir_ar($file_dir)]} { - lappend incdirs [concat +incdir+$file_dir] - lappend global_incdirs [concat +incdir+$file_dir] - puts "INFO: Found include file $f" - set incdir_ar($file_dir) 1 - set lib_incdirs_list($lib_no_num) $incdirs - } - } - } - } - ## Print files to compile script - set debug_num [llength lib_file_array($lib)] - puts "DEBUG: Found $debug_num of files in library= $lib, IP= $ip_ref IPINST= $ip_name" - - if {[string match $lang "VHDL"]} { - set line "vcom -allowProtectedBeforeBody $vhdl_std -work $lib_no_num \\" - lappend compile_lines $line - - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "VHDL"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f is $f_type, library= $lib $lib_no_num fileset= $synth_fileset and does not match VHDL" - } - } - set line "\n" - lappend compile_lines $line - } elseif {[string match $lang "Verilog"] || [string match $lang "SystemVerilog"]} { - if {[string match $lang "SystemVerilog"]} { - set sv_switch "-sv" - } else { - set sv_switch "" - } - - set line "vlog -suppress 13389 $verilog_define_options $sv_switch -incr -work $lib_no_num \\" - lappend compile_lines $line - if { [info exists lib_incdirs_list($lib_no_num)] && $lib_incdirs_list($lib_no_num) != ""} { -# foreach idir $lib_incdirs_list($lib_no_num) { -# set line " $idir \\" - set line " $global_incdirs \\" - lappend compile_lines $line -# } - } - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "Verilog"] || [string match $f_type "SystemVerilog"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f, fileset= $synth_fileset do not match Verilog or SystemVerilog" - } - } - set line "\n" - lappend compile_lines $line - } -# } else { -# puts "INFO: Library $lib has already been compiled. Skipping it." -# } - } - - ## Bookkeeping on which libraries are already compiled - foreach lib $lib_file_order { - regsub ":.*" $lib {} lib - set compiled_lib_list($lib) 1 - } - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are sub-cores - foreach subcore $lib_file_order { - if {![info exists black_box_libs($subcore)]} { - if {[regexp {^blk_mem_gen_v\d+_\d+} $subcore]} { - lappend black_box_lines $line - set black_box_libs($subcore) 1 - } - } - } - - ## Delete all information related to this IP - set lib_file_order [] - array unset lib_file_array * - array unset lib_file_lang * - } - - if {$num_files == 0} { - puts stderr "ERROR: Could not find any files in synthesis fileset" - set rc 7 - return $rc - } - - puts $qlint_compile_tcl_fh "\n#" - puts $qlint_compile_tcl_fh "# Create work library" - puts $qlint_compile_tcl_fh "#" - puts $qlint_compile_tcl_fh "vlib $top_lib_dir" - puts $qlint_compile_tcl_fh "vlib $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qlint_compile_tcl_fh "vlib $top_lib_dir/$key" - } - - puts $qlint_compile_tcl_fh "\n#" - puts $qlint_compile_tcl_fh "# Map libraries" - puts $qlint_compile_tcl_fh "#" - puts $qlint_compile_tcl_fh "vmap work $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qlint_compile_tcl_fh "vmap $key $top_lib_dir/$key" - } - - puts $qlint_compile_tcl_fh "\n#" - puts $qlint_compile_tcl_fh "# Compile files section" - puts $qlint_compile_tcl_fh "#" - - - set first_pack "1" - foreach l $compile_lines { - if {[regexp {\_pack\.vhd} $l all value] } { - if {$first_pack == "1"} { - puts $qlint_compile_tcl_fh "\n$vcom_line\n $l" - set first_pack "0" - } else { - puts $qlint_compile_tcl_fh "$l" - set first_pack "0" - - } - } - if {[regexp {allowProtectedBeforeBody} $l all value] } { - set vcom_line $l - set first_pack "1" - } - - - - } - - - puts $qlint_compile_tcl_fh "\n" - - - - foreach l $compile_lines { - puts $qlint_compile_tcl_fh $l - } - - puts $qlint_compile_tcl_fh "\n#" - puts $qlint_compile_tcl_fh "# Add global set/reset" - puts $qlint_compile_tcl_fh "#" - puts $qlint_compile_tcl_fh "vlog -suppress 13389 $verilog_define_options -work xil_defaultlib $vivado_dir/data/verilog/src/glbl.v" - - close $qlint_compile_tcl_fh - - ## Print compile information - puts $qlint_ctrl_fh "netlist fpga -vendor xilinx -version $vivado_version -library vivado" - puts $qlint_ctrl_fh "lint methodology fpga -goal start" - puts "INFO : Using Methodology FPGA with Goal start as default - User Can edit qlint_ctrl.tcl to Modify" - if {$black_box_lines != ""} { - puts $qlint_ctrl_fh "\n#" - puts $qlint_ctrl_fh "# Black box blk_mem_gen" - puts $qlint_ctrl_fh "#" - foreach l $black_box_lines { - puts $qlint_ctrl_fh $l - } - } - close $qlint_ctrl_fh - - ## Get the library names and append a '-L' to the library name - array set qft_libs {} - foreach lib [array names compiled_lib_list] { - set qft_libs($lib) 1 - } - set lib_args "" - foreach lib [array names qft_libs] { - set lib_args [concat $lib_args -L $lib] - } - - set lint_constraints_do "" - if {$lint_constraints != ""} { - set lint_constraints_do "do $lint_constraints;" - } - - - ## Dump the run file - puts $qlint_run_makefile_fh "DUT=$top_module" - puts $qlint_run_makefile_fh "" - puts $qlint_run_makefile_fh "clean:" - puts $qlint_run_makefile_fh "\trm -rf $top_lib_dir $lint_out_dir" - puts $qlint_run_makefile_fh "" - puts $qlint_run_makefile_fh "lint_run:" - puts $qlint_run_makefile_fh "\t\$(QHOME)/bin/qverify -c -licq -l qlint_${top_module}.log -od $lint_out_dir -do \"\\" - puts $qlint_run_makefile_fh "\tonerror {exit 1}; \\" - puts $qlint_run_makefile_fh "\tdo $qlint_ctrl; \\" - puts $qlint_run_makefile_fh "\tdo $lint_constraints; \\" - ## Get the constraints file - ## if { $use_existing_xdc == 1 } { - ## puts "INFO : Using existing XDC files." - ## set constr_fileset [current_fileset -constrset] - ## set files [get_files -all -of [get_filesets $constr_fileset] *] - ## foreach file $files { - ## set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - ## if { [string match $ft "VHDL 2008"] } { - ## set ft "VHDL" - ## set vhdl_std "-2008" - ## } - ## if { $ft == "XDC" } { - ## puts $qlint_run_makefile_fh "\tsdc load $file; \\" - ## } - ## } - ## } else { - ## set sdc_out_file "${top_module}_syn.sdc" - ## puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - ## puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - ## if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - ## puts "** ERROR : Can't generate SDC file for the design." - ## puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - ## puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - ## set rc 8 - ## return $rc - ## } else { - ## puts $qlint_run_makefile_fh "\tsdc load $sdc_out_file; \\" - ## } - ## } - puts $qlint_run_makefile_fh "\tdo $qlint_compile_tcl; \\" - puts $qlint_run_makefile_fh "\tlint run -d \$(DUT) $lib_args; \\" - puts $qlint_run_makefile_fh "\texit 0\"" - - close $qlint_run_makefile_fh - - puts $qlint_run_batfile_fh "@ECHO OFF" - puts $qlint_run_batfile_fh "" - puts $qlint_run_batfile_fh "SET DUT=$top_module" - puts $qlint_run_batfile_fh "" - puts $qlint_run_batfile_fh "IF \[%1\]==\[\] goto :usage" - puts $qlint_run_batfile_fh "IF %1==clean (" - puts $qlint_run_batfile_fh " call :clean" - puts $qlint_run_batfile_fh ") ELSE IF %1==compile (" - puts $qlint_run_batfile_fh " call :compile" - puts $qlint_run_batfile_fh ") ELSE IF %1==lint (" - puts $qlint_run_batfile_fh " call :lint" - puts $qlint_run_batfile_fh ") ELSE IF %1==debug_lint (" - puts $qlint_run_batfile_fh " call :debug_lint" - puts $qlint_run_batfile_fh ") ELSE IF %1==all (" - puts $qlint_run_batfile_fh " call :clean" - puts $qlint_run_batfile_fh " call :compile" - puts $qlint_run_batfile_fh " call :lint" - puts $qlint_run_batfile_fh " call :debug_lint" - puts $qlint_run_batfile_fh ") ELSE (" - puts $qlint_run_batfile_fh " call :usage" - puts $qlint_run_batfile_fh ")" - puts $qlint_run_batfile_fh "exit /b" - puts $qlint_run_batfile_fh "" - puts $qlint_run_batfile_fh ":clean" - puts $qlint_run_batfile_fh "\tIF EXIST $top_lib_dir RMDIR /S /Q $top_lib_dir" - puts $qlint_run_batfile_fh "\tIF EXIST $lint_out_dir RMDIR /S /Q $lint_out_dir" - puts $qlint_run_batfile_fh "\texit /b" - puts $qlint_run_batfile_fh "" - puts $qlint_run_batfile_fh ":compile" - puts $qlint_run_batfile_fh "\tqverify -c -licq -l qlint_${top_module}.log -od $lint_out_dir -do ^\"do $qlint_ctrl;$lint_constraints_do;do $qlint_compile_tcl;^\"" - - - ## Get the constraints file - ## if { $use_existing_xdc == 1 } { - ## puts "INFO : Using existing XDC files." - ## set constr_fileset [current_fileset -constrset] - ## set files [get_files -all -of [get_filesets $constr_fileset] *] - ## foreach file $files { - ## set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - ## if { [string match $ft "VHDL 2008"] } { - ## set ft "VHDL" - ## set vhdl_std "-2008" - ## } - ## if { $ft == "XDC" } { - ## puts $qlint_run_sdcfile_fh "sdc load $file" - ## } - ## } - ## } else { - ## set sdc_out_file "${top_module}_syn.sdc" - ## puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - ## puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - ## if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - ## puts "** ERROR : Can't generate SDC file for the design." - ## puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - ## puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - ## set rc 8 - ## return $rc - ## } else { - ## puts $qlint_run_sdcfile_fh "sdc load $sdc_out_file;" - ## } - ## } - puts $qlint_run_batfile_fh "\texit /b" - puts $qlint_run_batfile_fh "" - - puts $qlint_run_batfile_fh ":lint" - puts $qlint_run_batfile_fh "\tqverify -c -licq -l qlint_${top_module}.log -od $lint_out_dir -do ^\"do $qlint_ctrl; lint run -d %DUT% $lib_args; ^\"" - puts $qlint_run_batfile_fh "\texit /b" - puts $qlint_run_batfile_fh "" - puts $qlint_run_batfile_fh ":debug_lint" - puts $qlint_run_batfile_fh "\tqverify $lint_out_dir\/lint\.db " - puts $qlint_run_batfile_fh "\texit /b" - puts $qlint_run_batfile_fh "" - puts $qlint_run_batfile_fh ":usage" - puts $qlint_run_batfile_fh "\tECHO \#\#\# run_qlint clean \.\.\.\.\.\.\. Clean all results from directory" - puts $qlint_run_batfile_fh "\tECHO \#\#\# run_qlint compile \.\.\.\.\. Compile source code" - puts $qlint_run_batfile_fh "\tECHO \#\#\# run_qlint lint \.\.\.\.\.\.\.\. Run Lint" - puts $qlint_run_batfile_fh "\tECHO \#\#\# run_qlint debug_lint \.\. Debug Lint Run" - puts $qlint_run_batfile_fh "\tECHO \#\#\# run_qlint all \.\.\.\.\.\.\.\.\. Run all Lint Steps on Souce Code and Launch Debug" - puts $qlint_run_batfile_fh "\texit /b" - - - close $qlint_run_batfile_fh - puts $qlint_run_fh "#! /bin/sh" - puts $qlint_run_fh "" - puts $qlint_run_fh "rm -rf $top_lib_dir $lint_out_dir" - puts $qlint_run_fh "\$QHOME/bin/qverify -c -licq -l qlint_${top_module}.log -od $lint_out_dir -do ${tcl_script}" - close $qlint_run_fh - - puts $qlint_tcl_fh "onerror {exit 1}" - puts $qlint_tcl_fh "do $qlint_ctrl" - puts $qlint_tcl_fh $lint_constraints_do - ## Get the constraints file -# if { $no_sdc == 0 } { -# if { $use_existing_xdc == 1 } { -# puts "INFO : Using existing XDC files." -# set constr_fileset [current_fileset -constrset] -# set files [get_files -all -of [get_filesets $constr_fileset] *] -# foreach file $files { -# set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] -# if { $ft == "XDC" } { -# puts $qlint_tcl_fh "sdc load $file" -# } -# } -# } else { -# set sdc_out_file "${top_module}_syn.sdc" -# puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" -# puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" -# if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { -# puts "** ERROR : Can't generate SDC file for the design." -# puts " : Please run the synthesis step, or open the synthesized design then re-run the script." -# puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." -# set rc 8 -# return $rc -# } else { -# puts $qlint_tcl_fh "sdc load $sdc_out_file" -# } -# } -# } - puts $qlint_tcl_fh "do $qlint_compile_tcl" - puts $qlint_tcl_fh "lint run -d $top_module $lib_args" - puts $qlint_tcl_fh "lint generate report ${top_module}_detailed.rpt" - puts $qlint_tcl_fh "exit 0" - -# puts $qlint_tcl_fh "sdc load $top_module.sdc" -# puts $qlint_tcl_fh "do $qlint_ctrl" - - close $qlint_tcl_fh - puts "INFO : Generation of running scripts for Questa Lint is done at [pwd]/$userOD" -if { $run_questa_lint == "lint_run" } { - ## Change permissions of the generated running script - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec chmod u+x $userOD/$run_script - } - puts "INFO : Running Questa Lint (Command: lint run), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/Lint_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh questa_lint_run.sh" - } - puts "INFO : Questa Lint run is finished" - puts "INFO : Invoking Questa Lint UI for debugging." - exec qverify $userOD/Lint_RESULTS/lint.db & - return $rc - } -} - - -## Auto-import the procs of the Questa Lint script -namespace import tclapp::siemens::questa_cdc::* diff --git a/tclapp/siemens/questa_cdc/write_questa_rdc_script.tcl b/tclapp/siemens/questa_cdc/write_questa_rdc_script.tcl deleted file mode 100755 index 0c8109fb1..000000000 --- a/tclapp/siemens/questa_cdc/write_questa_rdc_script.tcl +++ /dev/null @@ -1,1357 +0,0 @@ -# Usage: write_questa_rdc_script [-output_directory ] [-use_existing_xdc|-generate_sdc] -############################################################################### -# -# write_questa_rdc_script.tcl (Routine for Mentor Graphics Questa RDC Application) -# -# Script created on 11/25/2019 by Mohamed Fawzy (Mentor Graphics Inc) -# Script last Modified on 05/29/2023 -# Vivado v2022.1 -############################################################################### - -namespace eval ::tclapp::siemens::questa_cdc { - # Export procs that should be allowed to import into other namespaces - namespace export write_questa_rdc_script -} - -proc ::tclapp::siemens::questa_cdc::matches_default_libs {lib} { - - # Summary: internally used routine to check if default libs used - - # Argument Usage: - # lib: name of lib to check if default lib - - # Return Value: - # 1 is returned when the passed library matches on of the names of the default libraries - - # Categories: xilinxtclstore, siemens, questa_rdc - - regsub ":.*" $lib {} lib - if {[string match -nocase $lib "xil_defaultlib"]} { - return 1 - } elseif {[string match -nocase $lib "work"]} { - return 1 - } else { - return 0 - } -} - -proc ::tclapp::siemens::questa_cdc::uniquify_lib {lib lang num} { - - # Summary: internally used routine to uniquify libs - - # Argument Usage: - # lib : lib name to uniquify - # lang : HDL language - # num : uniquified lib name - - # Return Value: - # The name of the uniquified library is returned - - # Categories: xilinxtclstore, siemens, questa_rdc - - - set new_lib "" - if {[matches_default_libs $lib]} { - set new_lib [concat $lib:$lang:$num] - } else { - set new_lib [concat $lib:$lang] - } - return $new_lib -} -proc ::tclapp::siemens::questa_cdc::sv_vhdl_keyword_table {keyword_table} { - - # Summary: internally used routine to create a table containing verilog and VHDL keywords - - # Argument Usage: - # keyword_table : table to store the keywords - - # Return Value: - # The table accumulated with verilog and VHDL keywords is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - set keywords {library module entity package ENTITY PACKAGE `protect all define function task localparam interface `timescale} - foreach keyword $keywords { - dict incr keyword_table $keyword - } - return $keyword_table -} -proc ::tclapp::siemens::questa_cdc::is_sv_vhdl_keyword {keyword_table word} { - - # Summary: internally used routine to check if given word is a verilog or vhdl keyword - - # Argument Usage: - # keyword_table : Table containing vhdl and verilog keywords - # word : input word - - # Return Value: - # Boolean value representing if input word is a keyword or not is returned - - # Categories: xilinxtclstore, siemens, questa_cdc - - return [dict exists $keyword_table $word] -} - -proc ::tclapp::siemens::questa_cdc::write_questa_rdc_script {args} { - - # Summary : This proc generates the Questa RDC script file - - # Argument Usage: - # top_module : Provide the design top name - # [-output_directory ]: Specify the output directory to generate the scripts in - # [-use_existing_xdc]: Ignore running write_xdc command to generate the SDC file of the synthesized design, and use the input constraints file instead - # [-generate_sdc]: To generate the SDC file of the synthesized design - # [-rdc_constraints]:Directives in the form of tcl File - # [-run ]: Run Questa RDC and invoke the UI of Questa RDC debug after generating the running scripts, default behavior is to stop after the generation of the scripts - # [-add_button]: Add a button to run Questa RDC in Vivado UI. - # [-remove_button]: Remove the Questa RDC button from Vivado UI. - - # Return Value: Returns '0' on successful completion - - # Categories: xilinxtclstore, siemens, questa_rdc - - # Keep an environment variable with the path of the script - set env(QUESTA_RDC_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] - - set args [subst [regsub -all \{ $args ""]] - set args [subst [regsub -all \} $args ""]] - set userOD "." - set top_module "" - set use_existing_xdc 0 - set generate_sdc 0 - set rdc_constraints "" - set run_questa_rdc "" - set add_button 0 - set remove_button 0 - set usage_msg "Usage : write_questa_rdc_script \[-output_directory \] \[-use_existing_xdc|-generate_sdc\] \[-run \] \[-add_button\] \[-remove_button\]" - # Parse the arguments - if { [llength $args] > 8 } { - puts "** ERROR : Extra arguments passed to the proc." - puts $usage_msg - return 1 - } - # Generate help message - if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { - puts $usage_msg - return 0 - } - for {set i 0} {$i < [llength $args]} {incr i} { - if { [lindex $args $i] == "-output_directory" } { - incr i - set userOD "[lindex $args $i]" - if { $userOD == "" } { - puts "** ERROR : Specified output directory can't be null." - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-use_existing_xdc" } { - set use_existing_xdc 1 - } elseif { [lindex $args $i] == "-generate_sdc" } { - set generate_sdc 1 - } elseif { [lindex $args $i] == "-rdc_constraints" } { - incr i - set rdc_constraints "[lindex $args $i]" - if { ($rdc_constraints == "") } { - puts "** ERROR : Missing argument value for -rdc_constraints" - puts $usage_msg - return 1 - } - set rdc_constraints [file normalize $rdc_constraints] - } elseif { [lindex $args $i] == "-run" } { - incr i - set run_questa_rdc "[lindex $args $i]" - if { ($run_questa_rdc != "rdc_run") && ($run_questa_rdc != "report_reset") } { - puts "** ERROR : Invalid argument value for -run '$run_questa_rdc'" - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-add_button" } { - set add_button 1 - } elseif { [lindex $args $i] == "-remove_button" } { - set remove_button 1 - } else { - set top_module [lindex $args $i] - } - } - - ## Set return code to 0 - set rc 0 - - # Getting the current vivado version and remove 'v' from the version string - set vivado_version [lindex [version] 1] - regsub {v} $vivado_version {} vivado_version - set major [lindex [split $vivado_version .] 0] - set minor [lindex [split $vivado_version .] 1] - set vivado_version "$major\.$minor" - - - ## -add_button and -remove_button can't be specified together - if { ($remove_button == 1) && ($add_button == 1) } { - puts "** ERROR : '-add_button' and '-remove_button' can't be specified together." - return 1 - } - - ## Add Vivado GUI button for Questa RDC - if { $add_button == 1 } { - ## Example for code of the Vivado GUI button - ## ----------------------------------------- - ## 0=Run%20Questa%20RDC tclapp::siemens::questa_cdc::write_questa_rdc_script "" /home/iahmed/questa_rdc_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20RDC%20Run "" -run true - ## ----------------------------------------- - - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - #set status [catch {exec grep write_questa_rdc_script $commands_file} result] - #if { $status == 0 } { - # puts "INFO : Vivado GUI button for running Questa RDC is already installed in $commands_file. Exiting ..." - # return $rc - #} - set questa_rdc_logo "$::env(QUESTA_RDC_TCL_SCRIPT_PATH)/questa_rdc_logo.PNG" - if { ! [file exists $questa_rdc_logo] } { - set questa_rdc_logo "\"$questa_rdc_logo\"" - puts "INFO: Can't find the Questa RDC logo at $questa_rdc_logo" - if { [file exists "$::env(QHOME)/share/fpga_libs/Xilinx/questa_rdc_logo.PNG"] } { - set questa_rdc_logo "\$::env(QHOME)/share/fpga_libs/Xilinx/questa_rdc_logo.PNG" - puts "INFO: Found the Questa RDC logo at $questa_rdc_logo" - } - } - - if { [catch {open $commands_file a} result] } { - puts stderr "ERROR: Could not open commands.xml to add the Questa RDC button, path '$commands_file'\n$result" - set rc 9 - return $rc - } else { - set commands_fh $result - puts "INFO: Adding Vivado GUI button for running Questa RDC in $commands_file" - } - set questa_rdc_command_index 0 - set vivado_cmds_version "1.0" - set encoding_cmds_version "UTF-8" - set major_cmds_version "1" - set minor_cmds_version "0" - set name_cmds_version "USER" - if { [file size $commands_file] } { - set file1 [open $commands_file r] - set file2 [read $file1] - set commands_file_line [split $file2 "\n"] - set last_command [lindex $commands_file_line end-2] - - foreach line $commands_file_line { - if {[regexp {write_questa_Rdc_script} $line]} { - puts "INFO : Vivado GUI button for running Questa RDC is already installed in $commands_file. Exiting ..." - close $commands_fh - close $file1 - return $rc - } - } - - if { $last_command == ""} { - set questa_rdc_command_index 0 - - } else { - set numbers 0 - foreach line $commands_file_line { - if {[regexp {([0-9]+)} $line m1 m2]} { - set numbers $m2 - } - } - set last_command_index $numbers - set questa_rdc_command_index [incr last_command_index] - - } - close $file1 - } else { - puts $commands_fh "" - puts $commands_fh "" - set questa_rdc_command_index 0 - } - puts $commands_fh " " - puts $commands_fh " $questa_rdc_command_index" - puts $commands_fh " Run_Questa_RDC" - puts $commands_fh " Run Questa RDC" - puts $commands_fh " source \$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_rdc_script.tcl; tclapp::siemens::questa_cdc::write_questa_rdc_script" - puts $commands_fh " $questa_rdc_logo" - puts $commands_fh " true" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Top_Module" - puts $commands_fh " \[lindex \[find_top\] 0\]" - puts $commands_fh " false" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Output_Directory" - puts $commands_fh " -output_directory Questa_RDC" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Use_Existing_XDC" - puts $commands_fh " -use_existing_xdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " Generate_SDC" - puts $commands_fh " -generate_sdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Invoke_Questa_RDC_Run" - puts $commands_fh " -run rdc_run" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh "" -# obselet generating .paini file -# set button_code "" -# if { $vivado_cmds_version == 1 } { -# set button_code "$questa_rdc_command_index=Run%20Questa%20RDC" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_rdc_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_rdc_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_rdc_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_rdc_script" -# set button_code "$button_code \"\" $questa_rdc_logo \"\" \"\" true ^@ \"\" true 4" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QRDC true" -# set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20RDC%20Run \"\" -run%20rdc_run true" -# } else { -# set button_code "$questa_rdc_command_index=$questa_rdc_command_index Run%20Questa%20RDC Run%20Questa%20RDC" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_rdc_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_rdc_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_rdc_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_rdc_script" -# set button_code "$button_code \"\" $questa_rdc_logo \"\" \"\" true ^ \"\" true 4" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QRDC true" -# set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20RDC%20Run \"\" -run%20rdc_run true" -# } -# puts $commands_fh $button_code - close $commands_fh - ################################################################################################## - ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if {[lindex $ip_lines $i] == ""} { - continue - } elseif {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - puts $op_file "" - close $ip_file - close $op_file - - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - ################################################################################################## - return $rc - } - - ## Remove Vivado GUI button for Questa RDC - if { $remove_button == 1 } { - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - if { [file exist $commands_file] } { - ## Temp file to write the modified file - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - set questa_rdc_command_found 0 - set questa_rdc_command_found_flag 0 - set position 0 - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if { $questa_rdc_command_found_flag == 0 } { - if { [regexp {\s\s\} [lindex $ip_lines $i]] && [regexp {\s\s\s\Run_Questa_RDC\} [lindex $ip_lines [expr $i + 2]]] } { - regexp {([0-9]+)\} [lindex $ip_lines [expr $i + 1]] m1 m2 - set position $m2 - set questa_rdc_command_found 1 - set questa_rdc_command_found_flag 1 - continue - } - } else { - if { ! [regexp {\s\s\} [lindex $ip_lines $i]] } { - continue - } else { - set questa_rdc_command_found_flag 0 - continue - } - } - - if {$questa_rdc_command_found_flag == 0 && $questa_rdc_command_found == 1 && [regexp {([0-9]+)\} [lindex $ip_lines $i]]} { - puts $op_file " $position\" - incr position - } else { - if {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - } - close $ip_file - close $op_file - - ## Now, remove the old commands file and replace it with the new one - #exec rm -f - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - if { $questa_rdc_command_found == 1 } { - puts "INFO: Vivado GUI button for running Questa RDC is removed from $commands_file" - } else { - puts "INFO: Vivado GUI button for running Questa RDC wasn't found in $commands_file." - puts " : File has not been changed." - } - } else { - puts "INFO: File $::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml not exist, cannot remove from unexisting file" - } - return $rc - } - - if { $top_module == "" } { - puts "** ERROR : No top_module specified to the proc." - puts $usage_msg - return 1 - } - if { $userOD == "." } { - puts "INFO: Output files will be generated at [file join [pwd] $userOD]" - } else { - puts "INFO: Output files will be generated at $userOD" - file mkdir $userOD - } - - set qrdc_ctrl "qrdc_ctrl.tcl" - set run_makefile "Makefile.qrdc" - set run_batfile "run_qrdc.bat" - set run_sdcfile "qrdc_sdc.tcl" - set qrdc_ctrl "qrdc_ctrl.tcl" - set qrdc_compile_tcl "qrdc_compile.tcl" - set run_script "qrdc_run.sh" - set tcl_script "qrdc_run.tcl" - set encrypted_lib "dummmmmy_lib" - - ## Vivado install dir - set vivado_dir $::env(XILINX_VIVADO) - puts "INFO: Using Vivado install directory $vivado_dir" - - ## If set to 1, will strictly respect file order - if lib files appear non-consecutively this order is maintained - ## otherwise will respect only library order - if lib files appear non-consecutively they will still be merged into one compile command - set resp_file_order 1 - ##creating Verilog and VHDL keywords table - set keyword_table [dict create] - set keyword_table [sv_vhdl_keyword_table $keyword_table] - - ## Does VHDL file for default lib exist - set vhdl_default_lib_exists 0 - ## Does Verilog file for default lib exist - set vlog_default_lib_exists 0 - - set vhdl_std "-93" - set timescale "1ps" - - # Settings - set top_lib_dir "qft" - set rdc_out_dir "RDC_RESULTS" - set modelsimini "modelsim.ini" - - # Open output files to write - if { [catch {open $userOD/$run_makefile w} result] } { - puts stderr "ERROR: Could not open $run_makefile for writing\n$result" - set rc 2 - return $rc - } else { - set qrdc_run_makefile_fh $result - puts "INFO: Writing Questa rdc run Makefile to file $userOD/$run_makefile" - } - if { [catch {open $userOD/$run_batfile w} result] } { - puts stderr "ERROR: Could not open $run_batfile for writing\n$result" - set rc 2 - return $rc - } else { - set qrdc_run_batfile_fh $result - puts "INFO: Writing Questa rdc run batfile to file $userOD/$run_batfile" - } - if { [catch {open $userOD/$run_sdcfile w} result] } { - puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" - set rc 2 - return $rc - } else { - set qrdc_run_sdcfile_fh $result - puts "INFO: Writing Questa rdc run batfile to file $userOD/$run_sdcfile" - } - if { [catch {open $userOD/$run_script w} result] } { - puts stderr "ERROR: Could not open $run_script for writing\n$result" - set rc 2 - return $rc - } else { - set qrdc_run_fh $result - puts "INFO: Writing Questa RDC run script to file $run_script" - } - - if { [catch {open $userOD/$tcl_script w} result] } { - puts stderr "ERROR: Could not open $tcl_script for writing\n$result" - set rc 10 - return $rc - } else { - set qrdc_tcl_fh $result - puts "INFO: Writing Questa RDC tcl script to file $tcl_script" - } - - if { [catch {open $userOD/$qrdc_ctrl w} result] } { - puts stderr "ERROR: Could not open $qrdc_ctrl for writing\n$result" - set rc 3 - return $rc - } else { - set qrdc_ctrl_fh $result - puts "INFO: Writing Questa RDC control directives script to file $qrdc_ctrl" - } - - if { [catch {open $userOD/$qrdc_compile_tcl w} result] } { - puts stderr "ERROR: Could not open $qrdc_compile_tcl for writing\n$result" - set rc 4 - return $rc - } else { - set qrdc_compile_tcl_fh $result - puts "INFO: Writing Questa RDC Tcl script to file $qrdc_compile_tcl" - } - - - set found_top 0 - foreach t [find_top] { - if {[string match $t $top_module]} { - set found_top 1 - } - } - if {$found_top == 0} { - puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" - set rc 5 - return $rc - } - - # Get the PART and the ARCHITECTURE of the target device - set arch_name [get_property ARCHITECTURE [get_parts [get_property PART [current_project]]]] - # Identify synthesis fileset - #set synth_fileset [lindex [get_filesets * -filter {FILESET_TYPE == "DesignSrcs"}] 0] - set synth_fileset [current_fileset] - if { [string match $synth_fileset ""] } { - puts stderr "ERROR: Could not find any synthesis fileset" - set rc 6 - return $rc - } else { - puts "INFO: Found synthesis fileset $synth_fileset" - } - update_compile_order -fileset $synth_fileset - -######RDC-25493- Extraction of +define options######## - set verilog_define_options [ get_property verilog_define [current_fileset] ] - if { [string match $verilog_define_options ""] } { - } else { - set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] - set prefix_verilog_define_options "+define+" - set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" - } - - ## Blackbox unisims -# link_design -part [get_parts [get_property PART [current_project]]] -# puts "set_option stop {\\" -# set num_c 0 -# foreach c [get_lib_cells] { -# incr num_c -# puts -nonewline "$c " -# if {[expr $num_c%10] == 0} { -# puts "\\" -# } -# } -# puts "}\n" - - #set proj_name [get_property NAME [current_project]] - ## Get list of IPs being used - set ips [get_ips *] - set num_ip [llength $ips] - puts "INFO: Found $num_ip IPs in design" - - ## Keep track of libraries to avoid duplicat compilation - array set compiled_lib_list {} - array set lib_incdirs_list {} - array set black_box_libs {} - set compile_lines [list ] - set black_box_lines [list ] - set line "" - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are part of the IP - foreach ip $ips { - set ip_ref [get_property IPDEF $ip] - regsub {xilinx.com:ip:} $ip_ref {} ip_name - regsub {:} $ip_name {_v} ip_name - regsub {\.} $ip_name {_} ip_name - if {[regexp {xilinx.com:ip:blk_mem_gen:} $ip_ref]} { - set line "netlist blackbox ${ip_name}_synth" - lappend black_box_lines $line - set black_box_libs($ip_name) 1 - } - } - - set num_files 0 - set global_incdirs [list ] - - - - - #Get filelist for each IP - for {set i 0} {$i <= $num_ip} {incr i} { - if {$i < $num_ip} { - - set ip [lindex $ips $i] - if {[catch { set ip_container [get_property IP_CORE_CONTAINER $ip] } errmsg]} { - puts "ErrorMsg: $errmsg" - set ip_container "dummy" - } -#support for RDC-25506 - "write_questa_rdc_script" needs to be enhanced to automatically extract source code for compressed Xilinx IP Containers (.xcix files). - if {[regexp {xcix} $ip_container all value] && [file exists $ip_container]} { - set is_xcix "1" - set ip_name [get_property NAME $ip] - set xcix_ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - set extracted_files [extract_files -base_dir $userOD/ip [get_files $ip_name.xcix]] - set wrong_files [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set files "" - foreach wrong_file $wrong_files { - set hdl_file [file tail $wrong_file] - foreach extract_file $extracted_files { - if {[regexp $hdl_file $extract_file]} { - if {[regexp {vho} $extract_file all value] || [regexp {veo} $extract_file all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value]} { - } else { - lappend files $extract_file - } - } - } - } - } else { - set is_xcix "0" - set ip [lindex $ips $i] - set ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - puts "INFO: Collecting files for IP $ip_ref ($ip_name)" - set files "" - set files_tmp [get_files -compile_order sources -used_in synthesis -of_objects $ip] - foreach file_tmp $files_tmp { - if {[file exists $file_tmp]} { - lappend files $file_tmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { -# if { [lsearch -exact $files $include_file] == "-1" } { - if {[file exists $include_file]} { - lappend files $include_file - } -# } - } - } - } else { - set is_xcix "0" - set ip $top_module - set ip_name $top_module - set ip_ref $top_module - set files "" - set files_tmp [get_files -norecurse -compile_order sources -used_in synthesis] - foreach ftmp $files_tmp { - if {[file exists $ftmp]} { - lappend files $ftmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { - if { [lsearch -exact $files $include_file] == "-1" && [file exists $include_file] } { - lappend files $include_file - } - } - puts "INFO: Collecting files for Top level" - } - puts "DEBUG: Files for (IP: $ip) are: $files" - - set lib_file_order [] - array set lib_file_array {} - - - set prev_lib "" - set prev_hdl_lang "" - set num_lib 0 - ## Find all files for the IP or Top level - foreach f $files { - #set f1 [lindex [get_files -of [get_filesets $synth_fileset] $f] 0] - incr num_files - if {$is_xcix == "1"} { - set fn $f - set lib $xcix_ip_name - set wrong_files2 [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set hdl_file2 [file tail $f] - foreach wrong_file2 $wrong_files2 { - if {[regexp $hdl_file2 $wrong_file2]} { - if {[regexp {vho} $wrong_file2 all value] || [regexp {veo} $wrong_file2 all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { - } else { - set f_original $wrong_file2 - } - } - } -# set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - if { [catch {set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]]} result] } { - set lib $xcix_ip_name - } else { - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - } - if ([regexp {vhd} $f all value]) { - set ft "VHDL" - } else { - set ft "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set fn [get_property NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - } else { - set fn [get_property NAME [lindex [get_files -all $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all $f] 0]] - } - } - puts "\nINFO: File= $fn Library= $lib File_type= $ft" - ## Create a new compile unit if library or language changes between the previous and current files - if {$prev_lib == ""} { - set num_lib 0 - } elseif {![string match -nocase $lib $prev_lib]} { - incr num_lib - } - if {$resp_file_order == 1} { - set lib [uniquify_lib $lib $ft $num_lib] - } - ## Create a list of files for each library - if {[string match $ft "Verilog"] || [string match $ft "Verilog Header"] || [string match $ft "SystemVerilog"] || [string match $ft "VHDL"] || [string match $ft "VHDL 2008"]} { - if {[info exists lib_file_array($lib)]} { - - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - foreach word [split $line] { - if { [ is_sv_vhdl_keyword $keyword_table $word ] } { - set found_encrypted 0 - break - } - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - } - close $file_h - if {$found_encrypted == "1"} { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - } - } else { - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - - foreach word [split $line] { - if { [ is_sv_vhdl_keyword $keyword_table $word ] } { - set found_encrypted 0 - break - } - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - } - close $file_h - if {$found_encrypted == "1" } { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) $fn - if { ![regexp {mem_gen_v\d+_\d+} $lib] && ![regexp {fifo_generator_v\d+_\d+} $lib] } { - lappend lib_file_order $lib - } else { - set lib_file_order_tmp $lib_file_order - set lib_file_order $lib - foreach lib_tmp $lib_file_order_tmp { - lappend lib_file_order $lib_tmp - } - } - - } - - - puts "\nINFO: Adding Library= $lib to list of libraries" - } - } - - set lib_file_lang($lib) $ft - regsub ":.*" $lib {} prev_lib - - ## Header files don't count and will not cause new compile unit to be created - if {![string match -nocase $ft "Verilog Header"]} { - set prev_hdl_lang $ft - } - - if {([string match $ft "Verilog"] || [string match $ft "SystemVerilog"]) && [matches_default_libs $lib]} { - set vlog_default_lib_exists 1 - } - if {[string match $ft "VHDL"] && [matches_default_libs $lib]} { - set vhdl_default_lib_exists 1 - } - } - - ## Check that the header files of a specific IP really exists in all the libraries' lists for this IP - foreach f $files { -# set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] -# set fn [get_property NAME [lindex [get_files -all $f] 0]] - if {[string match $ft "Verilog Header"]} { - foreach lib $lib_file_order { - set lang $lib_file_lang($lib) - if { ([regexp {Verilog} $lang]) && ([lsearch -exact $lib_file_array($lib) $fn] == "-1") } { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - puts $lib_file_array($lib) - } - } - } - } - - puts "DEBUG: IP= $ip_ref IPINST = $ip_name has following libraries $lib_file_order" - - # For each library, list the files - foreach lib $lib_file_order { -# if {![info exists compiled_lib_list($lib)] || [matches_default_libs $lib]} { - regsub ":.*" $lib {} lib_no_num - puts "INFO: Obtaining list of files for design= $ip_ref, library= $lib" - set lang $lib_file_lang($lib) - set incdirs [list ] - array unset incdir_ar - ## Create list of include files - if {[regexp {Verilog} $lang]} { - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - set is_include "0" - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {$is_include == 1 || [string match $f_type "Verilog Header"]} { - set file_dir [file dirname $f] - if {![info exists incdir_ar($file_dir)]} { - lappend incdirs [concat +incdir+$file_dir] - lappend global_incdirs [concat +incdir+$file_dir] - puts "INFO: Found include file $f" - set incdir_ar($file_dir) 1 - set lib_incdirs_list($lib_no_num) $incdirs - } - } - } - } - ## Print files to compile script - set debug_num [llength lib_file_array($lib)] - puts "DEBUG: Found $debug_num of files in library= $lib, IP= $ip_ref IPINST= $ip_name" - - if {[string match $lang "VHDL"]} { - set line "vcom -allowProtectedBeforeBody $vhdl_std -work $lib_no_num \\" - lappend compile_lines $line - - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "VHDL"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f is $f_type, library= $lib $lib_no_num fileset= $synth_fileset and does not match VHDL" - } - } - set line "\n" - lappend compile_lines $line - } elseif {[string match $lang "Verilog"] || [string match $lang "SystemVerilog"]} { - if {[string match $lang "SystemVerilog"]} { - set sv_switch "-sv" - } else { - set sv_switch "" - } - - set line "vlog -suppress 13389 $verilog_define_options $sv_switch -incr -work $lib_no_num \\" - lappend compile_lines $line - if { [info exists lib_incdirs_list($lib_no_num)] && $lib_incdirs_list($lib_no_num) != ""} { -# foreach idir $lib_incdirs_list($lib_no_num) { -# set line " $idir \\" - set line " $global_incdirs \\" - lappend compile_lines $line -# } - } - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "Verilog"] || [string match $f_type "SystemVerilog"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f, fileset= $synth_fileset do not match Verilog or SystemVerilog" - } - } - set line "\n" - lappend compile_lines $line - } -# } else { -# puts "INFO: Library $lib has already been compiled. Skipping it." -# } - } - - ## Bookkeeping on which libraries are already compiled - foreach lib $lib_file_order { - regsub ":.*" $lib {} lib - set compiled_lib_list($lib) 1 - } - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are sub-cores - foreach subcore $lib_file_order { - if {![info exists black_box_libs($subcore)]} { - if {[regexp {^blk_mem_gen_v\d+_\d+} $subcore]} { - set line "#rdc blackbox memory ${subcore}_synth" - lappend black_box_lines $line - set black_box_libs($subcore) 1 - } - } - } - - ## Delete all information related to this IP - set lib_file_order [] - array unset lib_file_array * - array unset lib_file_lang * - } - - if {$num_files == 0} { - puts stderr "ERROR: Could not find any files in synthesis fileset" - set rc 7 - return $rc - } - - puts $qrdc_compile_tcl_fh "\n#" - puts $qrdc_compile_tcl_fh "# Create work library" - puts $qrdc_compile_tcl_fh "#" - puts $qrdc_compile_tcl_fh "vlib $top_lib_dir" - puts $qrdc_compile_tcl_fh "vlib $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qrdc_compile_tcl_fh "vlib $top_lib_dir/$key" - } - - puts $qrdc_compile_tcl_fh "\n#" - puts $qrdc_compile_tcl_fh "# Map libraries" - puts $qrdc_compile_tcl_fh "#" - puts $qrdc_compile_tcl_fh "vmap work $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - puts $qrdc_compile_tcl_fh "vmap $key $top_lib_dir/$key" - } - - puts $qrdc_compile_tcl_fh "\n#" - puts $qrdc_compile_tcl_fh "# Compile files section" - puts $qrdc_compile_tcl_fh "#" - - - - - set first_pack "1" - foreach l $compile_lines { - if {[regexp {\_pack\.vhd} $l all value] } { - if {$first_pack == "1"} { - puts $qrdc_compile_tcl_fh "\n$vcom_line\n $l" - set first_pack "0" - } else { - puts $qrdc_compile_tcl_fh "$l" - set first_pack "0" - - } - } - if {[regexp {allowProtectedBeforeBody} $l all value] } { - set vcom_line $l - set first_pack "1" - } - - - - } - - - puts $qrdc_compile_tcl_fh "\n" - - - - - foreach l $compile_lines { - puts $qrdc_compile_tcl_fh $l - } - - puts $qrdc_compile_tcl_fh "\n#" - puts $qrdc_compile_tcl_fh "# Add global set/reset" - puts $qrdc_compile_tcl_fh "#" - puts $qrdc_compile_tcl_fh "vlog -suppress 13389 $verilog_define_options -work xil_defaultlib $vivado_dir/data/verilog/src/glbl.v" - - close $qrdc_compile_tcl_fh - - ## Print compile information - puts $qrdc_ctrl_fh "rdc preference -print_port_domain_template" - puts $qrdc_ctrl_fh "rdc preference tree -sync_internal " - puts $qrdc_ctrl_fh "netlist fpga -vendor xilinx -version $vivado_version -library vivado" - - if {$black_box_lines != ""} { - puts $qrdc_ctrl_fh "\n#" - puts $qrdc_ctrl_fh "# Black box blk_mem_gen" - puts $qrdc_ctrl_fh "#" - foreach l $black_box_lines { - puts $qrdc_ctrl_fh $l - } - } - close $qrdc_ctrl_fh - - ## Get the library names and append a '-L' to the library name - array set qft_libs {} - foreach lib [array names compiled_lib_list] { - set qft_libs($lib) 1 - } - set lib_args "" - foreach lib [array names qft_libs] { - set lib_args [concat $lib_args -L $lib] - } - - set rdc_constraints_do "" - if {$rdc_constraints != ""} { - set rdc_constraints_do "do $rdc_constraints;" - } - - ## Dump the run file -## Dump the run Makefile - puts $qrdc_run_makefile_fh "DUT=$top_module" - puts $qrdc_run_makefile_fh "" - puts $qrdc_run_makefile_fh "clean:" - puts $qrdc_run_makefile_fh "\trm -rf $top_lib_dir $rdc_out_dir" - puts $qrdc_run_makefile_fh "" - puts $qrdc_run_makefile_fh "rdc_run:" - puts $qrdc_run_makefile_fh "\tqverify -c -licq -l qrdc_${top_module}.log -od $rdc_out_dir -do \"\\" - puts $qrdc_run_makefile_fh "\tonerror {exit 1}; \\" - puts $qrdc_run_makefile_fh "\tdo $qrdc_ctrl; \\" - puts $qrdc_run_makefile_fh "\t$rdc_constraints_do ; \\" - puts $qrdc_run_makefile_fh "\tdo $qrdc_compile_tcl; \\" - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qrdc_run_makefile_fh "\tnetlist create -d $top_module $lib_args -tool rdc; \\" - puts $qrdc_run_makefile_fh "\tsdc load $file; \\" - } - } - } elseif { $generate_sdc == 1 } { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qrdc_run_makefile_fh "\tnetlist create -d $top_module $lib_args -tool rdc; \\" - puts $qrdc_run_makefile_fh "\tsdc load $sdc_out_file; \\" - } - } - puts $qrdc_run_makefile_fh "\trdc run -d \$(DUT) $lib_args; \\" - puts $qrdc_run_makefile_fh "\texit 0\"" - - close $qrdc_run_makefile_fh - - puts $qrdc_run_batfile_fh "@ECHO OFF" - puts $qrdc_run_batfile_fh "" - puts $qrdc_run_batfile_fh "SET DUT=$top_module" - puts $qrdc_run_batfile_fh "" - puts $qrdc_run_batfile_fh "IF \[%1\]==\[\] goto :usage" - puts $qrdc_run_batfile_fh "IF %1==clean (" - puts $qrdc_run_batfile_fh " call :clean" - puts $qrdc_run_batfile_fh ") ELSE IF %1==compile (" - puts $qrdc_run_batfile_fh " call :compile" - puts $qrdc_run_batfile_fh ") ELSE IF %1==rdc (" - puts $qrdc_run_batfile_fh " call :rdc" - puts $qrdc_run_batfile_fh ") ELSE IF %1==debug_rdc (" - puts $qrdc_run_batfile_fh " call :debug_rdc" - puts $qrdc_run_batfile_fh ") ELSE IF %1==all (" - puts $qrdc_run_batfile_fh " call :clean" - puts $qrdc_run_batfile_fh " call :compile" - puts $qrdc_run_batfile_fh " call :rdc" - puts $qrdc_run_batfile_fh " call :debug_rdc" - puts $qrdc_run_batfile_fh ") ELSE (" - puts $qrdc_run_batfile_fh " call :usage" - puts $qrdc_run_batfile_fh ")" - puts $qrdc_run_batfile_fh "exit /b" - puts $qrdc_run_batfile_fh "" - puts $qrdc_run_batfile_fh ":clean" - puts $qrdc_run_batfile_fh "\tIF EXIST $top_lib_dir RMDIR /S /Q $top_lib_dir" - puts $qrdc_run_batfile_fh "\tIF EXIST $rdc_out_dir RMDIR /S /Q $rdc_out_dir" - puts $qrdc_run_batfile_fh "\texit /b" - puts $qrdc_run_batfile_fh "" - puts $qrdc_run_batfile_fh ":compile" - puts $qrdc_run_batfile_fh "\tqverify -c -licq -l qrdc_${top_module}.log -od $rdc_out_dir -do ^\"$rdc_constraints_do do $qrdc_ctrl;do $qrdc_compile_tcl;do $run_sdcfile^\"" - - - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qrdc_run_sdcfile_fh "netlist create -d $top_module $lib_args -tool rdc" - puts $qrdc_run_sdcfile_fh "sdc load $file" - } - } - } elseif { $generate_sdc == 1 } { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qrdc_run_sdcfile_fh "netlist create -d $top_module $lib_args -tool rdc" - puts $qrdc_run_sdcfile_fh "sdc load $sdc_out_file;" - } - } - puts $qrdc_run_batfile_fh "\texit /b" - puts $qrdc_run_batfile_fh "" - - puts $qrdc_run_batfile_fh ":rdc" - puts $qrdc_run_batfile_fh "\tqverify -c -licq -l qrdc_${top_module}.log -od $rdc_out_dir -do ^\"$rdc_constraints_do do $qrdc_ctrl;rdc run -d %DUT% $lib_args; ^\"" - puts $qrdc_run_batfile_fh "\texit /b" - puts $qrdc_run_batfile_fh "" - puts $qrdc_run_batfile_fh ":debug_rdc" - puts $qrdc_run_batfile_fh "\tqverify $rdc_out_dir\/rdc\.db " - puts $qrdc_run_batfile_fh "\texit /b" - puts $qrdc_run_batfile_fh "" - puts $qrdc_run_batfile_fh ":usage" - puts $qrdc_run_batfile_fh "\tECHO \#\#\# run_qrdc clean \.\.\.\.\.\. Clean all results from directory" - puts $qrdc_run_batfile_fh "\tECHO \#\#\# run_qrdc compile \.\.\.\. Compile source code" - puts $qrdc_run_batfile_fh "\tECHO \#\#\# run_qrdc rdc \.\.\.\.\.\.\.\. Run RDC" - puts $qrdc_run_batfile_fh "\tECHO \#\#\# run_qrdc debug_rdc \.\. Debug RDC Run" - puts $qrdc_run_batfile_fh "\tECHO \#\#\# run_qrdc all \.\.\.\.\.\.\.\. Run all RDC Steps on Souce Code and Launch Debug" - puts $qrdc_run_batfile_fh "\texit /b" - - - close $qrdc_run_batfile_fh - puts $qrdc_run_fh "#! /bin/sh" - puts $qrdc_run_fh "" - puts $qrdc_run_fh "rm -rf $top_lib_dir $rdc_out_dir" - puts $qrdc_run_fh "qverify -c -licq -l qrdc_${top_module}.log -od $rdc_out_dir -do ${tcl_script}" - close $qrdc_run_fh - - puts $qrdc_tcl_fh "onerror {exit 1}" - puts $qrdc_tcl_fh "do $qrdc_ctrl" - puts $qrdc_tcl_fh "$rdc_constraints_do" - puts $qrdc_tcl_fh "do $qrdc_compile_tcl" - ## Get the constraints file - - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qrdc_tcl_fh "netlist create -d $top_module $lib_args -tool rdc" - puts $qrdc_tcl_fh "sdc load $file" - } - } - } elseif { $generate_sdc == 1 } { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qrdc_tcl_fh "netlist create -d $top_module $lib_args -tool rdc" - puts $qrdc_tcl_fh "sdc load $sdc_out_file" - } - } - - if { $run_questa_rdc == "report_reset" } { - puts $qrdc_tcl_fh "rdc run -d $top_module $lib_args -report_reset" - } else { - puts $qrdc_tcl_fh "rdc run -d $top_module $lib_args" - puts $qrdc_tcl_fh "rdc generate report ${top_module}_detailed.rpt" - } - puts $qrdc_tcl_fh "exit 0" - -# puts $qrdc_tcl_fh "sdc load $top_module.sdc" -# puts $qrdc_tcl_fh "do $qrdc_ctrl" - - close $qrdc_tcl_fh - puts "INFO : Generation of running scripts for Questa RDC is done at [pwd]/$userOD" - - ## Change permissions of the generated running script - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec chmod u+x $userOD/$run_script - } - if { $run_questa_rdc == "rdc_run" } { - puts "INFO : Running Questa RDC (Command: rdc run), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/RDC_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh qrdc_run.sh" - } - puts "INFO : Questa RDC run is finished" - puts "INFO : Invoking Questa RDC UI for debugging." - exec qverify $userOD/RDC_RESULTS/rdc.db & - } elseif { $run_questa_rdc == "report_reset" } { - puts "INFO : Running Questa RDC (Command: rdc run -report_reset), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/RDC_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh qrdc_run.sh" - } - puts "INFO : Questa RDC run is finished" - puts "INFO : Invoking Questa RDC UI for debugging." - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { -# exec /bin/sh -c "cd $userOD; qverify -l qverify_ui.log RDC_RESULTS/rdc.db" & - } - } - return $rc -} - - -## Auto-import the procs of the Questa RDC script -namespace import tclapp::siemens::questa_cdc::* diff --git a/tclapp/siemens/questa_cdc/write_questa_resetcheck_script.tcl b/tclapp/siemens/questa_cdc/write_questa_resetcheck_script.tcl deleted file mode 100755 index 41b09de8f..000000000 --- a/tclapp/siemens/questa_cdc/write_questa_resetcheck_script.tcl +++ /dev/null @@ -1,1293 +0,0 @@ -# Usage: write_questa_resetcheck_script [-output_directory ] [-use_existing_xdc|-no_sdc] -############################################################################### -# -# write_questa_resetcheck_script.tcl (Routine for Mentor Graphics Questa ResetCheck Application) -# -# Script created on 11/25/2019 by Mohamed Fawzy (Mentor Graphics Inc) -# -############################################################################### - -namespace eval ::tclapp::siemens::questa_cdc { - # Export procs that should be allowed to import into other namespaces - namespace export write_questa_resetcheck_script -} - -proc ::tclapp::siemens::questa_cdc::matches_default_libs {lib} { - - # Summary: internally used routine to check if default libs used - - # Argument Usage: - # lib: name of lib to check if default lib - - # Return Value: - # 1 is returned when the passed library matches on of the names of the default libraries - - # Categories: xilinxtclstore, siemens, questa_resetcheck - - regsub ":.*" $lib {} lib - if {[string match -nocase $lib "xil_defaultlib"]} { - return 1 - } elseif {[string match -nocase $lib "work"]} { - return 1 - } else { - return 0 - } -} - -proc ::tclapp::siemens::questa_cdc::uniquify_lib {lib lang num} { - - # Summary: internally used routine to uniquify libs - - # Argument Usage: - # lib : lib name to uniquify - # lang : HDL language - # num : uniquified lib name - - # Return Value: - # The name of the uniquified library is returned - - # Categories: xilinxtclstore, siemens, questa_resetcheck - - - set new_lib "" - if {[matches_default_libs $lib]} { - set new_lib [concat $lib:$lang:$num] - } else { - set new_lib [concat $lib:$lang] - } - return $new_lib -} - -proc ::tclapp::siemens::questa_cdc::write_questa_resetcheck_script {args} { - - # Summary : This proc generates the Questa ResetCheck script file - - # Argument Usage: - # top_module : Provide the design top name - # [-output_directory ]: Specify the output directory to generate the scripts in - # [-use_existing_xdc]: Ignore running write_xdc command to generate the SDC file of the synthesized design, and use the input constraints file instead - # [-no_sdc]: Don't generate SDC file, user is expected to update generated tcl file to add constraints information - # [-run ]: Run Questa ResetCheck and invoke the UI of Questa ResetCheck debug after generating the running scripts, default behavior is to stop after the generation of the scripts - # [-add_button]: Add a button to run Questa ResetCheck in Vivado UI. - # [-remove_button]: Remove the Questa ResetCheck button from Vivado UI. - - # Return Value: Returns '0' on successful completion - - # Categories: xilinxtclstore, siemens, questa_resetcheck - - # Keep an environment variable with the path of the script - set env(QUESTA_ResetCheck_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] - set args [subst [regsub -all \{ $args ""]] - set args [subst [regsub -all \} $args ""]] - - - - set userOD "." - set top_module "" - set use_existing_xdc 0 - set no_sdc 0 - set run_questa_resetcheck "resetcheck run" - set add_button 0 - set remove_button 0 - set usage_msg "Usage : write_questa_resetcheck_script \[-output_directory \] \[-use_existing_xdc|-no_sdc\] \[-run \] \[-add_button\] \[-remove_button\]" - # Parse the arguments - if { [llength $args] > 8 } { - puts "** ERROR : Extra arguments passed to the proc." - puts $usage_msg - return 1 - } - # Generate help message - if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { - puts $usage_msg - return 0 - } - for {set i 0} {$i < [llength $args]} {incr i} { - if { [lindex $args $i] == "-output_directory" } { - incr i - set userOD "[lindex $args $i]" - if { $userOD == "" } { - puts "** ERROR : Specified output directory can't be null." - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-use_existing_xdc" } { - set use_existing_xdc 1 - } elseif { [lindex $args $i] == "-no_sdc" } { - set no_sdc 1 - } elseif { [lindex $args $i] == "-run" } { - incr i - set run_questa_resetcheck "[lindex $args $i]" - if { ($run_questa_resetcheck != "resetcheck_run") && ($run_questa_resetcheck != "report_clock") } { - puts "** ERROR : Invalid argument value for -run '$run_questa_resetcheck'" - puts $usage_msg - return 1 - } - } elseif { [lindex $args $i] == "-add_button" } { - set add_button 1 - } elseif { [lindex $args $i] == "-remove_button" } { - set remove_button 1 - } else { - set top_module [lindex $args $i] - } - } - - ## Set return code to 0 - set rc 0 - - # Getting the current vivado version and remove 'v' from the version string - set vivado_version [lindex [version] 1] - regsub {v} $vivado_version {} vivado_version - set major [lindex [split $vivado_version .] 0] - set minor [lindex [split $vivado_version .] 1] - set vivado_version "$major\.$minor" - - - ## -add_button and -remove_button can't be specified together - if { ($remove_button == 1) && ($add_button == 1) } { - puts "** ERROR : '-add_button' and '-remove_button' can't be specified together." - return 1 - } - - ## Add Vivado GUI button for Questa ResetCheck - if { $add_button == 1 } { - ## Example for code of the Vivado GUI button - ## ----------------------------------------- - ## 0=Run%20Questa%20ResetCheck tclapp::siemens::questa_cdc::write_questa_resetcheck_script "" /home/iahmed/questa_resetcheck_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20ResetCheck%20Run "" -run true - ## ----------------------------------------- - - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - #set status [catch {exec grep write_questa_resetcheck_script $commands_file} result] - #if { $status == 0 } { - # puts "INFO : Vivado GUI button for running Questa ResetCheck is already installed in $commands_file. Exiting ..." - # return $rc - #} - set questa_resetcheck_logo "$::env(QUESTA_ResetCheck_TCL_SCRIPT_PATH)/questa_resetcheck_logo.PNG" - if { ! [file exists $questa_resetcheck_logo] } { - set questa_resetcheck_logo "\"$questa_resetcheck_logo\"" - puts "INFO: Can't find the Questa ResetCheck logo at $questa_resetcheck_logo" - if { [file exists "$::env(QHOME)/share/fpga_libs/Xilinx/questa_resetcheck_logo.PNG"] } { - set questa_resetcheck_logo "\$::env(QHOME)/share/fpga_libs/Xilinx/questa_resetcheck_logo.PNG" - puts "INFO: Found the Questa ResetCheck logo at $questa_resetcheck_logo" - } - } - - if { [catch {open $commands_file a} result] } { - puts stderr "ERROR: Could not open commands.xml to add the Questa ResetCheck button, path '$commands_file'\n$result" - set rc 9 - return $rc - } else { - set commands_fh $result - puts "INFO: Adding Vivado GUI button for running Questa ResetCheck in $commands_file" - } - set questa_resetcheck_command_index 0 - set vivado_cmds_version "1.0" - set encoding_cmds_version "UTF-8" - set major_cmds_version "1" - set minor_cmds_version "0" - set name_cmds_version "USER" - if { [file size $commands_file] } { - set file1 [open $commands_file r] - set file2 [read $file1] - set commands_file_line [split $file2 "\n"] - set last_command [lindex $commands_file_line end-1] - - foreach line $commands_file_line { - if {[regexp {write_questa_resetcheck_script} $line]} { - puts "INFO : Vivado GUI button for running Questa ResetCheck is already installed in $commands_file. Exiting ..." - close $commands_fh - close $file1 - return $rc - } - } - - if { $last_command == ""} { - set questa_resetcheck_command_index 0 - - } else { - set numbers 0 - foreach line $commands_file_line { - if {[regexp {([0-9]+)} $line m1 m2]} { - set numbers $m2 - } - } - set last_command_index $numbers - set questa_resetcheck_command_index [incr last_command_index] - - } - close $file1 - } else { - puts $commands_fh "" - puts $commands_fh "" - set questa_resetcheck_command_index 0 - } - puts $commands_fh " " - puts $commands_fh " $questa_resetcheck_command_index" - puts $commands_fh " Run_Questa_ResetCheck" - puts $commands_fh " Run Questa ResetCheck" - puts $commands_fh " source \$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_resetcheck_script.tcl; tclapp::siemens::questa_cdc::write_questa_resetcheck_script" - puts $commands_fh " $questa_resetcheck_logo" - puts $commands_fh " true" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Top_Module" - puts $commands_fh " \[lindex \[find_top\] 0\]" - puts $commands_fh " false" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Output_Directory" - puts $commands_fh " -output_directory Questa_ResetCheck" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Use_Existing_XDC" - puts $commands_fh " -use_existing_xdc" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " Invoke_Questa_ResetCheck_Run" - puts $commands_fh " -run resetcheck_run" - puts $commands_fh " true" - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh " " - puts $commands_fh "" -# obselet generating .paini file -# set button_code "" -# if { $vivado_cmds_version == 1 } { -# set button_code "$questa_resetcheck_command_index=Run%20Questa%20ResetCheck" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_resetcheck_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_resetcheck_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_resetcheck_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_resetcheck_script" -# set button_code "$button_code \"\" $questa_resetcheck_logo \"\" \"\" true ^@ \"\" true 4" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QResetCheck true" -# set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20ResetCheck%20Run \"\" -run%20resetcheck_run true" -# } else { -# set button_code "$questa_resetcheck_command_index=$questa_resetcheck_command_index Run%20Questa%20ResetCheck Run%20Questa%20ResetCheck" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_resetcheck_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_resetcheck_script" - -# set button_code "$button_code source%20\$::env(QHOME)/share/fpga_libs/Xilinx/write_questa_resetcheck_script.tcl;%20tclapp::siemens::questa_cdc::write_questa_resetcheck_script" -# set button_code "$button_code \"\" $questa_resetcheck_logo \"\" \"\" true ^ \"\" true 4" -# set button_code "$button_code Top%20Module \"\" \[lindex%20\[find_top\]%200\] false" -# set button_code "$button_code Output%20Directory \"\" -output_directory%20QResetCheck true" -# set button_code "$button_code Use%20Existing%20XDC \"\" -use_existing_xdc true" -# set button_code "$button_code Invoke%20Questa%20ResetCheck%20Run \"\" -run%20resetcheck_run true" -# } -# puts $commands_fh $button_code - close $commands_fh - ################################################################################################## - ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if {[lindex $ip_lines $i] == ""} { - continue - } elseif {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - puts $op_file "" - close $ip_file - close $op_file - - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - ################################################################################################## - return $rc - } - - ## Remove Vivado GUI button for Questa ResetCheck - if { $remove_button == 1 } { - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" - } else { - set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" - } - if { [file exist $commands_file] } { - ## Temp file to write the modified file - set op_file [open "$commands_file.tmp" w] - - ## Read the original commands.xml file - set ip_file [open "$commands_file" r] - set ip_data [read $ip_file] - set ip_lines [split $ip_data "\n"] - - set questa_resetcheck_command_found 0 - set questa_resetcheck_command_found_flag 0 - set position 0 - - for {set i 0} {$i < [llength $ip_lines]} {incr i} { - if { $questa_resetcheck_command_found_flag == 0 } { - if { [regexp {\s\s\} [lindex $ip_lines $i]] && [regexp {\s\s\s\Run_Questa_ResetCheck\} [lindex $ip_lines [expr $i + 2]]] } { - regexp {([0-9]+)\} [lindex $ip_lines [expr $i + 1]] m1 m2 - set position $m2 - set questa_resetcheck_command_found 1 - set questa_resetcheck_command_found_flag 1 - continue - } - } else { - if { ! [regexp {\s\s\} [lindex $ip_lines $i]] } { - continue - } else { - set questa_resetcheck_command_found_flag 0 - continue - } - } - - if {$questa_resetcheck_command_found_flag == 0 && $questa_resetcheck_command_found == 1 && [regexp {([0-9]+)\} [lindex $ip_lines $i]]} { - puts $op_file " $position\" - incr position - } else { - if {[lindex $ip_lines $i] == ""} { - continue - } else { - puts $op_file "[lindex $ip_lines $i]" - } - } - } - close $ip_file - close $op_file - ## Now, remove the old commands file and replace it with the new one - #exec rm -f - #file delete -force $commands_file - if { $OS == "Linux" } { - exec rm -rf $commands_file - } else { - file delete -force $commands_file - } - file rename ${commands_file}.tmp $commands_file - if { $questa_resetcheck_command_found == 1 } { - puts "INFO: Vivado GUI button for running Questa ResetCheck is removed from $commands_file" - } else { - puts "INFO: Vivado GUI button for running Questa ResetCheck wasn't found in $commands_file." - puts " : File has not been changed." - } - } else { - puts "INFO: File $::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml not exist, cannot remove from unexisting file" - } - return $rc - } - - if { $top_module == "" } { - puts "** ERROR : No top_module specified to the proc." - puts $usage_msg - return 1 - } - if { $userOD == "." } { - puts "INFO: Output files will be generated at [file join [pwd] $userOD]" - } else { - puts "INFO: Output files will be generated at $userOD" - file mkdir $userOD - } - - set qresetcheck_ctrl "qresetcheck_ctrl.tcl" - set run_makefile "Makefile.qresetcheck" - set run_batfile "run_qrdc.bat" - set run_sdcfile "qresetcheck_sdc.tcl" - set qresetcheck_ctrl "qresetcheck_ctrl.tcl" - set qresetcheck_compile_tcl "qresetcheck_compile.tcl" - set run_script "qresetcheck_run.sh" - set tcl_script "qresetcheck_run.tcl" - set encrypted_lib "dummmmmy_lib" - - ## Vivado install dir - set vivado_dir $::env(XILINX_VIVADO) - puts "INFO: Using Vivado install directory $vivado_dir" - - ## If set to 1, will strictly respect file order - if lib files appear non-consecutively this order is maintained - ## otherwise will respect only library order - if lib files appear non-consecutively they will still be merged into one compile command - set resp_file_order 1 - - ## Does VHDL file for default lib exist - set vhdl_default_lib_exists 0 - ## Does Verilog file for default lib exist - set vlog_default_lib_exists 0 - - set vhdl_std "-93" - set timescale "1ps" - - # Settings - set top_lib_dir "qft" - set resetcheck_out_dir "ResetCheck_RESULTS" - set modelsimini "modelsim.ini" - - # Open output files to write - if { [catch {open $userOD/$run_makefile w} result] } { - puts stderr "ERROR: Could not open $run_makefile for writing\n$result" - set rc 2 - return $rc - } else { - set qresetcheck_run_makefile_fh $result - puts "INFO: Writing Questa resetcheck run Makefile to file $userOD/$run_makefile" - } - if { [catch {open $userOD/$run_batfile w} result] } { - puts stderr "ERROR: Could not open $run_batfile for writing\n$result" - set rc 2 - return $rc - } else { - set qresetcheck_run_batfile_fh $result - puts "INFO: Writing Questa resetcheck run batfile to file $userOD/$run_batfile" - } - if { [catch {open $userOD/$run_sdcfile w} result] } { - puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" - set rc 2 - return $rc - } else { - set qresetcheck_run_sdcfile_fh $result - puts "INFO: Writing Questa resetcheck run batfile to file $userOD/$run_sdcfile" - } - if { [catch {open $userOD/$run_script w} result] } { - puts stderr "ERROR: Could not open $run_script for writing\n$result" - set rc 2 - return $rc - } else { - set qresetcheck_run_fh $result - puts "INFO: Writing Questa ResetCheck run script to file $run_script" - } - - if { [catch {open $userOD/$tcl_script w} result] } { - puts stderr "ERROR: Could not open $tcl_script for writing\n$result" - set rc 10 - return $rc - } else { - set qresetcheck_tcl_fh $result - puts "INFO: Writing Questa ResetCheck tcl script to file $tcl_script" - } - - if { [catch {open $userOD/$qresetcheck_ctrl w} result] } { - puts stderr "ERROR: Could not open $qresetcheck_ctrl for writing\n$result" - set rc 3 - return $rc - } else { - set qresetcheck_ctrl_fh $result - puts "INFO: Writing Questa ResetCheck control directives script to file $qresetcheck_ctrl" - } - - if { [catch {open $userOD/$qresetcheck_compile_tcl w} result] } { - puts stderr "ERROR: Could not open $qresetcheck_compile_tcl for writing\n$result" - set rc 4 - return $rc - } else { - set qresetcheck_compile_tcl_fh $result - puts "INFO: Writing Questa ResetCheck Tcl script to file $qresetcheck_compile_tcl" - } - - - set found_top 0 - foreach t [find_top] { - if {[string match $t $top_module]} { - set found_top 1 - } - } - if {$found_top == 0} { - puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" - set rc 5 - return $rc - } - - # Get the PART and the ARCHITECTURE of the target device - set arch_name [get_property ARCHITECTURE [get_parts [get_property PART [current_project]]]] - # Identify synthesis fileset - #set synth_fileset [lindex [get_filesets * -filter {FILESET_TYPE == "DesignSrcs"}] 0] - set synth_fileset [current_fileset] - if { [string match $synth_fileset ""] } { - puts stderr "ERROR: Could not find any synthesis fileset" - set rc 6 - return $rc - } else { - puts "INFO: Found synthesis fileset $synth_fileset" - } - update_compile_order -fileset $synth_fileset - -######ResetCheck-25493- Extraction of +define options######## - set verilog_define_options [ get_property verilog_define [current_fileset] ] - if { [string match $verilog_define_options ""] } { - } else { - set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] - set prefix_verilog_define_options "+define+" - set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" - } - - ## Blackbox unisims -# link_design -part [get_parts [get_property PART [current_project]]] -# puts "set_option stop {\\" -# set num_c 0 -# foreach c [get_lib_cells] { -# incr num_c -# puts -nonewline "$c " -# if {[expr $num_c%10] == 0} { -# puts "\\" -# } -# } -# puts "}\n" - - #set proj_name [get_property NAME [current_project]] - ## Get list of IPs being used - set ips [get_ips *] - set num_ip [llength $ips] - puts "INFO: Found $num_ip IPs in design" - - ## Keep track of libraries to avoid duplicat compilation - array set compiled_lib_list {} - array set lib_incdirs_list {} - array set black_box_libs {} - set compile_lines [list ] - set black_box_lines [list ] - set line "" - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are part of the IP - foreach ip $ips { - set ip_ref [get_property IPDEF $ip] - regsub {xilinx.com:ip:} $ip_ref {} ip_name - regsub {:} $ip_name {_v} ip_name - regsub {\.} $ip_name {_} ip_name - if {[regexp {xilinx.com:ip:blk_mem_gen:} $ip_ref]} { - set line "netlist blackbox ${ip_name}_synth" - lappend black_box_lines $line - set black_box_libs($ip_name) 1 - } - } - - set num_files 0 - set global_incdirs [list ] - - - - - #Get filelist for each IP - for {set i 0} {$i <= $num_ip} {incr i} { - if {$i < $num_ip} { - - set ip [lindex $ips $i] - if {[catch { set ip_container [get_property IP_CORE_CONTAINER $ip] } errmsg]} { - puts "ErrorMsg: $errmsg" - set ip_container "dummy" - } -#support for ResetCheck-25506 - "write_questa_resetcheck_script" needs to be enhanced to automatically extract source code for compressed Xilinx IP Containers (.xcix files). - if {[regexp {xcix} $ip_container all value] && [file exists $ip_container]} { - set is_xcix "1" - set ip_name [get_property NAME $ip] - set xcix_ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - set extracted_files [extract_files -base_dir $userOD/ip [get_files $ip_name.xcix]] - set wrong_files [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set files "" - foreach wrong_file $wrong_files { - set hdl_file [file tail $wrong_file] - foreach extract_file $extracted_files { - if {[regexp $hdl_file $extract_file]} { - if {[regexp {vho} $extract_file all value] || [regexp {veo} $extract_file all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value]} { - } else { - lappend files $extract_file - } - } - } - } - } else { - set is_xcix "0" - set ip [lindex $ips $i] - set ip_name [get_property NAME $ip] - set ip_ref [get_property IPDEF $ip] - puts "INFO: Collecting files for IP $ip_ref ($ip_name)" - set files "" - set files_tmp [get_files -compile_order sources -used_in synthesis -of_objects $ip] - foreach file_tmp $files_tmp { - if {[file exists $file_tmp]} { - lappend files $file_tmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { -# if { [lsearch -exact $files $include_file] == "-1" } { - if {[file exists $include_file]} { - lappend files $include_file - } -# } - } - } - } else { - set is_xcix "0" - set ip $top_module - set ip_name $top_module - set ip_ref $top_module - set files "" - set files_tmp [get_files -norecurse -compile_order sources -used_in synthesis] - foreach ftmp $files_tmp { - if {[file exists $ftmp]} { - lappend files $ftmp - } - } - # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file - set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] - foreach include_file $all_include_files { - if { [lsearch -exact $files $include_file] == "-1" && [file exists $include_file] } { - lappend files $include_file - } - } - puts "INFO: Collecting files for Top level" - } - puts "DEBUG: Files for (IP: $ip) are: $files" - - set lib_file_order [] - array set lib_file_array {} - - - set prev_lib "" - set prev_hdl_lang "" - set num_lib 0 - ## Find all files for the IP or Top level - foreach f $files { - #set f1 [lindex [get_files -of [get_filesets $synth_fileset] $f] 0] - incr num_files - if {$is_xcix == "1"} { - set fn $f - set lib $xcix_ip_name - set wrong_files2 [get_files -compile_order sources -used_in synthesis -of_objects $ip] - set hdl_file2 [file tail $f] - foreach wrong_file2 $wrong_files2 { - if {[regexp $hdl_file2 $wrong_file2]} { - if {[regexp {vho} $wrong_file2 all value] || [regexp {veo} $wrong_file2 all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { - } else { - set f_original $wrong_file2 - } - } - } -# set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - if { [catch {set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]]} result] } { - set lib $xcix_ip_name - } else { - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] - } - if ([regexp {vhd} $f all value]) { - set ft "VHDL" - } else { - set ft "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set fn [get_property NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - } else { - set fn [get_property NAME [lindex [get_files -all $f] 0]] - set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - set fs [get_property FILESET_NAME [lindex [get_files -all $f] 0]] - set lib [get_property LIBRARY [lindex [get_files -all $f] 0]] - } - } - puts "\nINFO: File= $fn Library= $lib File_type= $ft" - ## Create a new compile unit if library or language changes between the previous and current files - if {$prev_lib == ""} { - set num_lib 0 - } elseif {![string match -nocase $lib $prev_lib]} { - incr num_lib - } - if {$resp_file_order == 1} { - set lib [uniquify_lib $lib $ft $num_lib] - } - ## Create a list of files for each library - if {[string match $ft "Verilog"] || [string match $ft "Verilog Header"] || [string match $ft "SystemVerilog"] || [string match $ft "VHDL"] || [string match $ft "VHDL 2008"]} { - if {[info exists lib_file_array($lib)]} { - - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - if {[regexp {library} $line all value] ||[regexp {module} $line all value] || [regexp {entity} $line all value] || [regexp {package} $line all value] || [regexp {ENTITY} $line all value] || [regexp {PACKAGE} $line all value] || [regexp {`protect} $line all value] || [regexp {define} $line all value] || [regexp {function} $line all value] || [regexp {task} $line all value] || [regexp {localparam} $line all value] } { - set found_encrypted 0 - break - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - - } - close $file_h - if {$found_encrypted == "1"} { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - } - } else { - set file_h [open $fn] - set found_encrypted 1 - while {[gets $file_h line] >= 0} { - if {[regexp {library} $line all value] ||[regexp {module} $line all value] || [regexp {entity} $line all value] || [regexp {package} $line all value] || [regexp {ENTITY} $line all value] || [regexp {PACKAGE} $line all value] || [regexp {`protect} $line all value] || [regexp {define} $line all value] || [regexp {function} $line all value] || [regexp {task} $line all value] || [regexp {localparam} $line all value] } { - set found_encrypted 0 - break - } - if { [regexp $encrypted_lib $line ] } { - set found_encrypted 1 - break - } - } - close $file_h - if {$found_encrypted == "1" } { - regsub ":.*" $lib {} encrypted_lib - } else { - set lib_file_array($lib) $fn - if { ![regexp {mem_gen_v\d+_\d+} $lib] && ![regexp {fifo_generator_v\d+_\d+} $lib] } { - lappend lib_file_order $lib - } else { - set lib_file_order_tmp $lib_file_order - set lib_file_order $lib - foreach lib_tmp $lib_file_order_tmp { - lappend lib_file_order $lib_tmp - } - } - - } - - - puts "\nINFO: Adding Library= $lib to list of libraries" - } - } - - set lib_file_lang($lib) $ft - regsub ":.*" $lib {} prev_lib - - ## Header files don't count and will not cause new compile unit to be created - if {![string match -nocase $ft "Verilog Header"]} { - set prev_hdl_lang $ft - } - - if {([string match $ft "Verilog"] || [string match $ft "SystemVerilog"]) && [matches_default_libs $lib]} { - set vlog_default_lib_exists 1 - } - if {[string match $ft "VHDL"] && [matches_default_libs $lib]} { - set vhdl_default_lib_exists 1 - } - } - - ## Check that the header files of a specific IP really exists in all the libraries' lists for this IP - foreach f $files { -# set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] -# set fn [get_property NAME [lindex [get_files -all $f] 0]] - if {[string match $ft "Verilog Header"]} { - foreach lib $lib_file_order { - set lang $lib_file_lang($lib) - if { ([regexp {Verilog} $lang]) && ([lsearch -exact $lib_file_array($lib) $fn] == "-1") } { - set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] - puts $lib_file_array($lib) - } - } - } - } - - puts "DEBUG: IP= $ip_ref IPINST = $ip_name has following libraries $lib_file_order" - - # For each library, list the files - foreach lib $lib_file_order { -# if {![info exists compiled_lib_list($lib)] || [matches_default_libs $lib]} { - regsub ":.*" $lib {} lib_no_num - puts "INFO: Obtaining list of files for design= $ip_ref, library= $lib" - set lang $lib_file_lang($lib) - set incdirs [list ] - array unset incdir_ar - ## Create list of include files - if {[regexp {Verilog} $lang]} { - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - set is_include "0" - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all $f] 0]] - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {$is_include == 1 || [string match $f_type "Verilog Header"]} { - set file_dir [file dirname $f] - if {![info exists incdir_ar($file_dir)]} { - lappend incdirs [concat +incdir+$file_dir] - lappend global_incdirs [concat +incdir+$file_dir] - puts "INFO: Found include file $f" - set incdir_ar($file_dir) 1 - set lib_incdirs_list($lib_no_num) $incdirs - } - } - } - } - ## Print files to compile script - set debug_num [llength lib_file_array($lib)] - puts "DEBUG: Found $debug_num of files in library= $lib, IP= $ip_ref IPINST= $ip_name" - - if {[string match $lang "VHDL"]} { - set line "vcom -allowProtectedBeforeBody $vhdl_std -work $lib_no_num \\" - lappend compile_lines $line - - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "VHDL"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f is $f_type, library= $lib $lib_no_num fileset= $synth_fileset and does not match VHDL" - } - } - set line "\n" - lappend compile_lines $line - } elseif {[string match $lang "Verilog"] || [string match $lang "SystemVerilog"]} { - if {[string match $lang "SystemVerilog"]} { - set sv_switch "-sv" - } else { - set sv_switch "" - } - - set line "vlog -suppress 13389 $verilog_define_options $sv_switch -incr -work $lib_no_num \\" - lappend compile_lines $line - if { [info exists lib_incdirs_list($lib_no_num)] && $lib_incdirs_list($lib_no_num) != ""} { -# foreach idir $lib_incdirs_list($lib_no_num) { -# set line " $idir \\" - set line " $global_incdirs \\" - lappend compile_lines $line -# } - } - foreach f [split $lib_file_array($lib)] { - if {$is_xcix == "1"} { - - if ([regexp {vhd} $f all value]) { - set f_type "VHDL" - } else { - set f_type "SystemVerilog" - } - } else { - if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { - set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } else { - set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] - if { [string match $f_type "VHDL 2008"] } { - set f_type "VHDL" - set vhdl_std "-2008" - } - } - } - if {[string match $f_type "Verilog"] || [string match $f_type "SystemVerilog"]} { - if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { - set line " $f \\" - lappend compile_lines $line - } - } else { - puts "DEBUG: FILE_TYPE for file $f, fileset= $synth_fileset do not match Verilog or SystemVerilog" - } - } - set line "\n" - lappend compile_lines $line - } -# } else { -# puts "INFO: Library $lib has already been compiled. Skipping it." -# } - } - - ## Bookkeeping on which libraries are already compiled - foreach lib $lib_file_order { - set compiled_lib_list($lib) 1 - } - - ## Set black-boxes for blk_mem_gen and fifo_gen if they are sub-cores - foreach subcore $lib_file_order { - if {![info exists black_box_libs($subcore)]} { - if {[regexp {^blk_mem_gen_v\d+_\d+} $subcore]} { - lappend black_box_lines $line - set black_box_libs($subcore) 1 - } - } - } - - ## Delete all information related to this IP - set lib_file_order [] - array unset lib_file_array * - array unset lib_file_lang * - } - - if {$num_files == 0} { - puts stderr "ERROR: Could not find any files in synthesis fileset" - set rc 7 - return $rc - } - - puts $qresetcheck_compile_tcl_fh "\n#" - puts $qresetcheck_compile_tcl_fh "# Create work library" - puts $qresetcheck_compile_tcl_fh "#" - puts $qresetcheck_compile_tcl_fh "vlib $top_lib_dir" - puts $qresetcheck_compile_tcl_fh "vlib $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - regsub ":.*" $key {} key - puts $qresetcheck_compile_tcl_fh "vlib $top_lib_dir/$key" - } - - puts $qresetcheck_compile_tcl_fh "\n#" - puts $qresetcheck_compile_tcl_fh "# Map libraries" - puts $qresetcheck_compile_tcl_fh "#" - puts $qresetcheck_compile_tcl_fh "vmap work $top_lib_dir/xil_defaultlib" - foreach key [array names compiled_lib_list] { - regsub ":.*" $key {} key - puts $qresetcheck_compile_tcl_fh "vmap $key $top_lib_dir/$key" - } - - puts $qresetcheck_compile_tcl_fh "\n#" - puts $qresetcheck_compile_tcl_fh "# Compile files section" - puts $qresetcheck_compile_tcl_fh "#" - - - - - set first_pack "1" - foreach l $compile_lines { - if {[regexp {\_pack\.vhd} $l all value] } { - if {$first_pack == "1"} { - puts $qresetcheck_compile_tcl_fh "\n$vcom_line\n $l" - set first_pack "0" - } else { - puts $qresetcheck_compile_tcl_fh "$l" - set first_pack "0" - - } - } - if {[regexp {allowProtectedBeforeBody} $l all value] } { - set vcom_line $l - set first_pack "1" - } - - - - } - - - puts $qresetcheck_compile_tcl_fh "\n" - - - - - foreach l $compile_lines { - puts $qresetcheck_compile_tcl_fh $l - } - - puts $qresetcheck_compile_tcl_fh "\n#" - puts $qresetcheck_compile_tcl_fh "# Add global set/reset" - puts $qresetcheck_compile_tcl_fh "#" - puts $qresetcheck_compile_tcl_fh "vlog -suppress 13389 $verilog_define_options -work xil_defaultlib $vivado_dir/data/verilog/src/glbl.v" - - close $qresetcheck_compile_tcl_fh - - ## Print compile information - puts $qresetcheck_ctrl_fh "resetcheck preference -print_port_domain_template" - puts $qresetcheck_ctrl_fh "resetcheck preference tree -sync_internal " - puts $qresetcheck_ctrl_fh "netlist fpga -vendor xilinx -version $vivado_version -library vivado" - - if {$black_box_lines != ""} { - puts $qresetcheck_ctrl_fh "\n#" - puts $qresetcheck_ctrl_fh "# Black box blk_mem_gen" - puts $qresetcheck_ctrl_fh "#" - foreach l $black_box_lines { - puts $qresetcheck_ctrl_fh $l - } - } - close $qresetcheck_ctrl_fh - - ## Get the library names and append a '-L' to the library name - array set qft_libs {} - foreach lib [array names compiled_lib_list] { - regsub ":.*" $lib {} lib - set qft_libs($lib) 1 - } - set lib_args "" - foreach lib [array names qft_libs] { - set lib_args [concat $lib_args -L $lib] - } - - - ## Dump the run file -## Dump the run Makefile - puts $qresetcheck_run_makefile_fh "DUT=$top_module" - puts $qresetcheck_run_makefile_fh "" - puts $qresetcheck_run_makefile_fh "clean:" - puts $qresetcheck_run_makefile_fh "\trm -rf $top_lib_dir $resetcheck_out_dir" - puts $qresetcheck_run_makefile_fh "" - puts $qresetcheck_run_makefile_fh "resetcheck_run:" - puts $qresetcheck_run_makefile_fh "\t\$(QHOME)/bin/qverify -c -licq -l qresetcheck_${top_module}.log -od $resetcheck_out_dir -do \"\\" - puts $qresetcheck_run_makefile_fh "\tonerror {exit 1}; \\" - puts $qresetcheck_run_makefile_fh "\tdo $qresetcheck_ctrl; \\" - - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qresetcheck_run_makefile_fh "\tsdc load $file; \\" - } - } - } else { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qresetcheck_run_makefile_fh "\tsdc load $sdc_out_file; \\" - } - } - puts $qresetcheck_run_makefile_fh "\tdo $qresetcheck_compile_tcl; \\" - puts $qresetcheck_run_makefile_fh "\tresetcheck run -d \$(DUT) $lib_args; \\" - puts $qresetcheck_run_makefile_fh "\texit 0\"" - - close $qresetcheck_run_makefile_fh - - puts $qresetcheck_run_batfile_fh "@ECHO OFF" - puts $qresetcheck_run_batfile_fh "" - puts $qresetcheck_run_batfile_fh "SET DUT=$top_module" - puts $qresetcheck_run_batfile_fh "" - puts $qresetcheck_run_batfile_fh "IF \[%1\]==\[\] goto :usage" - puts $qresetcheck_run_batfile_fh "IF %1==clean (" - puts $qresetcheck_run_batfile_fh " call :clean" - puts $qresetcheck_run_batfile_fh ") ELSE IF %1==compile (" - puts $qresetcheck_run_batfile_fh " call :compile" - puts $qresetcheck_run_batfile_fh ") ELSE IF %1==rdc (" - puts $qresetcheck_run_batfile_fh " call :rdc" - puts $qresetcheck_run_batfile_fh ") ELSE IF %1==debug_rdc (" - puts $qresetcheck_run_batfile_fh " call :debug_rdc" - puts $qresetcheck_run_batfile_fh ") ELSE IF %1==all (" - puts $qresetcheck_run_batfile_fh " call :clean" - puts $qresetcheck_run_batfile_fh " call :compile" - puts $qresetcheck_run_batfile_fh " call :rdc" - puts $qresetcheck_run_batfile_fh " call :debug_rdc" - puts $qresetcheck_run_batfile_fh ") ELSE (" - puts $qresetcheck_run_batfile_fh " call :usage" - puts $qresetcheck_run_batfile_fh ")" - puts $qresetcheck_run_batfile_fh "exit /b" - puts $qresetcheck_run_batfile_fh "" - puts $qresetcheck_run_batfile_fh ":clean" - puts $qresetcheck_run_batfile_fh "\tIF EXIST $top_lib_dir RMDIR /S /Q $top_lib_dir" - puts $qresetcheck_run_batfile_fh "\tIF EXIST $resetcheck_out_dir RMDIR /S /Q $resetcheck_out_dir" - puts $qresetcheck_run_batfile_fh "\texit /b" - puts $qresetcheck_run_batfile_fh "" - puts $qresetcheck_run_batfile_fh ":compile" - puts $qresetcheck_run_batfile_fh "\tqverify -c -licq -l qresetcheck_${top_module}.log -od $resetcheck_out_dir -do ^\"do $qresetcheck_ctrl;do $qresetcheck_compile_tcl;do $run_sdcfile^\"" - - - ## Get the constraints file - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qresetcheck_run_sdcfile_fh "sdc load $file" - } - } - } else { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qresetcheck_run_sdcfile_fh "sdc load $sdc_out_file;" - } - } - puts $qresetcheck_run_batfile_fh "\texit /b" - puts $qresetcheck_run_batfile_fh "" - - puts $qresetcheck_run_batfile_fh ":rdc" - puts $qresetcheck_run_batfile_fh "\tqverify -c -licq -l qresetcheck_${top_module}.log -od $resetcheck_out_dir -do ^\"do $qresetcheck_ctrl;resetcheck run -d %DUT% $lib_args; ^\"" - puts $qresetcheck_run_batfile_fh "\texit /b" - puts $qresetcheck_run_batfile_fh "" - puts $qresetcheck_run_batfile_fh ":debug_rdc" - puts $qresetcheck_run_batfile_fh "\tqverify $resetcheck_out_dir\/resetcheck\.db " - puts $qresetcheck_run_batfile_fh "\texit /b" - puts $qresetcheck_run_batfile_fh "" - puts $qresetcheck_run_batfile_fh ":usage" - puts $qresetcheck_run_batfile_fh "\tECHO \#\#\# run_qrdc clean \.\.\.\.\.\. Clean all results from directory" - puts $qresetcheck_run_batfile_fh "\tECHO \#\#\# run_qrdc compile \.\.\.\. Compile source code" - puts $qresetcheck_run_batfile_fh "\tECHO \#\#\# run_qrdc rdc \.\.\.\.\.\.\.\. Run RDC" - puts $qresetcheck_run_batfile_fh "\tECHO \#\#\# run_qrdc debug_rdc \.\. Debug RDC Run" - puts $qresetcheck_run_batfile_fh "\tECHO \#\#\# run_qrdc all \.\.\.\.\.\.\.\. Run all RDC Steps on Souce Code and Launch Debug" - puts $qresetcheck_run_batfile_fh "\texit /b" - - - close $qresetcheck_run_batfile_fh - puts $qresetcheck_run_fh "#! /bin/sh" - puts $qresetcheck_run_fh "" - puts $qresetcheck_run_fh "rm -rf $top_lib_dir $resetcheck_out_dir" - puts $qresetcheck_run_fh "\$QHOME/bin/qverify -c -licq -l qresetcheck_${top_module}.log -od $resetcheck_out_dir -do ${tcl_script}" - close $qresetcheck_run_fh - - puts $qresetcheck_tcl_fh "onerror {exit 1}" - puts $qresetcheck_tcl_fh "do $qresetcheck_ctrl" - - ## Get the constraints file - if { $no_sdc == 0 } { - if { $use_existing_xdc == 1 } { - puts "INFO : Using existing XDC files." - set constr_fileset [current_fileset -constrset] - set files [get_files -all -of [get_filesets $constr_fileset] *] - foreach file $files { - set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] - if { [string match $ft "VHDL 2008"] } { - set ft "VHDL" - set vhdl_std "-2008" - } - if { $ft == "XDC" } { - puts $qresetcheck_tcl_fh "sdc load $file" - } - } - } else { - set sdc_out_file "${top_module}_syn.sdc" - puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" - puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" - if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { - puts "** ERROR : Can't generate SDC file for the design." - puts " : Please run the synthesis step, or open the synthesized design then re-run the script." - puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." - set rc 8 - return $rc - } else { - puts $qresetcheck_tcl_fh "sdc load $sdc_out_file" - } - } - } - puts $qresetcheck_tcl_fh "do $qresetcheck_compile_tcl" - if { $run_questa_resetcheck == "report_clock" } { - puts $qresetcheck_tcl_fh "resetcheck run -d $top_module $lib_args -report_clock" - } else { - puts $qresetcheck_tcl_fh "resetcheck run -d $top_module $lib_args" - puts $qresetcheck_tcl_fh "resetcheck generate report ${top_module}_detailed.rpt" - } - puts $qresetcheck_tcl_fh "exit 0" - -# puts $qresetcheck_tcl_fh "sdc load $top_module.sdc" -# puts $qresetcheck_tcl_fh "do $qresetcheck_ctrl" - - close $qresetcheck_tcl_fh - puts "INFO : Generation of running scripts for Questa ResetCheck is done at [pwd]/$userOD" - puts "This script will be deprecated. Use write_questa_rdc_script.tcl instead" - - ## Change permissions of the generated running script - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec chmod u+x $userOD/$run_script - } - if { $run_questa_resetcheck == "resetcheck_run" } { - puts "INFO : Running Questa ResetCheck (Command: resetcheck run), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/ResetCheck_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh qresetcheck_run.sh" - } - puts "INFO : Questa ResetCheck run is finished" - puts "INFO : Invoking Questa ResetCheck UI for debugging." - exec qverify $userOD/ResetCheck_RESULTS/resetcheck.db & - } elseif { $run_questa_resetcheck == "report_clock" } { - puts "INFO : Running Questa ResetCheck (Command: resetcheck run -report_clock), the UI will be invoked when the run is finished" - puts " : Log can be found at $userOD/ResetCheck_RESULTS/qverify.log" - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { - exec /bin/sh -c "cd $userOD; sh qresetcheck_run.sh" - } - puts "INFO : Questa ResetCheck run is finished" - puts "INFO : Invoking Questa ResetCheck UI for debugging." - set OS [lindex $::tcl_platform(os) 0] - if { $OS == "Linux" } { -# exec /bin/sh -c "cd $userOD; qverify -l qverify_ui.log ResetCheck_RESULTS/resetcheck.db" & - } - } - return $rc -} - - -## Auto-import the procs of the Questa ResetCheck script -namespace import tclapp::siemens::questa_cdc::* diff --git a/tclapp/siemens/questa_ds/README b/tclapp/siemens/questa_ds/README new file mode 100755 index 000000000..b7a2ebda1 --- /dev/null +++ b/tclapp/siemens/questa_ds/README @@ -0,0 +1,2 @@ +Tcl App for Siemens Questa Design Solutions +Generate script file to run CDC,RDC,LINT and Autocheck tools with Siemens Questa Design Solutions diff --git a/tclapp/siemens/questa_cdc/app.xml b/tclapp/siemens/questa_ds/app.xml similarity index 95% rename from tclapp/siemens/questa_cdc/app.xml rename to tclapp/siemens/questa_ds/app.xml index f9b4d3135..fb2a34c44 100755 --- a/tclapp/siemens/questa_cdc/app.xml +++ b/tclapp/siemens/questa_ds/app.xml @@ -2,7 +2,7 @@ - Remove mentor files no longer needed + Unification of CDC RDC Lint and Autocheck scripts questa_cdc siemens Siemens diff --git a/tclapp/siemens/questa_cdc/doc/legal.txt b/tclapp/siemens/questa_ds/doc/legal.txt similarity index 96% rename from tclapp/siemens/questa_cdc/doc/legal.txt rename to tclapp/siemens/questa_ds/doc/legal.txt index 01977723d..14e2d3078 100755 --- a/tclapp/siemens/questa_cdc/doc/legal.txt +++ b/tclapp/siemens/questa_ds/doc/legal.txt @@ -1,4 +1,4 @@ -Unpublished work. ©2023 Siemns +Unpublished work. ©2024 Siemns All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -15,4 +15,4 @@ This file must be included in /doc/legal.txt for all accepted contributions All contributors must date and digitally sign once below in order to submit to the Xilinx Tcl Store :::: ================================================================================================= -20230822::banaks6g::Akshaya Bandaru +20240906::banaks6g::Akshaya Bandaru diff --git a/tclapp/siemens/questa_cdc/doc/write_questa_autocheck_script b/tclapp/siemens/questa_ds/doc/write_questa_autocheck_script similarity index 100% rename from tclapp/siemens/questa_cdc/doc/write_questa_autocheck_script rename to tclapp/siemens/questa_ds/doc/write_questa_autocheck_script diff --git a/tclapp/siemens/questa_cdc/doc/write_questa_cdc_script b/tclapp/siemens/questa_ds/doc/write_questa_cdc_script similarity index 100% rename from tclapp/siemens/questa_cdc/doc/write_questa_cdc_script rename to tclapp/siemens/questa_ds/doc/write_questa_cdc_script diff --git a/tclapp/siemens/questa_cdc/doc/write_questa_lint_script b/tclapp/siemens/questa_ds/doc/write_questa_lint_script similarity index 100% rename from tclapp/siemens/questa_cdc/doc/write_questa_lint_script rename to tclapp/siemens/questa_ds/doc/write_questa_lint_script diff --git a/tclapp/siemens/questa_cdc/doc/write_questa_rdc_script b/tclapp/siemens/questa_ds/doc/write_questa_rdc_script similarity index 100% rename from tclapp/siemens/questa_cdc/doc/write_questa_rdc_script rename to tclapp/siemens/questa_ds/doc/write_questa_rdc_script diff --git a/tclapp/siemens/questa_cdc/doc/write_questa_resetcheck_script b/tclapp/siemens/questa_ds/doc/write_questa_resetcheck_script similarity index 100% rename from tclapp/siemens/questa_cdc/doc/write_questa_resetcheck_script rename to tclapp/siemens/questa_ds/doc/write_questa_resetcheck_script diff --git a/tclapp/siemens/questa_cdc/pkgIndex.tcl b/tclapp/siemens/questa_ds/pkgIndex.tcl similarity index 82% rename from tclapp/siemens/questa_cdc/pkgIndex.tcl rename to tclapp/siemens/questa_ds/pkgIndex.tcl index dbfa69ca7..7e936522b 100755 --- a/tclapp/siemens/questa_cdc/pkgIndex.tcl +++ b/tclapp/siemens/questa_ds/pkgIndex.tcl @@ -8,4 +8,4 @@ # script is sourced, the variable $dir must contain the # full path name of this file's directory. -package ifneeded ::tclapp::siemens::questa_cdc 1.10 [list source [file join $dir questa_cdc.tcl]] +package ifneeded ::tclapp::siemens::questa_ds 1.11 [list source [file join $dir questa_cdc.tcl]] diff --git a/tclapp/siemens/questa_cdc/questa_autocheck_logo.PNG b/tclapp/siemens/questa_ds/questa_autocheck_logo.PNG similarity index 100% rename from tclapp/siemens/questa_cdc/questa_autocheck_logo.PNG rename to tclapp/siemens/questa_ds/questa_autocheck_logo.PNG diff --git a/tclapp/siemens/questa_cdc/questa_cdc_logo.PNG b/tclapp/siemens/questa_ds/questa_cdc_logo.PNG similarity index 100% rename from tclapp/siemens/questa_cdc/questa_cdc_logo.PNG rename to tclapp/siemens/questa_ds/questa_cdc_logo.PNG diff --git a/tclapp/siemens/questa_cdc/questa_cdc.tcl b/tclapp/siemens/questa_ds/questa_ds.tcl similarity index 80% rename from tclapp/siemens/questa_cdc/questa_cdc.tcl rename to tclapp/siemens/questa_ds/questa_ds.tcl index 7eefa8a6d..a29ff8279 100755 --- a/tclapp/siemens/questa_cdc/questa_cdc.tcl +++ b/tclapp/siemens/questa_ds/questa_ds.tcl @@ -1,7 +1,7 @@ # tclapp/siemens/questa_cdc/questa_cdc.tcl package require Tcl 8.5 -namespace eval ::tclapp::siemens::questa_cdc { +namespace eval ::tclapp::siemens::questa_ds { # Allow Tcl to find tclIndex variable home [file join [pwd] [file dirname [info script]]] @@ -11,4 +11,4 @@ namespace eval ::tclapp::siemens::questa_cdc { ## Keep an environment variable with the path of the script set env(QUESTA_CDC_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] } -package provide ::tclapp::siemens::questa_cdc 1.10 +package provide ::tclapp::siemens::questa_ds 1.11 diff --git a/tclapp/siemens/questa_ds/questa_ds_vivado_script.tcl b/tclapp/siemens/questa_ds/questa_ds_vivado_script.tcl new file mode 100644 index 000000000..d680d4398 --- /dev/null +++ b/tclapp/siemens/questa_ds/questa_ds_vivado_script.tcl @@ -0,0 +1,2841 @@ +namespace eval ::tclapp::siemens::questa_ds { + # Export procs that should be allowed to import into other namespaces + + namespace export write_questa_cdc_script + namespace export write_questa_rdc_script + namespace export write_questa_lint_script + namespace export write_questa_autocheck_script +} + +proc ::tclapp::siemens::questa_ds::matches_default_libs {lib} { + + # Summary: internally used routine to check if default libs used + + # Argument Usage: + # lib: name of lib to check if default lib + + # Return Value: + # 1 is returned when the passed library matches on of the names of the default libraries + + # Categories: xilinxtclstore, siemens, questa_cdc + + regsub ":.*" $lib {} lib + if {[string match -nocase $lib "xil_defaultlib"]} { + return 1 + } elseif {[string match -nocase $lib "work"]} { + return 1 + } else { + return 0 + } +} +proc ::tclapp::siemens::questa_ds::uniquify_lib {lib lang num} { + + # Summary: internally used routine to uniquify libs + + # Argument Usage: + # lib : lib name to uniquify + # lang : HDL language + # num : uniquified lib name + + # Return Value: + # The name of the uniquified library is returned + + # Categories: xilinxtclstore, siemens, questa_cdc + + + set new_lib "" + if {[matches_default_libs $lib]} { + set new_lib [concat $lib:$lang:$num] + } else { + set new_lib [concat $lib:$lang] + } + return $new_lib +} +proc ::tclapp::siemens::questa_ds::populate_siemens_publickeys {siemens_public_key_table} { + set public_keys { "MGC-DVT-MTI" "MGC-VELOCE-RSA" "MGC-VERIF-SIM-RSA-1" "MGC-VERIF-SIM-RSA-2" "MGC-VERIF-SIM-RSA-3" "SIEMENS-VERIF-SIM-RSA-1" "SIEMENS-VERIF-SIM-RSA-2" } + foreach pkey $public_keys { + dict incr siemens_public_key_table $pkey + } + return $siemens_public_key_table +} +proc ::tclapp::siemens::questa_ds::populate_rtl_keywords {rtl_keyword_table} { + + set vl_keywords {accept_on alias always always_comb always_ff always_latch and assert assign assume automatic before begin bind bins binsof bit break buf bufif0 bufif1 byte case casex casez cell chandle checker class clocking cmos config const constraint context continue cover covergroup coverpoint cross deassign default defparam design disable dist do edge else end endcase endchecker endclass endclocking endconfig endfunction endgenerate endgroup endinterface endmodule endpackage endprimitive endprogram endproperty endspecify endsequence endtable endtask enum event eventually expect export extends extern final first_match for force foreach forever fork forkjoin function generate genvar global highz0 highz1 if iff ifnone ignore_bins illegal_bins implies import incdir include initial inout input inside instance int integer interface intersect join join_any join_none large let liblist library local localparam logic longint macromodule matches medium modport module nand negedge new nexttime nmos nor noshowcancelled not notif0 notif1 null or output package packed parameter pmos posedge primitive priority program property protected pull0 pull1 pulldown pullup pulsestyle_ondetect pulsestyle_onevent pure rand randc randcase randsequence rcmos real realtime ref reg reject_on release repeat restrict return rnmos rpmos rtran rtranif0 rtranif1 s_always s_eventually s_nexttime s_until s_until_with scalared sequence shortint shortreal showcancelled signed small solve specify specparam static string strong strong0 strong1 struct super supply0 supply1 sync_accept_on sync_reject_on table tagged task this throughout time timeprecision timescale timeunit tran tranif0 tranif1 tri tri0 tri1 triand trior trireg type typedef union unique unique0 unsigned until until_with untyped use uwire var vectored virtual void wait wait_order wand weak weak0 weak1 while wildcard wire with within wor xnor xor} + + set vhdl_keywords {accept_on alias always always_comb abs access after all and architecture array assert attribute begin block body buffer bus case component configuration constant disconnect downto else elsif end entity exit file for function generate generic guarded if in inout is label library linkage loop map mod nand new next nor not null of on open or others out package port procedure process range record register rem report return select severity signal subtype then to transport type units until use variable wait when while with xnor xor std_logic std_ulogic std_logic_vector bit bit_vector boolean character conv_std_logic_vector conv_integer conv_unsigned conv_signed integer string signed to_integer to_stdlogicvector unsigned} + + set vl_directives {`_FILE_ `_LINE_ `begin_keywords `celldefine `default_nettype `define `else `elsif `end_keywords `endcelldefine `endif `endprotect `endprotected `ifdef `ifndef `include `line `nounconnected_drive `pragma `protect `protected `resetall `timescale `unconnected_drive `undef `undefineall} + + + foreach keyword $vl_keywords { + dict incr rtl_keyword_table $keyword + } + foreach keyword $vhdl_keywords { + dict incr rtl_keyword_table $keyword + } + foreach keyword $vl_directives { + dict incr rtl_keyword_table $keyword + } + return $rtl_keyword_table +} +proc ::tclapp::siemens::questa_ds::is_sv_vhdl_keyword {rtl_keyword_table word} { + + set word [string tolower $word] + return [dict exists $rtl_keyword_table $word] +} +proc ::tclapp::siemens::questa_ds::set_hier_ips {tool userOD} { + + set hier_ip_blocks "q${tool}_hier_ip_blocks.tcl" + if { [catch {open $userOD/$hier_ip_blocks w} result] } { + puts stderr "ERROR: Could not open $hier_ip_blocks for writing\n$result" + set rc 2 + return $rc + } else { + set hier_ip_blocks_fh $result + puts "INFO: Writing to set Xilinx IPs as \"hier ip\" to file $userOD/$hier_ip_blocks" + } + set ips [get_ips *] + foreach ip $ips { + puts $hier_ip_blocks_fh "hier ip $ip" + } + close $hier_ip_blocks_fh + +} +proc ::tclapp::siemens::questa_ds::get_vivado_version {} { + + set current_version [lindex [version] 1] + regsub {v} $current_version {} current_version + set major [lindex [split $current_version .] 0] + set minor [lindex [split $current_version .] 1] + set final_vivado_version "$major\.$minor" + return $final_vivado_version +} + +proc ::tclapp::siemens::questa_ds::remove_vivado_GUI_button {tool rc} { + + set vivado_version [get_vivado_version] + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" + } else { + set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" + } + + if { [file exist $commands_file] } { + ## Temp file to write the modified file + set op_file [open "$commands_file.tmp" w] + + ## Read the original commands.xml file + set ip_file [open "$commands_file" r] + set ip_data [read $ip_file] + set ip_lines [split $ip_data "\n"] + + ## does removing questa_cdc cause ambiguoty ?? + set command_found 0 + set command_found_flag 0 + set position 0 + set run_command "Run_Questa_$tool" + for {set i 0} {$i < [llength $ip_lines]} {incr i} { + if { $command_found_flag == 0 } { + + if { [regexp {\s\s\} [lindex $ip_lines $i]] && [regexp "\\s\\s\\s$run_command" [lindex $ip_lines [expr $i + 2]]] } { + regexp {([0-9]+)\} [lindex $ip_lines [expr $i + 1]] m1 m2 + set position $m2 + set command_found 1 + set command_found_flag 1 + continue + } + } else { + if { ! [regexp {\s\s\} [lindex $ip_lines $i]] } { + continue + } else { + set command_found_flag 0 + continue + } + } + + if {$command_found_flag == 0 && $command_found == 1 && [regexp {([0-9]+)\} [lindex $ip_lines $i]]} { + puts $op_file " $position\" + incr position + } else { + if {[lindex $ip_lines $i] == ""} { + continue + } else { + puts $op_file "[lindex $ip_lines $i]" + } + } + } + close $ip_file + close $op_file + + ## Now, remove the old commands file and replace it with the new one + if { $OS == "Linux" } { + exec rm -rf $commands_file + } else { + file delete -force $commands_file + } + file rename ${commands_file}.tmp $commands_file + if { $command_found == 1 } { + puts "INFO: Vivado GUI button for running Questa $tool is removed from $commands_file" + } else { + puts "INFO: Vivado GUI button for running Questa $tool wasn't found in $commands_file." + puts " : File has not been changed." + } + } else { + puts "INFO: File $::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml not exist, cannot remove from unexisting file" + } + + return $rc +} + +proc ::tclapp::siemens::questa_ds::add_vivado_CDC_RDC_GUI_button {rc tool} { + ## Example for code of the Vivado GUI button + ## ----------------------------------------- + ## 0=Run%20Questa%20RDC tclapp::siemens::questa_rdc::write_questa_rdc_script "" /home/iahmed/questa_rdc_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20RDC%20Run "" -run true + ## ----------------------------------------- + ##Set the QHOME path + set QHOME [exec qverify -install_path] + set vivado_version [get_vivado_version] + set tool_lowercase [string tolower $tool] + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" + } else { + set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" + } + + set tool_logo "questa_${tool_lowercase}_logo.PNG" + set questa_tool_logo "$::env(QUESTA_${tool}_TCL_SCRIPT_PATH)/$tool_logo" + if { ! [file exists $questa_tool_logo] } { + set questa_tool_logo "\"$questa_tool_logo\"" + puts "INFO: Can't find the Questa $tool logo at $questa_tool_logo" + if { [file exists "$QHOME/share/fpga_libs/Xilinx/$tool_logo.PNG"] } { + set questa_tool_logo "$QHOME/share/fpga_libs/Xilinx/$tool_logo.PNG" + puts "INFO: Found the Questa $tool logo at $questa_tool_logo" + } + } + + if { [catch {open $commands_file a} result] } { + puts stderr "ERROR: Could not open commands.xml to add the Questa $tool button, path '$commands_file'\n$result" + set rc 9 + return $rc + } else { + set commands_fh $result + puts "INFO: Adding Vivado GUI button for running Questa $tool in $commands_file" + } + set questa_tool_command_index 0 + set vivado_cmds_version "1.0" + set encoding_cmds_version "UTF-8" + set major_cmds_version "1" + set minor_cmds_version "0" + set name_cmds_version "USER" + if { [file size $commands_file] } { + set file1 [open $commands_file r] + set file2 [read $file1] + set commands_file_line [split $file2 "\n"] + set last_command [lindex $commands_file_line end-2] + + foreach line $commands_file_line { + if {$tool eq "CDC"} { + if {[regexp {write_questa_cdc_script} $line]} { + puts "INFO : Vivado GUI button for running Questa $tool is already installed in $commands_file. Exiting ..." + close $commands_fh + close $file1 + return $rc + } + } else { + if {[regexp {write_questa_rdc_script} $line]} { + puts "INFO : Vivado GUI button for running Questa $tool is already installed in $commands_file. Exiting ..." + close $commands_fh + close $file1 + return $rc + + } + } + } + + if { $last_command == ""} { + set questa_tool_command_index 0 + + } else { + set numbers 0 + foreach line $commands_file_line { + if {[regexp {([0-9]+)} $line m1 m2]} { + set numbers $m2 + } + } + set last_command_index $numbers + set questa_tool_command_index [incr last_command_index] + + } + close $file1 + } else { + puts $commands_fh "" + puts $commands_fh "" + set questa_tool_command_index 0 + } + + puts $commands_fh " " + puts $commands_fh " $questa_tool_command_index" + puts $commands_fh " Run_Questa_$tool" + if {$tool eq "CDC"} { + puts $commands_fh { } + } else { + puts $commands_fh { } + + } + puts $commands_fh " source $QHOME/share/fpga_libs/Xilinx/questa_ds_vivado_script.tcl; tclapp::siemens::questa_ds::write_questa_${tool_lowercase}_script" + puts $commands_fh " $questa_tool_logo" + puts $commands_fh " true" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Top_Module" + puts $commands_fh " \[lindex \[find_top\] 0\]" + puts $commands_fh " false" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Output_Directory" + puts $commands_fh " -output_directory Questa_${tool}" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Use_Existing_XDC" + puts $commands_fh " -use_existing_xdc" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Generate_SDC" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " ${tool}_constraints" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Methodology" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Goal" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Vivado_Library_Version" + puts $commands_fh " -library_version $vivado_version" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Fpga_Installation_Directory" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Invoke_Questa_${tool}_Run" + puts $commands_fh " -run ${tool_lowercase}_run" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh "" + close $commands_fh + ################################################################################################## + ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] + set op_file [open "$commands_file.tmp" w] + + ## Read the original commands.xml file + set ip_file [open "$commands_file" r] + set ip_data [read $ip_file] + set ip_lines [split $ip_data "\n"] + + for {set i 0} {$i < [llength $ip_lines]} {incr i} { + if {[lindex $ip_lines $i] == ""} { + continue + } elseif {[lindex $ip_lines $i] == ""} { + continue + } else { + puts $op_file "[lindex $ip_lines $i]" + } + } + puts $op_file "" + close $ip_file + close $op_file + + #file delete -force $commands_file + if { $OS == "Linux" } { + exec rm -rf $commands_file + } else { + file delete -force $commands_file + } + file rename ${commands_file}.tmp $commands_file + ################################################################################################## + return $rc +} +proc ::tclapp::siemens::questa_ds::add_vivado_LINT_GUI_button {rc} { + ## Example for code of the Vivado GUI button + ## ----------------------------------------- + ## 0=Run%20Questa%20Lint tclapp::siemens::questa_lint::write_questa_lint_script "" /home/iahmed/questa_lint_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20Lint%20Run "" -run true + ## ----------------------------------------- + ##Set the QHOME path + set QHOME [exec qverify -install_path] + set vivado_version [get_vivado_version] + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" + } else { + set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" + } + + set questa_lint_logo "$::env(QUESTA_LINT_TCL_SCRIPT_PATH)/questa_lint_logo.PNG" + if { ! [file exists $questa_lint_logo] } { + set questa_lint_logo "\"$questa_lint_logo\"" + puts "INFO: Can't find the Questa Lint logo at $questa_lint_logo" + if { [file exists "$QHOME/share/fpga_libs/Xilinx/questa_lint_logo.PNG"] } { + set questa_lint_logo "$QHOME/share/fpga_libs/Xilinx/questa_lint_logo.PNG" + puts "INFO: Found the Questa Lint logo at $questa_lint_logo" + } + } + + if { [catch {open $commands_file a} result] } { + puts stderr "ERROR: Could not open commands.xml to add the Questa Lint button, path '$commands_file'\n$result" + set rc 9 + return $rc + } else { + set commands_fh $result + puts "INFO: Adding Vivado GUI button for running Questa Lint in $commands_file" + } + set questa_lint_command_index 0 + set vivado_cmds_version "1.0" + set encoding_cmds_version "UTF-8" + set major_cmds_version "1" + set minor_cmds_version "0" + set name_cmds_version "USER" + if { [file size $commands_file] } { + set file1 [open $commands_file r] + set file2 [read $file1] + set commands_file_line [split $file2 "\n"] + set last_command [lindex $commands_file_line end-1] + + foreach line $commands_file_line { + if {[regexp {write_questa_lint_script} $line]} { + puts "INFO : Vivado GUI button for running Questa Lint is already installed in $commands_file. Exiting ..." + close $commands_fh + close $file1 + return $rc + } + } + + if { $last_command == ""} { + set questa_lint_command_index 0 + + } else { + set numbers 0 + foreach line $commands_file_line { + if {[regexp {([0-9]+)} $line m1 m2]} { + set numbers $m2 + } + } + set last_command_index $numbers + set questa_lint_command_index [incr last_command_index] + + } + close $file1 + } else { + puts $commands_fh "" + puts $commands_fh "" + set questa_lint_command_index 0 + } + puts $commands_fh " " + puts $commands_fh " $questa_lint_command_index" + puts $commands_fh " Run_Questa_Lint" + puts $commands_fh { } + puts $commands_fh " source $QHOME/share/fpga_libs/Xilinx/questa_ds_vivado_script.tcl; tclapp::siemens::questa_ds::write_questa_lint_script" + puts $commands_fh " $questa_lint_logo" + puts $commands_fh " true" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Top_Module" + puts $commands_fh " \[lindex \[find_top\] 0\]" + puts $commands_fh " false" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Output_Directory" + puts $commands_fh " -output_directory Questa_Lint" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Lint_Constraints" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Methodology" + puts $commands_fh " -methodology FPGA" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Goal" + puts $commands_fh " -goal start" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Vivado_Library_Version" + puts $commands_fh " -library_version $vivado_version" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Fpga_Installation_Directory" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Invoke_Questa_Lint_Run" + puts $commands_fh " -run lint_run" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh "" + close $commands_fh + ################################################################################################## + ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] + set op_file [open "$commands_file.tmp" w] + + ## Read the original commands.xml file + set ip_file [open "$commands_file" r] + set ip_data [read $ip_file] + set ip_lines [split $ip_data "\n"] + + for {set i 0} {$i < [llength $ip_lines]} {incr i} { + if {[lindex $ip_lines $i] == ""} { + continue + } elseif {[lindex $ip_lines $i] == ""} { + continue + } else { + puts $op_file "[lindex $ip_lines $i]" + } + } + puts $op_file "" + close $ip_file + close $op_file + + #file delete -force $commands_file + if { $OS == "Linux" } { + exec rm -rf $commands_file + } else { + file delete -force $commands_file + } + file rename ${commands_file}.tmp $commands_file + ################################################################################################## + return $rc + } + +proc ::tclapp::siemens::questa_ds::add_vivado_AUTOCHECK_GUI_button {rc} { + + + + ## Example for code of the Vivado GUI button + ## ----------------------------------------- + ## 0=Run%20Questa%20AutoCheck tclapp::siemens::questa_autocheck::write_questa_autocheck_script "" /home/iahmed/questa_autocheck_logo.PNG "" "" true ^@ "" true 4 Top%20Module "" "" false Output%20Directory "" -output_directory%20OD1 true Use%20Existing%20XDC "" -use_existing_xdc true Invoke%20Questa%20AutoCheck%20Run "" -run true + ## ----------------------------------------- + + ##Set the QHOME path + set QHOME [exec qverify -install_path] + set vivado_version [get_vivado_version] + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + set commands_file "$::env(HOME)/.Xilinx/Vivado/$vivado_version/commands/commands.xml" + } else { + set commands_file "$::env(HOME)\\AppData\\Roaming\\Xilinx\\Vivado\\$vivado_version\\commands\\commands.xml" + } + set questa_autocheck_logo "$::env(QUESTA_AUTOCHECK_TCL_SCRIPT_PATH)/questa_autocheck_logo.PNG" + if { ! [file exists $questa_autocheck_logo] } { + set questa_autocheck_logo "\"$questa_autocheck_logo\"" + puts "INFO: Can't find the Questa AutoCheck logo at $questa_autocheck_logo" + if { [file exists "$QHOME/share/fpga_libs/Xilinx/questa_autocheck_logo.PNG"] } { + set questa_autocheck_logo "$QHOME/share/fpga_libs/Xilinx/questa_autocheck_logo.PNG" + puts "INFO: Found the Questa AutoCheck logo at $questa_autocheck_logo" + } + } + if { [catch {open $commands_file a} result] } { + puts stderr "ERROR: Could not open commands.xml to add the Questa AutoCheck button, path '$commands_file'\n$result" + set rc 9 + return $rc + } else { + set commands_fh $result + puts "INFO: Adding Vivado GUI button for running Questa AutoCheck in $commands_file" + } + set questa_autocheck_command_index 0 + set vivado_cmds_version "1.0" + set encoding_cmds_version "UTF-8" + set major_cmds_version "1" + set minor_cmds_version "0" + set name_cmds_version "USER" + if { [file size $commands_file] } { + set file1 [open $commands_file r] + set file2 [read $file1] + set commands_file_line [split $file2 "\n"] + set last_command [lindex $commands_file_line end-1] + + foreach line $commands_file_line { + if {[regexp {write_questa_autocheck_script} $line]} { + puts "INFO : Vivado GUI button for running Questa AutoCheck is already installed in $commands_file. Exiting ..." + close $commands_fh + close $file1 + return $rc + } + } + + if { $last_command == ""} { + set questa_autocheck_command_index 0 + + } else { + set numbers 0 + foreach line $commands_file_line { + if {[regexp {([0-9]+)} $line m1 m2]} { + set numbers $m2 + } + } + set last_command_index $numbers + set questa_autocheck_command_index [incr last_command_index] + + } + close $file1 + } else { + puts $commands_fh "" + puts $commands_fh "" + set questa_autocheck_command_index 0 + } + puts $commands_fh " " + puts $commands_fh " $questa_autocheck_command_index" + puts $commands_fh " Run_Questa_AutoCheck" + puts $commands_fh { } + puts $commands_fh " source $QHOME/share/fpga_libs/Xilinx/questa_ds_vivado_script.tcl; tclapp::siemens::questa_ds::write_questa_autocheck_script" + puts $commands_fh " $questa_autocheck_logo" + puts $commands_fh " true" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Top_Module" + puts $commands_fh " \[lindex \[find_top\] 0\]" + puts $commands_fh " false" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Output_Directory" + puts $commands_fh " -output_directory Questa_AutoCheck" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Use_Existing_XDC" + puts $commands_fh " -use_existing_xdc" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Generate_SDC" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Invoke_Questa_AutoCheck_Run" + puts $commands_fh " -run autocheck_verify" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " AutoCheck_Verify_Timeout" + puts $commands_fh " -verify_timeout 10m" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " AutoCheck_Constraints_File" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Vivado_Library_Version" + puts $commands_fh " -library_version $vivado_version" + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " Fpga_Installation_Directory" + puts $commands_fh " " + puts $commands_fh " true" + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh " " + puts $commands_fh "" + close $commands_fh + ################################################################################################## + ## to delete the last line in the file equal to set a [catch {exec sed -i "\$d" $commands_file} b] + set op_file [open "$commands_file.tmp" w] + + ## Read the original commands.xml file + set ip_file [open "$commands_file" r] + set ip_data [read $ip_file] + set ip_lines [split $ip_data "\n"] + + for {set i 0} {$i < [llength $ip_lines]} {incr i} { + if {[lindex $ip_lines $i] == ""} { + continue + } elseif {[lindex $ip_lines $i] == ""} { + continue + } else { + puts $op_file "[lindex $ip_lines $i]" + } + } + puts $op_file "" + close $ip_file + close $op_file + + #file delete -force $commands_file + if { $OS == "Linux" } { + exec rm -rf $commands_file + } else { + file delete -force $commands_file + } + file rename ${commands_file}.tmp $commands_file + ################################################################################################## + return $rc + +} +proc ::tclapp::siemens::questa_ds::write_compilation_files { compile_file_args tool compiled_lib_list_args compile_lines_args updated_global_incdirs_args verilog_define_options } { + + + ## Vivado install dir + set vivado_dir $::env(XILINX_VIVADO) + puts "INFO: Using Vivado install directory $vivado_dir" + + upvar 1 $compile_file_args compile_file + upvar 1 ${compiled_lib_list_args} compiled_lib_list + upvar 1 ${compile_lines_args} compile_lines + upvar 1 ${updated_global_incdirs_args} updated_global_incdirs + + # Settings + set top_lib_dir "qft" + set out_dir $tool + append out_dir "_RESULTS" + set modelsimini "modelsim.ini" + + + puts $compile_file "\n#" + puts $compile_file "# Create work library" + puts $compile_file "#" + puts $compile_file "vlib $top_lib_dir" + puts $compile_file "vlib $top_lib_dir/xil_defaultlib" + foreach key [array names compiled_lib_list] { + puts $compile_file "vlib $top_lib_dir/$key" + } + + puts $compile_file "\n#" + puts $compile_file "# Map libraries" + puts $compile_file "#" + puts $compile_file "vmap work $top_lib_dir/xil_defaultlib" + foreach key [array names compiled_lib_list] { + puts $compile_file "vmap $key $top_lib_dir/$key" + } + + puts $compile_file "\n#" + puts $compile_file "# Compile files section \n" + if { [string length $updated_global_incdirs] > 0 } { + puts $compile_file "set INCDIR \"$updated_global_incdirs \" " + } + + + + puts $compile_file "#" + + set first_pack "1" + foreach l $compile_lines { + if {[regexp {\_pack\.vhd} $l all value] } { + if {$first_pack == "1"} { + puts $compile_file "\n$vcom_line\n $l" + set first_pack "0" + } else { + puts $compile_file "$l" + set first_pack "0" + } + } + if {[regexp {allowProtectedBeforeBody} $l all value] } { + set vcom_line $l + set first_pack "1" + } + + + + } + + + puts $compile_file "\n" + foreach l $compile_lines { + puts $compile_file $l + } + + puts $compile_file "\n#" + puts $compile_file "# Add global set/reset" + puts $compile_file "#" + puts $compile_file "vlog -suppress 13389 $verilog_define_options -work xil_defaultlib $vivado_dir/data/verilog/src/glbl.v" + + close $compile_file +} + +proc ::tclapp::siemens::questa_ds::write_ctrl_file { ctrl_file library_version fpga_libs select_methodology methodology select_goal goal black_box_lines tool } { + + upvar 1 ${ctrl_file} ctrl_file_args + upvar 1 ${black_box_lines} black_box_lines_args + + if {$tool eq "cdc" } { + puts $ctrl_file_args "cdc preference -internal_sync_resets_on -print_port_domain_template" + } elseif {$tool eq "rdc"} { + puts $ctrl_file_args "rdc preference -print_port_domain_template" + puts $ctrl_file_args "rdc preference tree -sync_internal " + } + if { $fpga_libs != "" } { + puts $ctrl_file_args "netlist fpga directory $fpga_libs" + } + puts $ctrl_file_args "netlist fpga -vendor xilinx -version $library_version -library vivado" + if { $select_methodology == 1 } { + puts -nonewline $ctrl_file_args "$tool methodology $methodology" + if { $select_goal == 1 } { + puts $ctrl_file_args " -goal $goal" + } + } + if {$black_box_lines_args != ""} { + puts $ctrl_file_args "\n#" + puts $ctrl_file_args "# Black box blk_mem_gen" + puts $ctrl_file_args "#" + foreach l $black_box_lines_args { + puts $ctrl_file_args $l + } + } + close $ctrl_file_args + +} + +proc ::tclapp::siemens::questa_ds::write_sdc_constraints_file { output_file top_module lib_args userOD is_makefile tool } { + + upvar 1 ${output_file} output_file_args + set indent "" + set makefile_check "" + if { $is_makefile == 1 } { + set indent "\t" + set makefile_check "; \\" + } + set sdc_out_file "${top_module}_syn.sdc" + puts "INFO : Running write_xdc command to generate the XDC file of the synthesized design" + puts " : Executing write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force" + if { [catch {write_xdc -exclude_physical -sdc $userOD/$sdc_out_file -force} result] } { + puts "** ERROR : Can't generate SDC file for the design." + puts " : Please run the synthesis step, or open the synthesized design then re-run the script." + puts " : You can use '-use_existing_xdc' option with the script to ignore generating the SDC file and use the input XDC files." + set rc 8 + return $rc + } else { + puts $output_file_args "${indent}sdc load $sdc_out_file${makefile_check}" + } + +} +proc ::tclapp::siemens::questa_ds::write_xdc_constraints_file { output_file top_module lib_args is_makefile tool } { + + upvar 1 ${output_file} output_file_args + set indent "" + set makefile_check "" + if { $is_makefile == 1 } { + set indent "\t" + set makefile_check "; \\" + } + puts "INFO : Using existing XDC files." + set constr_fileset [current_fileset -constrset] + set files [get_files -all -of [get_filesets $constr_fileset] *] + foreach file $files { + set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $constr_fileset] $file] 0]] + if { [string match $ft "VHDL 2008"] } { + set ft "VHDL" + set vhdl_std "-2008" + } + if { $ft == "XDC" } { + puts $output_file_args "${indent}sdc load $file${makefile_check}" + } + } +} + +proc ::tclapp::siemens::questa_ds::write_makefile { output_file top_module lib_args top_lib_dir out_dir userOD constraints compilation_file ctrl_file use_existing_xdc generate_sdc tool autocheck_verify_timeout } { + + + upvar 1 ${output_file} output_file_args + puts $output_file_args "DUT=$top_module" + if {$tool eq "autocheck" } { + puts $output_file_args "TIMEOUT=$autocheck_verify_timeout" + } + puts $output_file_args "" + puts $output_file_args "clean:" + puts $output_file_args "\trm -rf $top_lib_dir $out_dir" + puts $output_file_args "" + if { $tool ne "autocheck" } { + puts $output_file_args ${tool}_run: + } else { + puts $output_file_args "autocheck_compile:" + } + puts $output_file_args "\t\$(QHOME)/bin/qverify -c -licq -l q${tool}_${top_module}.log -od $out_dir -do \"\\" + puts $output_file_args "\tonerror {exit 1}; \\" + puts $output_file_args "\tdo [pwd]/$userOD/$ctrl_file; \\" + if {$constraints != ""} { + puts $output_file_args "\tdo $constraints; \\" + } + puts $output_file_args "\tdo [pwd]/$userOD/$compilation_file; \\" + ## Get the constraints file + if { $use_existing_xdc == 1 } { + write_xdc_constraints_file output_file_args $top_module $lib_args 1 $tool + } + if { $generate_sdc == 1 } { + write_sdc_constraints_file output_file_args $top_module $lib_args $userOD 1 $tool + } + if { $tool ne "autocheck" } { + puts $output_file_args "\t$tool run -d \$(DUT) $lib_args; \\" + } else { + puts $output_file_args "\tautocheck disable -type ARITH*; \\" + puts $output_file_args "\tautocheck compile -d \$(DUT) $lib_args; \\" + } + puts $output_file_args "\texit 0\"" + + if { $tool eq "autocheck" } { + ## Dump commands for the verify run in the run Makefile + puts $output_file_args "" + puts $output_file_args "autocheck_verify:" + puts $output_file_args "\t\$(QHOME)/bin/qverify -c -licq -od $out_dir -do \"\\" + puts $output_file_args "\tonerror {exit 1}; \\" + puts $output_file_args "\tautocheck load db $out_dir/autocheck_compile.db; \\" + puts $output_file_args "\tautocheck verify -j 4 -rtl_init_values -timeout \$(TIMEOUT); \\" + puts $output_file_args "\texit 0\"" + } + close $output_file_args + +} +proc ::tclapp::siemens::questa_ds::write_batfile { output_file top_module lib_args top_lib_dir out_dir userOD constraints compilation_file ctrl_file sdc_file tool autocheck_verify_timeout } { + + upvar 1 ${output_file} output_file_args + + set do_sdc "" + set do_constraints "" + if {$sdc_file != ""} { + set do_sdc "do $sdc_file" + } + if {$constraints != ""} { + set do_constraints "do $constraints;" + } + puts $output_file_args "@ECHO OFF" + puts $output_file_args "" + puts $output_file_args "SET DUT=$top_module" + if { $tool eq "autocheck" } { + puts $output_file_args "SET TIMEOUT=$autocheck_verify_timeout" + } + puts $output_file_args "" + puts $output_file_args "IF \[%1\]==\[\] goto :usage" + puts $output_file_args "IF %1==clean (" + puts $output_file_args " call :clean" + puts $output_file_args ") ELSE IF %1==compile (" + puts $output_file_args " call :compile" + puts $output_file_args ") ELSE IF %1==$tool (" + puts $output_file_args " call :$tool" + puts $output_file_args ") ELSE IF %1==debug_${tool} (" + puts $output_file_args " call :debug_${tool}" + puts $output_file_args ") ELSE IF %1==all (" + puts $output_file_args " call :clean" + puts $output_file_args " call :compile" + puts $output_file_args " call :$tool" + puts $output_file_args " call :debug_${tool}" + puts $output_file_args ") ELSE (" + puts $output_file_args " call :usage" + puts $output_file_args ")" + puts $output_file_args "exit /b" + puts $output_file_args "" + puts $output_file_args ":clean" + puts $output_file_args "\tIF EXIST $top_lib_dir RMDIR /S /Q $top_lib_dir" + puts $output_file_args "\tIF EXIST $out_dir RMDIR /S /Q $out_dir" + puts $output_file_args "\texit /b" + puts $output_file_args "" + puts $output_file_args ":compile" + puts $output_file_args "\tqverify -c -licq -l q${tool}_${top_module}.log -od $out_dir -do ^\"do $ctrl_file;$do_constraints do $compilation_file;$do_sdc^\"" + + + puts $output_file_args "\texit /b" + puts $output_file_args "" + + puts $output_file_args ":$tool" + if {$tool eq "autocheck"} { + puts $output_file_args "\tqverify -c -licq -l qautocheck_${top_module}.log -od $out_dir -do ^\"do $ctrl_file;$do_constraints autocheck compile -d %DUT% $lib_args;autocheck verify -j 4 -rtl_init_values -timeout %TIMEOUT%; ^\"" + } else { + puts $output_file_args "\tqverify -c -licq -l q${tool}_${top_module}.log -od $out_dir -do ^\"do $ctrl_file;$do_constraints $tool run -d %DUT% $lib_args; ^\"" + } + puts $output_file_args "\texit /b" + puts $output_file_args "" + puts $output_file_args ":debug_$tool" + puts $output_file_args "\tqverify $out_dir\/$tool\.db " + puts $output_file_args "\texit /b" + puts $output_file_args "" + puts $output_file_args ":usage" + puts $output_file_args "\tECHO \#\#\# run_q${tool} clean \.\.\.\.\.\. Clean all results from directory" + puts $output_file_args "\tECHO \#\#\# run_q${tool} compile \.\.\.\. Compile source code" + puts $output_file_args "\tECHO \#\#\# run_q${tool} $tool \.\.\.\.\.\.\.\. Run [string toupper $tool]" + puts $output_file_args "\tECHO \#\#\# run_q${tool} debug_${tool} \.\. Debug [string toupper $tool] Run" + puts $output_file_args "\tECHO \#\#\# run_q${tool} all \.\.\.\.\.\.\.\. Run all [string toupper $tool] Steps on Souce Code and Launch Debug" + puts $output_file_args "\texit /b" + + + close $output_file_args +} + +proc ::tclapp::siemens::questa_ds::write_tcl_file { output_file top_module lib_args userOD constraints compilation_file ctrl_file use_existing_xdc generate_sdc run_questa_cmd autocheck_verify_timeout tool } { + + upvar 1 ${output_file} output_file_args + + set do_constraints "" + if {$constraints != ""} { + set do_constraints "do $constraints;" + } + + puts $output_file_args "onerror {exit 1}" + puts $output_file_args "do [pwd]/$userOD/$ctrl_file" + puts $output_file_args "$do_constraints" + + + puts $output_file_args "do [pwd]/$userOD/$compilation_file" + + ## Get the constraints file + if { $use_existing_xdc == 1 } { + write_xdc_constraints_file output_file_args $top_module $lib_args 0 $tool + } + if { $generate_sdc == 1 } { + write_sdc_constraints_file output_file_args $top_module $lib_args $userOD 0 $tool + } + + if { $tool ne "autocheck"} { + if { $run_questa_cmd == "cdc_setup" } { + puts $output_file_args "cdc setup -d $top_module" + } elseif { $run_questa_cmd == "report_reset" } { + puts $output_file_args "rdc run -d $top_module $lib_args -report_reset" + } else { + puts $output_file_args "$tool run -d $top_module $lib_args" + puts $output_file_args "$tool generate report ${top_module}_detailed.rpt" + } + } else { + puts $output_file_args "autocheck disable -type ARITH*" + puts $output_file_args "autocheck compile -d ${top_module} $lib_args" + puts $output_file_args "autocheck verify -j 4 -rtl_init_values -timeout ${autocheck_verify_timeout}" + + } + puts $output_file_args "exit 0" + close $output_file_args +} + +proc ::tclapp::siemens::questa_ds::write_sh_file { output_file top_module top_lib_dir out_dir userOD tcl_script tool } { + + upvar 1 ${output_file} output_file_args + puts $output_file_args "#! /bin/sh" + puts $output_file_args "" + puts $output_file_args "rm -rf $top_lib_dir $out_dir" + puts $output_file_args "\$QHOME/bin/qverify -c -licq -l q${tool}_${top_module}.log -od $out_dir -do [pwd]/$userOD/${tcl_script}" + close $output_file_args +} + +proc ::tclapp::siemens::questa_ds::run_questa_tool_analysis { run_questa_cmd top_module userOD tool } { + + + + if { $tool eq "cdc"} { + set tool_name "CDC" + set command_name [expr {$run_questa_cmd == "cdc_setup" ? "cdc setup" : "cdc run"}] + } elseif { $tool eq "rdc"} { + set tool_name "RDC" + set command_name [expr {$run_questa_cmd == "report_reset" ? "rdc run -report_reset" : "rdc run"}] + } elseif { $tool eq "lint"} { + set tool_name "Lint" + set command_name "lint run" + } else { + set tool_name "AUTOCHECK" + set command_name [expr {$run_questa_cmd == "autocheck_compile" ? "autocheck compile" : "autocheck verify"}] + } + puts "INFO : Running Questa $tool_name (Command: $command_name), the UI will be invoked when the run is finished" + puts " : Log can be found at $userOD/${tool_name}_RESULTS/q${tool}_${top_module}.log" + + set OS [lindex $::tcl_platform(os) 0] + cd $userOD + + if { $tool eq "autocheck" } { + if {$run_questa_cmd eq "autocheck_compile" } { + if { $OS == "Linux" } { + exec /bin/sh -c "make autocheck_compile -f Makefile.qautocheck" + } else { + exec cmd /c "run_qautocheck clean compile" + } + } elseif { $run_questa_cmd eq "autocheck_verify"} { + + if { $OS == "Linux" } { + exec /bin/sh -c "make autocheck_compile autocheck_verify -f Makefile.qautocheck" + } else { + exec cmd /c "run_qautocheck autocheck" + } + + } + + } else { + + if { $OS == "Linux" } { + exec /bin/sh -c "sh q${tool}_run.sh" + } else { + exec cmd /c "run_q$tool clean $tool" + } + + } + + + puts "INFO : Questa $tool_name run is finished" + puts "INFO : Invoking Questa $tool_name UI for debugging." + exec /bin/sh -c "qverify -version" + + if { $OS == "Linux" } { + exec /bin/sh -c "qverify ${tool_name}_RESULTS/${tool}.db" & + } else { + exec cmd /c "run_q${tool} debug_${tool}" + } + +} +proc ::tclapp::siemens::questa_ds::extract_rtl_constraint_files {compile_lib_list_args compile_lines_args black_box_lines_args updated_global_incdirs_args num_files_args top_module } { + + upvar 1 ${compile_lib_list_args} compiled_lib_list + upvar 1 ${compile_lines_args} compile_lines + upvar 1 ${black_box_lines_args} black_box_lines + upvar 1 ${updated_global_incdirs_args} updated_global_incdirs + upvar 1 ${num_files_args} num_files + + # Get the PART and the ARCHITECTURE of the target device + set arch_name [get_property ARCHITECTURE [get_parts [get_property PART [current_project]]]] + # Identify synthesis fileset + #set synth_fileset [lindex [get_filesets * -filter {FILESET_TYPE == "DesignSrcs"}] 0] + set synth_fileset [current_fileset] + if { [string match $synth_fileset ""] } { + puts stderr "ERROR: Could not find any synthesis fileset" + set rc 6 + return $rc + } else { + puts "INFO: Found synthesis fileset $synth_fileset" + } + update_compile_order -fileset $synth_fileset + ######CDC-25493- Extraction of +define options######## + set verilog_define_options [ get_property verilog_define [current_fileset] ] + if { [string match $verilog_define_options ""] } { + } else { + set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] + set prefix_verilog_define_options "+define+" + set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" + } + + set encrypted_lib "dummmmmy_lib" + ## If set to 1, will strictly respect file order - if lib files appear non-consecutively this order is maintained + # ## otherwise will respect only library order - if lib files appear non-consecutively they will still be merged into one compile command + set resp_file_order 1 +##creating Verilog and VHDL keywords table + set rtl_keyword_table [dict create] + set siemens_public_key_table [dict create] + set rtl_keyword_table [populate_rtl_keywords $rtl_keyword_table] + set siemens_public_key_table [populate_siemens_publickeys $siemens_public_key_table] + +## Does VHDL file for default lib exist + set vhdl_default_lib_exists 0 +## Does Verilog file for default lib exist + set vlog_default_lib_exists 0 + + set vhdl_std "-93" + set timescale "1ps" + +#set proj_name [get_property NAME [current_project]] +## Get list of IPs being used + set ips [get_ips *] + set num_ip [llength $ips] + puts "INFO: Found $num_ip IPs in design" + +## Keep track of libraries to avoid duplicat compilation + array set lib_incdirs_list {} + array set black_box_libs {} + set line "" + + ## Set black-boxes for blk_mem_gen and fifo_gen if they are part of the IP + foreach ip $ips { + set ip_ref [get_property IPDEF $ip] + regsub {xilinx.com:ip:} $ip_ref {} ip_name + regsub {:} $ip_name {_v} ip_name + regsub {\.} $ip_name {_} ip_name + if {[regexp {xilinx.com:ip:blk_mem_gen:} $ip_ref]} { + set line "netlist blackbox ${ip_name}_synth" + lappend black_box_lines $line + set black_box_libs($ip_name) 1 + } + } + + set num_files 0 + set global_incdirs [list ] + set updated_global_incdirs "" + + #Get filelist for each IP + for {set i 0} {$i <= $num_ip} {incr i} { + if {$i < $num_ip} { + set ip [lindex $ips $i] + if {[catch { set ip_container [get_property IP_CORE_CONTAINER $ip] } errmsg]} { + puts "ErrorMsg: $errmsg" + set ip_container "dummy" + } + +#support for CDC-25506 - "write_questa_cdc_script" needs to be enhanced to automatically extract source code for compressed Xilinx IP Containers (.xcix files). + if {[regexp {xcix} $ip_container all value] && [file exists $ip_container]} { + set is_xcix "1" + set ip_name [get_property NAME $ip] + set xcix_ip_name [get_property NAME $ip] + set ip_ref [get_property IPDEF $ip] + set extracted_files [list] + set wrong_files [list] + if {[file exists $ip_name.xcix]} { + set extracted_files [extract_files -base_dir $userOD/ip [get_files $ip_name.xcix]] + set wrong_files [get_files -compile_order sources -used_in synthesis -of_objects $ip] + } + set files "" + foreach wrong_file $wrong_files { + set hdl_file [file tail $wrong_file] + foreach extract_file $extracted_files { + if {[regexp $hdl_file $extract_file]} { + if {[regexp {vho} $extract_file all value] || [regexp {veo} $extract_file all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { + } else { + lappend files $extract_file + } + } + } + } + } else { + set is_xcix "0" + set ip [lindex $ips $i] + set ip_name [get_property NAME $ip] + set ip_ref [get_property IPDEF $ip] + puts "INFO: Collecting files for IP $ip_ref ($ip_name)" + set files "" + set files_tmp [get_files -compile_order sources -used_in synthesis -of_objects $ip] + foreach file_tmp $files_tmp { + if {[file exists $file_tmp]} { + lappend files $file_tmp + } + } + # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file + set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] + foreach include_file $all_include_files { + if {[file exists $include_file]} { + lappend files $include_file + } + } + } + } else { + set is_xcix "0" + set ip $top_module + set ip_name $top_module + set ip_ref $top_module + set files "" + set files_tmp [get_files -norecurse -compile_order sources -used_in synthesis ] + foreach ftmp $files_tmp { + if {[file exists $ftmp]} { + lappend files $ftmp + } + } + # Keep a list of all the include files, this is added to handle an issue in the 'wavegen' Xilinx example in which clog2b.vh wasn't added into compilation file + set all_include_files [get_files -filter {USED_IN_SYNTHESIS && FILE_TYPE =="Verilog Header"}] + foreach include_file $all_include_files { + if { [lsearch -exact $files $include_file] == "-1" && [file exists $include_file] } { + lappend files $include_file + } + } + puts "INFO: Collecting files for Top level" + } + puts "DEBUG: Files for (IP: $ip) are: $files" + + set lib_file_order [] + array set lib_file_array {} + + + set prev_lib "" + set prev_hdl_lang "" + set num_lib 0 + ## Find all files for the IP or Top level + foreach f $files { + incr num_files + if {$is_xcix == "1"} { + set fn $f + set lib $xcix_ip_name + set wrong_files2 [get_files -compile_order sources -used_in synthesis -of_objects $ip] + set hdl_file2 [file tail $f] + foreach wrong_file2 $wrong_files2 { + if {[regexp $hdl_file2 $wrong_file2]} { + if {[regexp {vho} $wrong_file2 all value] || [regexp {veo} $wrong_file2 all value] || [regexp {txt} $extract_file all value] || [regexp {tb_} $extract_file all value] } { + } else { + set f_original $wrong_file2 + } + } + } + if { [catch {set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]]} result] } { + set lib $xcix_ip_name + } else { + set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f_original] 0]] + } + + if ([regexp {vhd} $f all value]) { + set ft "VHDL" + } else { + set ft "SystemVerilog" + } + } else { + if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { + set fn [get_property NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + set ft [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + if { [string match $ft "VHDL 2008"] } { + set ft "VHDL" + set vhdl_std "-2008" + } + set fs [get_property FILESET_NAME [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + set lib [get_property LIBRARY [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + } else { + set fn [get_property NAME [lindex [get_files -all $f] 0]] + set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] + if { [string match $ft "VHDL 2008"] } { + set ft "VHDL" + set vhdl_std "-2008" + } + set fs [get_property FILESET_NAME [lindex [get_files -all $f] 0]] + set lib [get_property LIBRARY [lindex [get_files -all $f] 0]] + } + } + puts "\nINFO: File= $fn Library= $lib File_type= $ft" + ## Create a new compile unit if library or language changes between the previous and current files + if {$prev_lib == ""} { + set num_lib 0 + } elseif {![string match -nocase $lib $prev_lib]} { + incr num_lib + } + if {$resp_file_order == 1} { + set lib [uniquify_lib $lib $ft $num_lib] + } + ## Create a list of files for each library + if {[string match $ft "Verilog"] || [string match $ft "Verilog Header"] || [string match $ft "SystemVerilog"] || [string match $ft "VHDL"] || [string match $ft "VHDL 2008"]} { + if {[info exists lib_file_array($lib)]} { + set file_h [open $fn] + + set found_encrypted 0 + set found_rtlkeyword 0 + set found_publickey 0 + while {[gets $file_h line] >= 0} { + + foreach word [split $line] { + if { [ is_sv_vhdl_keyword $rtl_keyword_table $word ]} { + set found_rtlkeyword 1 + break + } elseif { [dict exists $siemens_public_key_table $word] } { + set found_publickey 1 + break + } + + } + if { $found_rtlkeyword != 0} { + break + } elseif {$found_publickey != 0} { + set found_encrypted 1 + break + } + + } + close $file_h + if {$found_encrypted == "0"} { + set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] + } + } else { + + set file_h [open $fn] + + set found_encrypted 0 + set found_rtlkeyword 0 + set found_publickey 0 + while {[gets $file_h line] >= 0} { + + foreach word [split $line] { + if { [ is_sv_vhdl_keyword $rtl_keyword_table $word ]} { + set found_rtlkeyword 1 + break + } elseif { [dict exists $siemens_public_key_table $word] } { + set found_publickey 1 + break + } + + } + if { $found_rtlkeyword != 0} { + break + } elseif {$found_publickey != 0} { + set found_encrypted 1 + break + } + + } + close $file_h + if {$found_encrypted == "0" } { + set lib_file_array($lib) $fn + if { ![regexp {mem_gen_v\d+_\d+} $lib] && ![regexp {fifo_generator_v\d+_\d+} $lib] } { + lappend lib_file_order $lib + } else { + set lib_file_order_tmp $lib_file_order + set lib_file_order $lib + foreach lib_tmp $lib_file_order_tmp { + lappend lib_file_order $lib_tmp + } + } + + } + puts "\nINFO: Adding Library= $lib to list of libraries" + } + } + + set lib_file_lang($lib) $ft + regsub ":.*" $lib {} prev_lib + + ## Header files don't count and will not cause new compile unit to be created + if {![string match -nocase $ft "Verilog Header"]} { + set prev_hdl_lang $ft + } + + if {([string match $ft "Verilog"] || [string match $ft "SystemVerilog"]) && [matches_default_libs $lib]} { + set vlog_default_lib_exists 1 + } + if {[string match $ft "VHDL"] && [matches_default_libs $lib]} { + set vhdl_default_lib_exists 1 + } + } + + ## Check that the header files of a specific IP really exists in all the libraries' lists for this IP + foreach f $files { +# set ft [get_property FILE_TYPE [lindex [get_files -all $f] 0]] +# set fn [get_property NAME [lindex [get_files -all $f] 0]] + if {[string match $ft "Verilog Header"]} { + foreach lib $lib_file_order { + set lang $lib_file_lang($lib) + if { ([regexp {Verilog} $lang]) && ([lsearch -exact $lib_file_array($lib) $fn] == "-1") } { + set lib_file_array($lib) [concat $lib_file_array($lib) " " $fn] + puts $lib_file_array($lib) + } + } + } + } + + puts "DEBUG: IP= $ip_ref IPINST = $ip_name has following libraries $lib_file_order" + + # For each library, list the files + foreach lib $lib_file_order { + regsub ":.*" $lib {} lib_no_num + puts "INFO: Obtaining list of files for design= $ip_ref, library= $lib" + set lang $lib_file_lang($lib) + set incdirs [list ] + array unset incdir_ar + ## Create list of include files + if {[regexp {Verilog} $lang]} { + foreach f [split $lib_file_array($lib)] { + if {$is_xcix == "1"} { + set is_include "0" + if ([regexp {vhd} $f all value]) { + set f_type "VHDL" + } else { + set f_type "SystemVerilog" + } + } else { + if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { + set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + if { [string match $f_type "VHDL 2008"] } { + set f_type "VHDL" + set vhdl_std "-2008" + } + } else { + set is_include [get_property IS_GLOBAL_INCLUDE [lindex [get_files -all $f] 0]] + set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] + if { [string match $f_type "VHDL 2008"] } { + set f_type "VHDL" + set vhdl_std "-2008" + } + } + } + if {$is_include == 1 || [string match $f_type "Verilog Header"]} { + set file_dir [file dirname $f] + if {![info exists incdir_ar($file_dir)]} { + lappend incdirs [concat +incdir+$file_dir] + lappend global_incdirs [concat +incdir+$file_dir "\\"] + puts "INFO: Found include file $f" + set incdir_ar($file_dir) 1 + set lib_incdirs_list($lib_no_num) $incdirs + } + } + } + } + + set global_incdirs_list [lsort -unique $global_incdirs] + set updated_global_incdirs [join $global_incdirs_list "\n"] + + ## Print files to compile script + set debug_num [llength lib_file_array($lib)] + puts "DEBUG: Found $debug_num of files in library= $lib, IP= $ip_ref IPINST= $ip_name" + + if {[string match $lang "VHDL"]} { + set line "vcom -autoorder -allowProtectedBeforeBody $vhdl_std -work $lib_no_num \\" + lappend compile_lines $line + foreach f [split $lib_file_array($lib)] { + if {$is_xcix == "1"} { + if ([regexp {vhd} $f all value]) { + set f_type "VHDL" + } else { + set f_type "SystemVerilog" + } + } else { + if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { + set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + if { [string match $f_type "VHDL 2008"] } { + set f_type "VHDL" + set vhdl_std "-2008" + } + } else { + set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] + if { [string match $f_type "VHDL 2008"] } { + set f_type "VHDL" + set vhdl_std "-2008" + } + } + } + if {[string match $f_type "VHDL"]} { + if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { + set line " $f \\" + lappend compile_lines $line + } + } else { + puts "DEBUG: FILE_TYPE for file $f is $f_type, library= $lib $lib_no_num fileset= $synth_fileset and does not match VHDL" + } + } + set line "\n" + lappend compile_lines $line + } elseif {[string match $lang "Verilog"] || [string match $lang "SystemVerilog"]} { + if {[string match $lang "SystemVerilog"]} { + set sv_switch "-sv" + } else { + set sv_switch "" + } + + set line "vlog -suppress 13389 $verilog_define_options $sv_switch -incr -work $lib_no_num \\" + lappend compile_lines $line + if { [info exists lib_incdirs_list($lib_no_num)] && $lib_incdirs_list($lib_no_num) != "" && [string length $updated_global_incdirs] > 0} { + set line " \$INCDIR \\" + lappend compile_lines $line + + } + foreach f [split $lib_file_array($lib)] { + if {$is_xcix == "1"} { + if ([regexp {vhd} $f all value]) { + set f_type "VHDL" + } else { + set f_type "SystemVerilog" + } + } else { + if { [get_files -all -of [get_filesets $synth_fileset] $f] != "" } { + set f_type [get_property FILE_TYPE [lindex [get_files -all -of [get_filesets $synth_fileset] $f] 0]] + } else { + set f_type [get_property FILE_TYPE [lindex [get_files -all $f] 0]] + } + } + if {[string match $f_type "Verilog"] || [string match $f_type "SystemVerilog"]} { + if {![regexp {^blk_mem_gen_v\d+_\d+$} $lib] || ([regexp {^blk_mem_gen_v\d+_\d+$} $lib] && [regexp {/blk_mem_gen_v\d+_\d+\.v} $f]) } { + set line " $f \\" + lappend compile_lines $line + } + } else { + puts "DEBUG: FILE_TYPE for file $f, fileset= $synth_fileset do not match Verilog or SystemVerilog" + } + } + set line "\n" + lappend compile_lines $line + } + } + + ## Bookkeeping on which libraries are already compiled + foreach lib $lib_file_order { + regsub ":.*" $lib {} lib + set compiled_lib_list($lib) 1 + } + + ## Set black-boxes for blk_mem_gen and fifo_gen if they are sub-cores + foreach subcore $lib_file_order { + if {![info exists black_box_libs($subcore)]} { + if {[regexp {^blk_mem_gen_v\d+_\d+} $subcore]} { + lappend black_box_lines $line + set black_box_libs($subcore) 1 + } + } + } + + ## Delete all information related to this IP + set lib_file_order [] + array unset lib_file_array * + array unset lib_file_lang * + } + + + } + + +proc ::tclapp::siemens::questa_ds::write_questa_cdc_script {args} { +# Summary : This proc generates the Questa CDC script file + + # Argument Usage: + # top_module : Provide the design top name + # [-output_directory ]: Specify the output directory to generate the scripts in + # [-use_existing_xdc]: To use the input constraints file instead of generating SDC file + # [-generate_sdc]: To generate the SDC file of the synthesized design + # [-run ]: Run Questa CDC and invoke the UI of Questa CDC debug after generating the running scripts, default behavior is to stop after the generation of the scripts + # [-cdc_constraints]:Directives in the form of tcl File + # [-methodology] : To enable methodology for the CDC Flow + # [-goal] : To select goal for the respective methodology + # [-library_version] : add an option for the user to specify the target Vivado library version for "netlist fpga" + # [-fpga_libs] : Specify fpga installation directory + # [-add_button]: Add a button to run Questa CDC in Vivado UI. + # [-remove_button]: Remove the Questa CDC button from Vivado UI. + + # Return Value: Returns '0' on successful completion + + # Categories: xilinxtclstore, siemens, questa_cdc + + + set args [subst [regsub -all \{ $args ""]] + set args [subst [regsub -all \} $args ""]] + set userOD "." + set top_module "" + set use_existing_xdc 0 + set generate_sdc 0 + set run_questa_cdc "" + set cdc_constraints "" + set add_button 0 + set remove_button 0 + set select_methodology 0 + set methodology "" + set select_goal 0 + set goal "" + set library_version "" + set fpga_libs "" + set is_set_hier_ips 0 + set usage_msg "Usage : write_questa_cdc_script \[-output_directory \] \[-use_existing_xdc|-generate_sdc\] \[-cdc_constraints \] \[-methodology \] \[-goal \] \[-run \] \[-library_version \] \[-fpga_libs \] \[-hier_ips\] \[-add_button\] \[-remove_button\]" + # Parse the arguments + if { [llength $args] > 19 } { + puts "** ERROR : Extra arguments passed to the proc." + puts $usage_msg + return 1 + } + # Generate help message + if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { + puts $usage_msg + return 0 + } + for {set i 0} {$i < [llength $args]} {incr i} { + if { [lindex $args $i] == "-output_directory" } { + incr i + set userOD "[lindex $args $i]" + if { $userOD == "" } { + puts "** ERROR : Specified output directory can't be null." + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-use_existing_xdc" } { + set use_existing_xdc 1 + } elseif { [lindex $args $i] == "-generate_sdc" } { + set generate_sdc 1 + } elseif { [lindex $args $i] == "-run" } { + incr i + set run_questa_cdc "[lindex $args $i]" + if { ($run_questa_cdc != "cdc_run") && ($run_questa_cdc != "cdc_setup") } { + puts "** ERROR : Invalid argument value for -run '$run_questa_cdc'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-cdc_constraints" } { + incr i + set cdc_constraints "[lindex $args $i]" + if { ($cdc_constraints == "") } { + puts "** ERROR : Missing argument value for -cdc_constraints" + puts $usage_msg + return 1 + } + set cdc_constraints [file normalize $cdc_constraints] + } elseif { [lindex $args $i] == "-fpga_libs" } { + incr i + set fpga_libs "[lindex $args $i]" + } elseif { [lindex $args $i] == "-add_button" } { + set add_button 1 + } elseif { [lindex $args $i] == "-remove_button" } { + set remove_button 1 + } elseif { [lindex $args $i] == "-methodology" } { + set select_methodology 1 + incr i + set methodology "[lindex $args $i]" + set methodology [string tolower $methodology] + if { ($methodology != "soc") && ($methodology != "fpga") && ($methodology != "ip") } { + puts "** ERROR : Invalid argument value for -methodology '$methodology'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-goal" } { + if {$select_methodology != 1} { + puts "** ERROR : Missing Methodology Value" + puts $usage_msg + return 1 + } + incr i + set select_goal 1 + set goal "[lindex $args $i]" + } elseif { [lindex $args $i] == "-library_version" } { + incr i + set library_version [lindex $args $i] + if {![regexp {^\d+\.\d+$} $library_version]} { + puts "** ERROR : Invalid argument value for -library_version '$library_version'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-hier_ips" } { + set is_set_hier_ips 1 + } else { + set top_module [lindex $args $i] + } + } + + + + ## Set return code to 0 + set rc 0 + + # Getting the current vivado version and remove 'v' from the version string + set vivado_version [get_vivado_version] + ## Add Vivado GUI button for Questa CDC + if { $add_button == 1 } { + return [add_vivado_CDC_RDC_GUI_button $rc "CDC"] + } + + ## Remove Vivado GUI button for Questa CDC + if { $remove_button == 1 } { + return [remove_vivado_GUI_button "CDC" $rc] + } + if { $top_module == "" } { + puts "** ERROR : No top_module specified to the proc." + puts $usage_msg + return 1 + } + if { $userOD == "." } { + puts "INFO: Output files will be generated at [file join [pwd] $userOD]" + } else { + puts "INFO: Output files will be generated at $userOD" + file mkdir $userOD + } + # Open output files to write + set qcdc_ctrl "qcdc_ctrl.tcl" + set run_makefile "Makefile.qcdc" + set run_batfile "run_qcdc.bat" + set run_sdcfile "qcdc_sdc.tcl" + set qcdc_compile_tcl "qcdc_compile.tcl" + set run_script "qcdc_run.sh" + set tcl_script "qcdc_run.tcl" + set encrypted_lib [list] + if { [catch {open $userOD/$run_makefile w} result] } { + puts stderr "ERROR: Could not open $run_makefile for writing\n$result" + set rc 2 + return $rc + } else { + set qcdc_run_makefile_fh $result + puts "INFO: Writing Questa CDC run Makefile to file $userOD/$run_makefile" + } + if { [catch {open $userOD/$run_batfile w} result] } { + puts stderr "ERROR: Could not open $run_batfile for writing\n$result" + set rc 2 + return $rc + } else { + set qcdc_run_batfile_fh $result + puts "INFO: Writing Questa CDC run batfile to file $userOD/$run_batfile" + } + if { [catch {open $userOD/$run_sdcfile w} result] } { + puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" + set rc 2 + return $rc + } else { + set qcdc_run_sdcfile_fh $result + puts "INFO: Writing Questa CDC run SDC file to file $userOD/$run_sdcfile" + } + if { [catch {open $userOD/$run_script w} result] } { + puts stderr "ERROR: Could not open $run_script for writing\n$result" + set rc 2 + return $rc + } else { + set qcdc_run_fh $result + puts "INFO: Writing Questa CDC run script to file $userOD/$run_script" + } + + if { [catch {open $userOD/$tcl_script w} result] } { + puts stderr "ERROR: Could not open $tcl_script for writing\n$result" + set rc 10 + return $rc + } else { + set qcdc_tcl_fh $result + puts "INFO: Writing Questa CDC tcl script to file $userOD/$tcl_script" + } + + if { [catch {open $userOD/$qcdc_ctrl w} result] } { + puts stderr "ERROR: Could not open $qcdc_ctrl for writing\n$result" + set rc 3 + return $rc + } else { + set qcdc_ctrl_fh $result + puts "INFO: Writing Questa CDC control directives script to file $userOD/$qcdc_ctrl" + } + + if { [catch {open $userOD/$qcdc_compile_tcl w} result] } { + puts stderr "ERROR: Could not open $qcdc_compile_tcl for writing\n$result" + set rc 4 + return $rc + } else { + set qcdc_compile_tcl_fh $result + puts "INFO: Writing Questa CDC Tcl script to file $userOD/$qcdc_compile_tcl" + } + + ## Keep track of libraries to avoid duplicat compilation + + set found_top 0 + foreach t [find_top] { + if {[string match $t $top_module]} { + set found_top 1 + } + } + if {$found_top == 0} { + puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" + set rc 5 + return $rc + } + + array set compiled_lib_list {} + set compile_lines [list ] + set num_files 0 + set updated_global_incdirs "" + set black_box_lines [list ] + +######CDC-25493- Extraction of +define options######## + set verilog_define_options [ get_property verilog_define [current_fileset] ] + if { [string match $verilog_define_options ""] } { + } else { + set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] + set prefix_verilog_define_options "+define+" + set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" + } + + + extract_rtl_constraint_files compiled_lib_list compile_lines black_box_lines updated_global_incdirs num_files $top_module + if {$is_set_hier_ips } { + set_hier_ips "cdc" $userOD + } + if {$num_files == 0} { + puts stderr "ERROR: Could not find any files in synthesis fileset" + set rc 7 + return $rc + } + + write_compilation_files qcdc_compile_tcl_fh "CDC" compiled_lib_list compile_lines updated_global_incdirs $verilog_define_options + + # Settings + set top_lib_dir "qft" + set cdc_out_dir "CDC_RESULTS" + set modelsimini "modelsim.ini" + ## Print compile information + if {$library_version eq "" } { + set library_version $vivado_version + } + write_ctrl_file qcdc_ctrl_fh $library_version $fpga_libs $select_methodology $methodology $select_goal $goal black_box_lines "cdc" + + ## Get the library names and append a '-L' to the library name + array set qft_libs {} + foreach lib [array names compiled_lib_list] { + set qft_libs($lib) 1 + } + set lib_args "" + foreach lib [array names qft_libs] { + set lib_args [concat $lib_args -L $lib] + } + + ## Get the constraints file + if { $use_existing_xdc == 1 } { + write_xdc_constraints_file qcdc_run_sdcfile_fh $top_module $lib_args 0 "cdc" + } + if { $generate_sdc == 1 } { + write_sdc_constraints_file qcdc_run_sdcfile_fh $top_module $lib_args $userOD 0 "cdc" + } +## Dump the run Makefile + write_makefile qcdc_run_makefile_fh $top_module $lib_args $top_lib_dir $cdc_out_dir $userOD $cdc_constraints $qcdc_compile_tcl $qcdc_ctrl $use_existing_xdc $generate_sdc "cdc" "" + + write_batfile qcdc_run_batfile_fh $top_module $lib_args $top_lib_dir $cdc_out_dir $userOD $cdc_constraints $qcdc_compile_tcl $qcdc_ctrl $run_sdcfile "cdc" "" + + # ## Dump the run file + write_sh_file qcdc_run_fh $top_module $top_lib_dir $cdc_out_dir $userOD $tcl_script "cdc" + + write_tcl_file qcdc_tcl_fh $top_module $lib_args $userOD $cdc_constraints $qcdc_compile_tcl $qcdc_ctrl $use_existing_xdc $generate_sdc $run_questa_cdc "" "cdc" + + puts "INFO : Generation of running scripts for Questa CDC is done at [pwd]/$userOD" + + ## Change permissions of the generated running script + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + exec chmod u+x $userOD/$run_script + } + if {$run_questa_cdc ne ""} { + run_questa_tool_analysis $run_questa_cdc $top_module $userOD "cdc" + } + return $rc + + + + +} +proc ::tclapp::siemens::questa_ds::write_questa_rdc_script {args} { +# Summary : This proc generates the Questa RDC script file + + # Argument Usage: + # top_module : Provide the design top name + # [-output_directory ]: Specify the output directory to generate the scripts in + # [-use_existing_xdc]: Ignore running write_xdc command to generate the SDC file of the synthesized design, and use the input constraints file instead + # [-generate_sdc]: To generate the SDC file of the synthesized design + # [-rdc_constraints]:Directives in the form of tcl File + # [-run ]: Run Questa RDC and invoke the UI of Questa RDC debug after generating the running scripts, default behavior is to stop after the generation of the scripts + # [-library_version] : add an option for the user to specify the target Vivado library version for "netlist fpga" + # [-fpga_libs] : Specify fpga installation directory + # [-methodology] : To enable methodology for the RDC Flow + # [-goal] : To select goal for the respective methodology + # [-add_button]: Add a button to run Questa RDC in Vivado UI. + # [-remove_button]: Remove the Questa RDC button from Vivado UI. + + # Return Value: Returns '0' on successful completion + + # Categories: xilinxtclstore, siemens, questa_rdc + + set args [subst [regsub -all \{ $args ""]] + set args [subst [regsub -all \} $args ""]] + + + + set userOD "." + set top_module "" + set use_existing_xdc 0 + set generate_sdc 0 + set rdc_constraints "" + set run_questa_rdc "" + set add_button 0 + set remove_button 0 + set select_methodology 0 + set methodology "" + set select_goal 0 + set goal "" + set library_version "" + set fpga_libs "" + set is_set_hier_ips 0 + + set usage_msg "Usage : write_questa_rdc_script \[-output_directory \] \[-use_existing_xdc|-generate_sdc\] \[-rdc_constraints \] \[-run \] \[-methodology \] \[-goal \] \[-library_version \] \[-fpga_libs \] \[-hier_ips\] \[-add_button\] \[-remove_button\]" + # Parse the arguments + if { [llength $args] > 17 } { + puts "** ERROR : Extra arguments passed to the proc." + puts $usage_msg + return 1 + } + # Generate help message + if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { + puts $usage_msg + return 0 + } + for {set i 0} {$i < [llength $args]} {incr i} { + if { [lindex $args $i] == "-output_directory" } { + incr i + set userOD "[lindex $args $i]" + if { $userOD == "" } { + puts "** ERROR : Specified output directory can't be null." + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-use_existing_xdc" } { + set use_existing_xdc 1 + } elseif { [lindex $args $i] == "-generate_sdc" } { + set generate_sdc 1 + } elseif { [lindex $args $i] == "-rdc_constraints" } { + incr i + set rdc_constraints "[lindex $args $i]" + if { ($rdc_constraints == "") } { + puts "** ERROR : Missing argument value for -rdc_constraints" + puts $usage_msg + return 1 + } + set rdc_constraints [file normalize $rdc_constraints] + } elseif { [lindex $args $i] == "-run" } { + incr i + set run_questa_rdc "[lindex $args $i]" + if { ($run_questa_rdc != "rdc_run") && ($run_questa_rdc != "report_reset") } { + puts "** ERROR : Invalid argument value for -run '$run_questa_rdc'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-add_button" } { + set add_button 1 + } elseif { [lindex $args $i] == "-remove_button" } { + set remove_button 1 + } elseif { [lindex $args $i] == "-methodology" } { + set select_methodology 1 + incr i + set methodology "[lindex $args $i]" + set methodology [string tolower $methodology] + if { ($methodology != "soc") && ($methodology != "fpga") && ($methodology != "ip") } { + puts "** ERROR : Invalid argument value for -methodology '$methodology'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-goal" } { + if {$select_methodology != 1} { + puts "** ERROR : Missing Methodology Value" + puts $usage_msg + return 1 + } + incr i + set select_goal 1 + set goal "[lindex $args $i]" + } elseif { [lindex $args $i] == "-library_version" } { + incr i + set library_version [lindex $args $i] + if {![regexp {^\d+\.\d+$} $library_version]} { + puts "** ERROR : Invalid argument value for -library_version '$library_version'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-fpga_libs" } { + incr i + set fpga_libs "[lindex $args $i]" + } elseif { [lindex $args $i] == "-hier_ips" } { + set is_set_hier_ips 1 + } else { + set top_module [lindex $args $i] + } + } + + + ## -add_button and -remove_button can't be specified together + if { ($remove_button == 1) && ($add_button == 1) } { + puts "** ERROR : '-add_button' and '-remove_button' can't be specified together." + return 1 + } + ## Set return code to 0 + set rc 0 + + + # Getting the current vivado version and remove 'v' from the version string + set vivado_version [get_vivado_version] + ## Add Vivado GUI button for Questa RDC + if { $add_button == 1 } { + return [add_vivado_CDC_RDC_GUI_button $rc "RDC"] + } + + ## Remove Vivado GUI button for Questa RDC + if { $remove_button == 1 } { + return [remove_vivado_GUI_button "RDC" $rc] + } + + if { $top_module == "" } { + puts "** ERROR : No top_module specified to the proc." + puts $usage_msg + return 1 + } + if { $userOD == "." } { + puts "INFO: Output files will be generated at [file join [pwd] $userOD]" + } else { + puts "INFO: Output files will be generated at $userOD" + file mkdir $userOD + } + + set qrdc_ctrl "qrdc_ctrl.tcl" + set run_makefile "Makefile.qrdc" + set run_batfile "run_qrdc.bat" + set run_sdcfile "qrdc_sdc.tcl" + set qrdc_ctrl "qrdc_ctrl.tcl" + set qrdc_compile_tcl "qrdc_compile.tcl" + set run_script "qrdc_run.sh" + set tcl_script "qrdc_run.tcl" + set encrypted_lib "dummmmmy_lib" + + # Open output files to write + if { [catch {open $userOD/$run_makefile w} result] } { + puts stderr "ERROR: Could not open $run_makefile for writing\n$result" + set rc 2 + return $rc + } else { + set qrdc_run_makefile_fh $result + puts "INFO: Writing Questa rdc run Makefile to file $userOD/$run_makefile" + } + if { [catch {open $userOD/$run_batfile w} result] } { + puts stderr "ERROR: Could not open $run_batfile for writing\n$result" + set rc 2 + return $rc + } else { + set qrdc_run_batfile_fh $result + puts "INFO: Writing Questa rdc run batfile to file $userOD/$run_batfile" + } + if { [catch {open $userOD/$run_sdcfile w} result] } { + puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" + set rc 2 + return $rc + } else { + set qrdc_run_sdcfile_fh $result + puts "INFO: Writing Questa rdc run batfile to file $userOD/$run_sdcfile" + } + if { [catch {open $userOD/$run_script w} result] } { + puts stderr "ERROR: Could not open $run_script for writing\n$result" + set rc 2 + return $rc + } else { + set qrdc_run_fh $result + puts "INFO: Writing Questa RDC run script to file $run_script" + } + + if { [catch {open $userOD/$tcl_script w} result] } { + puts stderr "ERROR: Could not open $tcl_script for writing\n$result" + set rc 10 + return $rc + } else { + set qrdc_tcl_fh $result + puts "INFO: Writing Questa RDC tcl script to file $tcl_script" + } + + if { [catch {open $userOD/$qrdc_ctrl w} result] } { + puts stderr "ERROR: Could not open $qrdc_ctrl for writing\n$result" + set rc 3 + return $rc + } else { + set qrdc_ctrl_fh $result + puts "INFO: Writing Questa RDC control directives script to file $qrdc_ctrl" + } + + if { [catch {open $userOD/$qrdc_compile_tcl w} result] } { + puts stderr "ERROR: Could not open $qrdc_compile_tcl for writing\n$result" + set rc 4 + return $rc + } else { + set qrdc_compile_tcl_fh $result + puts "INFO: Writing Questa RDC Tcl script to file $qrdc_compile_tcl" + } + + + set found_top 0 + foreach t [find_top] { + if {[string match $t $top_module]} { + set found_top 1 + } + } + if {$found_top == 0} { + puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" + set rc 5 + return $rc + } + + ## Keep track of libraries to avoid duplicat compilation + array set compiled_lib_list {} + set compile_lines [list ] + set num_files 0 + set updated_global_incdirs "" + set black_box_lines [list ] + +######CDC-25493- Extraction of +define options######## + set verilog_define_options [ get_property verilog_define [current_fileset] ] + if { [string match $verilog_define_options ""] } { + } else { + set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] + set prefix_verilog_define_options "+define+" + set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" + } + + extract_rtl_constraint_files compiled_lib_list compile_lines black_box_lines updated_global_incdirs num_files $top_module + + if {$is_set_hier_ips } { + set_hier_ips "rdc" $userOD + } + if {$num_files == 0} { + puts stderr "ERROR: Could not find any files in synthesis fileset" + set rc 7 + return $rc + } + + # Print compile information + write_compilation_files qrdc_compile_tcl_fh "RDC" compiled_lib_list compile_lines updated_global_incdirs $verilog_define_options + # Settings + set top_lib_dir "qft" + set rdc_out_dir "RDC_RESULTS" + set modelsimini "modelsim.ini" + + if {$library_version eq "" } { + set library_version $vivado_version + } + + write_ctrl_file qrdc_ctrl_fh $library_version $fpga_libs $select_methodology $methodology $select_goal $goal black_box_lines "rdc" + + ## Get the library names and append a '-L' to the library name + array set qft_libs {} + foreach lib [array names compiled_lib_list] { + set qft_libs($lib) 1 + } + set lib_args "" + foreach lib [array names qft_libs] { + set lib_args [concat $lib_args -L $lib] + } + + + ## Get the constraints file + if { $use_existing_xdc == 1 } { + write_xdc_constraints_file qrdc_run_sdcfile_fh $top_module $lib_args 0 "rdc" + } + if { $generate_sdc == 1 } { + write_sdc_constraints_file qrdc_run_sdcfile_fh $top_module $lib_args $userOD 0 "rdc" + } + ## Dump the run file +## Dump the run Makefile + write_makefile qrdc_run_makefile_fh $top_module $lib_args $top_lib_dir $rdc_out_dir $userOD $rdc_constraints $qrdc_compile_tcl $qrdc_ctrl $use_existing_xdc $generate_sdc "rdc" "" + + write_batfile qrdc_run_batfile_fh $top_module $lib_args $top_lib_dir $rdc_out_dir $userOD $rdc_constraints $qrdc_compile_tcl $qrdc_ctrl $run_sdcfile "rdc" "" + + write_sh_file qrdc_run_fh $top_module $top_lib_dir $rdc_out_dir $userOD $tcl_script "rdc" + + write_tcl_file qrdc_tcl_fh $top_module $lib_args $userOD $rdc_constraints $qrdc_compile_tcl $qrdc_ctrl $use_existing_xdc $generate_sdc $run_questa_rdc "" "rdc" + + puts "INFO : Generation of running scripts for Questa RDC is done at [pwd]/$userOD" + + ## Change permissions of the generated running script + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + exec chmod u+x $userOD/$run_script + } + if {$run_questa_rdc ne ""} { + run_questa_tool_analysis $run_questa_rdc $top_module $userOD "rdc" + } + return $rc + + + +} +proc ::tclapp::siemens::questa_ds::write_questa_lint_script {args} { + + # Summary : This proc generates the Questa Lint script file + + # Argument Usage: + # top_module : Provide the design top name + # [-output_directory ]: Specify the output directory to generate the scripts in + # [-run ]: Run Questa Lint and invoke the UI of Questa Lint debug after generating the running scripts, default behavior is to stop after the generation of the scripts + # [-lint_constraints]:Directives in the form of tcl File + # [-library_version] : add an option for the user to specify the target Vivado library version for "netlist fpga" + # [-fpga_libs] : Specify fpga installation directory + # [-methodology] : To enable methodology for the CDC Flow + # [-goal] : To select goal for the respective methodology + # [-add_button]: Add a button to run Questa Lint in Vivado UI. + # [-remove_button]: Remove the Questa Lint button from Vivado UI. + + # Return Value: Returns '0' on successful completion + + # Categories: xilinxtclstore, siemens, questa_lint + + set args [subst [regsub -all \{ $args ""]] + set args [subst [regsub -all \} $args ""]] + + + set userOD "." + set top_module "" + set no_sdc 0 + set lint_constraints "" + set run_questa_lint "" + set add_button 0 + set remove_button 0 + set select_methodology 1 + set methodology "fpga" + set select_goal 1 + set goal "start" + set library_version "" + set fpga_libs "" + set is_set_hier_ips 0 + + set usage_msg "Usage : write_questa_lint_script \[-output_directory \] \[-lint_constraints \] \[-run \] \[-methodology \] \[-goal \] \[-add_button\] \[-library_version \] \[-fpga_libs \] \[-hier_ips\] \[-remove_button\]" + # Parse the arguments + if { [llength $args] > 18} { + puts "** ERROR : Extra arguments passed to the proc." + puts $usage_msg + return 1 + } + # Generate help message + if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { + puts $usage_msg + return 0 + } + for {set i 0} {$i < [llength $args]} {incr i} { + if { [lindex $args $i] == "-output_directory" } { + incr i + set userOD "[lindex $args $i]" + if { $userOD == "" } { + puts "** ERROR : Specified output directory can't be null." + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-no_sdc" } { + set no_sdc 1 + } elseif { [lindex $args $i] == "-run" } { + incr i + set run_questa_lint "[lindex $args $i]" + if { ($run_questa_lint != "lint_run") } { + puts "** ERROR : Invalid argument value for -run '$run_questa_lint'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-lint_constraints" } { + incr i + set lint_constraints "[lindex $args $i]" + if { ($lint_constraints == "") } { + puts "** ERROR : Missing argument value for -lint_constraints" + puts $usage_msg + return 1 + } + set lint_constraints [file normalize $lint_constraints] + } elseif { [lindex $args $i] == "-methodology" } { + incr i + set methodology "[lindex $args $i]" + set methodology [string tolower $methodology] + if { ($methodology != "soc") && ($methodology != "fpga") && ($methodology != "ip") } { + puts "** ERROR : Invalid argument value for -methodology '$methodology'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-goal" } { + incr i + set goal "[lindex $args $i]" + } elseif { [lindex $args $i] == "-hier_ips" } { + set is_set_hier_ips 1 + } elseif { [lindex $args $i] == "-library_version" } { + incr i + set library_version [lindex $args $i] + if {![regexp {^\d+\.\d+$} $library_version]} { + puts "** ERROR : Invalid argument value for -library_version '$library_version'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-fpga_libs" } { + incr i + set fpga_libs "[lindex $args $i]" + } elseif { [lindex $args $i] == "-add_button" } { + set add_button 1 + } elseif { [lindex $args $i] == "-remove_button" } { + set remove_button 1 + } else { + set top_module [lindex $args $i] + } + } + + ## Set return code to 0 + set rc 0 + + # Getting the current vivado version and remove 'v' from the version string + set vivado_version [get_vivado_version] + + ## Add Vivado GUI button for Questa LINT + if { $add_button == 1 } { + return [add_vivado_LINT_GUI_button $rc] + } + + ## Remove Vivado GUI button for Questa RDC + if { $remove_button == 1 } { + return [remove_vivado_GUI_button "Lint" $rc] + } + + if { $top_module == "" } { + puts "** ERROR : No top_module specified to the proc." + puts $usage_msg + return 1 + } + if { $userOD == "." } { + puts "INFO: Output files will be generated at [file join [pwd] $userOD]" + } else { + puts "INFO: Output files will be generated at $userOD" + file mkdir $userOD + } + + set run_makefile "Makefile.qlint" + set run_batfile "run_qlint.bat" + set qlint_ctrl "qlint_ctrl.tcl" + set qlint_compile_tcl "qlint_compile.tcl" + set run_script "qlint_run.sh" + set tcl_script "qlint_run.tcl" + set encrypted_lib "dummmmmy_lib" + + # Open output files to write + if { [catch {open $userOD/$run_makefile w} result] } { + puts stderr "ERROR: Could not open $run_makefile for writing\n$result" + set rc 2 + return $rc + } else { + set qlint_run_makefile_fh $result + puts "INFO: Writing Questa lint run Makefile to file $userOD/$run_makefile" + } + if { [catch {open $userOD/$run_batfile w} result] } { + puts stderr "ERROR: Could not open $run_batfile for writing\n$result" + set rc 2 + return $rc + } else { + set qlint_run_batfile_fh $result + puts "INFO: Writing Questa lint run batfile to file $userOD/$run_batfile" + } + if { [catch {open $userOD/$run_script w} result] } { + puts stderr "ERROR: Could not open $run_script for writing\n$result" + set rc 2 + return $rc + } else { + set qlint_run_fh $result + puts "INFO: Writing Questa Lint run script to file $run_script" + } + + if { [catch {open $userOD/$tcl_script w} result] } { + puts stderr "ERROR: Could not open $tcl_script for writing\n$result" + set rc 10 + return $rc + } else { + set qlint_tcl_fh $result + puts "INFO: Writing Questa Lint tcl script to file $tcl_script" + } + + if { [catch {open $userOD/$qlint_ctrl w} result] } { + puts stderr "ERROR: Could not open $qlint_ctrl for writing\n$result" + set rc 3 + return $rc + } else { + set qlint_ctrl_fh $result + puts "INFO: Writing Questa Lint control directives script to file $qlint_ctrl" + } + + if { [catch {open $userOD/$qlint_compile_tcl w} result] } { + puts stderr "ERROR: Could not open $qlint_compile_tcl for writing\n$result" + set rc 4 + return $rc + } else { + set qlint_compile_tcl_fh $result + puts "INFO: Writing Questa Lint Tcl script to file $qlint_compile_tcl" + } + + + set found_top 0 + foreach t [find_top] { + if {[string match $t $top_module]} { + set found_top 1 + } + } + if {$found_top == 0} { + puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" + set rc 5 + return $rc + } + + array set compiled_lib_list {} + set compile_lines [list ] + set num_files 0 + set updated_global_incdirs "" + set black_box_lines [list ] + + ######CDC-25493- Extraction of +define options######## + set verilog_define_options [ get_property verilog_define [current_fileset] ] + if { [string match $verilog_define_options ""] } { + } else { + set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] + set prefix_verilog_define_options "+define+" + set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" + } + + extract_rtl_constraint_files compiled_lib_list compile_lines black_box_lines updated_global_incdirs num_files $top_module + + if {$is_set_hier_ips } { + set_hier_ips "lint" $userOD + } + if {$num_files == 0} { + puts stderr "ERROR: Could not find any files in synthesis fileset" + set rc 7 + return $rc + } + + ## Print compile information + write_compilation_files qlint_compile_tcl_fh "LINT" compiled_lib_list compile_lines updated_global_incdirs $verilog_define_options + + # Settings + set top_lib_dir "qft" + set lint_out_dir "Lint_RESULTS" + set modelsimini "modelsim.ini" + + if {$library_version eq "" } { + set library_version $vivado_version + } + + write_ctrl_file qlint_ctrl_fh $library_version $fpga_libs $select_methodology $methodology $select_goal $goal black_box_lines "lint" + + ## Get the library names and append a '-L' to the library name + array set qft_libs {} + foreach lib [array names compiled_lib_list] { + set qft_libs($lib) 1 + } + set lib_args "" + foreach lib [array names qft_libs] { + set lib_args [concat $lib_args -L $lib] + } + + set lint_constraints_do "" + if {$lint_constraints != ""} { + set lint_constraints_do "do $lint_constraints;" + } + + + ## Dump the run file + write_makefile qlint_run_makefile_fh $top_module $lib_args $top_lib_dir $lint_out_dir $userOD $lint_constraints $qlint_compile_tcl $qlint_ctrl 0 0 "lint" "" + + write_batfile qlint_run_batfile_fh $top_module $lib_args $top_lib_dir $lint_out_dir $userOD $lint_constraints $qlint_compile_tcl $qlint_ctrl "" "lint" "" + + write_sh_file qlint_run_fh $top_module $top_lib_dir $lint_out_dir $userOD $tcl_script "lint" + + write_tcl_file qlint_tcl_fh $top_module $lib_args $userOD "" $qlint_compile_tcl $qlint_ctrl "" "" $run_questa_lint "" "lint" + puts "INFO : Generation of running scripts for Questa Lint is done at [pwd]/$userOD" + set OS [lindex $::tcl_platform(os) 0] + if { $OS == "Linux" } { + exec chmod u+x $userOD/$run_script + } + if {$run_questa_lint ne ""} { + run_questa_tool_analysis $run_questa_lint $top_module $userOD "lint" + } + return $rc + + +} +proc ::tclapp::siemens::questa_ds::write_questa_autocheck_script {args} { + + + +# Summary : This proc generates the Questa AutoCheck script file + + # Argument Usage: + # top_module : Provide the design top name + # [-output_directory ]: Specify the output directory to generate the scripts in + # [-use_existing_xdc]: Ignore running write_xdc command to generate the SDC file of the synthesized design, and use the input constraints file instead + # [-generate_sdc]: To generate the SDC file of the synthesized design + # [-autocheck_constraints]:Directives in the form of tcl File + # [-run ]: Run Questa AutoCheck and invoke the UI of Questa AutoCheck debug after generating the running scripts, default behavior is to stop after the generation of the scripts + # [-verify_timeout ]: Specify the timeout for Questa AutoCheck Verify run. By default the value specified is in seconds, use 'm' or 'h' suffix to interpret the value as minutes or hours + # [-library_version] : add an option for the user to specify the target Vivado library version for "netlist fpga" + # [-fpga_libs] : Specify fpga installation directory + # [-add_button]: Add a button to run Questa AutoCheck in Vivado UI. + # [-remove_button]: Remove the Questa AutoCheck button from Vivado UI. + + # Return Value: Returns '0' on successful completion + + # Categories: xilinxtclstore, siemens, questa_autocheck + + set args [subst [regsub -all \{ $args ""]] + set args [subst [regsub -all \} $args ""]] + + + + set userOD "." + set top_module "" + set use_existing_xdc 0 + set generate_sdc 0 + set autocheck_constraints "" + set run_questa_autocheck "" + set autocheck_verify_timeout "10m" + set autocheck_constraints "" + set add_button 0 + set library_version "" + set fpga_libs "" + set remove_button 0 + set is_set_hier_ips 0 + set usage_msg "Usage : write_questa_autocheck_script \[-output_directory \] \[-use_existing_xdc|-generate_sdc\] \[-run \] \[-verify_timeout \] \[-autocheck_constraints \] \[-library_version \] \[-fpga_libs \] \[-hier_ips\] \[-add_button\] \[-remove_button\]" + # Parse the arguments + if { [llength $args] > 17 } { + puts "** ERROR : Extra arguments passed to the proc." + puts $usage_msg + return 1 + } + # Generate help message + if { ([llength $args] >= 1) && ([lsearch -exact $args "-help"] != "-1") } { + puts $usage_msg + return 0 + } + for {set i 0} {$i < [llength $args]} {incr i} { + if { [lindex $args $i] == "-output_directory" } { + incr i + set userOD "[lindex $args $i]" + if { $userOD == "" } { + puts "** ERROR : Specified output directory can't be null." + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-use_existing_xdc" } { + set use_existing_xdc 1 + } elseif { [lindex $args $i] == "-generate_sdc" } { + set generate_sdc 1 + } elseif { [lindex $args $i] == "-autocheck_constraints" } { + incr i + set autocheck_constraints "[lindex $args $i]" + if { ($autocheck_constraints == "") } { + puts "** ERROR : Missing argument value for -autocheck_constraints" + puts $usage_msg + return 1 + } + set autocheck_constraints [file normalize $autocheck_constraints] + } elseif { [lindex $args $i] == "-run" } { + incr i + set run_questa_autocheck "[lindex $args $i]" + if { ($run_questa_autocheck != "autocheck_compile") && ($run_questa_autocheck != "autocheck_verify") } { + puts "** ERROR : Invalid argument value for -run '$run_questa_autocheck'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-verify_timeout" } { + incr i + set autocheck_verify_timeout "[lindex $args $i]" + if { ($autocheck_verify_timeout == "") } { + puts "** ERROR : Missing argument value for -verify_timeout" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-autocheck_constraints" } { + incr i + set autocheck_constraints "[lindex $args $i]" + if { ($autocheck_constraints == "") } { + puts "** ERROR : Missing argument value for -autocheck_constraints" + puts $usage_msg + return 1 + } + set autocheck_constraints [file normalize $autocheck_constraints] + } elseif { [lindex $args $i] == "-library_version" } { + incr i + set library_version [lindex $args $i] + if {![regexp {^\d+\.\d+$} $library_version]} { + puts "** ERROR : Invalid argument value for -library_version '$library_version'" + puts $usage_msg + return 1 + } + } elseif { [lindex $args $i] == "-fpga_libs" } { + incr i + set fpga_libs "[lindex $args $i]" + } elseif { [lindex $args $i] == "-add_button" } { + set add_button 1 + } elseif { [lindex $args $i] == "-hier_ips" } { + set is_set_hier_ips 1 + } elseif { [lindex $args $i] == "-remove_button" } { + set remove_button 1 + } else { + set top_module [lindex $args $i] + } + } + ## Set return code to 0 + set rc 0 + + # Getting the current vivado version and remove 'v' from the version string + set vivado_version [get_vivado_version] + + ## Add Vivado GUI button for Questa Autocheck + if { $add_button == 1 } { + return [add_vivado_AUTOCHECK_GUI_button $rc] + } + + ## Remove Vivado GUI button for Questa Autocheck + if { $remove_button == 1 } { + return [remove_vivado_GUI_button "AutoCheck" $rc] + } + + if { $top_module == "" } { + puts "** ERROR : No top_module specified to the proc." + puts $usage_msg + return 1 + } + if { $userOD == "." } { + puts "INFO: Output files will be generated at [file join [pwd] $userOD]" + } else { + puts "INFO: Output files will be generated at $userOD" + file mkdir $userOD + } + + set qautocheck_ctrl "qautocheck_ctrl.tcl" + set qautocheck_compile_tcl "qautocheck_compile.tcl" + set run_makefile "Makefile.qautocheck" + set run_batfile "run_qautocheck.bat" + set run_sdcfile "qautocheck_sdc.tcl" + set run_script "qautocheck_run.sh" + set encrypted_lib "dummmmmy_lib" + set tcl_script "qautocheck_run.tcl" + + # Open output files to write + if { [catch {open $userOD/$tcl_script w} result] } { + puts stderr "ERROR: Could not open $tcl_script for writing\n$result" + set rc 10 + return $rc + } else { + set qautocheck_tcl_fh $result + puts "INFO: Writing Questa CDC tcl script to file $userOD/$tcl_script" + } + if { [catch {open $userOD/$run_batfile w} result] } { + puts stderr "ERROR: Could not open $run_batfile for writing\n$result" + set rc 2 + return $rc + } else { + set qautocheck_run_batfile_fh $result + puts "INFO: Writing Questa autocheck run batfile to file $userOD/$run_batfile" + } + if { [catch {open $userOD/$run_sdcfile w} result] } { + puts stderr "ERROR: Could not open $run_sdcfile for writing\n$result" + set rc 2 + return $rc + } else { + set qautocheck_run_sdcfile_fh $result + puts "INFO: Writing Questa autocheck run batfile to file $userOD/$run_sdcfile" + } + if { [catch {open $userOD/$run_script w} result] } { + puts stderr "ERROR: Could not open $run_script for writing\n$result" + set rc 2 + return $rc + } else { + set qautocheck_run_fh $result + puts "INFO: Writing Questa autocheck run script to file $userOD/$run_script" + } + if { [catch {open $userOD/$run_makefile w} result] } { + puts stderr "ERROR: Could not open $run_makefile for writing\n$result" + set rc 2 + return $rc + } else { + set qautocheck_run_makefile_fh $result + puts "INFO: Writing Questa AutoCheck run Makefile to file $userOD/$run_makefile" + } + + if { [catch {open $userOD/$qautocheck_ctrl w} result] } { + puts stderr "ERROR: Could not open $qautocheck_ctrl for writing\n$result" + set rc 3 + return $rc + } else { + set qautocheck_ctrl_fh $result + puts "INFO: Writing Questa AutoCheck control directives script to file $userOD/$qautocheck_ctrl" + } + + if { [catch {open $userOD/$qautocheck_compile_tcl w} result] } { + puts stderr "ERROR: Could not open $qautocheck_compile_tcl for writing\n$result" + set rc 4 + return $rc + } else { + set qautocheck_compile_tcl_fh $result + puts "INFO: Writing Questa AutoCheck Tcl script to file $userOD/$qautocheck_compile_tcl" + } + + set found_top 0 + foreach t [find_top] { + if {[string match $t $top_module]} { + set found_top 1 + } + } + if {$found_top == 0} { + puts stderr "ERROR: Could not find any user specified $top_module in the list of top modules identified by Vivado - [find_top]" + set rc 5 + return $rc + } + + array set compiled_lib_list {} + set compile_lines [list ] + set num_files 0 + set updated_global_incdirs "" + set black_box_lines [list ] + +######CDC-25493- Extraction of +define options######## + set verilog_define_options [ get_property verilog_define [current_fileset] ] + if { [string match $verilog_define_options ""] } { + } else { + set modified_verilog_define_options [regsub -all " " $verilog_define_options "+"] + set prefix_verilog_define_options "+define+" + set verilog_define_options "${prefix_verilog_define_options}${modified_verilog_define_options}" + } + + extract_rtl_constraint_files compiled_lib_list compile_lines black_box_lines updated_global_incdirs num_files $top_module + if {$is_set_hier_ips } { + set_hier_ips "autocheck" $userOD + } + + if {$num_files == 0} { + puts stderr "ERROR: Could not find any files in synthesis fileset" + set rc 7 + return $rc + } + + + ## Print compile information + write_compilation_files qautocheck_compile_tcl_fh "Autocheck" compiled_lib_list compile_lines updated_global_incdirs $verilog_define_options + + # Settings + set top_lib_dir "qft" + set autocheck_out_dir "AUTOCHECK_RESULTS" + set modelsimini "modelsim.ini" + if {$library_version eq "" } { + set library_version $vivado_version + } + write_ctrl_file qautocheck_ctrl_fh $library_version $fpga_libs 0 "" 0 "" black_box_lines "autocheck" + + ## Get the library names and append a '-L' to the library name + array set qft_libs {} + foreach lib [array names compiled_lib_list] { + set qft_libs($lib) 1 + } + set lib_args "" + foreach lib [array names qft_libs] { + set lib_args [concat $lib_args -L $lib] + } + + set autocheck_constraints_do "" + if {$autocheck_constraints != ""} { + set autocheck_constraints_do "do $autocheck_constraints;" + } + ## Get the constraints file + if { $use_existing_xdc == 1 } { + write_xdc_constraints_file qautocheck_run_sdcfile_fh $top_module $lib_args 0 "autocheck" + } + if { $generate_sdc == 1 } { + write_sdc_constraints_file qautocheck_run_sdcfile_fh $top_module $lib_args $userOD 0 "autocheck" + } + ## Dump the run Makefile + write_makefile qautocheck_run_makefile_fh $top_module $lib_args $top_lib_dir $autocheck_out_dir $userOD $autocheck_constraints $qautocheck_compile_tcl $qautocheck_ctrl $use_existing_xdc $generate_sdc "autocheck" $autocheck_verify_timeout + + write_batfile qautocheck_run_batfile_fh $top_module $lib_args $top_lib_dir $autocheck_out_dir $userOD $autocheck_constraints $qautocheck_compile_tcl $qautocheck_ctrl $run_sdcfile "autocheck" $autocheck_verify_timeout + + write_tcl_file qautocheck_tcl_fh $top_module $lib_args $userOD $autocheck_constraints $qautocheck_compile_tcl $qautocheck_ctrl $use_existing_xdc $generate_sdc $run_questa_autocheck $autocheck_verify_timeout "autocheck" + ## Dump the run file + puts $qautocheck_run_fh "#! /bin/sh" + puts $qautocheck_run_fh "" + puts $qautocheck_run_fh "rm -rf $top_lib_dir $autocheck_out_dir" + puts $qautocheck_run_fh "qverify -c -licq -l qautocheck_${top_module}.log -od $autocheck_out_dir -do \"$autocheck_constraints_do; do $qautocheck_ctrl; do $qautocheck_compile_tcl; do $run_sdcfile;autocheck disable -type ARITH*;autocheck compile -d ${top_module} $lib_args;autocheck verify -j 4 -rtl_init_values -timeout ${autocheck_verify_timeout}; \"" + close $qautocheck_run_fh + + + puts "INFO : Generation of running scripts for Questa AutoCheck is done at [pwd]/$userOD" + if {$run_questa_autocheck ne ""} { + run_questa_tool_analysis $run_questa_autocheck $top_module $userOD "autocheck" + } + +} +## Keep an environment variable with the path of the script +set env(QUESTA_CDC_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] +set env(QUESTA_RDC_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] +set env(QUESTA_LINT_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] +set env(QUESTA_AUTOCHECK_TCL_SCRIPT_PATH) [file normalize [file dirname [info script]]] +## Auto-import the procs of the Questa CDC script +namespace import -force tclapp::siemens::questa_ds::* diff --git a/tclapp/siemens/questa_cdc/questa_lint_logo.PNG b/tclapp/siemens/questa_ds/questa_lint_logo.PNG similarity index 100% rename from tclapp/siemens/questa_cdc/questa_lint_logo.PNG rename to tclapp/siemens/questa_ds/questa_lint_logo.PNG diff --git a/tclapp/siemens/questa_cdc/questa_rdc_logo.PNG b/tclapp/siemens/questa_ds/questa_rdc_logo.PNG similarity index 100% rename from tclapp/siemens/questa_cdc/questa_rdc_logo.PNG rename to tclapp/siemens/questa_ds/questa_rdc_logo.PNG diff --git a/tclapp/siemens/questa_cdc/questa_resetcheck_logo.PNG b/tclapp/siemens/questa_ds/questa_resetcheck_logo.PNG similarity index 100% rename from tclapp/siemens/questa_cdc/questa_resetcheck_logo.PNG rename to tclapp/siemens/questa_ds/questa_resetcheck_logo.PNG diff --git a/tclapp/siemens/questa_cdc/revision_history.txt b/tclapp/siemens/questa_ds/revision_history.txt similarity index 92% rename from tclapp/siemens/questa_cdc/revision_history.txt rename to tclapp/siemens/questa_ds/revision_history.txt index 23f04fbba..915e0332f 100755 --- a/tclapp/siemens/questa_cdc/revision_history.txt +++ b/tclapp/siemens/questa_ds/revision_history.txt @@ -1,3 +1,4 @@ +1.11 Unification of CDC RDC Lint and Autocheck scripts 1.10 Remove mentor files no longer needed 1.9 Mentor to Siemens Transition 1.8 Bug Fixes diff --git a/tclapp/siemens/questa_cdc/setup_qautocheck_vivado_button.csh b/tclapp/siemens/questa_ds/setup_qautocheck_vivado_button.csh similarity index 76% rename from tclapp/siemens/questa_cdc/setup_qautocheck_vivado_button.csh rename to tclapp/siemens/questa_ds/setup_qautocheck_vivado_button.csh index 5f48451ed..e0e956397 100755 --- a/tclapp/siemens/questa_cdc/setup_qautocheck_vivado_button.csh +++ b/tclapp/siemens/questa_ds/setup_qautocheck_vivado_button.csh @@ -2,7 +2,7 @@ ## Description: ## ------------ -## This script can be used to setup the Vivado GUI button for Questa AUTOCHECK. It should be located at the same directory of 'write_questa_autocheck_script.tcl' script. +## This script can be used to setup the Vivado GUI button for Questa AUTOCHECK. It should be located at the same directory of 'questa_ds_vivado_script.tcl' script. ## ## Examples: ## --------- @@ -33,20 +33,20 @@ rm -f $setup_file set rootdir = `dirname $0` # may be relative path set rootdir = `cd $rootdir && pwd` # ensure absolute path -if ( ! -e "$rootdir/write_questa_autocheck_script.tcl" ) then - echo "** Error : Can't find '$rootdir/write_questa_autocheck_script.tcl' sript." - echo " : The 'setup_qautocheck_vivado_button.csh' should be located in the same directory of 'write_questa_autocheck_script.tcl' script." +if ( ! -e "$rootdir/questa_ds_vivado_script.tcl" ) then + echo "** Error : Can't find '$rootdir/questa_ds_vivado_script.tcl' sript." + echo " : The 'setup_qautocheck_vivado_button.csh' should be located in the same directory of 'questa_ds_vivado_script.tcl' script." exit 1 endif ## Check if it is sourced from Vivado installation or Questa AUTOCHECK installation ## If it is a Vivado installation, then we need to source questa_cdc.tcl: ## Because it has the environment variable definition for QUESTA_AUTOCHECK_TCL_SCRIPT_PATH, which is used to add the logo of Questa AUTOCHECK to the button in Vivado UI. -if ( -e "$rootdir/questa_cdc.tcl" ) then - echo "source $rootdir/questa_cdc.tcl" >> $setup_file +if ( -e "$rootdir/questa_ds.tcl" ) then + echo "source $rootdir/questa_ds.tcl" >> $setup_file endif -echo "source $rootdir/write_questa_autocheck_script.tcl" >> $setup_file +echo "source $rootdir/questa_ds_vivado_script.tcl" >> $setup_file if ( $remove == 0 ) then echo "write_questa_autocheck_script -add_button" >> $setup_file else diff --git a/tclapp/siemens/questa_cdc/setup_qcdc_vivado_button.csh b/tclapp/siemens/questa_ds/setup_qcdc_vivado_button.csh similarity index 78% rename from tclapp/siemens/questa_cdc/setup_qcdc_vivado_button.csh rename to tclapp/siemens/questa_ds/setup_qcdc_vivado_button.csh index 181573e5e..9f47ef9fe 100755 --- a/tclapp/siemens/questa_cdc/setup_qcdc_vivado_button.csh +++ b/tclapp/siemens/questa_ds/setup_qcdc_vivado_button.csh @@ -2,7 +2,7 @@ ## Description: ## ------------ -## This script can be used to setup the Vivado GUI button for Questa CDC. It should be located at the same directory of 'write_questa_cdc_script.tcl' script. +## This script can be used to setup the Vivado GUI button for Questa CDC. It should be located at the same directory of 'questa_ds_vivado_script.tcl' script. ## ## Examples: ## --------- @@ -33,20 +33,20 @@ rm -f $setup_file set rootdir = `dirname $0` # may be relative path set rootdir = `cd $rootdir && pwd` # ensure absolute path -if ( ! -e "$rootdir/write_questa_cdc_script.tcl" ) then - echo "** Error : Can't find '$rootdir/write_questa_cdc_script.tcl' sript." - echo " : The 'setup_qcdc_vivado_button.csh' should be located in the same directory of 'write_questa_cdc_script.tcl' script." +if ( ! -e "$rootdir/questa_ds_vivado_script.tcl" ) then + echo "** Error : Can't find '$rootdir/questa_ds_vivado_script.tcl' sript." + echo " : The 'setup_qcdc_vivado_button.csh' should be located in the same directory of 'questa_ds_vivado_script.tcl' script." exit 1 endif ## Check if it is sourced from Vivado installation or Questa CDC installation -## If it is a Vivado installation, then we need to source questa_cdc.tcl: +## If it is a Vivado installation, then we need to source questa_ds.tcl: ## Because it has the environment variable definition for QUESTA_CDC_TCL_SCRIPT_PATH, which is used to add the logo of Questa CDC to the button in Vivado UI. -if ( -e "$rootdir/questa_cdc.tcl" ) then - echo "source $rootdir/questa_cdc.tcl" >> $setup_file +if ( -e "$rootdir/questa_ds.tcl" ) then + echo "source $rootdir/questa_ds.tcl" >> $setup_file endif -echo "source $rootdir/write_questa_cdc_script.tcl" >> $setup_file +echo "source $rootdir/questa_ds_vivado_script.tcl" >> $setup_file if ( $remove == 0 ) then echo "write_questa_cdc_script -add_button" >> $setup_file else diff --git a/tclapp/siemens/questa_cdc/setup_qlint_vivado_button.csh b/tclapp/siemens/questa_ds/setup_qlint_vivado_button.csh similarity index 76% rename from tclapp/siemens/questa_cdc/setup_qlint_vivado_button.csh rename to tclapp/siemens/questa_ds/setup_qlint_vivado_button.csh index 19b28fd9a..625b278a8 100755 --- a/tclapp/siemens/questa_cdc/setup_qlint_vivado_button.csh +++ b/tclapp/siemens/questa_ds/setup_qlint_vivado_button.csh @@ -2,7 +2,7 @@ ## Description: ## ------------ -## This script can be used to setup the Vivado GUI button for Questa LINT. It should be located at the same directory of 'write_questa_lint_script.tcl' script. +## This script can be used to setup the Vivado GUI button for Questa LINT. It should be located at the same directory of 'questa_ds_vivado_script.tcl' script. ## ## Examples: ## --------- @@ -33,20 +33,20 @@ rm -f $setup_file set rootdir = `dirname $0` # may be relative path set rootdir = `cd $rootdir && pwd` # ensure absolute path -if ( ! -e "$rootdir/write_questa_lint_script.tcl" ) then - echo "** Error : Can't find '$rootdir/write_questa_lint_script.tcl' sript." - echo " : The 'setup_qlint_vivado_button.csh' should be located in the same directory of 'write_questa_lint_script.tcl' script." +if ( ! -e "$rootdir/questa_ds_vivado_script.tcl" ) then + echo "** Error : Can't find '$rootdir/questa_ds_vivado_script.tcl' sript." + echo " : The 'setup_qlint_vivado_button.csh' should be located in the same directory of 'questa_ds_vivado_script.tcl' script." exit 1 endif ## Check if it is sourced from Vivado installation or Questa LINT installation -## If it is a Vivado installation, then we need to source questa_cdc.tcl: +## If it is a Vivado installation, then we need to source questa_ds.tcl: ## Because it has the environment variable definition for QUESTA_LINT_TCL_SCRIPT_PATH, which is used to add the logo of Questa LINT to the button in Vivado UI. -if ( -e "$rootdir/questa_cdc.tcl" ) then - echo "source $rootdir/questa_cdc.tcl" >> $setup_file +if ( -e "$rootdir/questa_ds.tcl" ) then + echo "source $rootdir/questa_ds.tcl" >> $setup_file endif -echo "source $rootdir/write_questa_lint_script.tcl" >> $setup_file +echo "source $rootdir/questa_ds_vivado_script.tcl" >> $setup_file if ( $remove == 0 ) then echo "write_questa_lint_script -add_button" >> $setup_file else diff --git a/tclapp/siemens/questa_cdc/setup_qrdc_vivado_button.csh b/tclapp/siemens/questa_ds/setup_qrdc_vivado_button.csh similarity index 78% rename from tclapp/siemens/questa_cdc/setup_qrdc_vivado_button.csh rename to tclapp/siemens/questa_ds/setup_qrdc_vivado_button.csh index b261cc6a4..471bc1c15 100755 --- a/tclapp/siemens/questa_cdc/setup_qrdc_vivado_button.csh +++ b/tclapp/siemens/questa_ds/setup_qrdc_vivado_button.csh @@ -2,7 +2,7 @@ ## Description: ## ------------ -## This script can be used to setup the Vivado GUI button for Questa RDC. It should be located at the same directory of 'write_questa_rdc_script.tcl' script. +## This script can be used to setup the Vivado GUI button for Questa RDC. It should be located at the same directory of 'questa_ds_vivado_script.tcl' script. ## ## Examples: ## --------- @@ -33,20 +33,20 @@ rm -f $setup_file set rootdir = `dirname $0` # may be relative path set rootdir = `cd $rootdir && pwd` # ensure absolute path -if ( ! -e "$rootdir/write_questa_rdc_script.tcl" ) then - echo "** Error : Can't find '$rootdir/write_questa_rdc_script.tcl' sript." - echo " : The 'setup_qrdc_vivado_button.csh' should be located in the same directory of 'write_questa_rdc_script.tcl' script." +if ( ! -e "$rootdir/questa_ds_vivado_script.tcl" ) then + echo "** Error : Can't find '$rootdir/questa_ds_vivado_script.tcl' sript." + echo " : The 'setup_qrdc_vivado_button.csh' should be located in the same directory of 'questa_ds_vivado_script.tcl' script." exit 1 endif ## Check if it is sourced from Vivado installation or Questa RDC installation -## If it is a Vivado installation, then we need to source questa_cdc.tcl: +## If it is a Vivado installation, then we need to source questa_ds.tcl: ## Because it has the environment variable definition for QUESTA_RDC_TCL_SCRIPT_PATH, which is used to add the logo of Questa RDC to the button in Vivado UI. -if ( -e "$rootdir/questa_cdc.tcl" ) then - echo "source $rootdir/questa_cdc.tcl" >> $setup_file +if ( -e "$rootdir/questa_ds.tcl" ) then + echo "source $rootdir/questa_ds.tcl" >> $setup_file endif -echo "source $rootdir/write_questa_rdc_script.tcl" >> $setup_file +echo "source $rootdir/questa_ds_vivado_script.tcl" >> $setup_file if ( $remove == 0 ) then echo "write_questa_rdc_script -add_button" >> $setup_file else diff --git a/tclapp/siemens/questa_cdc/tclIndex b/tclapp/siemens/questa_ds/tclIndex similarity index 100% rename from tclapp/siemens/questa_cdc/tclIndex rename to tclapp/siemens/questa_ds/tclIndex diff --git a/tclapp/siemens/questa_cdc/test/README b/tclapp/siemens/questa_ds/test/README similarity index 100% rename from tclapp/siemens/questa_cdc/test/README rename to tclapp/siemens/questa_ds/test/README diff --git a/tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test.tcl b/tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test.tcl new file mode 100755 index 000000000..4dce15097 --- /dev/null +++ b/tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test.tcl @@ -0,0 +1,13 @@ +create_project project_1 ./project_1 -part xc7k70tfbg676-1 -force +set_property target_language VHDL [current_project] + +instantiate_example_design -template xilinx.com:design:wave_gen:1.0 + +update_compile_order -fileset sources_1 +update_compile_order -fileset sim_1 + +source $test_dir/../questa_ds_vivado_script.tcl + +set design_top [find_top] +puts "::tclapp::siemens::questa_ds::write_questa_cdc_script $design_top -output_directory $test_dir/test1_out -use_existing_xdc" +::tclapp::siemens::questa_ds::write_questa_cdc_script $design_top -output_directory $test_dir/test1_out -use_existing_xdc diff --git a/tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test_1.tcl b/tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test_1.tcl similarity index 57% rename from tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test_1.tcl rename to tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test_1.tcl index f57364647..2bd678e47 100755 --- a/tclapp/siemens/questa_cdc/test/questa_cdc_tclapp_test_1.tcl +++ b/tclapp/siemens/questa_ds/test/questa_cdc_tclapp_test_1.tcl @@ -10,8 +10,8 @@ launch_runs synth_1 wait_on_run synth_1 open_run synth_1 -source $test_dir/../write_questa_cdc_script.tcl +source $test_dir/../questa_ds_vivado_script.tcl set design_top [find_top] -puts "::tclapp::siemens::questa_cdc::write_questa_cdc_script $design_top -output_directory $test_dir/test2_out" -::tclapp::siemens::questa_cdc::write_questa_cdc_script $design_top -output_directory $test_dir/test2_out +puts "::tclapp::siemens::questa_ds::write_questa_cdc_script $design_top -output_directory $test_dir/test2_out" +::tclapp::siemens::questa_ds::write_questa_cdc_script $design_top -output_directory $test_dir/test2_out diff --git a/tclapp/siemens/questa_cdc/test/test.tcl b/tclapp/siemens/questa_ds/test/test.tcl similarity index 100% rename from tclapp/siemens/questa_cdc/test/test.tcl rename to tclapp/siemens/questa_ds/test/test.tcl