From 2feba8f2494382a43b82ebd4e7dc4c5990c32989 Mon Sep 17 00:00:00 2001 From: AndreiGrozav Date: Tue, 10 Oct 2023 12:17:55 +0300 Subject: [PATCH] axi_dac_interpolate: Debug core --- .../axi_dac_interpolate_filter.v | 20 +++++++++++++++++++ .../axi_dac_interpolate_ip.tcl | 15 ++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/library/axi_dac_interpolate/axi_dac_interpolate_filter.v b/library/axi_dac_interpolate/axi_dac_interpolate_filter.v index 6ed4ee7d51..fc67d84bfa 100644 --- a/library/axi_dac_interpolate/axi_dac_interpolate_filter.v +++ b/library/axi_dac_interpolate/axi_dac_interpolate_filter.v @@ -126,6 +126,26 @@ module axi_dac_interpolate_filter #( assign iqcor_data_in = raw_dma_n ? dac_raw_ch_data : dac_data; assign iqcor_valid_in = raw_dma_n ? 1'b1 : dac_valid; + int_ila i_ila ( + .clk(dac_clk), + .probe0(dac_data), + .probe1(iqcor_data_in ), + .probe2(iqcor_valid_in), + .probe3(dma_valid), + .probe4(dma_valid_adjacent), + .probe5(stop_transfer), + .probe6(flush_dma), + .probe7(raw_dma_n), + .probe8(transfer_sm), + .probe9(dac_int_data), + .probe10(dac_valid_out), + .probe11(reset_filt), + .probe12(filter_mask), + .probe13(transfer_start), + .probe14(trigger), + .probe15(transfer_ready) + ); + ad_iqcor #( .Q_OR_I_N (0), .DISABLE(CORRECTION_DISABLE), diff --git a/library/axi_dac_interpolate/axi_dac_interpolate_ip.tcl b/library/axi_dac_interpolate/axi_dac_interpolate_ip.tcl index 08af40eb04..2c333551c5 100644 --- a/library/axi_dac_interpolate/axi_dac_interpolate_ip.tcl +++ b/library/axi_dac_interpolate/axi_dac_interpolate_ip.tcl @@ -8,6 +8,21 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl adi_ip_create axi_dac_interpolate + create_ip -name ila -vendor xilinx.com -library ip -version 6.2 -module_name int_ila + set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] [get_ips int_ila] + set_property -dict [list CONFIG.C_NUM_OF_PROBES {16}] [get_ips int_ila] + set_property -dict [list CONFIG.C_DATA_DEPTH {2048}] [get_ips int_ila] + set_property -dict [list CONFIG.C_TRIGIN_EN {false}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE0_WIDTH {16}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE1_WIDTH {16}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE2_WIDTH {1}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE6_WIDTH {1}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE8_WIDTH {2}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE9_WIDTH {16}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE10_WIDTH {1}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE12_WIDTH {3}] [get_ips int_ila] + set_property -dict [list CONFIG.C_PROBE13_WIDTH {1}] [get_ips int_ila] + generate_target {all} [get_files axi_dac_interpolate.srcs/sources_1/ip/int_ila/int_ila.xci] adi_ip_files axi_dac_interpolate [list \ "$ad_hdl_dir/library/common/up_xfer_cntrl.v" \ "$ad_hdl_dir/library/common/up_axi.v" \