{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":683812120,"defaultBranch":"develop","name":"stlink","ownerLogin":"andars","currentUserCanPush":false,"isFork":true,"isEmpty":false,"createdAt":"2023-08-27T19:18:34.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/4284488?v=4","public":true,"private":false,"isOrgOwned":false},"refInfo":{"name":"","listCacheKey":"v0:1693168091.0","currentOid":""},"activityList":{"items":[{"before":"300193b06cc3b7aea0635861f1c990ba29529415","after":"1861b8dc9f7e70f4034bddabfe3b1e112dcd483f","ref":"refs/heads/fix-some-stm32l0-flashing-issues","pushedAt":"2023-08-27T20:34:03.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"andars","name":"Andrew Foote","path":"/andars","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4284488?s=80&v=4"},"commit":{"message":"Fix stm32lx flash loader on STM32L0\n\nSTM32L0 chips use loader_code_stm32lx, but this flash loader is built\nfor armv7-m and uses instructions that are unsupported on STM32L0 (which\nhave Cortex M0+ cores implementing armv6-m).\n\nIn particular, loader_code_stm32lx uses variants of add-immediate that\ndo not update the condition flags ( `add r0, r0, #4` ). These are 32bit\ninstructions in armv7-m and are not available in armv6-m.\n\nEnable loader_code_stm32lx to run on both armv6-m and armv7-m by\nbuilding for armv6-m, which requires changing the `add` instructions to\n`adds` instructions that do update condition flags (which is ok because\nthe subs updates the condition flags again before the branch).","shortMessageHtmlLink":"Fix stm32lx flash loader on STM32L0"}},{"before":"e5e613876db0189d5bfbc6a40b86bcc256e53851","after":"300193b06cc3b7aea0635861f1c990ba29529415","ref":"refs/heads/fix-some-stm32l0-flashing-issues","pushedAt":"2023-08-27T20:33:29.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"andars","name":"Andrew Foote","path":"/andars","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4284488?s=80&v=4"},"commit":{"message":"Fix stm32lx flash loader on STM32L0\n\nSTM32L0 chips use loader_code_stm32lx, but this flash loader is built\nfor armv7-m and uses instructions that are unsupported on STM32L0 (which\nhave Cortex M0+ cores implementing armv6-m).\n\nIn particular, loader_code_stm32lx uses variants of add-immediate that\ndo not update the condition flags ( `add r0, r0, #4` ). These are 32bit\ninstructions in armv7-m and are not available in armv6-m.\n\nEnable loader_code_stm32lx to run on both armv6-m and armv7-m by\nbuilding for armv6-m, which requires changing the `add` instructions to\n`adds` instructions that do update condition flags (which is ok because\nthe subs updates the condition flags again before the branch).","shortMessageHtmlLink":"Fix stm32lx flash loader on STM32L0"}},{"before":"b521ecc85b852ab9b28ede305251d159e51c040b","after":"e5e613876db0189d5bfbc6a40b86bcc256e53851","ref":"refs/heads/fix-some-stm32l0-flashing-issues","pushedAt":"2023-08-27T20:30:22.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"andars","name":"Andrew Foote","path":"/andars","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4284488?s=80&v=4"},"commit":{"message":"Fix stm32lx flash loader on STM32L0\n\nSTM32L0 chips use loader_code_stm32lx, but this flash loader is built\nfor armv7-m and uses instructions that are unsupported on STM32L0 (which\nhave Cortex M0+ cores implementing armv6-m).\n\nIn particular, loader_code_stm32lx uses variants of add-immediate that\ndo not update the condition flags ( `add r0, r0, #4` ). These are 32bit\ninstructions in armv7-m and are not available in armv6-m.\n\nEnable loader_code_stm32lx to run on both armv6-m and armv7-m by\nbuilding for armv6-m, which requires changing the `add` instructions to\n`adds` instructions that do update condition flags (which is ok because\nthe subs updates the condition flags again before the branch).","shortMessageHtmlLink":"Fix stm32lx flash loader on STM32L0"}},{"before":null,"after":"b521ecc85b852ab9b28ede305251d159e51c040b","ref":"refs/heads/fix-some-stm32l0-flashing-issues","pushedAt":"2023-08-27T20:28:11.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"andars","name":"Andrew Foote","path":"/andars","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4284488?s=80&v=4"},"commit":{"message":"Fix stm32lx flash loader on STM32L0\n\nSTM32L0 chips use loader_code_stm32lx, but this flash loader is built\nfor armv7-m and uses instructions that are unsupported on STM32L0 (which\nhave Cortex M0+ cores implementing armv6-m).\n\nIn particular, loader_code_stm32lx uses variants of add-immediate that\ndo not update the condition flags ( `add r0, r0, #4` ). These are 32bit\ninstructions in armv7-m and are not available in armv6-m.\n\nEnable loader_code_stm32lx to run on both armv6-m and armv7-m by\nbuilding for armv6-m, which requires changing the `add` instructions to\n`adds` instructions that do update condition flags (which is ok because\nthe subs updates the condition flags again before the branch).","shortMessageHtmlLink":"Fix stm32lx flash loader on STM32L0"}}],"hasNextPage":false,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"Y3Vyc29yOnYyOpK7MjAyMy0wOC0yN1QyMDozNDowMy4wMDAwMDBazwAAAANziWBS","startCursor":"Y3Vyc29yOnYyOpK7MjAyMy0wOC0yN1QyMDozNDowMy4wMDAwMDBazwAAAANziWBS","endCursor":"Y3Vyc29yOnYyOpK7MjAyMy0wOC0yN1QyMDoyODoxMS4wMDAwMDBazwAAAANziQSa"}},"title":"Activity ยท andars/stlink"}