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Tiliqua R3 Motherboard: changelist (WIP) #43

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vk2seb opened this issue Sep 28, 2024 · 0 comments
Open

Tiliqua R3 Motherboard: changelist (WIP) #43

vk2seb opened this issue Sep 28, 2024 · 0 comments
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@vk2seb
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vk2seb commented Sep 28, 2024

required

  • +5V SMPS: increase polyfuse ingress current for +VUSB host output
    • polyfuses on all external power outputs? IGNORE
  • +5V SMPS + 3V3 linear: gets pretty hot - increase LED pull downs?
    • Swap all tantalums for 1206 X5R ceramics
    • More vias + ground standoff post
  • +/- 12V ingress: check noise, add filtering
  • USB2: review/revise footprint
    • And reduce PCB thickness - 1.2mm?
  • Encoder: shuffle back (maybe shim between encoder + panel)
  • GPDI: pinswap PMOD routing for cleaner GPDI routing
  • GPDI: current limit +5V out (or switchable?)
  • GPDI: Fix PCA VREF2 resistor, add ability to disable EDID I2C bridge using EN line.
  • RP2040: switch to mfg-recommended XTAL (optional)
  • SC3: MicroMod Hole alignment is slightly off. Center it.
  • M2: reflowable standoffs, change source

nice

  • RP2040: add LEDs
  • RP2040: route encoder pins to spare hi-Z inputs
  • RP2040: put it on the local and eurorack-pmod I2C buses
  • RP2040: add ability to control PDN (I2S?)
  • RP2040: connect some pins to PMOD output for internal Vex JTAG?
    • Could even use the same JTAG pins? worth testing.
    • Extreme: move JTAG loopback to SC itself?!
    • Try this bodge on old Tiliqua
  • soldiercrab: second standoff hole for future?
  • soldiercrab: Route new I2C pins to RP2040 (or somewhere else)
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