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TL:DR, SPI clock level is not adjusted to SPI mode before CS is asserted low.
Consider the example program below on Raspberry Pi Pico. It performs alternative SPI transactions using two SPI settings and two respective CS outputs. The first setting uses SPI MODE0 and the second SPI MODE2. The expectation is that the clk idle level should be adjusted to the mode by SPI.beginTransaction() but it is adjusted only when the actual transfer starts, after the CS was asserted low.
The oscilloscope screenshot below shows a transaction using MODE0 and CS1. Notice how the idle level when CS is asserted low is incorrect for MODE0.
Expected behavior: SPI.beginTransaction() should adjust immediately the clk idle level to the mode passed to it. Or, provide an alternative method to adjust the mode and clock idle level before asserting the CS low.
TL:DR, SPI clock level is not adjusted to SPI mode before CS is asserted low.
Consider the example program below on Raspberry Pi Pico. It performs alternative SPI transactions using two SPI settings and two respective CS outputs. The first setting uses SPI MODE0 and the second SPI MODE2. The expectation is that the clk idle level should be adjusted to the mode by SPI.beginTransaction() but it is adjusted only when the actual transfer starts, after the CS was asserted low.
The oscilloscope screenshot below shows a transaction using MODE0 and CS1. Notice how the idle level when CS is asserted low is incorrect for MODE0.
Expected behavior: SPI.beginTransaction() should adjust immediately the clk idle level to the mode passed to it. Or, provide an alternative method to adjust the mode and clock idle level before asserting the CS low.
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