From fc81fc11182f56359a85c8f94aecfe5567d1329e Mon Sep 17 00:00:00 2001 From: George Hotz Date: Thu, 25 Jan 2018 23:51:52 -0800 Subject: [PATCH 01/13] uart dma in progress --- board/drivers/uart.h | 45 +++++++++++++++++++++++++++++++++++++++++++- board/main.c | 11 ++++++++--- 2 files changed, 52 insertions(+), 4 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index 2a21ffa23b8ef6..d79d74572fca8d 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -159,6 +159,36 @@ void uart_set_baud(USART_TypeDef *u, int baud) { } } +#define USART1_DMA_LEN 0x40 +char usart1_dma[USART1_DMA_LEN]; + +void DMA2_Stream5_IRQHandler(void) { + set_led(LED_BLUE, 1); + + DMA2_Stream5->CR &= DMA_SxCR_EN; + + uart_ring *q = &esp_ring; + + int i; + for (i = 0; i < USART1_DMA_LEN; i++) { + char c = usart1_dma[i]; + uint8_t next_w_ptr = q->w_ptr_rx + 1; + if (next_w_ptr != q->r_ptr_rx) { + q->elems_rx[q->w_ptr_rx] = c; + q->w_ptr_rx = next_w_ptr; + if (q->callback) q->callback(q); + } + } + + DMA2_Stream5->M0AR = (uint32_t)usart1_dma; + DMA2_Stream5->NDTR = USART1_DMA_LEN; + + DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN; + DMA2_Stream5->CR |= DMA_SxCR_TCIE; + + DMA2->HIFCR = DMA_HIFCR_CTCIF5; +} + void uart_init(USART_TypeDef *u, int baud) { // enable uart and tx+rx mode u->CR1 = USART_CR1_UE; @@ -173,7 +203,20 @@ void uart_init(USART_TypeDef *u, int baud) { u->CR1 |= USART_CR1_RXNEIE; if (u == USART1) { - NVIC_EnableIRQ(USART1_IRQn); + // DMA2, stream 2, channel 3 + DMA2_Stream5->M0AR = (uint32_t)usart1_dma; + DMA2_Stream5->NDTR = USART1_DMA_LEN; + DMA2_Stream5->PAR = (uint32_t)&(USART1->DR); + + // channel4, increment memory, periph -> memory, enable + DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN; + DMA2_Stream5->CR |= DMA_SxCR_TCIE; + + // this one uses DMA receiver + u->CR3 = USART_CR3_DMAR; + + NVIC_EnableIRQ(DMA2_Stream5_IRQn); + //NVIC_EnableIRQ(USART1_IRQn); } else if (u == USART2) { NVIC_EnableIRQ(USART2_IRQn); } else if (u == USART3) { diff --git a/board/main.c b/board/main.c index e50bcf8d27e8c6..de2cd4a04a2d0f 100644 --- a/board/main.c +++ b/board/main.c @@ -508,9 +508,12 @@ int main() { } #ifdef PANDA - // enable ESP uart - uart_init(USART1, 115200); - + if (is_grey_panda) { + uart_init(USART1, 9600); + } else { + // enable ESP uart + uart_init(USART1, 115200); + } // enable LIN uart_init(UART5, 10400); UART5->CR2 |= USART_CR2_LINEN; @@ -560,6 +563,8 @@ int main() { for (cnt=0;;cnt++) { can_live = pending_can_live; + puth(usart1_dma); puts(" "); puth(DMA2_Stream5->M0AR); puts(" "); puth(DMA2_Stream5->NDTR); puts("\n"); + #ifdef PANDA int current = adc_get(ADCCHAN_CURRENT); From 743d244513f1bba8732bf202394cf3388520337d Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 02:10:52 -0800 Subject: [PATCH 02/13] high baud rate works --- board/drivers/uart.h | 38 +++++++++++++++++++++++++++----------- board/main.c | 1 + tests/location_listener.py | 3 +-- 3 files changed, 29 insertions(+), 13 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index d79d74572fca8d..5232d1d27fa8a4 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -162,31 +162,45 @@ void uart_set_baud(USART_TypeDef *u, int baud) { #define USART1_DMA_LEN 0x40 char usart1_dma[USART1_DMA_LEN]; -void DMA2_Stream5_IRQHandler(void) { - set_led(LED_BLUE, 1); +void uart_dma_drain() { + if (DMA2_Stream5->NDTR == USART1_DMA_LEN) return; - DMA2_Stream5->CR &= DMA_SxCR_EN; + enter_critical_section(); uart_ring *q = &esp_ring; + // disable DMA + q->uart->CR3 &= ~USART_CR3_DMAR; + DMA2_Stream5->CR &= ~DMA_SxCR_EN; + + //puth(DMA2_Stream5->NDTR); puts("\n"); + int i; - for (i = 0; i < USART1_DMA_LEN; i++) { + for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { char c = usart1_dma[i]; uint8_t next_w_ptr = q->w_ptr_rx + 1; if (next_w_ptr != q->r_ptr_rx) { q->elems_rx[q->w_ptr_rx] = c; q->w_ptr_rx = next_w_ptr; - if (q->callback) q->callback(q); } } DMA2_Stream5->M0AR = (uint32_t)usart1_dma; DMA2_Stream5->NDTR = USART1_DMA_LEN; - DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN; - DMA2_Stream5->CR |= DMA_SxCR_TCIE; + // clear interrupts + DMA2->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5; + + // enable DMA + DMA2_Stream5->CR |= DMA_SxCR_EN; + q->uart->CR3 |= USART_CR3_DMAR; - DMA2->HIFCR = DMA_HIFCR_CTCIF5; + exit_critical_section(); +} + +void DMA2_Stream5_IRQHandler(void) { + //set_led(LED_BLUE, 1); + uart_dma_drain(); } void uart_init(USART_TypeDef *u, int baud) { @@ -200,7 +214,9 @@ void uart_init(USART_TypeDef *u, int baud) { // ** UART is ready to work ** // enable interrupts - u->CR1 |= USART_CR1_RXNEIE; + if (u != USART1) { + u->CR1 |= USART_CR1_RXNEIE; + } if (u == USART1) { // DMA2, stream 2, channel 3 @@ -210,13 +226,13 @@ void uart_init(USART_TypeDef *u, int baud) { // channel4, increment memory, periph -> memory, enable DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN; - DMA2_Stream5->CR |= DMA_SxCR_TCIE; + DMA2_Stream5->CR |= DMA_SxCR_TCIE | DMA_SxCR_HTIE; // this one uses DMA receiver u->CR3 = USART_CR3_DMAR; NVIC_EnableIRQ(DMA2_Stream5_IRQn); - //NVIC_EnableIRQ(USART1_IRQn); + NVIC_EnableIRQ(USART1_IRQn); } else if (u == USART2) { NVIC_EnableIRQ(USART2_IRQn); } else if (u == USART3) { diff --git a/board/main.c b/board/main.c index de2cd4a04a2d0f..0a34458d7432e2 100644 --- a/board/main.c +++ b/board/main.c @@ -311,6 +311,7 @@ int usb_cb_control_msg(USB_Setup_TypeDef *setup, uint8_t *resp, int hardwired) { case 0xe0: ur = get_ring_by_number(setup->b.wValue.w); if (!ur) break; + if (ur == &esp_ring) uart_dma_drain(); // read while ((resp_len < min(setup->b.wLength.w, MAX_RESP_LEN)) && getc(ur, (char*)&resp[resp_len])) { diff --git a/tests/location_listener.py b/tests/location_listener.py index 1f7fdb87fb691f..cbbb00d794f5e3 100755 --- a/tests/location_listener.py +++ b/tests/location_listener.py @@ -27,8 +27,7 @@ def add_nmea_checksum(msg): print ser.read(1024) # upping baud rate - # 460800 has issues - baudrate = 115200 + baudrate = 460800 print "upping baud rate" msg = add_nmea_checksum("$PUBX,41,1,0007,0003,%d,0" % baudrate)+"\r\n" From 7c34afe53323b5178e941deef997eafd34cddbf8 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 03:18:07 -0800 Subject: [PATCH 03/13] minor change --- board/drivers/uart.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index 5232d1d27fa8a4..9da3ea493a07c0 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -163,29 +163,31 @@ void uart_set_baud(USART_TypeDef *u, int baud) { char usart1_dma[USART1_DMA_LEN]; void uart_dma_drain() { - if (DMA2_Stream5->NDTR == USART1_DMA_LEN) return; - - enter_critical_section(); - uart_ring *q = &esp_ring; // disable DMA q->uart->CR3 &= ~USART_CR3_DMAR; DMA2_Stream5->CR &= ~DMA_SxCR_EN; - //puth(DMA2_Stream5->NDTR); puts("\n"); + if (DMA2_Stream5->NDTR != USART1_DMA_LEN) { + enter_critical_section(); - int i; - for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { - char c = usart1_dma[i]; - uint8_t next_w_ptr = q->w_ptr_rx + 1; - if (next_w_ptr != q->r_ptr_rx) { - q->elems_rx[q->w_ptr_rx] = c; - q->w_ptr_rx = next_w_ptr; + //puth(DMA2_Stream5->NDTR); puts("\n"); + + int i; + for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { + char c = usart1_dma[i]; + uint8_t next_w_ptr = q->w_ptr_rx + 1; + if (next_w_ptr != q->r_ptr_rx) { + q->elems_rx[q->w_ptr_rx] = c; + q->w_ptr_rx = next_w_ptr; + } } + + exit_critical_section(); } - DMA2_Stream5->M0AR = (uint32_t)usart1_dma; + // reset DMA len DMA2_Stream5->NDTR = USART1_DMA_LEN; // clear interrupts @@ -194,8 +196,6 @@ void uart_dma_drain() { // enable DMA DMA2_Stream5->CR |= DMA_SxCR_EN; q->uart->CR3 |= USART_CR3_DMAR; - - exit_critical_section(); } void DMA2_Stream5_IRQHandler(void) { From 497f069e49e3cded5ad959ab8548276e06df42b1 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 03:20:19 -0800 Subject: [PATCH 04/13] dma is all critical, no interrupts --- board/drivers/uart.h | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index 9da3ea493a07c0..7d71c872690fd0 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -165,26 +165,20 @@ char usart1_dma[USART1_DMA_LEN]; void uart_dma_drain() { uart_ring *q = &esp_ring; + enter_critical_section(); + // disable DMA q->uart->CR3 &= ~USART_CR3_DMAR; DMA2_Stream5->CR &= ~DMA_SxCR_EN; - if (DMA2_Stream5->NDTR != USART1_DMA_LEN) { - enter_critical_section(); - - //puth(DMA2_Stream5->NDTR); puts("\n"); - - int i; - for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { - char c = usart1_dma[i]; - uint8_t next_w_ptr = q->w_ptr_rx + 1; - if (next_w_ptr != q->r_ptr_rx) { - q->elems_rx[q->w_ptr_rx] = c; - q->w_ptr_rx = next_w_ptr; - } + int i; + for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { + char c = usart1_dma[i]; + uint8_t next_w_ptr = q->w_ptr_rx + 1; + if (next_w_ptr != q->r_ptr_rx) { + q->elems_rx[q->w_ptr_rx] = c; + q->w_ptr_rx = next_w_ptr; } - - exit_critical_section(); } // reset DMA len @@ -196,6 +190,8 @@ void uart_dma_drain() { // enable DMA DMA2_Stream5->CR |= DMA_SxCR_EN; q->uart->CR3 |= USART_CR3_DMAR; + + exit_critical_section(); } void DMA2_Stream5_IRQHandler(void) { From 37c52630a0296abb139d39e2f420a10f97be9703 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 03:54:47 -0800 Subject: [PATCH 05/13] big fifo --- board/drivers/drivers.h | 10 +++++----- board/drivers/uart.h | 16 ++++++++-------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/board/drivers/drivers.h b/board/drivers/drivers.h index 871ee8fcf1f88a..ce1e860ceb8a80 100644 --- a/board/drivers/drivers.h +++ b/board/drivers/drivers.h @@ -57,13 +57,13 @@ void usb_cb_enumeration_complete(); // ********************* UART ********************* // IRQs: USART1, USART2, USART3, UART5 -#define FIFO_SIZE 0x100 +#define FIFO_SIZE 0x400 typedef struct uart_ring { - uint8_t w_ptr_tx; - uint8_t r_ptr_tx; + uint16_t w_ptr_tx; + uint16_t r_ptr_tx; uint8_t elems_tx[FIFO_SIZE]; - uint8_t w_ptr_rx; - uint8_t r_ptr_rx; + uint16_t w_ptr_rx; + uint16_t r_ptr_rx; uint8_t elems_rx[FIFO_SIZE]; USART_TypeDef *uart; void (*callback)(struct uart_ring*); diff --git a/board/drivers/uart.h b/board/drivers/uart.h index 7d71c872690fd0..8fa195e01d39dd 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -52,7 +52,7 @@ void uart_ring_process(uart_ring *q) { if (q->w_ptr_tx != q->r_ptr_tx) { if (sr & USART_SR_TXE) { q->uart->DR = q->elems_tx[q->r_ptr_tx]; - q->r_ptr_tx += 1; + q->r_ptr_tx = (q->r_ptr_tx + 1) % FIFO_SIZE; } else { // push on interrupt later q->uart->CR1 |= USART_CR1_TXEIE; @@ -64,7 +64,7 @@ void uart_ring_process(uart_ring *q) { if (sr & USART_SR_RXNE || sr & USART_SR_ORE) { uint8_t c = q->uart->DR; // TODO: can drop packets - uint8_t next_w_ptr = q->w_ptr_rx + 1; + uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; if (next_w_ptr != q->r_ptr_rx) { q->elems_rx[q->w_ptr_rx] = c; q->w_ptr_rx = next_w_ptr; @@ -92,7 +92,7 @@ int getc(uart_ring *q, char *elem) { enter_critical_section(); if (q->w_ptr_rx != q->r_ptr_rx) { *elem = q->elems_rx[q->r_ptr_rx]; - q->r_ptr_rx += 1; + q->r_ptr_rx = (q->r_ptr_rx + 1) % FIFO_SIZE; ret = 1; } exit_critical_section(); @@ -102,10 +102,10 @@ int getc(uart_ring *q, char *elem) { int injectc(uart_ring *q, char elem) { int ret = 0; - uint8_t next_w_ptr; + uint16_t next_w_ptr; enter_critical_section(); - next_w_ptr = q->w_ptr_rx + 1; + next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; if (next_w_ptr != q->r_ptr_rx) { q->elems_rx[q->w_ptr_rx] = elem; q->w_ptr_rx = next_w_ptr; @@ -118,10 +118,10 @@ int injectc(uart_ring *q, char elem) { int putc(uart_ring *q, char elem) { int ret = 0; - uint8_t next_w_ptr; + uint16_t next_w_ptr; enter_critical_section(); - next_w_ptr = q->w_ptr_tx + 1; + next_w_ptr = (q->w_ptr_tx + 1) % FIFO_SIZE; if (next_w_ptr != q->r_ptr_tx) { q->elems_tx[q->w_ptr_tx] = elem; q->w_ptr_tx = next_w_ptr; @@ -174,7 +174,7 @@ void uart_dma_drain() { int i; for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { char c = usart1_dma[i]; - uint8_t next_w_ptr = q->w_ptr_rx + 1; + uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; if (next_w_ptr != q->r_ptr_rx) { q->elems_rx[q->w_ptr_rx] = c; q->w_ptr_rx = next_w_ptr; From fd053760d9792837b0a29add4212c0b35f558bdf Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 03:58:57 -0800 Subject: [PATCH 06/13] comment out debug --- board/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/main.c b/board/main.c index 0a34458d7432e2..5d239bdc6211ea 100644 --- a/board/main.c +++ b/board/main.c @@ -564,7 +564,7 @@ int main() { for (cnt=0;;cnt++) { can_live = pending_can_live; - puth(usart1_dma); puts(" "); puth(DMA2_Stream5->M0AR); puts(" "); puth(DMA2_Stream5->NDTR); puts("\n"); + //puth(usart1_dma); puts(" "); puth(DMA2_Stream5->M0AR); puts(" "); puth(DMA2_Stream5->NDTR); puts("\n"); #ifdef PANDA int current = adc_get(ADCCHAN_CURRENT); From 915cd84f3382bd68d9fa122c208184b431d5813b Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 04:32:06 -0800 Subject: [PATCH 07/13] ugh, ok, need that --- board/drivers/uart.h | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index 8fa195e01d39dd..e749c6b8bed2a1 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -64,11 +64,13 @@ void uart_ring_process(uart_ring *q) { if (sr & USART_SR_RXNE || sr & USART_SR_ORE) { uint8_t c = q->uart->DR; // TODO: can drop packets - uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; - if (next_w_ptr != q->r_ptr_rx) { - q->elems_rx[q->w_ptr_rx] = c; - q->w_ptr_rx = next_w_ptr; - if (q->callback) q->callback(q); + if (q != &esp_ring) { + uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; + if (next_w_ptr != q->r_ptr_rx) { + q->elems_rx[q->w_ptr_rx] = c; + q->w_ptr_rx = next_w_ptr; + if (q->callback) q->callback(q); + } } } From 1465aa478f101b2aab148d95877ff793a8717bf2 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 04:56:33 -0800 Subject: [PATCH 08/13] ok, it's fixed --- board/drivers/uart.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index e749c6b8bed2a1..e1b98090e04cc6 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -172,6 +172,7 @@ void uart_dma_drain() { // disable DMA q->uart->CR3 &= ~USART_CR3_DMAR; DMA2_Stream5->CR &= ~DMA_SxCR_EN; + while (DMA2_Stream5->CR & DMA_SxCR_EN); int i; for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { @@ -188,6 +189,7 @@ void uart_dma_drain() { // clear interrupts DMA2->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5; + //DMA2->HIFCR = DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5; // enable DMA DMA2_Stream5->CR |= DMA_SxCR_EN; @@ -199,6 +201,7 @@ void uart_dma_drain() { void DMA2_Stream5_IRQHandler(void) { //set_led(LED_BLUE, 1); uart_dma_drain(); + //set_led(LED_BLUE, 0); } void uart_init(USART_TypeDef *u, int baud) { @@ -224,7 +227,7 @@ void uart_init(USART_TypeDef *u, int baud) { // channel4, increment memory, periph -> memory, enable DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN; - DMA2_Stream5->CR |= DMA_SxCR_TCIE | DMA_SxCR_HTIE; + DMA2_Stream5->CR |= DMA_SxCR_HTIE; // this one uses DMA receiver u->CR3 = USART_CR3_DMAR; From 7fa4808cf8595f43ef8dca6edcf7cef1a4bc318a Mon Sep 17 00:00:00 2001 From: George Hotz Date: Sun, 28 Jan 2018 11:20:28 -0800 Subject: [PATCH 09/13] froze up, maybe thats the fix --- board/drivers/uart.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index e1b98090e04cc6..c664894694848e 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -170,7 +170,7 @@ void uart_dma_drain() { enter_critical_section(); // disable DMA - q->uart->CR3 &= ~USART_CR3_DMAR; + //q->uart->CR3 &= ~USART_CR3_DMAR; DMA2_Stream5->CR &= ~DMA_SxCR_EN; while (DMA2_Stream5->CR & DMA_SxCR_EN); @@ -193,7 +193,7 @@ void uart_dma_drain() { // enable DMA DMA2_Stream5->CR |= DMA_SxCR_EN; - q->uart->CR3 |= USART_CR3_DMAR; + //q->uart->CR3 |= USART_CR3_DMAR; exit_critical_section(); } @@ -226,8 +226,7 @@ void uart_init(USART_TypeDef *u, int baud) { DMA2_Stream5->PAR = (uint32_t)&(USART1->DR); // channel4, increment memory, periph -> memory, enable - DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_EN; - DMA2_Stream5->CR |= DMA_SxCR_HTIE; + DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_HTIE | DMA_SxCR_EN; // this one uses DMA receiver u->CR3 = USART_CR3_DMAR; From 8b7e8495db25199f255eb74452537125f0f77628 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Mon, 29 Jan 2018 00:59:48 -0800 Subject: [PATCH 10/13] working now --- board/drivers/uart.h | 46 +++++++++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index c664894694848e..a8e64b887fd33e 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -169,31 +169,33 @@ void uart_dma_drain() { enter_critical_section(); - // disable DMA - //q->uart->CR3 &= ~USART_CR3_DMAR; - DMA2_Stream5->CR &= ~DMA_SxCR_EN; - while (DMA2_Stream5->CR & DMA_SxCR_EN); - - int i; - for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { - char c = usart1_dma[i]; - uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; - if (next_w_ptr != q->r_ptr_rx) { - q->elems_rx[q->w_ptr_rx] = c; - q->w_ptr_rx = next_w_ptr; + if (DMA2_Stream5->NDTR != USART1_DMA_LEN) { + // disable DMA + //q->uart->CR3 &= ~USART_CR3_DMAR; + DMA2_Stream5->CR &= ~DMA_SxCR_EN; + while (DMA2_Stream5->CR & DMA_SxCR_EN); + + int i; + for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) { + char c = usart1_dma[i]; + uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE; + if (next_w_ptr != q->r_ptr_rx) { + q->elems_rx[q->w_ptr_rx] = c; + q->w_ptr_rx = next_w_ptr; + } } - } - // reset DMA len - DMA2_Stream5->NDTR = USART1_DMA_LEN; + // reset DMA len + DMA2_Stream5->NDTR = USART1_DMA_LEN; - // clear interrupts - DMA2->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5; - //DMA2->HIFCR = DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5; + // clear interrupts + DMA2->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5; + //DMA2->HIFCR = DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5; - // enable DMA - DMA2_Stream5->CR |= DMA_SxCR_EN; - //q->uart->CR3 |= USART_CR3_DMAR; + // enable DMA + DMA2_Stream5->CR |= DMA_SxCR_EN; + //q->uart->CR3 |= USART_CR3_DMAR; + } exit_critical_section(); } @@ -226,7 +228,7 @@ void uart_init(USART_TypeDef *u, int baud) { DMA2_Stream5->PAR = (uint32_t)&(USART1->DR); // channel4, increment memory, periph -> memory, enable - DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_HTIE | DMA_SxCR_EN; + DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_HTIE | DMA_SxCR_TCIE | DMA_SxCR_EN; // this one uses DMA receiver u->CR3 = USART_CR3_DMAR; From a9f6bf05956c66c6bfb55002e8bf4771137e3174 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Mon, 29 Jan 2018 01:32:37 -0800 Subject: [PATCH 11/13] this --- board/drivers/uart.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index a8e64b887fd33e..d8ce18a4e40b11 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -169,7 +169,7 @@ void uart_dma_drain() { enter_critical_section(); - if (DMA2_Stream5->NDTR != USART1_DMA_LEN) { + if (DMA2->HISR & DMA_HISR_TCIF5 || DMA2->HISR & DMA_HISR_HTIF5 || DMA2_Stream5->NDTR != USART1_DMA_LEN) { // disable DMA //q->uart->CR3 &= ~USART_CR3_DMAR; DMA2_Stream5->CR &= ~DMA_SxCR_EN; From be99ffca784030454227870976ee43281393c2ca Mon Sep 17 00:00:00 2001 From: George Hotz Date: Mon, 29 Jan 2018 01:42:56 -0800 Subject: [PATCH 12/13] ok that doesn't hurt i think --- board/drivers/uart.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index d8ce18a4e40b11..75a53989fd545b 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -171,7 +171,7 @@ void uart_dma_drain() { if (DMA2->HISR & DMA_HISR_TCIF5 || DMA2->HISR & DMA_HISR_HTIF5 || DMA2_Stream5->NDTR != USART1_DMA_LEN) { // disable DMA - //q->uart->CR3 &= ~USART_CR3_DMAR; + q->uart->CR3 &= ~USART_CR3_DMAR; DMA2_Stream5->CR &= ~DMA_SxCR_EN; while (DMA2_Stream5->CR & DMA_SxCR_EN); @@ -194,7 +194,7 @@ void uart_dma_drain() { // enable DMA DMA2_Stream5->CR |= DMA_SxCR_EN; - //q->uart->CR3 |= USART_CR3_DMAR; + q->uart->CR3 |= USART_CR3_DMAR; } exit_critical_section(); From fd68f86cad8051fd00298846e8c506ccbeb399e8 Mon Sep 17 00:00:00 2001 From: George Hotz Date: Mon, 29 Jan 2018 02:03:46 -0800 Subject: [PATCH 13/13] smallr --- board/drivers/uart.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/drivers/uart.h b/board/drivers/uart.h index 75a53989fd545b..9c01416920d230 100644 --- a/board/drivers/uart.h +++ b/board/drivers/uart.h @@ -161,7 +161,7 @@ void uart_set_baud(USART_TypeDef *u, int baud) { } } -#define USART1_DMA_LEN 0x40 +#define USART1_DMA_LEN 0x20 char usart1_dma[USART1_DMA_LEN]; void uart_dma_drain() {