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Output data rate unstable #1

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avsa242 opened this issue May 10, 2024 · 1 comment
Open

Output data rate unstable #1

avsa242 opened this issue May 10, 2024 · 1 comment
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avsa242 commented May 10, 2024

The output data is very unstable when setting the rate, especially any value other than 1000Hz. The actual behavior doesn't seem to be in proportion with the set rate at all. In many cases, several seconds may go by before the data is actually updated again. The value being set in the ODR reg ($10) looks correct when observed on an LA trace.
@avsa242 avsa242 added the bug Something isn't working label May 10, 2024
@avsa242 avsa242 self-assigned this May 10, 2024
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avsa242 commented May 31, 2024

It seems much better behaved when set to low-power mode: opmode(LOW_PWR)
The data ready signal doesn't seem to be particularly useful, whether read over I2C or using the interrupt pin as a sync signal, but the data is actually output at a rate appropriate to what was set.

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