diff --git a/src/target/ch32vx.c b/src/target/ch32vx.c
index 767814a3747..ac178d7c68b 100644
--- a/src/target/ch32vx.c
+++ b/src/target/ch32vx.c
@@ -25,6 +25,11 @@
 #include "target_internal.h"
 #include "buffer_utils.h"
 
+/* IDCODE register */
+#define CH32V003X_IDCODE 0x1ffff7c4U
+// return ((*(uint32_t *)0x1ffff7c4) >> 16); // REVID
+// return ((*(uint32_t *)0x1ffff7c4) & ((uint32_t)0x0000ffff)); // DEVID
+
 /* IDCODE register */
 #define CH32VX_IDCODE               0x1ffff704U
 #define CH32VX_IDCODE_MASK          0x0ffffff0f
@@ -61,6 +66,35 @@ static void ch32vx_read_uid(target_s *const t, uint8_t *const uid)
 		write_be4(uid, uid_reg_offset, target_mem_read32(t, CH32VX_ESIG_UID1 + uid_reg_offset));
 }
 
+bool ch32v003x_probe(target_s *const target)
+{
+	const uint32_t idcode = target_mem_read32(target, CH32V003X_IDCODE);
+
+	switch (idcode & CH32VX_IDCODE_MASK) {
+	case 0x00300500U: /* CH32V003F4P6 */
+	case 0x00310500U: /* CH32V003F4U6 */
+	case 0x00320500U: /* CH32V003A4M6 */
+	case 0x00330500U: /* CH32V003J4M6 */
+		break;
+	default:
+		DEBUG_INFO("Unrecognized CH32V003x IDCODE: 0x%08x\n", idcode);
+		return false;
+		break;
+	}
+
+	target->driver = "CH32V003";
+
+	const size_t flash_size = ch32vx_read_flash_size(target);
+	DEBUG_INFO("CH32V003x flash size: %zu\n", flash_size);
+	(void)flash_size;
+
+	target->part_id = idcode;
+
+	target_add_commands(target, ch32vx_cmd_list, "CH32Vx");
+
+	return true;
+}
+
 bool ch32vx_probe(target_s *const target)
 {
 	const uint32_t idcode = target_mem_read32(target, CH32VX_IDCODE);
@@ -78,6 +112,7 @@ bool ch32vx_probe(target_s *const target)
 	case 0x30700508U: /* CH32V307VCT6 */
 		break;
 	default:
+		DEBUG_INFO("Unrecognized CH32Vx IDCODE: 0x%08x\n", idcode);
 		return false;
 		break;
 	}
diff --git a/src/target/riscv32.c b/src/target/riscv32.c
index 2e7fa46e583..97af7aba64d 100644
--- a/src/target/riscv32.c
+++ b/src/target/riscv32.c
@@ -97,6 +97,7 @@ bool riscv32_probe(target_s *const target)
 		PROBE(gd32vf1_probe);
 		break;
 	case NOT_JEP106_MANUFACTURER_WCH:
+		PROBE(ch32v003x_probe);
 		PROBE(ch32vx_probe);
 		break;
 	}
diff --git a/src/target/target_probe.c b/src/target/target_probe.c
index 1ca8c0d3a63..abe31a35f8e 100644
--- a/src/target/target_probe.c
+++ b/src/target/target_probe.c
@@ -84,6 +84,7 @@ CORTEXM_PROBE_WEAK_NOP(efm32_aap_probe)
 CORTEXM_PROBE_WEAK_NOP(rp_rescue_probe)
 CORTEXM_PROBE_WEAK_NOP(lpc55_dmap_probe)
 
+TARGET_PROBE_WEAK_NOP(ch32v003x_probe)
 TARGET_PROBE_WEAK_NOP(ch32vx_probe)
 TARGET_PROBE_WEAK_NOP(ch32f1_probe)
 TARGET_PROBE_WEAK_NOP(gd32f1_probe)
diff --git a/src/target/target_probe.h b/src/target/target_probe.h
index f161d93b54a..2c718d687a5 100644
--- a/src/target/target_probe.h
+++ b/src/target/target_probe.h
@@ -51,6 +51,7 @@ bool efm32_aap_probe(adiv5_access_port_s *ap);
 bool rp_rescue_probe(adiv5_access_port_s *ap);
 bool lpc55_dmap_probe(adiv5_access_port_s *ap);
 
+bool ch32v003x_probe(target_s *target);
 bool ch32vx_probe(target_s *target);
 bool ch32f1_probe(target_s *target);   // will catch all the clones
 bool at32f40x_probe(target_s *target); // STM32 clones from Artery