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*update question 1 試了給compiler augment -Os 或 O1 可以壓在8KB以內,成功跑出firmware給的flag |
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@ZGCiou Great! This is a smart method. In Lab 4.2, some teams use compiler optimization to push the loop code into CPU cache (64B instruction cache) and get pretty amazing results. |
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Block Memory Generator在Basic的地方把mode調成Stand Alone就可以調整大小了,不過調mode對於電路是否有影響要測試一下 |
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我們在合併四種workload之後compile出的.hex file大小為14KB
超出FPGA上block memory generator的8KB
照我的理解這樣應該沒有辦法把完整的firmware放上FPGA運行
在FPGA上做驗證時也出現預期之外的結果
應該出現AB61卻只停在AB51
我們猜測有可能和.hex超出8K有關
之後我有嘗試修改block memory generator的大小
但是在vivado內size的欄位是固定無法修改
就算下指令修改 開始run synthesis或是validation design後又會變回8K
總結一下我的問題
不知道有沒有人遇到類似的問題或是能幫我解答疑問
感謝
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