Lab3 - Configuration register re-definition to save gate resource

[boledulab]

以下是原 configuration register definition
Address
0x00 – [0] - ap_start (r/w)
set when ap_start signal assert
reset, when start data transfer, i.e. 1st axi-stream data come in
[1] – ap_done (ro) -> when FIR process all the dataset, i.e. receive tlast, and last Y is generated and transferred
[2] – ap_idle (ro) -> indicate FIR is actively processing data
0x10-14 - data-length
0x20-FF – Tap parameters, (e.g., 0x20-23 Tap0, 0x24-0x27 Tap1 .. in sequence …)
若是我把 tap parameter 的位置改到
0x80 - FF - Tap parameters (e.g. 0x80-83 Tap0, 0x84-0x87 Tap1 .... in sequence )
若是對節省 Gate resource 有幫助，你們可以更改如上。